WO2012008203A1 - Method of manufacturing tft using photosensitive applying-type electrode material - Google Patents

Method of manufacturing tft using photosensitive applying-type electrode material Download PDF

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Publication number
WO2012008203A1
WO2012008203A1 PCT/JP2011/060263 JP2011060263W WO2012008203A1 WO 2012008203 A1 WO2012008203 A1 WO 2012008203A1 JP 2011060263 W JP2011060263 W JP 2011060263W WO 2012008203 A1 WO2012008203 A1 WO 2012008203A1
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electrode material
exposure
electrode
tft
substrate
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PCT/JP2011/060263
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French (fr)
Japanese (ja)
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杉野谷　充
寛昌 小林
昇 石曽根
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セイコーインスツル株式会社
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/481—Insulated gate field-effect transistors [IGFETs] characterised by the gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing

Definitions

  • the present invention relates to a method for manufacturing a TFT using a photosensitive coating type electrode material.
  • TFTs thin film transistors
  • photolithography is widely applied when patterning TFT electrodes in general.
  • photolithography requires a process of forming a photoresist pattern once by laminating a photoresist film on a film formed of the target material, and the process is complicated.
  • utilization efficiency, such as these, is low and cost becomes expensive accompanies.
  • ITO Indium Tin Oxide
  • the TFTs used in the above-mentioned organic EL and liquid crystal display devices, and the ITO used for wiring electrodes differ depending on the substrate size. Therefore, the cost of changing and remodeling the device with the recent increase in substrate size is incurred. To do.
  • Patent Document 1 a method for producing an organic EL element by ink jet printing has been studied from the advantages of maskless, material use efficiency, and large area. Also, as disclosed in Patent Document 2, an ink jet method has been proposed as a method of filling a conductive polymer in a concave portion of a TFT in order to improve the quality of an organic EL. In Patent Document 3, a method of forming a wiring on a substrate by an ink jet method is proposed. Has been proposed.
  • the fineness is remarkably deteriorated due to the wettability between the photosensitive coating electrode material (hereinafter referred to as electrode material) and the target substrate, the discharge amount, and the discharge environment, and a desired pattern contour cannot be obtained. There is. Further, it is known that the conductive ink ejected from the head portion is displaced until it adheres to the substrate, and there is a case where an accurate pattern cannot be formed at a desired position.
  • the present invention proposes a method for overcoming the above-described problems and forming electrodes and wiring patterns with high resolution and high accuracy by a simple method. According to the present invention, the process can be simplified much more than the conventional method of forming a metal film or the like, applying a resist, exposing and developing, and etching to form a pattern.
  • the present invention provides a method for manufacturing a TFT using a photosensitive coating type electrode material that forms an electronic circuit with an electrode material made of a photosensitive organic material on a substrate. , A step of applying an electrode material on the substrate and pre-baking and drying, a first exposure step of irradiating the electrode material with light through a predetermined mask, and immersing the electrode material in a developing solution. And a second exposure step of curing the electrode material with light having an irradiation intensity stronger than that of the first exposure step. TFT manufacturing method.
  • electrodes and wiring are patterned on a glass substrate using screen printing and a spin coater, and the electrode material used is an electrode material mixed with PDOT: PSS, polyaniline, or silver particles.
  • an electrode is made of these materials, it is often applied to a pattern with low definition or the entire substrate. For these reasons, in the case of a pattern with high definition, the electrode part is disconnected at the time of development, or the electrode material remains between the electrodes and the like, resulting in a desired pattern not being obtained.
  • parallel light vertical light that enters perpendicularly to the substrate surface
  • a light source for exposure a light source for exposure.
  • the reason for this is that when mask exposure is performed, light that enters in a random direction with respect to the substrate surface (hereinafter referred to as diffused light) exposes unnecessary electrode portions, and a desired pattern is obtained. It is caused by not.
  • the parallel light is usually expensive in terms of equipment, and the parallelism between the substrate and the light source greatly affects the patterning accuracy, it is necessary to fix the substrate position each time exposure is performed. As described above, parallel light has problems in both cost and productivity.
  • an electrode producing method is provided that achieves both cost and productivity and has improved patterning accuracy as compared with a normal ink jet method. Further, the present invention uses the first diffused light for the purpose of patterning and the second diffused light having a larger dose than the first exposure for the purpose of developing conductivity.
  • the problem can be solved in the simplification of the process, the material use efficiency, the cost, and the various substrate sizes which are problems in the conventional method.
  • electrode patterning including simple, low-cost, and high-precision wiring.
  • the method of applying the electrode material was exemplified by the screen printing and the spin coater, but the application method is not limited to this, and a roll coater, a bar coater, or the like is appropriately selected. it can.
  • substrate used for this invention is shown typically.
  • 1 schematically shows a state of a substrate subjected to etching used in the present invention.
  • the cross-sectional structure of the electrode material used for this invention is shown typically.
  • the cross-sectional structure of the electrode material after pre-baking used for this invention is shown typically.
  • the cross-sectional structure of the electrode material reaction state after performing the first UV exposure used in the present invention is schematically shown.
  • the cross-sectional structure of the electrode material reaction state after performing the 2nd UV exposure used for this invention is shown typically.
  • the cross-sectional structure of the electrode material reaction state after performing the post-baking used for this invention is shown typically.
  • FIG. 1 schematically shows a cross-sectional configuration in a state where a gate electrode and an insulating film are provided on the electrode in advance in Example 1 used in the present invention.
  • 1 schematically shows a cross-sectional configuration in a state where an electrode material in Example 2 used in the present invention is applied.
  • 1 schematically shows a cross-sectional configuration of a substrate irradiated with a first UV exposure from the back surface used in the present invention.
  • the cross-sectional structure of the substrate state after performing the development process used in the present invention is schematically shown.
  • the cross-sectional structure of the state which has dripped the liquid organic semiconductor used for this invention is shown typically.
  • 1 schematically shows a cross-sectional configuration of a substrate in a completed state of a planar organic TFT in Example 1 used in the present invention.
  • 2 schematically shows a cross-sectional configuration in a state where a liquid organic semiconductor is dropped on an insulating layer in Example 2 used in the present invention.
  • 1 schematically shows a cross-sectional configuration in a state where an electrode material is applied on a semiconductor layer in Example 2 used in the present invention.
  • FIG. 2 schematically shows a cross-sectional configuration in which UV exposure is applied from the back surface of a substrate in Example 2 used in the present invention.
  • 1 schematically shows a cross-sectional configuration of a substrate in a completed state of a stagger type organic TFT in Example 2 used in the present invention.
  • FIGS. 1 to 7 conceptually showing an electrode preparation method by double exposure using the electrode material according to the present invention.
  • FIG. 1 schematically shows outline printing by screen printing
  • FIG. 2 schematically shows an etched state in FIG.
  • the electrode material 2 is partially coated on the glass substrate 1 by screen printing, or is entirely coated by a spin coater.
  • the usage amount of the material 2 can be reduced by printing the outline of the pattern in advance by screen printing as compared with the spin coater. Further, in the etching process described later, since the material 1 to be eluted is reduced, it is possible to increase the number of continuous use of the etching solution.
  • FIG. 3 schematically shows a cross-sectional configuration of the electrode material used in the present invention.
  • pre-baking heat is applied from the back surface of the substrate 1 using a hot plate to vaporize the solvent 3 in the coating electrode material 2 on the substrate 1 (hereinafter referred to as pre-baking).
  • pre-baking heat is applied from the surface of the substrate 1
  • the electrode material 2 is dried from the surface, so that the volume shrinkage rate between the inside and the surface is different, and the inside of the material cannot follow the volume change of the surface, so that the electrode may crack. is there. Therefore, it is desirable to apply heat from the back surface so that the internal solvent can be vaporized without delay.
  • the solvent 3 is vaporized.
  • silver particles or silver nanoparticles (hereinafter referred to as metal particles) are dispersed in a photosensitive polymer dissolved in the solvent 3. The distance between them becomes close, and the second heating step (hereinafter referred to as post-bake) described later facilitates the bonding between the metal particles 4, and as a result, the electric resistance can be lowered.
  • concentration of the photosensitive polymer becomes high, it can react with UV efficiently and can be sensitized with a low exposure amount.
  • FIG. 4 shows a cross-sectional view of a substrate cross-sectional state after pre-baking (photosensitive polymer 5 after pre-baking), and FIG. 5 shows an electrode material reaction state after the first UV exposure (an organic active species is expressed).
  • the obtained photosensitive polymer 7) is shown as a cross-sectional view.
  • exposure with UV light 6 is performed.
  • As an exposure method there is generally exposure through a mask (hereinafter referred to as mask exposure).
  • a light-shielding portion to be a pattern is formed in advance on the glass substrate 1, and a coating type photosensitive material is applied thereon, and then the back surface.
  • back exposure an exposure method for obtaining a desired pattern by exposure from above
  • the back exposure is desirable because the channel width is very narrow.
  • a UV irradiation amount of about 1% to 10% with respect to the reaction exposure amount of the electrode material 2 is exposed as diffused light (hereinafter referred to as a first UV exposure).
  • a first UV exposure a UV irradiation amount of about 1% to 10% with respect to the reaction exposure amount of the electrode material 2
  • the UV light and the photosensitive polymer in the electrode material 2 react to generate reactive species.
  • reaction active species generated in this way, reaction as an organic reaction active species and reaction as a metal complex.
  • the former has a role as a resist material that does not elute into the developer in the etching process, and the latter It exists between the metal particles 4 and has the role of expressing the conductivity of the electrode.
  • the UV light also travels to the electrode material 2 immediately below the light shielding portion.
  • the UV light to be exposed is smaller than the reaction exposure amount of the electrode material 2, and the light amount of the UV light in the mask opening portion.
  • the exposure amount of the UV light that wraps directly under the mask light-shielding part is even smaller, does not react with the electrode material, and does not generate reactive species.
  • FIG. 6 schematically shows a reaction state of the electrode material subjected to the second UV exposure (photosensitive polymer 8 in which a reaction as a metal complex is expressed).
  • FIG. 7 schematically shows the reaction state of the electrode material after post-baking (photosensitive polymer 9 after post-baking).
  • the photosensitive polymer after the second exposure also exhibits a function as a metal complex, but it alone has a high electric resistance.
  • post-baking here, the metal particles 4 are sintered, the particles are bonded to each other, and the metal complex is present so as to fill the gaps between the metal particles 4, so that the electric resistance is low, which is sufficient as an electrode. Function can be obtained.
  • FIG. 8 is a cross-sectional view showing a state in which the gate electrode 10 and the insulating film 11 are provided on the glass substrate 20 in advance in this embodiment.
  • the gate electrode 10 of this embodiment is based on patterning of photosensitive silver particles (manufactured by Mitsubishi Paper Industries).
  • the insulating film 11 is a polyimide organic insulating film formed by spin coater or screen printing.
  • FIG. 9 is a sectional view showing a state in which the electrode material 12 is applied in this embodiment.
  • the electrode material 12 (Toray: Raybrid) is printed on the organic insulating film 11 by screen printing.
  • the film thickness to be applied is about 4 ⁇ m to 10 ⁇ m, and it is easy to obtain a desired pattern while keeping the electric resistance low.
  • the coated glass substrate 20 is heated from the back surface.
  • the heating condition is preferably about 80 ° C. to 100 ° C. and between 60 sec and 120 sec. When these heating temperatures are low or the heating time is short, the solvent in the electrode material 12 does not volatilize and the surface may become sticky. Further, the reaction due to UV exposure is less likely to occur thereafter.
  • the heating temperature is high or the heating time is long, the electrode material 12 reacts excessively with heat, and organic reactive species are expressed in the entire coated area. This pattern is difficult to obtain.
  • FIG. 10 is a cross-sectional view in which UV exposure is applied from the back to the configuration of FIG.
  • Exposure amount at this time is preferably 10 mJ / cm 2 from 3 mJ / cm 2. An exposure amount larger than this affects even the electrode material 12 layer located under the gate electrode 10 in FIG. 10, causing a reaction, and a desired pattern cannot be obtained.
  • FIG. 11 shows a cross-sectional view of the substrate after the development process.
  • the electrode material 12 applied on the gate electrode 10 is less affected by UV exposure, the organic reaction active species does not appear and the resist material does not function as a resist and is etched. Further, since the electrode material 12 other than just above the gate electrode 10 is exposed with UV, organic reactive active species are expressed, and since it has a function as a resist, it is not etched and the electrode material 12 remains. Therefore, a desired pattern can be obtained in this state.
  • An aqueous sodium carbonate solution is used as the developer in this step, and the weight concentration is preferably 2% to 5%. If the concentration exceeds 5%, it may react with the insulating film layer 11.
  • the vibration developing method is used. However, it is also possible to use a method of dipping (dip development), a method of developing by dropping a developer on the substrate (step paddle development), or the like. In any of the development methods, it is necessary to adjust the temperature-controlled developer and development time according to the film thickness of the electrode.
  • the developing solution temperature is kept at room temperature (20 ° C.), and development is performed at a frequency of about 10 Hz to 50 Hz for about 3 to 10 minutes. Depending on conditions, the insulating film 11 may be damaged.
  • Exposure amount at this time is sufficiently larger than the reaction exposure of the electrode material 12 (preferably 1000 mJ / cm 2 from 500mJ / cm 2), the present embodiment has been exposed to 500 mJ / cm 2. Thereby, reaction as a metal complex advances in the electrode material 12, and a conductive function can be expressed.
  • a post-bake process is performed. At this time, baking is performed under conditions of a temperature of about 180 ° C. to 200 ° C. and about 1 hour. If the temperature exceeds 200 °, the polyimide insulating film 11 may be mutated, and the function as the insulating film 11 and the organic semiconductor layer formed thereafter may be contaminated. Is desirable.
  • FIG. 12 shows a state where the liquid organic semiconductor is dropped as a cross-sectional view.
  • semiconductor layers used in TFTs are amorphous silicon (hereinafter referred to as ⁇ -Si) and polysilicon (hereinafter referred to as P-Si).
  • ⁇ -Si amorphous silicon
  • P-Si polysilicon
  • these film formation methods are generally performed by laser, vacuum deposition, CVD (Chemical Vapor Deposition), etc., but in these methods, the temperature applied to the substrate in the process is high, and the substrate side on which the film is formed is Must be heat resistant.
  • a coating type organic semiconductor material 14 (Merck: P-BTTT) is selected as a semiconductor layer film forming material and dropped from an apparatus 13 for coating it.
  • the characteristics of the coating type organic semiconductor material 14 are that it can be applied at a low temperature by a dispenser or the like, an ink jet, a spin coater or a bar coater, so that the process can be simplified and a large-scale apparatus is not required. It can be suppressed. Further, since the substrate does not need to be heat resistant, it can be formed on a resin system such as PET.
  • the coating-type semiconductor material 14 is dropped onto the gate electrode 10 in FIG.
  • the concentration at this time is about 0.1% to 1%.
  • FIG. 13 shows a cross-sectional view of the substrate in the completed state of the organic TFT in this example.
  • the dropped organic semiconductor material 15 is heated at 80 ° C. for about 5 minutes to evaporate the solvent.
  • the structure in the semiconductor layer changes greatly depending on the subsequent slow cooling conditions.
  • Film formation is performed at a slow cooling rate of about 80 ° C. to 60 ° C. in about 60 minutes, and the creation of a planar type printable organic TFT composed entirely of a coating type material is completed.
  • Example 2 is an example applied to a staggered TFT structure in which a semiconductor layer is formed under a source electrode and a drain electrode layer. Further, the present embodiment is a content in which the semiconductor film forming process and the electrode forming process of the first embodiment are interchanged.
  • FIG. 14 is a sectional view showing a state where the liquid organic semiconductor 14 is dropped from the device 13 on the insulating layer 11.
  • the materials, dropping conditions, and film forming conditions are the same as in Example 1.
  • FIG. 15 is a sectional view showing a state in which the electrode material 12 is applied on the semiconductor layer 15.
  • the materials, coating conditions, and film forming conditions are the same as those in Example 1.
  • FIG. 16 is a cross-sectional view in which the structure of FIG. 15 is irradiated with UV exposure from the back.
  • the UV exposure amount is preferably equal to or less than that of the first embodiment. If the exposure amount is large, the semiconductor layer 15 may be damaged, and adverse effects such as an increase in the threshold voltage (switch ON / OFF voltage) may occur. The same can be said for the second exposure step.
  • FIG. 17 shows a cross-sectional view of the substrate in the completed state of the organic TFT in this example.
  • a TFT element created by an active matrix driving method such as an organic EL or a liquid crystal display device or a wiring electrode having a functional problem even in rough definition such as a touch panel is problematic in the conventional method.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

Conventional electrode forming methods such as photolithography or mask sputtering had problems difficult to solve, such as simplification of the process, efficiency in the use of materials, cost, and being adaptable to various substrate sizes, and ink-jet methods had a problem in that high definition patterns could not be attained. A desired electrode patterning is achieved by using a photosensitive applying-type electrode material. In an electrode forming process of the present invention, the desired pattern can be obtained by implementing a first exposure and a second exposure having an amount of exposure greater than the first exposure, using a lamp having diffused light as the light source thereof, which is advantageous in cost. Problems that could not be solved by conventional manufacturing methods of TFT, such as efficiency in the use of materials, cost, and being adaptable to various substrate sizes, for examples, and a problem that could not be solved by the ink-jet methods in that high definition patterns could not be attained, are solved by implementing a twice-exposure process using diffused light.

Description

感光性塗布型電極材料を用いたＴＦＴの製造方法Manufacturing method of TFT using photosensitive coating type electrode material
　本発明は、感光性塗布型電極材料を用いたＴＦＴの製造方法に関する。 The present invention relates to a method for manufacturing a TFT using a photosensitive coating type electrode material.
　現在、半導体素子、有機ＥＬ素子、液晶表示装置などの分野において、様々な形状、用途の電極及び配線のパターンがされており、特に駆動素子として薄膜トランジスタ（Thin Film Transistor：以下、ＴＦＴ）を用いるアクティブマトリクス駆動方式を採用する場合、絶縁層を介してＴＦＴ電極部と素子を積層して形成することが多い。 At present, in various fields such as semiconductor elements, organic EL elements, and liquid crystal display devices, electrodes and wiring patterns of various shapes and applications are used, and in particular, active using thin film transistors (hereinafter referred to as TFTs) as driving elements. When the matrix driving method is employed, the TFT electrode portion and the element are often stacked with an insulating layer interposed therebetween.
　通常、有機ＥＬや液晶表示装置に使用されるＴＦＴ電極部を作成する方法としてフォトリソグラフィ、マスクスパッタリング、インクジェット印刷などが用いられている。 Usually, photolithography, mask sputtering, ink jet printing, and the like are used as a method of creating a TFT electrode portion used in an organic EL or liquid crystal display device.
　これらのうち、一般的にＴＦＴ電極パターニングを行う場合、フォトリソグラフィが広く適用されている。しかしフォトリソグラフィは目的材料で形成した膜上に、一旦フォトレジスト膜を積層し、これを露光、現像しフォトレジストパターンを作製する工程を数回必要とするため、工程が複雑で、エネルギー、材料等の利用効率が低く、コストが高価となるという課題が付随する。 Of these, photolithography is widely applied when patterning TFT electrodes in general. However, photolithography requires a process of forming a photoresist pattern once by laminating a photoresist film on a film formed of the target material, and the process is complicated. The problem that utilization efficiency, such as these, is low and cost becomes expensive accompanies.
　また配線電極で使用されるＩＴＯ（Indium Tin Oxide：以下、ＩＴＯ）などをパターニングする際にマスクスパッタリングで作成されることが一般的である。しかしマスクスパッタリングはマスク開発費用と併せて材料使用効率が悪いため、コストが高価になるという課題と基板とマスクの位置合わせを厳密に設定しなければ、所望のＩＴＯパターンが得られないという技術的な課題がある。 Also, it is common to create by mask sputtering when patterning ITO (Indium Tin Oxide: hereinafter referred to as ITO) used for wiring electrodes. However, since mask sputtering is inefficient in terms of material usage in conjunction with mask development costs, the problem of high cost and the technical problem that the desired ITO pattern cannot be obtained unless the alignment between the substrate and the mask is set strictly. There is a big problem.
　更に以上の有機ＥＬや液晶表示装置に用いられるＴＦＴ、配線電極に使用されるＩＴＯにおいて基板サイズにより対応できる装置が異なるため、近年の基板サイズの大型化に伴う装置の変更、改造によるコストが発生する。 In addition, the TFTs used in the above-mentioned organic EL and liquid crystal display devices, and the ITO used for wiring electrodes differ depending on the substrate size. Therefore, the cost of changing and remodeling the device with the recent increase in substrate size is incurred. To do.
　そこで、例えば特許文献１ではマスクレス、材料使用効率、大面積対応可という利点からインクジェット印刷による有機ＥＬ素子作成方法が検討されている。また特許文献２のように有機ＥＬの品質向上のためＴＦＴの凹部に導電性高分子を埋める方法としてインクジェット方式が提案されており、特許文献３では基板上の配線をインクジェット方式で成膜する方法が提案されている。 Therefore, for example, in Patent Document 1, a method for producing an organic EL element by ink jet printing has been studied from the advantages of maskless, material use efficiency, and large area. Also, as disclosed in Patent Document 2, an ink jet method has been proposed as a method of filling a conductive polymer in a concave portion of a TFT in order to improve the quality of an organic EL. In Patent Document 3, a method of forming a wiring on a substrate by an ink jet method is proposed. Has been proposed.
　これらのように近年では工程の簡略化、材料使用効率、コスト、多様な基板サイズに対応できる方法としてインクジェットによる素子作成方法及び電極作成方法が検討されている。 As described above, in recent years, as a method capable of dealing with simplification of the process, material use efficiency, cost, and various substrate sizes, an element production method and an electrode production method using ink jet have been studied.
特開２００９－２３１２６４号公報JP 2009-231264 A 特開２００９－２１１８５９号公報JP 2009-211859 A 特開２００９－３８１８５号公報JP 2009-38185 A
　従来の電極作成方法であるフォトリソグラフィ、マスクスパッタリングは上述したように、工程の簡略化、材料使用効率、コスト、多様な基板サイズに対応において解決するには困難な課題がある。そこでこれらの課題を持たないインクジェット方式による素子作成方法及び電極作成方法が検討されている。 As described above, photolithography and mask sputtering, which are conventional electrode manufacturing methods, have difficult problems to solve in terms of simplification of processes, material use efficiency, cost, and various substrate sizes. In view of this, an ink-jet element fabrication method and electrode fabrication method that do not have these problems have been studied.
　しかし、インクジェット方式では感光性塗布型電極材料（以下、電極材料）と対象となる基板との濡れ性、吐出量、吐出環境によって精細度が著しく悪くなり、所望のパターン輪郭が得られないという課題がある。また、ヘッド部から噴出された導電性インクが基板に付着するまでに位置ずれを起こすことが知られており、所望の位置に正確なパターンが施せない場合もある。 However, in the ink jet method, the fineness is remarkably deteriorated due to the wettability between the photosensitive coating electrode material (hereinafter referred to as electrode material) and the target substrate, the discharge amount, and the discharge environment, and a desired pattern contour cannot be obtained. There is. Further, it is known that the conductive ink ejected from the head portion is displaced until it adheres to the substrate, and there is a case where an accurate pattern cannot be formed at a desired position.
　特に高解像度の表示装置の場合、このように電極及び配線のパターニング精度が悪いものだと、画素間でショートまたは断線が生じ、正常な表示機能を果たさない場合がある。 Especially in the case of a high-resolution display device, if the electrode and wiring patterning accuracy is poor, a short circuit or disconnection may occur between pixels, and a normal display function may not be achieved.
　本発明では上記のような課題を克服し、簡便な方法で高解像度且つ高精度の電極及び配線パターンを形成する方法を提案するものである。本発明によれば、従来の金属等を成膜し、レジストを塗布し露光現像後、エッチングしてパターン形成する方法よりもはるかに工程が簡略化できるものである。 The present invention proposes a method for overcoming the above-described problems and forming electrodes and wiring patterns with high resolution and high accuracy by a simple method. According to the present invention, the process can be simplified much more than the conventional method of forming a metal film or the like, applying a resist, exposing and developing, and etching to form a pattern.
　上記課題を解決するために本発明は、基板上に感光性有機物からなる電極材料によって電子回路を形成する感光性塗布型電極材料を用いたＴＦＴの製造方法において、基板上にゲート電極および絶縁膜を形成する工程と、前記基板上に電極材料を塗布しプリベーク乾燥させる工程と、前記電極材料に所定のマスクを通して光を照射する第１の露光工程と、前記電極材料を現像液に浸漬し不要な部分を除去する工程と、前記電極材料を前記第１の露光工程よりも照射強度の強い光により硬化させる第２の露光工程と、を備えることを特徴とする感光性塗布型電極材料を用いたＴＦＴの製造方法である。 In order to solve the above-described problems, the present invention provides a method for manufacturing a TFT using a photosensitive coating type electrode material that forms an electronic circuit with an electrode material made of a photosensitive organic material on a substrate. , A step of applying an electrode material on the substrate and pre-baking and drying, a first exposure step of irradiating the electrode material with light through a predetermined mask, and immersing the electrode material in a developing solution. And a second exposure step of curing the electrode material with light having an irradiation intensity stronger than that of the first exposure step. TFT manufacturing method.
　本発明ではガラス基板上にスクリーン印刷及びスピンコータを用いて電極および配線をパターンニングするものであり、使用する電極材料はＰＤＯＴ：ＰＳＳやポリアニリン系、銀粒子が混入されている電極材料である。 In the present invention, electrodes and wiring are patterned on a glass substrate using screen printing and a spin coater, and the electrode material used is an electrode material mixed with PDOT: PSS, polyaniline, or silver particles.
　通常これらの材料で電極を作成する場合は精細度の低いパターン、若しくは基板全体に塗布する場合が多い。これらの理由として精細度の高いパターンの場合、現像の際に電極部分が断線、または電極間などに電極材料が残り、短絡を起こす現象など、所望のパターンが得られないことを起因とする。 Usually, when an electrode is made of these materials, it is often applied to a pattern with low definition or the entire substrate. For these reasons, in the case of a pattern with high definition, the electrode part is disconnected at the time of development, or the electrode material remains between the electrodes and the like, resulting in a desired pattern not being obtained.
　また露光の光源として基板表面に対して垂直に進入するような垂直な光（以下、平行光）を用いる場合が多い。この理由もマスク露光を行う際に基板表面に対してランダムな方向で進入するような光（以下、拡散光）だと不必要な電極部分まで露光されることになり、所望のパターンが得られないことを起因とする。しかし、通常平行光は設備上コストが高く、また基板と光源の平行度がパターンニング精度に大きく影響を与えるため、露光の際はその都度、基板位置を固定する必要がある。以上のように平行光はコストと生産性の両面で課題を抱えている。 In many cases, vertical light (hereinafter referred to as parallel light) that enters perpendicularly to the substrate surface is used as a light source for exposure. The reason for this is that when mask exposure is performed, light that enters in a random direction with respect to the substrate surface (hereinafter referred to as diffused light) exposes unnecessary electrode portions, and a desired pattern is obtained. It is caused by not. However, since the parallel light is usually expensive in terms of equipment, and the parallelism between the substrate and the light source greatly affects the patterning accuracy, it is necessary to fix the substrate position each time exposure is performed. As described above, parallel light has problems in both cost and productivity.
　本発明では印刷と拡散光を用いることで、コストと生産性を両立させ、さらに通常のインクジェット方法よりもパターンニング精度が向上した電極作成方法を提供するものである。また本発明はパターンニングを目的とする第１の拡散光と導電性を発現させることを目的とする第１の露光よりも大きい照射量を持った第２の拡散光を用いるものである。 In the present invention, by using printing and diffused light, an electrode producing method is provided that achieves both cost and productivity and has improved patterning accuracy as compared with a normal ink jet method. Further, the present invention uses the first diffused light for the purpose of patterning and the second diffused light having a larger dose than the first exposure for the purpose of developing conductivity.
　本発明の電極材料を用いた２回露光による電極作成方法によると、従来の方法で課題となった工程の簡略化、材料使用効率、コスト、多様な基板サイズに対応において、その課題を解決するものとなり、簡便、低コストかつ高精度な配線などを含む電極パターニングを提供するものとなる。 According to the electrode preparation method by the double exposure using the electrode material of the present invention, the problem can be solved in the simplification of the process, the material use efficiency, the cost, and the various substrate sizes which are problems in the conventional method. Thus, it is possible to provide electrode patterning including simple, low-cost, and high-precision wiring.
　なお、課題を解決するための手段において電極材料の塗布法として、スクリーン印刷とスピンコーターによる方法を挙げたが、塗布法はそれに限定されるものではなく、ロールコーターやバーコーター等、適宜に選択できる。 In the means for solving the problem, the method of applying the electrode material was exemplified by the screen printing and the spin coater, but the application method is not limited to this, and a roll coater, a bar coater, or the like is appropriately selected. it can.
本発明に用いた基板にスクリーン印刷による外形印刷を施した基板状態を模式的に示すものである。The board | substrate state which gave the outline printing by screen printing to the board | substrate used for this invention is shown typically. 本発明に用いたエッチングを施した基板状態を模式的に示すものである。1 schematically shows a state of a substrate subjected to etching used in the present invention. 本発明に用いた電極材料の断面構成を模式的に示すものである。The cross-sectional structure of the electrode material used for this invention is shown typically. 本発明に用いたプリベーク後の電極材料の断面構成を模式的に示すものである。The cross-sectional structure of the electrode material after pre-baking used for this invention is shown typically. 本発明に用いた第１のＵＶ露光を施した後の電極材料反応状態の断面構成を模式的に示すものである。The cross-sectional structure of the electrode material reaction state after performing the first UV exposure used in the present invention is schematically shown. 本発明に用いた第２のＵＶ露光を施した後の電極材料反応状態の断面構成を模式的に示すものである。The cross-sectional structure of the electrode material reaction state after performing the 2nd UV exposure used for this invention is shown typically. 本発明に用いたポストベークを施した後の電極材料反応状態の断面構成を模式的に示すものである。The cross-sectional structure of the electrode material reaction state after performing the post-baking used for this invention is shown typically. 本発明に用いた実施例１における予めガラス上にゲート電極とその電極上に絶縁膜を施した状態の断面構成を模式的に示すものである。1 schematically shows a cross-sectional configuration in a state where a gate electrode and an insulating film are provided on the electrode in advance in Example 1 used in the present invention. 本発明に用いた実施例２における電極材料を塗布した状態の断面構成を模式的に示すものである。1 schematically shows a cross-sectional configuration in a state where an electrode material in Example 2 used in the present invention is applied. 本発明に用いた背面から第１のＵＶ露光を照射している基板断面構成を模式的に示すものである。1 schematically shows a cross-sectional configuration of a substrate irradiated with a first UV exposure from the back surface used in the present invention. 本発明に用いた現像工程を施した後の基板状態の断面構成を模式的に示すものである。The cross-sectional structure of the substrate state after performing the development process used in the present invention is schematically shown. 本発明に用いた液体有機半導体を滴下している状態の断面構成を模式的に示すものである。The cross-sectional structure of the state which has dripped the liquid organic semiconductor used for this invention is shown typically. 本発明に用いた実施例１におけるプラナー型有機ＴＦＴ完成状態の基板断面構成を模式的に示すものである。1 schematically shows a cross-sectional configuration of a substrate in a completed state of a planar organic TFT in Example 1 used in the present invention. 本発明に用いた実施例２における絶縁層上に液体有機半導体を滴下している状態の断面構成を模式的に示すものである。2 schematically shows a cross-sectional configuration in a state where a liquid organic semiconductor is dropped on an insulating layer in Example 2 used in the present invention. 本発明に用いた実施例２における半導体層上に電極材料を塗布した状態の断面構成を模式的に示すものである。1 schematically shows a cross-sectional configuration in a state where an electrode material is applied on a semiconductor layer in Example 2 used in the present invention. 本発明に用いた実施例２における基板背面からＵＶ露光を照射している断面構成を模式的に示すものである。FIG. 2 schematically shows a cross-sectional configuration in which UV exposure is applied from the back surface of a substrate in Example 2 used in the present invention. 本発明に用いた実施例２におけるスタガー型有機ＴＦＴ完成状態の基板断面構成を模式的に示すものである。1 schematically shows a cross-sectional configuration of a substrate in a completed state of a stagger type organic TFT in Example 2 used in the present invention.
　以下、本発明に係る電極材料を用いた２回露光による電極作成方法を概念的に示す図１から図７を参照しながら、本発明を具体的に説明する。 Hereinafter, the present invention will be described in detail with reference to FIGS. 1 to 7 conceptually showing an electrode preparation method by double exposure using the electrode material according to the present invention.
　図１にスクリーン印刷による外形印刷を模式的に示し、図２においては図１にエッチングを施した状態を模式的に表したものを示す。 FIG. 1 schematically shows outline printing by screen printing, and FIG. 2 schematically shows an etched state in FIG.
　本発明では電極材料２をガラス基板１上にスクリーン印刷で部分塗布、若しくはスピンコータで全面塗布を施す。所望のパターンが部分的に高精細である際、スクリーン印刷で予めパターンの外形を印刷することで、スピンコータと比較し材料２の使用量を減らすことができる。また後に述べるエッチング工程において、溶出させる材料１が少なくなるためエッチング溶液の連続使用回数を多くすることが可能である。 In the present invention, the electrode material 2 is partially coated on the glass substrate 1 by screen printing, or is entirely coated by a spin coater. When the desired pattern is partially high-definition, the usage amount of the material 2 can be reduced by printing the outline of the pattern in advance by screen printing as compared with the spin coater. Further, in the etching process described later, since the material 1 to be eluted is reduced, it is possible to increase the number of continuous use of the etching solution.
　図３に本発明で使用する電極材料の断面構成を模式的に示す。 FIG. 3 schematically shows a cross-sectional configuration of the electrode material used in the present invention.
　上記塗布工程を経た後、第１の加熱工程として、基板１上の塗布電極材料２内の溶媒３を気化させるため、ホットプレートを用いて基板１裏面から熱を加える（以下、プリベーク）。ここで基板１表面から熱を加えた場合、電極材料２表面から乾燥するため、内部と表面の体積収縮率が異なり、表面の体積変化に材料内部が追従できないため、電極に亀裂が生じることがある。従って、滞りなく内部の溶媒が気化するよう、裏面から熱を掛けることが望ましい。 After the coating step, as a first heating step, heat is applied from the back surface of the substrate 1 using a hot plate to vaporize the solvent 3 in the coating electrode material 2 on the substrate 1 (hereinafter referred to as pre-baking). Here, when heat is applied from the surface of the substrate 1, the electrode material 2 is dried from the surface, so that the volume shrinkage rate between the inside and the surface is different, and the inside of the material cannot follow the volume change of the surface, so that the electrode may crack. is there. Therefore, it is desirable to apply heat from the back surface so that the internal solvent can be vaporized without delay.
　また、溶媒３を気化させる理由としては２点挙げられる。本発明で使用される電極材料２は溶媒３に溶けている感光性のポリマーに銀粒子若しくは銀ナノ粒子（以下、金属粒子）を分散させているため、溶媒３を気化させることで金属粒子４間の距離が近くなり、後に述べる第２の加熱工程（以下、ポストベーク）によって、金属粒子４間が接合し易くなり、結果、電気抵抗を低くすることが出来る。また、感光性のポリマーの濃度が高くなるのでＵＶに効率良く反応することができ、低露光量で感光することが出来る。 There are two reasons why the solvent 3 is vaporized. In the electrode material 2 used in the present invention, silver particles or silver nanoparticles (hereinafter referred to as metal particles) are dispersed in a photosensitive polymer dissolved in the solvent 3. The distance between them becomes close, and the second heating step (hereinafter referred to as post-bake) described later facilitates the bonding between the metal particles 4, and as a result, the electric resistance can be lowered. Moreover, since the density | concentration of the photosensitive polymer becomes high, it can react with UV efficiently and can be sensitized with a low exposure amount.
　図４にプリベーク後の基板断面状態（プリベークを施した後の感光性ポリマー５）を断面図として示し、図５に第１のＵＶ露光を施した後の電極材料反応状態（有機活性種が発現した感光性ポリマー７）を断面図として示す。上記プリベークを経た後、ＵＶ光６による露光を施す。露光方法としては一般的にマスクを介する露光（以下、マスク露光）があるが、予めガラス基板１上にパターンとなる遮光部分を成膜し、その上から塗布型感光性材料を塗布し、裏面から露光することで所望のパターンを得る露光方法（以下、背面露光）も適用することが出来るが、ＴＦＴにおいてソース電極とドレイン電極を作成する場合、チャネル幅が非常に狭いので背面露光が望ましい。 FIG. 4 shows a cross-sectional view of a substrate cross-sectional state after pre-baking (photosensitive polymer 5 after pre-baking), and FIG. 5 shows an electrode material reaction state after the first UV exposure (an organic active species is expressed). The obtained photosensitive polymer 7) is shown as a cross-sectional view. After the pre-baking, exposure with UV light 6 is performed. As an exposure method, there is generally exposure through a mask (hereinafter referred to as mask exposure). A light-shielding portion to be a pattern is formed in advance on the glass substrate 1, and a coating type photosensitive material is applied thereon, and then the back surface. Although an exposure method for obtaining a desired pattern by exposure from above (hereinafter referred to as back exposure) can also be applied, when a source electrode and a drain electrode are formed in a TFT, the back exposure is desirable because the channel width is very narrow.
　以上のような露光方法を用いる場合、電極材料２の反応露光量に対して１％から１０％程度のＵＶ照射量を拡散光として露光する（以下、第１のＵＶ露光）。この場合、マスク開口部における電極膜表面近傍では、ＵＶ光と電極材料２内の感光ポリマーが反応して反応活性種が発生する。このように発生した反応活性種は有機反応活性種としての反応と金属錯体としての反応の２種類があり、前者はエッチング工程において、現像液に溶出しないというレジスト材としての役割を持ち、後者は金属粒子４同士の間に存在することで電極の伝導性を発現させる役割を持つ。 When the exposure method as described above is used, a UV irradiation amount of about 1% to 10% with respect to the reaction exposure amount of the electrode material 2 is exposed as diffused light (hereinafter referred to as a first UV exposure). In this case, in the vicinity of the electrode film surface in the mask opening, the UV light and the photosensitive polymer in the electrode material 2 react to generate reactive species. There are two types of reaction active species generated in this way, reaction as an organic reaction active species and reaction as a metal complex. The former has a role as a resist material that does not elute into the developer in the etching process, and the latter It exists between the metal particles 4 and has the role of expressing the conductivity of the electrode.
　マスク遮光部においては、遮光部分の直下の電極材料２にもＵＶ光が回り込むが、元来、露光するＵＶ光は電極材料２の反応露光量よりも小さい上、マスク開口部のＵＶ光の光量と比較してマスク遮光部直下に回りこむＵＶ光の露光量は更に小さいものとなり、電極材料に反応を及ぼすことはなく、反応活性種が発生することは無い。 In the mask light shielding portion, the UV light also travels to the electrode material 2 immediately below the light shielding portion. Originally, the UV light to be exposed is smaller than the reaction exposure amount of the electrode material 2, and the light amount of the UV light in the mask opening portion. The exposure amount of the UV light that wraps directly under the mask light-shielding part is even smaller, does not react with the electrode material, and does not generate reactive species.
　以上のように、第１のＵＶ露光を施した後、現像液を用いたエッチングにより、反応活性種が存在する部分は電極材料が溶出することなく、反応活性種が無い部分のみ溶出することで所望な高精細の電極パターンを得ることが出来る（以下、現像工程）。但し第１の露光量では表面近傍の有機反応活性種としての機能が発現するが、金属錯体としての伝導性機能を発現させるに至らない。 As described above, after performing the first UV exposure, by etching using a developer, a portion where reactive active species are present is not eluted, but only a portion where reactive reactive species is not present is eluted. A desired high-definition electrode pattern can be obtained (hereinafter, development step). However, although the function as an organic reactive active species in the vicinity of the surface is expressed at the first exposure dose, the conductive function as a metal complex is not expressed.
　図６に第２のＵＶ露光を施した電極材料反応状態（金属錯体としての反応が発現した感光性ポリマー８）を模式的に表す。図５で説明した電極材料２の反応露光量よりも十分に大きい露光量であるＵＶ光を照射することで、有機反応活性種は勿論、金属錯体としての機能を発現させることができる。 FIG. 6 schematically shows a reaction state of the electrode material subjected to the second UV exposure (photosensitive polymer 8 in which a reaction as a metal complex is expressed). By irradiating with UV light having an exposure amount sufficiently larger than the reaction exposure amount of the electrode material 2 described in FIG. 5, the function as a metal complex can be developed as well as the organic reaction active species.
　図７にポストベークを施した後の電極材料反応状態（ポストベークを施した後の感光性ポリマー９）を模式的に表す。図６で説明したように第２の露光後の感光ポリマーは金属錯体としての機能も発現するが、それだけでは電気抵抗が高いものとなる。ここでポストベークを施すことで、金属粒子４が焼結し、粒子同士が結合し、金属錯体が金属粒子４の隙間を埋めるように存在することによって電気抵抗が低い状態となり、電極として十分な機能を得ることが出来る。 FIG. 7 schematically shows the reaction state of the electrode material after post-baking (photosensitive polymer 9 after post-baking). As described with reference to FIG. 6, the photosensitive polymer after the second exposure also exhibits a function as a metal complex, but it alone has a high electric resistance. By post-baking here, the metal particles 4 are sintered, the particles are bonded to each other, and the metal complex is present so as to fill the gaps between the metal particles 4, so that the electric resistance is low, which is sufficient as an electrode. Function can be obtained.
　以下、図面を参照して、本発明の実施例について説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
　本実施例におけるパターニング方法を図８から図１３を用いて説明する。また、本実施例はＴＦＴの構成の一つである半導体層が最表面に成膜されているプラナー型に適用した例である。図８は本実施例において、予めガラス基板２０上にゲート電極１０とその電極上に絶縁膜１１を施した状態の断面図である。本実施例のゲート電極１０は感光性銀粒子のパターニングによるものである（三菱製紙製）。また絶縁膜１１はポリイミド系の有機絶縁膜をスピンコータやスクリーン印刷によって形成している。 The patterning method in this embodiment will be described with reference to FIGS. This embodiment is an example applied to a planar type in which a semiconductor layer which is one of the structures of TFTs is formed on the outermost surface. FIG. 8 is a cross-sectional view showing a state in which the gate electrode 10 and the insulating film 11 are provided on the glass substrate 20 in advance in this embodiment. The gate electrode 10 of this embodiment is based on patterning of photosensitive silver particles (manufactured by Mitsubishi Paper Industries). The insulating film 11 is a polyimide organic insulating film formed by spin coater or screen printing.
　図９は本実施例において、電極材料１２を塗布した状態の断面図である。 FIG. 9 is a sectional view showing a state in which the electrode material 12 is applied in this embodiment.
　図８で説明した構成に加え、電極材料１２（東レ：Raybrid）を有機絶縁膜１１上にスクリーン印刷により印刷する。塗布する膜厚は４μｍから１０μｍ程度が電気抵抗を低く抑えつつ、所望のパターンを得られやすい。 8 In addition to the configuration described in FIG. 8, the electrode material 12 (Toray: Raybrid) is printed on the organic insulating film 11 by screen printing. The film thickness to be applied is about 4 μm to 10 μm, and it is easy to obtain a desired pattern while keeping the electric resistance low.
　次にプリベーク工程を施す。ここでは塗布されたガラス基板２０を裏面より加熱する。本実施例で使用する電極材料１２の溶媒は高沸点のため、８０℃から１００℃程度、６０ｓｅｃから１２０ｓｅｃの間が加熱条件として好ましい。これらの加熱温度が低く若しくは加熱時間が短いと電極材料１２中の溶媒が揮発せず、表面が粘着性を帯びることがある。またその後ＵＶ露光による反応も起き難い。対して、加熱温度が高い、若しくは加熱時間が長い場合、電極材料１２が熱によって過剰に反応し、塗布されている全領域において有機反応活性種が発現し、ＵＶ露光後の現像工程において、所望のパターンが得られ難い。 Next, a pre-bake process is performed. Here, the coated glass substrate 20 is heated from the back surface. Since the solvent of the electrode material 12 used in this embodiment has a high boiling point, the heating condition is preferably about 80 ° C. to 100 ° C. and between 60 sec and 120 sec. When these heating temperatures are low or the heating time is short, the solvent in the electrode material 12 does not volatilize and the surface may become sticky. Further, the reaction due to UV exposure is less likely to occur thereafter. On the other hand, when the heating temperature is high or the heating time is long, the electrode material 12 reacts excessively with heat, and organic reactive species are expressed in the entire coated area. This pattern is difficult to obtain.
　図１０は図９の構成に背面からＵＶ露光を照射している断面図である。 FIG. 10 is a cross-sectional view in which UV exposure is applied from the back to the configuration of FIG.
　電極材料１２が条件に従って加熱された後、第１の露光として背面露光を施す。このときの露光量は３ｍＪ／ｃｍ２から１０ｍＪ／ｃｍ２が望ましい。これ以上の露光量は図１０におけるゲート電極１０下に位置する電極材料１２層まで影響を及ぼし、反応を起こさせ、所望のパターンを得ることは出来ない。 After the electrode material 12 is heated according to the conditions, back exposure is performed as the first exposure. Exposure amount at this time is preferably 10 mJ / cm 2 from 3 mJ / cm 2. An exposure amount larger than this affects even the electrode material 12 layer located under the gate electrode 10 in FIG. 10, causing a reaction, and a desired pattern cannot be obtained.
　図１１に現像工程を施した後の基板状態を断面的に示す。 FIG. 11 shows a cross-sectional view of the substrate after the development process.
　ゲート電極１０上に塗布された電極材料１２はＵＶ露光による影響が小さいため、有機反応活性種が発現せず、レジストとしての機能が無いため、エッチングされる。またゲート電極１０直上以外の電極材料１２はＵＶで露光されるため、有機反応活性種が発現し、レジストとしての機能を有するためエッチングされず、電極材料１２は残ったままとなる。従ってこの状態で所望のパターンが得られる。この工程における現像液として炭酸Ｎａ水溶液を用いており、その重量濃度は２％から５％が好ましい。濃度が５％を超えるものだと絶縁膜層１１と反応する場合があり、その際、絶縁膜１１表面がダメージを受け、ゲート電極１０とソース電極間の電圧が高い場合、絶縁破壊を起こし、絶縁膜１１としての機能が損なわれる場合がある。このときＴＦＴとして基本性能であるスイッチング機能が損なわれる。現像方法は振動現像方法を用いたが、他に浸漬する方法（ディップ現像）、現像液を基板上に滴下し現像する方法（ステップパドル現像）などを用いることも可能である。いずれの現像方法も温度制御された現像液と現像時間を電極の膜厚に合わせ調節する必要がある。本実施例で用いた振動現像方法では現像液温度を室温（２０℃）に保ち、１０Ｈｚから５０Ｈｚ程度の振動数で３分から１０分程度現像している。条件によっては絶縁膜１１に対してダメージを及ぼす場合がある。 Since the electrode material 12 applied on the gate electrode 10 is less affected by UV exposure, the organic reaction active species does not appear and the resist material does not function as a resist and is etched. Further, since the electrode material 12 other than just above the gate electrode 10 is exposed with UV, organic reactive active species are expressed, and since it has a function as a resist, it is not etched and the electrode material 12 remains. Therefore, a desired pattern can be obtained in this state. An aqueous sodium carbonate solution is used as the developer in this step, and the weight concentration is preferably 2% to 5%. If the concentration exceeds 5%, it may react with the insulating film layer 11. At that time, if the surface of the insulating film 11 is damaged and the voltage between the gate electrode 10 and the source electrode is high, dielectric breakdown occurs. The function as the insulating film 11 may be impaired. At this time, the switching function, which is the basic performance of the TFT, is impaired. As the developing method, the vibration developing method is used. However, it is also possible to use a method of dipping (dip development), a method of developing by dropping a developer on the substrate (step paddle development), or the like. In any of the development methods, it is necessary to adjust the temperature-controlled developer and development time according to the film thickness of the electrode. In the vibration developing method used in this example, the developing solution temperature is kept at room temperature (20 ° C.), and development is performed at a frequency of about 10 Hz to 50 Hz for about 3 to 10 minutes. Depending on conditions, the insulating film 11 may be damaged.
　次に第１の露光よりも露光量が大きい第２の露光を背面露光で施す。このときの露光量は電極材料１２の反応露光量よりも十分に大きく（５００ｍＪ／ｃｍ２から１０００ｍＪ／ｃｍ２が好ましい）、本実施例では５００ｍＪ／ｃｍ２を露光した。これにより、金属錯体としての反応が電極材料１２内で進み、伝導性機能を発現させることが出来る。 Next, second exposure having a larger exposure amount than the first exposure is performed by back exposure. Exposure amount at this time is sufficiently larger than the reaction exposure of the electrode material 12 (preferably 1000 mJ / cm 2 from 500mJ / cm 2), the present embodiment has been exposed to 500 mJ / cm 2. Thereby, reaction as a metal complex advances in the electrode material 12, and a conductive function can be expressed.
　次にポストベーク工程を施す。このとき温度１８０℃から２００℃程度、かつ１時間程度の条件で焼成を行う。温度が２００°を超えるとポリイミド系の絶縁膜１１が変異を起こす場合があり、絶縁膜１１としての機能、およびこの後成膜される有機半導体層において汚染を及ぼす場合があるので、上記の条件が望ましい。 Next, a post-bake process is performed. At this time, baking is performed under conditions of a temperature of about 180 ° C. to 200 ° C. and about 1 hour. If the temperature exceeds 200 °, the polyimide insulating film 11 may be mutated, and the function as the insulating film 11 and the organic semiconductor layer formed thereafter may be contaminated. Is desirable.
　図１２に液体有機半導体を滴下している状態を断面図として示す。 FIG. 12 shows a state where the liquid organic semiconductor is dropped as a cross-sectional view.
　従来ＴＦＴで用いられる半導体層はアモルファスシリコン（以下、α－Ｓｉ）、ポリシリコン（以下、Ｐ－Ｓｉ）である。しかし、これらの成膜方法はレーザや真空蒸着、ＣＶＤ（Chemical Vapor Deposition）などによる成膜が一般的であるが、これらの方法では工程における基板にかかる温度が高く、成膜される基板側は耐熱である必要がある。本実施例では半導体層成膜材料として、塗布型有機半導体材料１４（メルク：Ｐ－ＢＴＴＴ）を選定し、これを塗布するための装置１３から滴下する。塗布型有機半導体材料１４の特徴として、低温でかつディスペンサーなどやインクジェット、スピンコータやバーコータによって塗布することが出来るため、工程も簡略化でき、大掛かりな装置も必要ないため、α－Ｓｉやコストが低く抑えられる。また基板も耐熱である必要が無いためＰＥＴなどの樹脂系などにも成膜することが出来る。 Conventionally, semiconductor layers used in TFTs are amorphous silicon (hereinafter referred to as α-Si) and polysilicon (hereinafter referred to as P-Si). However, these film formation methods are generally performed by laser, vacuum deposition, CVD (Chemical Vapor Deposition), etc., but in these methods, the temperature applied to the substrate in the process is high, and the substrate side on which the film is formed is Must be heat resistant. In this embodiment, a coating type organic semiconductor material 14 (Merck: P-BTTT) is selected as a semiconductor layer film forming material and dropped from an apparatus 13 for coating it. The characteristics of the coating type organic semiconductor material 14 are that it can be applied at a low temperature by a dispenser or the like, an ink jet, a spin coater or a bar coater, so that the process can be simplified and a large-scale apparatus is not required. It can be suppressed. Further, since the substrate does not need to be heat resistant, it can be formed on a resin system such as PET.
　ここで塗布型半導体材料１４を図１１におけるゲート電極１０直上（以下、チャネル）に滴下する。またこのときの濃度は０．１％から１％程度のものを使用する。 Here, the coating-type semiconductor material 14 is dropped onto the gate electrode 10 in FIG. The concentration at this time is about 0.1% to 1%.
　図１３に本実施例における有機ＴＦＴ完成状態の基板断面図を示す。 FIG. 13 shows a cross-sectional view of the substrate in the completed state of the organic TFT in this example.
　滴下した有機半導体材料１５は８０℃、５分程度加熱し溶媒を気化させる。この後の徐冷条件によって半導体層内の構造が大きく変化する。８０℃から６０分程度で室温２０℃になる程度の徐冷速度で成膜し、全て塗布型材料で構成されるプラナー型プリンタブル有機ＴＦＴ作成が完了する。 The dropped organic semiconductor material 15 is heated at 80 ° C. for about 5 minutes to evaporate the solvent. The structure in the semiconductor layer changes greatly depending on the subsequent slow cooling conditions. Film formation is performed at a slow cooling rate of about 80 ° C. to 60 ° C. in about 60 minutes, and the creation of a planar type printable organic TFT composed entirely of a coating type material is completed.
　本実施例におけるパターニング方法を図１４から図１７を用いて説明する。 The patterning method in this embodiment will be described with reference to FIGS.
　実施例２ではソース電極、ドレイン電極層の下に半導体層を形成するスタガー型のＴＦＴ構成に適用した例である。また本実施例は実施例１の半導体成膜工程と電極作成工程を入れ替えた内容である。 Example 2 is an example applied to a staggered TFT structure in which a semiconductor layer is formed under a source electrode and a drain electrode layer. Further, the present embodiment is a content in which the semiconductor film forming process and the electrode forming process of the first embodiment are interchanged.
　図１４に絶縁層１１上に装置１３から液体有機半導体１４を滴下している状態を断面図として示す。材料、滴下条件、成膜条件は実施例１と同一である。 FIG. 14 is a sectional view showing a state where the liquid organic semiconductor 14 is dropped from the device 13 on the insulating layer 11. The materials, dropping conditions, and film forming conditions are the same as in Example 1.
　図１５に半導体層１５上に電極材料１２を塗布した状態を断面図として示す。材料、塗布条件、成膜条件は実施例１と同一である。 FIG. 15 is a sectional view showing a state in which the electrode material 12 is applied on the semiconductor layer 15. The materials, coating conditions, and film forming conditions are the same as those in Example 1.
　図１６は図１５の構成に背面からＵＶ露光を照射している断面図である。ＵＶ露光量は実施例１よりも同等かそれ以下が望ましい。露光量が大きい場合は半導体層１５にダメージを及ぼし、スレッシュホールド電圧（スイッチＯＮ／ＯＦＦ電圧）が大きくなるなどの弊害が起こる場合がある。また第２の露光工程についても同様なことが言える。 FIG. 16 is a cross-sectional view in which the structure of FIG. 15 is irradiated with UV exposure from the back. The UV exposure amount is preferably equal to or less than that of the first embodiment. If the exposure amount is large, the semiconductor layer 15 may be damaged, and adverse effects such as an increase in the threshold voltage (switch ON / OFF voltage) may occur. The same can be said for the second exposure step.
　プリベーク、ポストベークの条件は実施例１と同一である。 Pre-bake and post-bake conditions are the same as in Example 1.
　図１７に本実施例における有機ＴＦＴ完成状態の基板断面図を示す。 FIG. 17 shows a cross-sectional view of the substrate in the completed state of the organic TFT in this example.
　以上の内容を以って全て塗布型材料で構成されるスタガー型プリンタブル有機ＴＦＴ作成が完了する。 With the above contents, the creation of stagger-type printable organic TFTs composed entirely of coating-type materials is completed.
　本発明によれば、例えば有機ＥＬや液晶表示装置などおけるアクティブマトリクス駆動方式で作成されるＴＦＴ素子作成やタッチパネルなどの荒い精細度でも機能的に問題の無い配線電極作成において、従来の方法で課題となった工程の簡略化、材料使用効率、コスト、多様な基板サイズに対応において、その課題を解決するものとなり、簡便、低コストかつ高精度な配線などを含む電極パターニングを提供するものとなる。 According to the present invention, for example, a TFT element created by an active matrix driving method such as an organic EL or a liquid crystal display device or a wiring electrode having a functional problem even in rough definition such as a touch panel is problematic in the conventional method. This simplifies the process, material usage efficiency, costs, and responds to various substrate sizes, and solves the problems, and provides electrode patterning that includes simple, low-cost, high-precision wiring, etc. .
　１　ガラス基板
　２　電極材料
　３　感光性のポリマーを含む溶媒
　４　金属粒子
　５　プリベークを施した後の感光性ポリマー
　６　ＵＶ光（紫外線）
　７　有機活性種が発現した感光性ポリマー
　８　金属錯体としての反応が発現した感光性ポリマー
　９　ポストベークを施した後の感光性ポリマー
　１０　ゲート電極
　１１　絶縁膜
　１２　電極材料
　１３　塗布型有機半導体材料を塗布する装置
　１４　塗布型有機半導体材料
　１５　成膜された後の塗布型有機半導体材料
　２０　ガラス基板 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Electrode material 3 Solvent containing photosensitive polymer 4 Metal particle 5 Photosensitive polymer after pre-baking 6 UV light (ultraviolet light)
7 Photosensitive polymer expressing organic active species 8 Photosensitive polymer expressing reaction as metal complex 9 Photosensitive polymer after post-baking 10 Gate electrode 11 Insulating film 12 Electrode material 13 Coating type organic semiconductor material is applied 14 Coating type organic semiconductor material 15 Coating type organic semiconductor material after film formation 20 Glass substrate

Claims (6)

  1. 　基板上に感光性有機物からなる電極材料によって電子回路を形成する感光性塗布型電極材料を用いたＴＦＴの製造方法において、
    　基板上にゲート電極および絶縁膜を形成する工程と、
    　前記基板上に電極材料を塗布しプリベーク乾燥させる工程と、
    　前記電極材料に所定のマスクを通して光を照射する第１の露光工程と、
    　前記電極材料を現像液に浸漬し不要な部分を除去する工程と、
    　前記電極材料を前記第１の露光工程よりも照射強度の強い光により硬化させる第２の露光工程と、
    を備えることを特徴とする感光性塗布型電極材料を用いたＴＦＴの製造方法。     In a TFT manufacturing method using a photosensitive coating electrode material that forms an electronic circuit with an electrode material made of a photosensitive organic material on a substrate,
    Forming a gate electrode and an insulating film on the substrate;
    Applying an electrode material on the substrate and pre-baking;
    A first exposure step of irradiating the electrode material with light through a predetermined mask;
    Immersing the electrode material in a developer to remove unnecessary portions;
    A second exposure step of curing the electrode material with light having an irradiation intensity stronger than that of the first exposure step;
    A method for producing a TFT using a photosensitive coating type electrode material.
  2. 　前記電極材料自体をマスクとすることを特徴とする請求項１記載の感光性塗布型電極材料を用いたＴＦＴの製造方法。 The method of manufacturing a TFT using a photosensitive coating electrode material according to claim 1, wherein the electrode material itself is used as a mask.
  3. 　前記電極材料は流動性を有する塗布型材料であることを特徴とする請求項１または２に記載の感光性塗布型電極材料を用いたＴＦＴの製造方法。 3. The method of manufacturing a TFT using a photosensitive coating type electrode material according to claim 1, wherein the electrode material is a coating type material having fluidity.
  4. 　前記プリベーク乾燥させる工程は、８０℃から１００℃の範囲内で、６０秒から１２０秒の間で加熱することを特徴とする請求項１乃至３のいずれか１項に記載の感光性塗布型電極材料を用いたＴＦＴの製造方法。 The photosensitive coating-type electrode according to any one of claims 1 to 3, wherein in the pre-baking and drying step, heating is performed in a range of 80 ° C to 100 ° C for 60 seconds to 120 seconds. TFT manufacturing method using materials.
  5. 　前記第１の露光工程は、３ｍＪ／ｃｍ２から１０ｍＪ／ｃｍ２の範囲内で露光を行うことを特徴とする請求項１乃至４のいずれか１項に記載の感光性塗布型電極材料を用いたＴＦＴの製造方法。 5. The photosensitive coating electrode material according to claim 1, wherein the first exposure step performs exposure within a range of 3 mJ / cm 2 to 10 mJ / cm 2 . TFT manufacturing method.
  6. 　前記第２の露光工程は、５００ｍＪ／ｃｍ２から１０００ｍＪ／ｃｍ２の範囲内で露光を行うことを特徴とする請求項１乃至５のいずれか１項に記載の感光性塗布型電極材料を用いたＴＦＴの製造方法。 The photosensitive coating electrode material according to any one of claims 1 to 5, wherein the second exposure step performs exposure within a range of 500 mJ / cm 2 to 1000 mJ / cm 2 . TFT manufacturing method.
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