WO2012004710A2 - Methods, devices, and materials for metallization - Google Patents

Methods, devices, and materials for metallization Download PDF

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Publication number
WO2012004710A2
WO2012004710A2 PCT/IB2011/052895 IB2011052895W WO2012004710A2 WO 2012004710 A2 WO2012004710 A2 WO 2012004710A2 IB 2011052895 W IB2011052895 W IB 2011052895W WO 2012004710 A2 WO2012004710 A2 WO 2012004710A2
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WO
WIPO (PCT)
Prior art keywords
alloy
silver
cobalt
copper
wetting layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2011/052895
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French (fr)
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WO2012004710A3 (en
Inventor
Artur Kolics
Willliam T. Lee
Fritz Redeker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research AG
Lam Research Corp
Original Assignee
Lam Research AG
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research AG, Lam Research Corp filed Critical Lam Research AG
Priority to JP2013517641A priority Critical patent/JP5868968B2/en
Priority to KR1020187020773A priority patent/KR20180085824A/en
Priority to KR1020137000395A priority patent/KR101882034B1/en
Priority to SG2012092243A priority patent/SG186360A1/en
Priority to CN201180032025.4A priority patent/CN102971840B/en
Publication of WO2012004710A2 publication Critical patent/WO2012004710A2/en
Publication of WO2012004710A3 publication Critical patent/WO2012004710A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0261—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias characterised by the filling method or the material of the conductive fill
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01933—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01935—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/255—Materials of outermost layers of multilayered bumps, e.g. material of a coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/355—Materials of die-attach connectors of outermost layers of multilayered die-attach connectors, e.g. material of a coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Definitions

  • One or more embodiments of this invention pertain to fabrication of electronic devices such as integrated circuits; more specifically, one or more embodiments of this invention relate to materials and metallization layers for structures that include solder contacts.
  • Solder contacts for electrical connections have been in use in electronic devices for a long time. Numerous established processes exist and are in use for fabricating such devices. Many of these processes have provided satisfactory results and few, if any, major improvements have been made to many of these established processes.
  • the present inventors have made one or more discoveries that may be pertinent to solder contact technology such as that for electronic devices.
  • the one or more discoveries may have the potential to provide one or more methods, materials, and/or electronic devices that involve or use solder contact technology.
  • One or more aspects of this invention pertain to fabrication of electronic devices.
  • One aspect of the present invention is a method of making an electronic device. According to one embodiment, the method comprises providing a substrate, electrolessly depositing a barrier metal at least on portions of the substrate; and using wet chemistry such as electroless deposition to deposit a substantially gold-free wetting layer having solder wettability onto the barrier metal.
  • Another aspect of the present invention is an electronic device.
  • the electronic device comprises a metallization stack.
  • the metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited on the barrier metal, and the wetting layer is wettable by solder.
  • FIG. 1 is a process flow diagram of an embodiment of the present invention.
  • FIG. 2 is a diagram of an embodiment of the present invention.
  • FIG. 3 is a diagram of an embodiment of the present invention.
  • FIG. 4 is a diagram of an embodiment of the present invention.
  • Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding embodiments of the present invention. DESCRIPTION
  • One or more embodiments of the present invention pertain to methods, devices, materials, and/or metallization layers for structures that include solder. More specifically, the present invention is directed toward materials and
  • Embodiments of the present invention will be discussed below primarily in the context of processing semiconductor wafers such as silicon wafers used for fabricating electronic devices.
  • the electronic devices include copper and/or another electrical conductor.
  • the electronic devices have one or more electrical
  • Process flow diagram 40 includes providing a substrate 50.
  • the substrate may be a substrate such as a semiconductor wafer such as a silicon wafer or a substrate of another material suitable for fabricating electronic devices.
  • Process flow diagram 40 comprises electrolessly depositing (ELD) a barrier metal 60 at least over portions of the substrate.
  • Process flow diagram 40 also comprises wet chemical deposit such as electrolessly depositing a wetting layer 70.
  • the wetting layer is a
  • substantially gold-free wetting layer having solder wettability is deposited on the barrier metal.
  • process flow diagram 40 may include process flow diagram 40 further comprising forming solder contacts with the wetting layer.
  • the providing a substrate 50 may be accomplished using a variety of substrates. In other words, a variety of substrates may be used in process flow diagram 40 for additional embodiments of the present invention.
  • the providing a substrate 50 comprises providing a substrate comprising one or more electrical contact pads, and the electrolessly depositing a barrier metal 60 comprises electrolessly depositing the barrier metal onto the one or more electrical contact pads.
  • the providing a substrate 50 comprises providing a substrate comprising one or more through substrate via conductors, and the electrolessly depositing a barrier metal 60 comprises electrolessly depositing the barrier metal onto the one or more through substrate via conductors.
  • the providing a substrate 50 comprises providing a substrate comprising one or more vias, and the electrolessly depositing a barrier metal 60 comprises electrolessly depositing the barrier metal onto the walls of the one or more vias.
  • barrier metals for use in process flow diagram 40 include, but are not limited to, electrolessly deposited nickel, electrolessly deposited nickel alloy, electrolessly deposited cobalt, and electrolessly deposited cobalt alloy.
  • process flow diagram 40 comprises depositing the barrier metal to a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • the barrier metal is electrolessly deposited without using palladium or other precious metals to act as activation metals to initiate the deposition process.
  • one or more embodiments of the present invention use electroless deposition baths that comprise reducing agents such as borane for the electroless deposition process.
  • reducing agents such as borane for the electroless deposition process.
  • borane as at least one of the reducing agents in an electroless deposition bath, according to one or more embodiments of the present invention may avoid the formation of black pads that are typically associated with nickel phosphorus barrier layers with gold wetting layers.
  • Process flow diagram 40 can be modified for a variety of embodiments of the present invention that comprise using one or more options for electrolessly depositing wetting layer 70.
  • Options for process flow diagram 40 for electrolessly depositing the wetting layer 70 include, but are not limited to: Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing tin or a tin alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing silver or a silver alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing silver tungsten alloy with 3-4 atomic percent tungsten.
  • Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy.
  • Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy.
  • Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy.
  • Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition.
  • one or more embodiments of the present invention may further comprise incorporating boron and/or phosphorus in the substantially gold-free wetting layer.
  • one or more of the options for electrolessly depositing a wetting layer 70 may be combined.
  • process flow diagram 40 may further comprise using one or more corrosion prevention procedures on the surface of the wetting layer to keep the surface suitable for making solder contact.
  • corrosion prevention procedures include, but are not limited to, depositing a corrosion protective film on the wetting layer; forming an organic solderabily preservative layer; rinsing the wetting layer with a solution containing a corrosion inhibitor; and adjusting the composition of the surface of the wetting layer so that it is less susceptible to corrosion.
  • one or more embodiments of the present invention comprise using wetting layers in which the composition of the wetting layer is not constant through the thickness of the wetting layer.
  • the composition change can be accomplished by changing one or more deposition conditions such as the temperature for the deposition process, and such as the composition of the plating formulation.
  • Embodiments of the present invention that comprise electrolessly depositing a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition can also use changes in one or more deposition conditions to accomplish the changes in composition of the wetting layer.
  • Embodiments of the present invention that comprise electrolessly depositing a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition can also use changes in one or more deposition conditions to accomplish the changes in composition of the wetting layer.
  • One or more embodiments of the present invention include methods according to process flow diagram 40 wherein the electrolessly depositing a barrier metal at least over portions of the substrate 60 and the electrolessly depositing a substantially gold-free wetting layer 70 having solder wettability are accomplished using an electroless deposition bath composition at a temperature T1 to deposit the barrier metal and using the electroless deposition bath composition at another temperature T2 to deposit the wetting layer wherein T1 does not equal 12.
  • T1 and T2 are sufficiently different to cause electroless deposition of materials having different compositions from the same electroless deposition bath composition.
  • the electrolessly depositing a barrier metal at least over portions of the substrate 60 and the electrolessly depositing a substantially gold-free wetting layer 70 having solder wettability are accomplished using an electroless deposition bath composition over a range of temperatures TR1 to deposit the barrier metal and using the electroless deposition bath composition over another range of temperatures TR2 to deposit the wetting layer wherein TR1 and TR2 are dissimilar.
  • TR1 and TR2 are sufficiently different to cause electroless deposition of materials having different compositions from the same electroless deposition bath composition.
  • the thickness composition profile of the barrier metal may vary as a result of the temperature variation in TR1 and/or the thickness composition profile of the wetting layer may vary as a result of the temperature variation in TR2.
  • Another embodiment of the present invention includes a method of making an electronic device.
  • the method comprises providing a substrate 50 that comprises providing a substrate that comprises one or more electrical contact pads and/or one or more through-substrate via conductors.
  • the method also comprises electrolessly depositing a barrier metal 60 that comprises electrolessly depositing a barrier metal that comprises at least one of the elements nickel and cobalt.
  • the barrier layer has a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein at least over portions of the one or more electrical contact pads and/or the one or more through-substrate via conductors.
  • the method comprises electrolessly depositing at least one of: tin or a tin alloy; silver tungsten alloy with 3-4 atomic percent tungsten;
  • the method may further comprise incorporating boron and/or phosphorus in the substantially gold-free wetting layer.
  • the method also comprises forming a solder contact to the substantially gold-free wetting layer.
  • Electronic device 100 comprises a substrate 102 having a base 106, contact pad 1 10 supported on base 106, and a passivation layer 1 12 over base 106.
  • Electronic device 100 further comprises a metallization stack comprising an electrolessly deposited barrier metal 1 14 on electrical contact pad 1 10 and an electrolessly deposited substantially gold-free wetting layer 1 18 on barrier metal 1 14.
  • Wetting layer 1 18 is wettable by solder.
  • Electronic device 100 further includes solder 122 contacting wetting layer 1 18.
  • Figure 2 shows solder 122 as a solder ball that may be used for making another electrical contact.
  • Figure 2 also shows electronic device 100 having optional passivation layer 124.
  • substrate 102 may comprise a completed or partially completed integrated circuit device.
  • base 106 may be a semiconductor such as silicon or it may be another material suitable for the fabrication of electronic devices.
  • contact pad 1 10 may comprise a contact pad such as a final metal contact pad for electronic devices such as an aluminum contact pad and such as a copper contact pad.
  • One or more embodiments of the present invention comprise having electrical contact pad 1 10 at least partially covered by barrier metal 1 14.
  • barrier metal 1 14 comprising at least one of the elements nickel and cobalt.
  • electronic device 100 has a thickness of barrier metal 1 14 that is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • barrier metal 1 14 comprises at least one of the elements nickel and cobalt and a thickness of the barrier metal 1 14 is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • Additional embodiments of the present invention may have wetting layer 1 18 comprising one or more of a variety of materials systems.
  • wetting layer 1 18 examples include, but are not limited to: Wetting layer 1 18 comprising tin or a tin alloy. Wetting layer 1 18 comprising silver or a silver alloy. Wetting layer 1 18 comprising silver tungsten alloy with 3-4 atomic percent tungsten. Wetting layer 1 18 comprising copper or a copper alloy. Wetting layer 1 18 comprising cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy.
  • Wetting layer 1 18 comprising nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy.
  • Wetting layer 1 18 comprising iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy.
  • Wetting layer 1 18 comprising a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition.
  • Wetting layer 1 18 comprising a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition.
  • Wetting layer 1 18 comprising a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition.
  • Wetting layer 1 18 further comprising boron and/or phosphorus.
  • Electronic device 200 comprises a substrate 202 having a through-substrate via 210, and a through-substrate via electrical conductor 212.
  • Electronic device 200 also includes a passivation layer 224 over substrate 202.
  • Electronic device 200 further comprises a metallization stack comprising an electrolessly deposited barrier metal 214 on electrical conductor 212 and a substantially gold-free wetting layer 218 on barrier metal 214. As an option, substantially gold-free wetting layer 218 is deposited on barrier metal 214
  • Wetting layer 218 is wettable by solder.
  • Electronic device 200 further includes solder 222 contacting wetting layer 218.
  • substrate 202 may comprise a completed or partially completed integrated circuit device.
  • substrate 202 may be a semiconductor such as silicon or it may be another material suitable for the fabrication of electronic devices.
  • through-substrate via electrical conductor 212 may comprise an electrical conductor such as, but not limited to, aluminum, copper, polysilicon, solder, and tungsten.
  • One or more embodiments of the present invention comprise having through-substrate via electrical conductor 212 at least partially covered by barrier metal 214.
  • barrier metal 214 comprising at least one of the elements nickel and cobalt.
  • electronic device 200 has a thickness of barrier metal 214 that is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • barrier metal 214 comprises at least one of the elements nickel and cobalt and a thickness of the barrier metal 214 is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • Additional embodiments of the present invention may have wetting layer 218 comprising one or more of a variety of materials systems.
  • materials systems suitable for use as wetting layer 218 include, but are not limited to: Wetting layer 218 comprising tin or a tin alloy.
  • Wetting layer 218 comprising silver or a silver alloy.
  • Wetting layer 218 comprising silver tungsten alloy with 3-4 atomic percent tungsten.
  • Wetting layer 218 comprising copper or a copper alloy.
  • Wetting layer 218 comprising cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy.
  • Wetting layer 218 comprising nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy.
  • Wetting layer 218 comprising iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy.
  • Wetting layer 218 comprising a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition.
  • Wetting layer 218 comprising a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition.
  • Wetting layer 218 comprising a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition.
  • Wetting layer 218 further comprising boron and/or phosphorus.
  • Another embodiment of the present invention includes an electronic device comprising a metallization stack.
  • the metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited electrolessly on the barrier metal.
  • the barrier metal electrically contacts the wetting layer, and the wetting layer is wettable by solder.
  • the barrier metal has a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • the barrier metal comprises at least one of the elements nickel and cobalt.
  • the wetting layer comprises: tin or a tin alloy; silver or a silver alloy; silver tungsten alloy with 3-4 atomic percent tungsten; copper or a copper alloy; cobalt tin alloy; cobalt tin alloy including boron and/or phosphorus; nickel tin alloy; nickel tin alloy including boron and/or phosphorus; a thickness of nickel tin alloy having a first composition and a thickness of nickel tin alloy having a second composition; or a thickness of cobalt tin alloy having a first composition and a thickness of cobalt tin alloy having a second composition.
  • the electronic device further comprises one or more electrical contact pads that are at least partially covered by the barrier metal and/or one or more through-substrate via conductors that are at least partially covered by the barrier metal.
  • the embodiment also comprises solder contacting the wetting layer.
  • Fig. 4 where there is shown a cross-section side view of a part of an electronic device 300 according to one embodiment of the present invention.
  • Electronic device 300 comprises a substrate 302 having a through-substrate via 310.
  • Electronic device 300 further comprises a through- substrate electrical conductor comprising an electrolessly deposited barrier metal 314 to substantially cover the walls of through substrate via 310 and a substantially gold-free wetting layer 318 on barrier metal 314.
  • substantially gold- free wetting layer 318 is deposited on barrier metal 314 electrolessly.
  • Wetting layer 318 is wettable by solder.
  • Electronic device 300 further includes solder 322 contacting wetting layer 318 to substantially fill the core enclosed by wetting layer 318.
  • Figure 4 shows electronic device 300 comprising a barrier metal 326 that optionally may have properties similar to barrier metal 314 or may be a dissimilar material.
  • Figure 4 shows electronic device 300 comprising a wetting layer 330 that optionally may have properties similar to wetting layer 318 or may be a dissimilar material.
  • substrate 302 may comprise a completed or partially completed integrated circuit device.
  • substrate 302 may be a semiconductor such as silicon or it may be another material suitable for the fabrication of electronic devices.
  • One or more embodiments of the present invention comprise having the walls defining through-substrate via 310 at least partially covered by barrier metal 314.
  • barrier metal 314 comprising at least one of the elements nickel and cobalt.
  • electronic device 300 has a thickness of barrier metal 314 that is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • barrier metal 314 comprises at least one of the elements nickel and cobalt and the thickness of the barrier metal 314 is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
  • Additional embodiments of the present invention may have wetting layer 318 comprising one or more of a variety of materials systems.
  • materials systems suitable for use as wetting layer 318 include, but are not limited to: Wetting layer 318 comprising tin or a tin alloy.
  • Wetting layer 318 comprising silver or a silver alloy.
  • Wetting layer 318 comprising silver tungsten alloy with 3-4 atomic percent tungsten.
  • Wetting layer 318 comprising copper or a copper alloy.
  • Wetting layer 318 comprising cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy.
  • Wetting layer 318 comprising nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy.
  • Wetting layer 318 comprising iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy.
  • Wetting layer 318 comprising a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition.
  • Wetting layer 318 comprising a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition.
  • Wetting layer 318 comprising a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition.
  • Wetting layer 318 further comprising boron and/or phosphorus.

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Abstract

A method of making an electronic device which in one embodiment comprises providing a substrate, electrolessly depositing a barrier metal at least on portions of the substrate, and using wet chemistry such as electroless deposition to deposit a substantially gold-free wetting layer having solder wettability onto the barrier metal. An electronic device which in one embodiment comprises a metallization stack. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited on the barrier metal, and the wetting layer is wettable by solder.

Description

METHODS, DEVICES, AND MATERIALS FOR METALLIZATION BACKGROUND [0001] One or more embodiments of this invention pertain to fabrication of electronic devices such as integrated circuits; more specifically, one or more embodiments of this invention relate to materials and metallization layers for structures that include solder contacts. [0002] Solder contacts for electrical connections have been in use in electronic devices for a long time. Numerous established processes exist and are in use for fabricating such devices. Many of these processes have provided satisfactory results and few, if any, major improvements have been made to many of these established processes.
[0003] The present inventors have made one or more discoveries that may be pertinent to solder contact technology such as that for electronic devices. The one or more discoveries may have the potential to provide one or more methods, materials, and/or electronic devices that involve or use solder contact technology.
SUMMARY
[0004] One or more aspects of this invention pertain to fabrication of electronic devices. One aspect of the present invention is a method of making an electronic device. According to one embodiment, the method comprises providing a substrate, electrolessly depositing a barrier metal at least on portions of the substrate; and using wet chemistry such as electroless deposition to deposit a substantially gold-free wetting layer having solder wettability onto the barrier metal. [0005] Another aspect of the present invention is an electronic device.
According to one embodiment, the electronic device comprises a metallization stack. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited on the barrier metal, and the wetting layer is wettable by solder. [0006] It is to be understood that the invention is not limited in its application to the details of construction and to the arrangements of the components set forth in the following description. The invention is capable of other embodiments and of being practiced and carried out in various ways. In addition, it is to be understood that the phraseology and terminology employed herein are for the purpose of description and should not be regarded as limiting.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] FIG. 1 is a process flow diagram of an embodiment of the present invention.
[0008] FIG. 2 is a diagram of an embodiment of the present invention.
[0009] FIG. 3 is a diagram of an embodiment of the present invention.
[0010] FIG. 4 is a diagram of an embodiment of the present invention. [0011] Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding embodiments of the present invention. DESCRIPTION
[0012] For the following defined terms, these definitions shall be applied, unless a different definition is given in the claims or elsewhere in this specification. All numeric values are herein defined as being modified by the term "about," whether or not explicitly indicated. The term "about" generally refers to a range of numbers that a person of ordinary skill in the art would consider equivalent to the stated value to produce substantially the same properties, function, result, etc. A numerical range indicated by a low value and a high value is defined to include all numbers subsumed within the numerical range and all subranges subsumed within the numerical range. As an example, the range 10 to 15 includes, but is not limited to, 10, 10.1 , 10.47, 1 1 , 1 1 .75 to 12.2, 12.5, 13 to 13.8, 14, 14.025, and 15.
[0013] One or more embodiments of the present invention pertain to methods, devices, materials, and/or metallization layers for structures that include solder. More specifically, the present invention is directed toward materials and
metallization layers for electronic devices that comprise solder.
[0014] Embodiments of the present invention will be discussed below primarily in the context of processing semiconductor wafers such as silicon wafers used for fabricating electronic devices. The electronic devices include copper and/or another electrical conductor. The electronic devices have one or more electrical
connections that include solder. However, it is to be understood that embodiments in accordance with the present invention may be used for other types of
semiconductor devices and wafers other than semiconductor wafers. [0015] Reference is now made to Fig. 1 where there is shown a process flow diagram 40 according to an embodiment of the present invention. Process flow diagram 40 includes providing a substrate 50. Optionally, the substrate may be a substrate such as a semiconductor wafer such as a silicon wafer or a substrate of another material suitable for fabricating electronic devices. Process flow diagram 40 comprises electrolessly depositing (ELD) a barrier metal 60 at least over portions of the substrate. Process flow diagram 40 also comprises wet chemical deposit such as electrolessly depositing a wetting layer 70. The wetting layer is a
substantially gold-free wetting layer having solder wettability. The wetting layer is deposited on the barrier metal. Optionally, a process flow diagram for an
embodiment of the present invention may include process flow diagram 40 further comprising forming solder contacts with the wetting layer. [0016] In process flow diagram 40, the providing a substrate 50 may be accomplished using a variety of substrates. In other words, a variety of substrates may be used in process flow diagram 40 for additional embodiments of the present invention. As an option for process flow diagram 40, the providing a substrate 50 comprises providing a substrate comprising one or more electrical contact pads, and the electrolessly depositing a barrier metal 60 comprises electrolessly depositing the barrier metal onto the one or more electrical contact pads.
[0017] As another option for process flow diagram 40, the providing a substrate 50 comprises providing a substrate comprising one or more through substrate via conductors, and the electrolessly depositing a barrier metal 60 comprises electrolessly depositing the barrier metal onto the one or more through substrate via conductors.
[0018] As still another option for process flow diagram 40, the providing a substrate 50 comprises providing a substrate comprising one or more vias, and the electrolessly depositing a barrier metal 60 comprises electrolessly depositing the barrier metal onto the walls of the one or more vias.
[0019] Examples of suitable barrier metals for use in process flow diagram 40 include, but are not limited to, electrolessly deposited nickel, electrolessly deposited nickel alloy, electrolessly deposited cobalt, and electrolessly deposited cobalt alloy. According to one or more embodiments of the present invention, process flow diagram 40 comprises depositing the barrier metal to a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
[0020] For some embodiments of the present invention, the barrier metal is electrolessly deposited without using palladium or other precious metals to act as activation metals to initiate the deposition process. Instead of using palladium or other precious metals for surface activation, one or more embodiments of the present invention use electroless deposition baths that comprise reducing agents such as borane for the electroless deposition process. The use of borane as at least one of the reducing agents in an electroless deposition bath, according to one or more embodiments of the present invention may avoid the formation of black pads that are typically associated with nickel phosphorus barrier layers with gold wetting layers.
[0021] Process flow diagram 40 can be modified for a variety of embodiments of the present invention that comprise using one or more options for electrolessly depositing wetting layer 70. Options for process flow diagram 40 for electrolessly depositing the wetting layer 70 include, but are not limited to: Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing tin or a tin alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing silver or a silver alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing silver tungsten alloy with 3-4 atomic percent tungsten. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition. Electrolessly depositing a substantially gold-free wetting layer that comprises electrolessly depositing a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition.
Optionally, one or more embodiments of the present invention may further comprise incorporating boron and/or phosphorus in the substantially gold-free wetting layer. For some embodiments of the present invention, one or more of the options for electrolessly depositing a wetting layer 70 may be combined.
[0022] For some embodiments of the present invention, process flow diagram 40 may further comprise using one or more corrosion prevention procedures on the surface of the wetting layer to keep the surface suitable for making solder contact. Examples of corrosion prevention procedures that may be suitable for embodiments of the present invention include, but are not limited to, depositing a corrosion protective film on the wetting layer; forming an organic solderabily preservative layer; rinsing the wetting layer with a solution containing a corrosion inhibitor; and adjusting the composition of the surface of the wetting layer so that it is less susceptible to corrosion.
[0023] As indicated above, one or more embodiments of the present invention comprise using wetting layers in which the composition of the wetting layer is not constant through the thickness of the wetting layer. For embodiments of the present invention that comprise electrolessly depositing a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition, the composition change can be accomplished by changing one or more deposition conditions such as the temperature for the deposition process, and such as the composition of the plating formulation. Embodiments of the present invention that comprise electrolessly depositing a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition can also use changes in one or more deposition conditions to accomplish the changes in composition of the wetting layer. Embodiments of the present invention that comprise electrolessly depositing a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition can also use changes in one or more deposition conditions to accomplish the changes in composition of the wetting layer.
[0024] One or more embodiments of the present invention include methods according to process flow diagram 40 wherein the electrolessly depositing a barrier metal at least over portions of the substrate 60 and the electrolessly depositing a substantially gold-free wetting layer 70 having solder wettability are accomplished using an electroless deposition bath composition at a temperature T1 to deposit the barrier metal and using the electroless deposition bath composition at another temperature T2 to deposit the wetting layer wherein T1 does not equal 12. In other words, T1 and T2 are sufficiently different to cause electroless deposition of materials having different compositions from the same electroless deposition bath composition. Alternatively, the electrolessly depositing a barrier metal at least over portions of the substrate 60 and the electrolessly depositing a substantially gold-free wetting layer 70 having solder wettability are accomplished using an electroless deposition bath composition over a range of temperatures TR1 to deposit the barrier metal and using the electroless deposition bath composition over another range of temperatures TR2 to deposit the wetting layer wherein TR1 and TR2 are dissimilar. In other words, TR1 and TR2 are sufficiently different to cause electroless deposition of materials having different compositions from the same electroless deposition bath composition. For one or more embodiments, the thickness composition profile of the barrier metal may vary as a result of the temperature variation in TR1 and/or the thickness composition profile of the wetting layer may vary as a result of the temperature variation in TR2.
[0025] Another embodiment of the present invention includes a method of making an electronic device. The method comprises providing a substrate 50 that comprises providing a substrate that comprises one or more electrical contact pads and/or one or more through-substrate via conductors. The method also comprises electrolessly depositing a barrier metal 60 that comprises electrolessly depositing a barrier metal that comprises at least one of the elements nickel and cobalt. The barrier layer has a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein at least over portions of the one or more electrical contact pads and/or the one or more through-substrate via conductors. For electrolessly depositing a wetting layer 70, the method comprises electrolessly depositing at least one of: tin or a tin alloy; silver tungsten alloy with 3-4 atomic percent tungsten;
copper or a copper alloy; cobalt tin alloy; cobalt copper alloy; cobalt silver alloy; cobalt copper tin alloy; cobalt copper silver alloy; cobalt silver tin alloy; cobalt copper silver tin alloy; nickel copper alloy; nickel silver alloy; nickel copper silver alloy; nickel copper tin alloy; nickel silver tin alloy; nickel copper silver tin alloy; iron tin alloy; iron copper alloy; iron silver alloy; iron copper tin alloy; iron copper silver alloy; iron silver tin alloy; iron copper silver tin alloy; a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second
composition; a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition; and a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition to contact the barrier metal so as to form a substantially gold-free wetting layer having solder wettability. Optionally, the method may further comprise incorporating boron and/or phosphorus in the substantially gold-free wetting layer. The method also comprises forming a solder contact to the substantially gold-free wetting layer.
[0026] Reference is now made to Fig. 2 where there is shown a cross-section side view of a part of an electronic device 100 according to one embodiment of the present invention. Electronic device 100 comprises a substrate 102 having a base 106, contact pad 1 10 supported on base 106, and a passivation layer 1 12 over base 106. Electronic device 100 further comprises a metallization stack comprising an electrolessly deposited barrier metal 1 14 on electrical contact pad 1 10 and an electrolessly deposited substantially gold-free wetting layer 1 18 on barrier metal 1 14. Wetting layer 1 18 is wettable by solder. Electronic device 100 further includes solder 122 contacting wetting layer 1 18. Figure 2 shows solder 122 as a solder ball that may be used for making another electrical contact. Figure 2 also shows electronic device 100 having optional passivation layer 124. [0027] For some embodiments of electronic device 100, substrate 102 may comprise a completed or partially completed integrated circuit device. Optionally base 106 may be a semiconductor such as silicon or it may be another material suitable for the fabrication of electronic devices. Optionally, contact pad 1 10 may comprise a contact pad such as a final metal contact pad for electronic devices such as an aluminum contact pad and such as a copper contact pad. One or more embodiments of the present invention comprise having electrical contact pad 1 10 at least partially covered by barrier metal 1 14.
[0028] One or more embodiments of the present invention include barrier metal 1 14 comprising at least one of the elements nickel and cobalt. According to one embodiment of the present invention, electronic device 100 has a thickness of barrier metal 1 14 that is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein. For one or more embodiments of the present invention, barrier metal 1 14 comprises at least one of the elements nickel and cobalt and a thickness of the barrier metal 1 14 is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein. [0029] Additional embodiments of the present invention may have wetting layer 1 18 comprising one or more of a variety of materials systems. Examples of materials systems suitable for use as wetting layer 1 18 include, but are not limited to: Wetting layer 1 18 comprising tin or a tin alloy. Wetting layer 1 18 comprising silver or a silver alloy. Wetting layer 1 18 comprising silver tungsten alloy with 3-4 atomic percent tungsten. Wetting layer 1 18 comprising copper or a copper alloy. Wetting layer 1 18 comprising cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy. Wetting layer 1 18 comprising nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy. Wetting layer 1 18 comprising iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy. Wetting layer 1 18 comprising a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition. Wetting layer 1 18 comprising a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition. Wetting layer 1 18 comprising a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition. Wetting layer 1 18 further comprising boron and/or phosphorus.
[0030] Reference is now made to Fig. 3 where there is shown a cross-section side view of a part of an electronic device 200 according to one embodiment of the present invention. Electronic device 200 comprises a substrate 202 having a through-substrate via 210, and a through-substrate via electrical conductor 212. Electronic device 200 also includes a passivation layer 224 over substrate 202. Electronic device 200 further comprises a metallization stack comprising an electrolessly deposited barrier metal 214 on electrical conductor 212 and a substantially gold-free wetting layer 218 on barrier metal 214. As an option, substantially gold-free wetting layer 218 is deposited on barrier metal 214
electrolessly. Wetting layer 218 is wettable by solder. Electronic device 200 further includes solder 222 contacting wetting layer 218.
[0031] For some embodiments of electronic device 200, substrate 202 may comprise a completed or partially completed integrated circuit device. Optionally, substrate 202 may be a semiconductor such as silicon or it may be another material suitable for the fabrication of electronic devices. Optionally, through-substrate via electrical conductor 212 may comprise an electrical conductor such as, but not limited to, aluminum, copper, polysilicon, solder, and tungsten. One or more embodiments of the present invention comprise having through-substrate via electrical conductor 212 at least partially covered by barrier metal 214. [0032] One or more embodiments of the present invention include barrier metal 214 comprising at least one of the elements nickel and cobalt. According to one embodiment of the present invention, electronic device 200 has a thickness of barrier metal 214 that is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein. For one or more embodiments of the present invention barrier metal 214 comprises at least one of the elements nickel and cobalt and a thickness of the barrier metal 214 is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
[0033] Additional embodiments of the present invention may have wetting layer 218 comprising one or more of a variety of materials systems. Examples of materials systems suitable for use as wetting layer 218 include, but are not limited to: Wetting layer 218 comprising tin or a tin alloy. Wetting layer 218 comprising silver or a silver alloy. Wetting layer 218 comprising silver tungsten alloy with 3-4 atomic percent tungsten. Wetting layer 218 comprising copper or a copper alloy. Wetting layer 218 comprising cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy. Wetting layer 218 comprising nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy. Wetting layer 218 comprising iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy. Wetting layer 218 comprising a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition. Wetting layer 218 comprising a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition. Wetting layer 218 comprising a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition. Wetting layer 218 further comprising boron and/or phosphorus.
[0034] Another embodiment of the present invention includes an electronic device comprising a metallization stack. The metallization stack comprises a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited electrolessly on the barrier metal. The barrier metal electrically contacts the wetting layer, and the wetting layer is wettable by solder. The barrier metal has a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein. The barrier metal comprises at least one of the elements nickel and cobalt. The wetting layer comprises: tin or a tin alloy; silver or a silver alloy; silver tungsten alloy with 3-4 atomic percent tungsten; copper or a copper alloy; cobalt tin alloy; cobalt tin alloy including boron and/or phosphorus; nickel tin alloy; nickel tin alloy including boron and/or phosphorus; a thickness of nickel tin alloy having a first composition and a thickness of nickel tin alloy having a second composition; or a thickness of cobalt tin alloy having a first composition and a thickness of cobalt tin alloy having a second composition. The electronic device further comprises one or more electrical contact pads that are at least partially covered by the barrier metal and/or one or more through-substrate via conductors that are at least partially covered by the barrier metal. The embodiment also comprises solder contacting the wetting layer. [0035] Reference is now made to Fig. 4 where there is shown a cross-section side view of a part of an electronic device 300 according to one embodiment of the present invention. Electronic device 300 comprises a substrate 302 having a through-substrate via 310. Electronic device 300 further comprises a through- substrate electrical conductor comprising an electrolessly deposited barrier metal 314 to substantially cover the walls of through substrate via 310 and a substantially gold-free wetting layer 318 on barrier metal 314. As an option, substantially gold- free wetting layer 318 is deposited on barrier metal 314 electrolessly. Wetting layer 318 is wettable by solder. Electronic device 300 further includes solder 322 contacting wetting layer 318 to substantially fill the core enclosed by wetting layer 318. Figure 4 shows electronic device 300 comprising a barrier metal 326 that optionally may have properties similar to barrier metal 314 or may be a dissimilar material. Also, Figure 4 shows electronic device 300 comprising a wetting layer 330 that optionally may have properties similar to wetting layer 318 or may be a dissimilar material. [0036] For some embodiments of electronic device 300, substrate 302 may comprise a completed or partially completed integrated circuit device. Optionally substrate 302 may be a semiconductor such as silicon or it may be another material suitable for the fabrication of electronic devices. One or more embodiments of the present invention comprise having the walls defining through-substrate via 310 at least partially covered by barrier metal 314.
[0037] One or more embodiments of the present invention include barrier metal 314 comprising at least one of the elements nickel and cobalt. According to one embodiment of the present invention, electronic device 300 has a thickness of barrier metal 314 that is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein. For one or more embodiments of the present invention barrier metal 314 comprises at least one of the elements nickel and cobalt and the thickness of the barrier metal 314 is about 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
[0038] Additional embodiments of the present invention may have wetting layer 318 comprising one or more of a variety of materials systems. Examples of materials systems suitable for use as wetting layer 318 include, but are not limited to: Wetting layer 318 comprising tin or a tin alloy. Wetting layer 318 comprising silver or a silver alloy. Wetting layer 318 comprising silver tungsten alloy with 3-4 atomic percent tungsten. Wetting layer 318 comprising copper or a copper alloy. Wetting layer 318 comprising cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy. Wetting layer 318 comprising nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy. Wetting layer 318 comprising iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy. Wetting layer 318 comprising a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition. Wetting layer 318 comprising a thickness of cobalt alloy having a first composition and a thickness of cobalt alloy having a second composition. Wetting layer 318 comprising a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition. Wetting layer 318 further comprising boron and/or phosphorus.
[0039] In the foregoing specification, the invention has been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below.
Accordingly, the specification is to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention.
[0040] Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims.
[0041] As used herein, the terms "comprises," "comprising," "includes,"
"including," "has," "having," "at least one of," or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, article, or apparatus that comprises a list of elements is not necessarily limited only to those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Further, unless expressly stated to the contrary, "or" refers to an inclusive or and not to an exclusive or. For example, a condition A or B is satisfied by any one of the following: A is true (or present) and B is false (or not present), A is false (or not present) and B is true (or present), and both A and B are true (or present).

Claims

What is claimed is: 1 . A method of making an electronic device, the method comprising:
providing a substrate;
electrolessly depositing a barrier metal at least over portions of the substrate; and
electrolessly depositing a substantially gold-free wetting layer having solder wettability onto the barrier metal.
2. The method of claim 1 , wherein the electrolessly depositing a substantially gold- free wetting layer is accomplished using an electroless deposition formulation comprising borane.
3. The method of claim 1 , wherein the providing a substrate comprises providing a substrate comprising one or more electrical contact pads and wherein the
electrolessly depositing a barrier metal at least over portions of the substrate comprises depositing the barrier metal onto the one or more electrical contact pads.
4. The method of claim 1 , wherein the providing a substrate comprises providing a substrate comprising one or more through-substrate via conductors and wherein the electrolessly depositing the barrier metal at least over portions of the substrate comprises depositing the barrier metal onto the one or more through-substrate via conductors.
5. The method of claim 1 , wherein the providing a substrate comprises providing a substrate having one or more vias and wherein the electrolessly depositing the barrier metal at least over portions of the substrate comprises depositing the barrier metal onto the walls of the one or more vias.
6. The method of claim 1 , wherein the electrolessly depositing a barrier metal at least over portions of the substrate comprises depositing a barrier metal that comprises cobalt.
7. The method of claim 1 , wherein the electrolessly depositing a barrier metal at least over portions of the substrate comprises depositing the barrier metal to a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
8. The method of claim 1 , wherein the electrolessly depositing a substantially gold- free wetting layer comprises electrolessly depositing tin.
9. The method of claim 1 , wherein the electrolessly depositing a substantially gold- free wetting layer comprises electrolessly depositing silver or a silver alloy.
10. The method of claim 1 , wherein the electrolessly depositing a substantially gold-free wetting layer comprises electrolessly depositing silver tungsten alloy with 3-4 atomic percent tungsten.
1 1. The method of claim 1 , wherein the electrolessly depositing a substantially gold-free wetting layer comprises electrolessly depositing cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy.
12. The method of claim 1 1 , further comprising incorporating boron and/or phosphorus in the substantially gold-free wetting layer.
13. The method of claim 1 , wherein the electrolessly depositing a substantially gold-free wetting layer comprises electrolessly depositing nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy.
14. The method of claim 13, further comprising incorporating boron and/or phosphorus in the substantially gold-free wetting layer.
15. The method of claim 1 , wherein the electrolessly depositing a substantially gold-free wetting layer comprises electrolessly depositing iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy.
16. The method of claim 15, further comprising incorporating boron and/or phosphorus in the substantially gold-free wetting layer.
17. The method of claim 1 , wherein the electrolessly depositing a substantially gold-free wetting layer comprises electrolessly depositing a thickness of nickel alloy having a first composition and a thickness of nickel alloy having a second composition.
18. The method of claim 1 , wherein the electrolessly depositing a substantially gold-free wetting layer comprises electrolessly depositing a thickness of cobalt tin alloy having a first composition and a thickness of cobalt tin alloy having a second composition.
19. The method of claim 1 , wherein the electrolessly depositing a barrier metal at least over portions of the substrate; and the electrolessly depositing a substantially gold-free wetting layer having solder wettability are accomplished using an electroless deposition bath composition in a temperature range to deposit the barrier metal and using the electroless deposition bath composition in another temperature range to deposit the wetting layer.
20. A method of making an electronic device, the method comprising: providing a substrate comprising one or more electrical contact pads and/or one or more through-substrate via conductors;
electrolessly depositing a barrier metal comprising at least one of the elements nickel and cobalt to a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein at least over portions of the one or more electrical contact pads and/or the one or more through-substrate via conductors; electrolessly depositing at least one of:
1. tin or a tin alloy;
2. silver tungsten alloy with 3-4 atomic percent tungsten;
3. cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt
copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy;
4. nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy;
5. iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy;
6. a thickness of nickel alloy having a first composition and a
thickness of nickel alloy having a second composition;
7. a thickness of cobalt alloy having a first composition and a
thickness of cobalt alloy having a second composition; and
8. a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition;
to contact the barrier metal so as to form a substantially gold-free wetting layer having solder wettability; and
forming a solder contact to the substantially gold-free wetting layer.
21. An electronic device comprising a metallization stack, the metallization stack comprising a barrier metal deposited electrolessly and a substantially gold-free wetting layer deposited electrolessly, the barrier metal contacting the wetting layer, and the wetting layer being wettable by solder.
22. The electronic device of claim 21 , further comprising electrical contact pads at least partially covered by the barrier metal.
23. The electronic device of claim 21 , further comprising a through-substrate via conductor at least partially covered by the barrier metal.
24. The electronic device of claim 21 , wherein the substrate has one or more through-substrate vias, the walls of the substrate forming the one or more vias are at least partially covered by the barrier metal and further comprising solder contacting the wetting layer to substantially fill the one or more vias.
25. The electronic device of claim 21 , wherein the barrier metal has a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein.
26. The electronic device of claim 21 , wherein the barrier metal comprises cobalt.
27. The electronic device of claim 21 , wherein the wetting layer comprises tin or a tin alloy.
28. The electronic device of claim 21 , wherein the wetting layer comprises silver tungsten alloy with 3-4 atomic percent tungsten.
29. The electronic device of claim 21 , wherein the wetting layer comprises cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy.
30. The electronic device of claim 29, wherein the wetting layer further comprises boron and/or phosphorus.
31. The electronic device of claim 21 , wherein the wetting layer comprises nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy.
32. The electronic device of claim 31 , wherein the wetting layer further comprises boron and/or phosphorus.
33. The electronic device of claim 21 , wherein the wetting layer comprises iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy.
34. The electronic device of claim 33, wherein the wetting layer further comprises boron and/or phosphorus.
35. The electronic device of claim 21 , wherein the wetting layer comprises a thickness of nickel tin alloy having a first composition and a thickness of nickel tin alloy having a second composition.
36. The electronic device of claim 21 , wherein the wetting layer comprises a thickness of cobalt tin alloy having a first composition and a thickness of cobalt tin alloy having a second composition.
37. The electronic device of claim 21 , wherein the barrier metal has a thickness of 0.2 micrometer to 1 micrometer and all values and ranges subsumed therein, the barrier metal comprises at least one of the elements nickel and cobalt;
wherein the wetting layer comprises:
1. tin or a tin alloy;
2. silver tungsten alloy with 3-4 atomic percent tungsten;
3. cobalt tin alloy, cobalt copper alloy, cobalt silver alloy, cobalt
copper tin alloy, cobalt copper silver alloy, cobalt silver tin alloy, or cobalt copper silver tin alloy;
4. nickel copper alloy, nickel silver alloy, nickel copper silver alloy, nickel copper tin alloy, nickel silver tin alloy, or nickel copper silver tin alloy;
5. iron tin alloy, iron copper alloy, iron silver alloy, iron copper tin alloy, iron copper silver alloy, iron silver tin alloy, or iron copper silver tin alloy;
6. a thickness of nickel alloy having a first composition and a
thickness of nickel alloy having a second composition;
7. a thickness of cobalt alloy having a first composition and a
thickness of cobalt alloy having a second composition; or
8. a thickness of iron alloy having a first composition and a thickness of iron alloy having a second composition;
further comprising one or more electrical contact pads being at least partially covered by the barrier metal and/or one or more through-substrate via conductors being at least partially covered by the barrier metal; and solder contacting the wetting layer.
PCT/IB2011/052895 2010-07-07 2011-06-30 Methods, devices, and materials for metallization Ceased WO2012004710A2 (en)

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KR1020187020773A KR20180085824A (en) 2010-07-07 2011-06-30 Methods, devices, and materials for metallization
KR1020137000395A KR101882034B1 (en) 2010-07-07 2011-06-30 Methods, devices, and materials for metallization
SG2012092243A SG186360A1 (en) 2010-07-07 2011-06-30 Methods, devices, and materials for metallization
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KR20180085824A (en) 2018-07-27
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CN102971840A (en) 2013-03-13
JP2013530311A (en) 2013-07-25
SG186360A1 (en) 2013-01-30
KR20130113413A (en) 2013-10-15
US8518815B2 (en) 2013-08-27
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JP5868968B2 (en) 2016-02-24
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US20140054776A1 (en) 2014-02-27
US9006893B2 (en) 2015-04-14
TWI554644B (en) 2016-10-21

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