WO2012002110A1 - Display medium and display device - Google Patents

Display medium and display device Download PDF

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Publication number
WO2012002110A1
WO2012002110A1 PCT/JP2011/062932 JP2011062932W WO2012002110A1 WO 2012002110 A1 WO2012002110 A1 WO 2012002110A1 JP 2011062932 W JP2011062932 W JP 2011062932W WO 2012002110 A1 WO2012002110 A1 WO 2012002110A1
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WO
WIPO (PCT)
Prior art keywords
light
substrate
display
display medium
display device
Prior art date
Application number
PCT/JP2011/062932
Other languages
French (fr)
Japanese (ja)
Inventor
義学 倉橋
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ブラザー工業株式会社
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Publication of WO2012002110A1 publication Critical patent/WO2012002110A1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/166—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect
    • G02F1/167—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect by electrophoresis
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/1675—Constructional details
    • G02F1/1677—Structural association of cells with optical devices, e.g. reflectors or illuminating devices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/08—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 light absorbing layer

Definitions

  • the present invention relates to a display medium and a display device.
  • Patent Document 1 discloses an electro-optical display in which image display is maintained even when power supply is cut off. Such an electro-optical display is used with an active matrix circuit and is applied to a display device for viewing a document or an image.
  • a TFT Thin Film Transistor
  • white light such as sunlight is incident on the display device with an illuminance exceeding 50,000 lx
  • the TFT of the display device is excited even when no gate voltage is applied.
  • the charge stored in the pixel electrode flows backward from the TFT to the source electrode line, resulting in a leak current. Due to the occurrence of this leakage current, there is a problem that the display quality of the rewritten image is deteriorated.
  • an object of the present disclosure is to provide a display medium that can prevent strong light from entering the TFT and prevent the occurrence of leakage current, and a display device including the display medium.
  • the disclosure of claim 1 includes a transparent first substrate, a second substrate facing the first substrate, a plurality of pixel electrodes formed on the second substrate, A plurality of thin film transistors formed on the second substrate and provided for each of the plurality of pixel electrodes, and a charged particle including a plurality of charged particles disposed between the first substrate and the second substrate And a light-reducing layer disposed between the thin film transistor and the charged particle layer to reduce light incident from the first substrate side.
  • the disclosure of the first aspect it is possible to prevent strong light from entering the thin film transistor and to prevent generation of a leakage current.
  • the dimming layer includes at least one dimming member provided to cover the plurality of thin film transistors and the plurality of pixel electrodes. It is formed by these.
  • light irradiated to the thin film transistor can be more reliably attenuated as compared with the case where the light attenuation layer is not formed on the portion other than the upper portion of the thin film transistor.
  • the disclosure described in claim 3 is characterized in that, in addition to the feature of the invention described in claim 1, the dimming layer contains a blue dye or pigment.
  • the disclosure described in claim 4 is characterized in that, in addition to the feature of the invention described in claim 1, the light transmittance of the light reducing layer is 50% or less.
  • the disclosure according to claim 5 is a display device comprising the display medium according to claim 1 and a circuit board on which an electronic circuit for rewriting the display of the display medium is formed.
  • FIG. 2 is a schematic view of a cross section of the display device 1 when a cross section taken along line AA shown in FIG. 1 is viewed from the direction of an arrow.
  • 2 is a schematic diagram of an enlarged cross section in which a cross section of the display medium 100 is enlarged.
  • FIG. It is the schematic which shows the structure of the active matrix circuit formed in the circuit formation surface 108A. It is the enlarged view to which the area
  • the display device 1 is a display device that displays documents, images, and the like.
  • the display device 1 has a size that can be carried by a user. By carrying the display device 1 out of the way, the user can browse a desired document or image even when the user is away from home.
  • the display device 1 is a display device provided with a display medium 100.
  • the display medium 100 is a display medium having a known electrophoretic display element as described in JP-T-2004-536336. A detailed configuration of the display medium 100 will be described later.
  • the display device 1 displays a desired image on the display medium 100.
  • the image displayed on the display medium 100 is rewritten by a display controller provided on a circuit board 7 (see FIG. 2) described later.
  • An electronic circuit for rewriting the display of the display medium 100 is formed on the circuit board 7.
  • the image displayed on the display medium 100 is kept displayed even when power supply to the display medium 100 or the display controller is cut off.
  • a display device 1 Since such a display device 1 does not require power for maintaining the display of an image, after rewriting the image, power supply is stopped by stopping the supply of power to the display medium 100 or the display controller. It can be suppressed. Therefore, a display having a self-luminous display panel such as an LCD (Liquid Crystal Display) panel or a PDP (Plasma Display Display Panel), which requires power to maintain image display and requires a conventional backlight. It is characterized by low power consumption compared to the device.
  • LCD Liquid Crystal Display
  • PDP Plasma Display Display Panel
  • the display device 1 includes a transparent plate 2, a plurality of buttons 3, an upper housing 4, a lower housing 5, an FPC 6, a circuit board 7, and a display medium 100. Is provided.
  • the display device 1 includes a display medium 100, an FPC 6, and a circuit board 7 in the internal space of the display device 1 surrounded by the upper housing 4, the lower housing 5, and the transparent plate 2.
  • the upper housing 4 and the lower housing 5 may be formed of a suitable resin material such as ABS resin.
  • the upper housing 4 and the lower housing 5 mainly form the outer shape of the display device 1.
  • the upper housing 4 and the lower housing 5 protect the display medium 100, the FPC (Flexible Printed Circuits) 6, the circuit board 7, and the like in the internal space of the display device 1.
  • the transparent plate 2 is provided in the approximate center of the front surface of the display device 1.
  • the user visually recognizes an image displayed on the display medium 100 through the transparent plate 2.
  • the transparent plate 2 may be formed of a suitable resin material such as transparent acrylic.
  • the upper housing 4 has an opening at the approximate center of the front surface of the display device 1. The transparent plate 2 is fitted in the opening.
  • the display device 1 includes a plurality of buttons 3.
  • the button 3 is provided to switch on and off the contacts of a known membrane switch provided on the circuit board 7.
  • the button 3 may be made of a suitable resin material such as ABS resin.
  • the upper part of the button 3 protrudes from the upper housing 4 to the outside.
  • the button 3 presses the membrane switch provided on the circuit board 7, and the contact of the membrane switch is connected.
  • the circuit board 7 includes various circuits necessary for controlling the display device 1, semiconductor elements, and the like. As described above, the circuit board 7 includes a display controller and a membrane switch.
  • the display device 1 includes a holding member for holding the display medium 100 and the circuit board 7 at predetermined positions.
  • the holding member is not described in FIGS. 1 and 2.
  • the configuration of a battery or the like for supplying power to the display device 100 is not shown in FIGS.
  • the display medium 100 includes a protective film 101, a transparent adhesive layer 102, an electrode forming film 103, a laminated body 106 including a polymer binder 104, and a glass substrate 108 on which the laminated body 106 is placed.
  • the protective film 101 is a layer located on the uppermost side of the laminated body 106.
  • the protective film 101 is a transparent plastic film made of PET.
  • On the upper surface of the protective film 101 there are a protective layer for absorbing ultraviolet radiation, a barrier layer for preventing intrusion of oxygen or moisture, an antireflection coating for improving optical characteristics, an antiglare coating, and the like. It has been subjected.
  • the transparent adhesive layer 102 is formed of a transparent acrylic adhesive mainly composed of acrylic.
  • the transparent adhesive layer 102 adheres the lower surface of the protective film and the upper surface of the electrode forming film 103.
  • the electrode forming film 103 is a transparent plastic film made of PET.
  • the lower surface of the electrode forming film 103 is an electrode forming surface 103A.
  • a common electrode provided in common to all the pixels is formed on the electrode formation surface 103A.
  • the common electrode is made of ITO (Indium Tin Oxide). By depositing ITO on the electrode forming surface 103A.
  • a common electrode is formed on the electrode forming film 103. Incidentally, the common electrode is not shown in FIG.
  • a polymer binder 104 having a plurality of microcapsules 105 is provided below the common electrode formed on the electrode forming film 103.
  • the polymer binder 104 is formed integrally with the electrode forming film 103.
  • the polymer binder 104 is formed of a resin material such as polyurethane.
  • the microcapsule 105 is a small space formed in the polymer binder 104.
  • the microcapsule 105 contains a hydrocarbon-based fluid. In the hydrocarbon-based fluid, a large number of white charged particles 151 and a large number of black charged particles 152 are held in a dispersed state.
  • the white charged particles 151 are negatively charged white particles.
  • the black charged particles are positively charged black particles.
  • the polymer binder 104 is a layer located at the bottom of the laminated body 106.
  • the laminate 106 has a plurality of layers laminated in order.
  • the protective film 101, the transparent adhesive layer 102, the electrode forming film 103, and the polymer binder 104 are rectangular shapes having substantially the same size when viewed from above.
  • the laminated body 106 is disposed via a light-reducing double-sided tape 107 on a glass substrate 108 that is slightly larger than the laminated body 106 when viewed from above.
  • the glass substrate 108 and the laminate 106 are bonded with a light-reducing double-sided tape 107.
  • the glass substrate 108 is a substrate formed of glass.
  • the glass substrate 108 includes a circuit forming surface 108A.
  • the circuit formation surface 108A is the upper surface of the glass substrate 108.
  • an active matrix circuit including a pixel electrode 135, a TFT 140, a gate electrode line 111, a source electrode line 121, and the like, which will be described later, is formed on the circuit formation surface 108A (see FIG. 3). (See FIGS. 4 and 5).
  • the gate driver 110 (see FIGS. 3 and 4) for controlling the output of the gate signal to the gate electrode line 111 on the circuit formation surface 108A and the output of the source signal to the source electrode line 121 are controlled.
  • Source driver 120 (see FIG. 4) is installed. Details of these configurations will be described later.
  • the glass substrate 108 and the laminate 106 are formed by a light-reducing double-sided tape 107 disposed so as to cover the pixel electrode 135, the TFT 140, the gate electrode line 111, the source electrode line 121, and the like formed on the circuit formation surface 108A. Is glued.
  • the light-reducing double-sided tape 107 is a double-sided tape provided with an acrylic adhesive mainly composed of acrylic on both sides of a base material formed of a polyester film. A predetermined amount of dye or pigment is contained in the polyester film of the substrate so that white light such as sunlight can be reduced.
  • the light transmittance of the polyester film of the substrate is 50% or less.
  • the light-reducing double-sided tape 107 preferably contains a blue dye or pigment. Since the common electrode formed on the electrode forming film 103 is a little yellow with ITO, the image displayed on the display medium 100 is also displayed a little yellow. On the other hand, the yellowish display can be improved by setting the color of the light-reducing double-sided tape 107 to blue.
  • the laminated body 106 and the glass substrate 108 are fixed by a silicon mold 109 formed along the side surface of the laminated body 106.
  • the silicon mold is formed along the side surface of the laminated body 106 and the circuit formation surface 108 ⁇ / b> A of the glass substrate 108.
  • a plurality of gate drivers 110 are arranged on the circuit forming surface 108A.
  • a terminal on one end side of each gate driver 110 is electrically connected to a number of gate electrode lines 111. Further, the terminal on the other end side of each gate driver 110 is electrically connected to the plurality of signal lines 112.
  • a control signal from the display controller of the circuit board 7 is input to the gate driver 110 via the signal line 112.
  • the gate driver 110 controls a gate signal output to each gate electrode line 111 in accordance with a control signal input from the signal line 112.
  • the signal line 112 is connected to the circuit of the circuit board 7 through the FPC 6 described above.
  • a plurality of source drivers 120 are arranged on the circuit forming surface 108A.
  • a terminal on one end side of each source driver 120 is connected to a plurality of source electrode lines 121.
  • the terminals on the other end side of each source driver are electrically connected to the plurality of signal lines 122.
  • a control signal from the display controller of the circuit board 7 is input to the source driver 120 through the signal line 122.
  • the source driver 120 controls a source signal output to each source electrode line 121 in accordance with a control signal input from the signal line 122.
  • the signal line 122 is connected to the circuit of the circuit board 7 through the FPC 6 described above.
  • a large number of gate electrode lines 111 and a large number of source electrode lines 121 are arranged in a lattice pattern so as to cross each other.
  • One TFT 140 and one pixel electrode 135 are disposed in the vicinity of the intersection of the gate electrode line 111 and the source electrode line 121. A detailed configuration near the intersection will be described with reference to FIG.
  • one pixel electrode 135 is arranged in the vicinity of the intersection of the gate electrode line 111 and the source electrode line 121.
  • a gate electrode portion 111A protruding to the pixel electrode 135 side.
  • a source electrode portion 121A protruding toward the pixel electrode 135 side.
  • An insulating film 133 is formed on the gate electrode portion 111A, and a semiconductor film 132 is further formed thereon.
  • the source electrode portion 121 ⁇ / b> A is formed so as to cover one end side of the semiconductor film 132.
  • a drain electrode 131 is formed so as to cover the other end side of the semiconductor film 132.
  • the drain electrode 131 is electrically connected to the pixel electrode 135.
  • the TFT 140 includes the source electrode portion 121A, the insulating film 133, the semiconductor film 132, the gate electrode portion 111A, the drain electrode 131, and the like.
  • an insulating film 134 is formed at an intersection of the gate electrode line 111 and the source electrode line 121 in order to prevent the gate electrode line 111 and the source electrode line 121 from being electrically connected.
  • the insulating film 134 is formed between the gate electrode line 111 and the source electrode line 121.
  • a light-reducing area B indicated by a dotted line in FIG. 6 is an area where the above-mentioned light-reducing double-sided tape 107 covers the glass substrate 108.
  • the light-reducing double-sided tape 107 is disposed so as to cover all the TFTs 140 and all the pixel electrodes 135 formed on the circuit forming surface 108A.
  • the double-sided tape of the light-reducing double-sided tape 107 is first attached to the lower surface of the laminated body 106, that is, the lower surface of the polymer binder 104, and then the laminated body 106 with the double-sided tape attached thereto is placed on the glass substrate 108. As a result, the laminate 106 and the glass substrate 108 are bonded together with the light-reducing double-sided tape 107.
  • the light-reducing double-sided tape 107 used at this time is a double-sided tape that covers all the TFTs 140 and all the pixel electrodes 135 as described above. The accuracy of alignment when affixing to the sheet may not be so high. Further, the light-reducing double-sided tape 107 is disposed so as to cover all the TFTs 140 and all the pixel electrodes 135 as described above. For this reason, light can be reduced more reliably.
  • the electrode formation film 103 in the above-mentioned embodiment is equivalent to the 1st board
  • the glass substrate 108 in the above-mentioned embodiment is equivalent to the 2nd board
  • the pixel electrode 135 in the above-described embodiment corresponds to the pixel electrode described in the claims.
  • the TFT 140 in the above-described embodiment corresponds to the thin film transistor described in the claims.
  • the polymer binder 104 and the microcapsule 105 in the above-described embodiment correspond to the charged particle layer described in the claims.
  • the light-reducing double-sided tape 107 in the above-described embodiment corresponds to the light-reducing layer and the light-reducing member described in the claims.
  • the display medium 100 in the above-described embodiment corresponds to the display medium described in the claims.
  • the display device 1 in the above-described embodiment corresponds to the display device described in the claims.
  • the display medium and the display device of the present invention are not limited to the above-described embodiments, and it is needless to say that various modifications can be made without departing from the gist of the present invention.
  • the above-described light-reducing double-sided tape 107 has been described as being disposed so as to cover all the TFTs 140 and all the pixel electrodes 135 as described above.
  • a modification in which a light-reducing double-sided tape is provided only on the TFT 140 and a light-reducing double-sided tape is not provided on the pixel electrode 135 is also conceivable. Even in this modification, the light that is directly incident on the TFT 140 is attenuated by the double-sided tape having a light-reducing property. According to this modification, the amount of the light-reducing double-sided tape to be used can be reduced, and the manufacturing cost can be reduced.
  • the light-reducing double-sided tape 107 having a size covering all the TFTs 140 and all the pixel electrodes 135 is used, but the present invention is not limited to this.
  • a plurality of small-size light-reducing double-sided tapes 107 of the above-described embodiment may be used.
  • a light-reducing double-sided tape 107 having a size covering each of the light-reducing area B1, the light-reducing area B2, and the light-reducing area B3 may be used. In this way, by using a plurality of light-reducing double-sided tapes 107 covering a plurality of TFTs 140 and a plurality of pixel electrodes 135 in combination, light incident on the TFTs 140 may be reduced.
  • an acrylic adhesive containing a dye or pigment may be used as the light-reducing layer in order to reduce light.
  • the adhesive is applied to the lower surface side of the laminated body 106 by die coating or the like, and then the laminated body 106 to which the light-reducing adhesive is applied is disposed on the glass substrate 108.
  • the light-reducing double-sided tape 107 has been described as containing a blue dye or pigment, but other color dyes or pigments are contained. But you can. Moreover, what contains both dye and a pigment may be sufficient.
  • the light-reducing double-sided tape 107 is used, but a PET film containing a dye or a pigment may be used as the light-reducing layer.
  • a double-sided tape may be attached to both sides of the PET film, and the laminate 106 and the glass substrate 108 may be bonded.
  • the polymer binder 104 including the microcapsules 105 is described as the charged particle layer, but the present invention is not limited to this.
  • the present invention may be applied to a display medium in which a plurality of partition walls are provided between a pair of opposing substrates, and charged particles are provided in a region defined by the pair of substrates and the partition walls.
  • the display medium 100 in which charged particles are dispersed in a hydrocarbon-based fluid has been described as an example, but the present invention is not limited to this.
  • the present invention may be applied to a display medium in which charged particles are dispersed in a gas.
  • the display medium 100 including white particles and black particles has been described as an example, but the present invention is not limited to this.
  • a display medium that includes black particles in a white fluid and displays an image with a combination of fluid white and black black particles may be used.
  • the light reducing layer of the present invention may be any material as long as it has the property of reducing light, and a metal such as a metal chromium film may be used.

Abstract

Provided is a display medium that prevents a thin film transistor (TFT) being exposed to strong light and is able to prevent the generation of a leakage current, and a display device that is provided with said display medium. The display device is characterised by being provided with: a transparent first substrate; a second substrate that faces the first substrate; multiple pixel electrodes that are formed on the second substrate; multiple thin film transistors that are formed on the second substrate and that are provided to each of the multiple pixel electrodes; a charged particle layer that is arranged between the first substrate and the second substrate and provides a plurality of charged particles; and a light reduction layer that is arranged between the thin film transistors and the charged particle layer and reduces the light incoming from the first substrate side.

Description

[規則37.2に基づきISAが決定した発明の名称]　表示媒体及び表示装置[Name of invention determined by ISA based on Rule 37.2] Display media and display device
　本発明は、表示媒体及び表示装置に関するものである。 The present invention relates to a display medium and a display device.
　従来から、電力の供給が絶たれても画像の表示が維持される電気－光学ディスプレイが、例えば特許文献１により知られている。このような電気－光学ディスプレイは、アクティブマトリクス回路と共に使用され、文書や画像を閲覧するための表示装置に適用される。 Conventionally, for example, Patent Document 1 discloses an electro-optical display in which image display is maintained even when power supply is cut off. Such an electro-optical display is used with an active matrix circuit and is applied to a display device for viewing a document or an image.
特表２００４－５３６３３６号公報JP-T-2004-536336
　上述のような表示装置のアクティブマトリクス回路にはＴＦＴ（Ｔｈｉｎ　Ｆｉｌｍ　Ｔｒａｎｓｉｓｔｏｒ）がスイッチング素子として用いられる。しかしながら、太陽光などの白色光が５０，０００ｌｘを超える照度で表示装置に入射されると、ゲート電圧を印加していない状態であっても表示装置のＴＦＴは励起される。この場合、画素電極に蓄えられた電荷が、ＴＦＴからソース電極線へ逆流してリーク電流が発生してしまう。このリーク電流の発生により、書き換えられる画像の表示品質が悪くなるという問題がある。 In the active matrix circuit of the display device as described above, a TFT (Thin Film Transistor) is used as a switching element. However, when white light such as sunlight is incident on the display device with an illuminance exceeding 50,000 lx, the TFT of the display device is excited even when no gate voltage is applied. In this case, the charge stored in the pixel electrode flows backward from the TFT to the source electrode line, resulting in a leak current. Due to the occurrence of this leakage current, there is a problem that the display quality of the rewritten image is deteriorated.
　そこで本開示は、ＴＦＴへの強い光の入射を防止し、リーク電流の発生を防止できる表示媒体及びその表示媒体を備えた表示装置を提供することを目的とする。 Therefore, an object of the present disclosure is to provide a display medium that can prevent strong light from entering the TFT and prevent the occurrence of leakage current, and a display device including the display medium.
　上述した課題を解決するため、請求項１に記載の開示は、透明な第一基板と、前記第一基板と対向する第二基板と、前記第二基板に形成された複数の画素電極と、前記第二基板に形成され、且つ、前記複数の画素電極毎に設けられた複数の薄膜トランジスタと、前記第一基板と前記第二基板との間に配置され、多数の帯電粒子を備えた帯電粒子層と、前記薄膜トランジスタと前記帯電粒子層との間に配置され、前記第一基板側から入射される光を減光する減光層と、を備えたことを特徴とする。 In order to solve the above-described problem, the disclosure of claim 1 includes a transparent first substrate, a second substrate facing the first substrate, a plurality of pixel electrodes formed on the second substrate, A plurality of thin film transistors formed on the second substrate and provided for each of the plurality of pixel electrodes, and a charged particle including a plurality of charged particles disposed between the first substrate and the second substrate And a light-reducing layer disposed between the thin film transistor and the charged particle layer to reduce light incident from the first substrate side.
　請求項１に記載の開示によれば、薄膜トランジスタへの強い光の入射を防止し、リーク電流の発生を防止することができる。 According to the disclosure of the first aspect, it is possible to prevent strong light from entering the thin film transistor and to prevent generation of a leakage current.
　請求項２に記載の開示は、請求項１に記載の発明の特徴に加え、前記減光層は、複数の薄膜トランジスタ及び複数の画素電極を覆うように設けられている少なくとも１以上の減光部材により形成されていることを特徴とする。 According to a second aspect of the present invention, in addition to the feature of the invention according to the first aspect, the dimming layer includes at least one dimming member provided to cover the plurality of thin film transistors and the plurality of pixel electrodes. It is formed by these.
　請求項２に記載の開示によれば、減光層が薄膜トランジスタの上部以外に形成されていない場合にくらべ、より確実に薄膜トランジスタへ照射される光を減光することができる。 According to the disclosure of the second aspect, light irradiated to the thin film transistor can be more reliably attenuated as compared with the case where the light attenuation layer is not formed on the portion other than the upper portion of the thin film transistor.
　請求項３に記載の開示は、請求項１に記載の発明の特徴に加え、前記減光層には、青色の染料または顔料が含有されていることを特徴とする。 The disclosure described in claim 3 is characterized in that, in addition to the feature of the invention described in claim 1, the dimming layer contains a blue dye or pigment.
　請求項３に記載の開示によれば、共通電極としてＩＴＯが用いられた場合に、表示が全体的に黄色く見えることを防止することができる。 According to the disclosure of claim 3, when ITO is used as the common electrode, it is possible to prevent the display from appearing yellow as a whole.
　請求項４に記載の開示は、請求項１に記載の発明の特徴に加え、前記減光層の光の透過率が５０％以下であることを特徴とする。 The disclosure described in claim 4 is characterized in that, in addition to the feature of the invention described in claim 1, the light transmittance of the light reducing layer is 50% or less.
　請求項５に記載の開示は、請求項１に記載の表示媒体と、前記表示媒体の表示を書き換えるための電子回路が形成された回路基板と、を備えた表示装置である。 The disclosure according to claim 5 is a display device comprising the display medium according to claim 1 and a circuit board on which an electronic circuit for rewriting the display of the display medium is formed.
　請求項５に記載の開示によれば、リーク電流の発生を防止した表示装置を提供することができる。 According to the disclosure of claim 5, it is possible to provide a display device that prevents the occurrence of leakage current.
　薄膜トランジスタへの強い光の入射を防止し、リーク電流の発生を防止することができる。 It is possible to prevent strong light from entering the thin film transistor and prevent leakage current.
表示装置１を正面から見た場合の外観を示した概略図である。It is the schematic which showed the external appearance at the time of seeing the display apparatus 1 from the front. 図１に示すＡ－Ａ線の断面を矢印の方向からみた場合の表示装置１の断面の概略図である。FIG. 2 is a schematic view of a cross section of the display device 1 when a cross section taken along line AA shown in FIG. 1 is viewed from the direction of an arrow. 表示媒体１００の断面を拡大した拡大断面の概略図である。2 is a schematic diagram of an enlarged cross section in which a cross section of the display medium 100 is enlarged. FIG. 回路形成面１０８Ａに形成されるアクティブマトリクス回路の構成を示す概略図である。It is the schematic which shows the structure of the active matrix circuit formed in the circuit formation surface 108A. 図４に示す領域Ａ近傍を拡大した拡大図である。It is the enlarged view to which the area | region A vicinity shown in FIG. 4 was expanded. 両面テープ１０７が配置される領域の一例を示した概略図である。It is the schematic which showed an example of the area | region where the double-sided tape 107 is arrange | positioned. 両面テープ１０７が配置される領域の一例を示した概略図である。It is the schematic which showed an example of the area | region where the double-sided tape 107 is arrange | positioned.
　以下に、本発明が適用される表示装置１について説明する。先ず、表示装置１の概要について説明する。表示装置１は、文書や、画像などを表示する表示装置である。表示装置１は、利用者が携帯可能なサイズである。表示装置１を携帯して外出することで、利用者は外出先でも所望の文書や画像を閲覧することが出来る。 Hereinafter, the display device 1 to which the present invention is applied will be described. First, an outline of the display device 1 will be described. The display device 1 is a display device that displays documents, images, and the like. The display device 1 has a size that can be carried by a user. By carrying the display device 1 out of the way, the user can browse a desired document or image even when the user is away from home.
　表示装置１は、表示媒体１００を備えた表示装置である。表示媒体１００は、特表２００４－５３６３３６等に記載されているような周知の電気泳動型の表示素子を備えた表示媒体である。表示媒体１００の詳細な構成については後述する。表示装置１は表示媒体１００に所望の画像を表示する。表示媒体１００に表示された画像は、後述の回路基板７（図２参照）に備えられた表示コントローラにより書き換えられる。回路基板７には、表示媒体１００の表示を書き換えるための電子回路が形成されている。表示媒体１００に表示された画像は、表示媒体１００、又は、表示コントローラへの電力の供給が断たれても、表示されたまま維持される。このような表示装置１は、画像の表示の維持のために電力を必要としないため、画像の書き換え後は、表示媒体１００、又は、表示コントローラへの電力の供給を停止することにより電力消費を抑えることが出来る。したがって、画像の表示の維持のために電力が必要な、従来のバックライトを必要とするＬＣＤ（Ｌｉｑｕｉｄ Ｃｒｙｓｔａｌ Ｄｉｓｐｌａｙ）パネルや、ＰＤＰ（Ｐｌａｓｍａ Ｄｉｓｐｌａｙ Ｐａｎｅｌ）などの自発光型の表示パネルを備えた表示装置に比べ、消費電力が少ないという特徴がある。 The display device 1 is a display device provided with a display medium 100. The display medium 100 is a display medium having a known electrophoretic display element as described in JP-T-2004-536336. A detailed configuration of the display medium 100 will be described later. The display device 1 displays a desired image on the display medium 100. The image displayed on the display medium 100 is rewritten by a display controller provided on a circuit board 7 (see FIG. 2) described later. An electronic circuit for rewriting the display of the display medium 100 is formed on the circuit board 7. The image displayed on the display medium 100 is kept displayed even when power supply to the display medium 100 or the display controller is cut off. Since such a display device 1 does not require power for maintaining the display of an image, after rewriting the image, power supply is stopped by stopping the supply of power to the display medium 100 or the display controller. It can be suppressed. Therefore, a display having a self-luminous display panel such as an LCD (Liquid Crystal Display) panel or a PDP (Plasma Display Display Panel), which requires power to maintain image display and requires a conventional backlight. It is characterized by low power consumption compared to the device.
　次に、図１及び図２を参照し、表示装置１の構成を説明する。図１及び図２に示すように、表示装置１は、透明板２と、複数のボタン３と、上筐体４と、下筐体５と、ＦＰＣ６と、回路基板７と、表示媒体１００とを備える。 Next, the configuration of the display device 1 will be described with reference to FIGS. As shown in FIGS. 1 and 2, the display device 1 includes a transparent plate 2, a plurality of buttons 3, an upper housing 4, a lower housing 5, an FPC 6, a circuit board 7, and a display medium 100. Is provided.
　表示装置１は、上筐体４、下筐体５、及び、透明板２に囲まれた表示装置１の内部空間に、表示媒体１００、ＦＰＣ６、回路基板７を備える。 The display device 1 includes a display medium 100, an FPC 6, and a circuit board 7 in the internal space of the display device 1 surrounded by the upper housing 4, the lower housing 5, and the transparent plate 2.
　上筐体４、及び、下筐体５は、ＡＢＳ樹脂などの好適な樹脂材料により形成されれば良い。上筐体４、及び、下筐体５は、主に表示装置１の外形を形成する。上筐体４、及び、下筐体５は、表示装置１の内部空間にある表示媒体１００、ＦＰＣ（Ｆｌｅｘｉｂｌｅ　Ｐｒｉｎｔｅｄ　Ｃｉｒｃｕｉｔｓ）６、回路基板７等を保護する。 The upper housing 4 and the lower housing 5 may be formed of a suitable resin material such as ABS resin. The upper housing 4 and the lower housing 5 mainly form the outer shape of the display device 1. The upper housing 4 and the lower housing 5 protect the display medium 100, the FPC (Flexible Printed Circuits) 6, the circuit board 7, and the like in the internal space of the display device 1.
　透明板２は、表示装置１の正面の略中央に設けられている。利用者は、透明板２を介して表示媒体１００に表示された画像等を視認する。透明板２は、透明なアクリルなどの好適な樹脂材料により形成れれば良い。上筐体４は、表示装置１の正面の略中央に開口部分を有する。その開口部分には、上述の透明板２がはめ込まれている。 The transparent plate 2 is provided in the approximate center of the front surface of the display device 1. The user visually recognizes an image displayed on the display medium 100 through the transparent plate 2. The transparent plate 2 may be formed of a suitable resin material such as transparent acrylic. The upper housing 4 has an opening at the approximate center of the front surface of the display device 1. The transparent plate 2 is fitted in the opening.
　表示装置１は、複数のボタン３を備えている。ボタン３は、回路基板７に備えられた周知のメンブレンスイッチの接点のオンとオフとの切り替えを行うために設けられている。ボタン３は、ＡＢＳ樹脂などの好適な樹脂材料により形成されれば良い。ボタン３の上部は、上筐体４から外部に突出している。利用者がボタン３を押下することより、ボタン３は、回路基板７に備えられたメンブレンスイッチを押下し、メンブレンスイッチの接点が接続される。 The display device 1 includes a plurality of buttons 3. The button 3 is provided to switch on and off the contacts of a known membrane switch provided on the circuit board 7. The button 3 may be made of a suitable resin material such as ABS resin. The upper part of the button 3 protrudes from the upper housing 4 to the outside. When the user presses the button 3, the button 3 presses the membrane switch provided on the circuit board 7, and the contact of the membrane switch is connected.
　回路基板７は、表示装置１を制御するために必要な様々な回路や、半導体素子等を備えている。上述したように、回路基板７は、表示コントローラやメンブレンスイッチを備えている。 The circuit board 7 includes various circuits necessary for controlling the display device 1, semiconductor elements, and the like. As described above, the circuit board 7 includes a display controller and a membrane switch.
　また、表示装置１は、表示媒体１００と回路基板７とを所定位置に保持するための保持部材を備える。しかし、図１、及び、図２では保持部材は記載していない。また、表示装置１００に電力を供給するためのバッテリー等の構成も図１、及び、図２には記載していない。 Further, the display device 1 includes a holding member for holding the display medium 100 and the circuit board 7 at predetermined positions. However, the holding member is not described in FIGS. 1 and 2. Further, the configuration of a battery or the like for supplying power to the display device 100 is not shown in FIGS.
　次に、図３を参照して表示媒体１００の詳細な構成について説明する。尚、以下の説明において、表示装置１の表面に近い側を上側とし、表示装置１の裏面側に近い側を下側として説明する。表示媒体１００は、保護フィルム１０１と、透明接着層１０２と、電極形成フィルム１０３と、ポリマーバインダ１０４とを備えた積層体１０６と、その積層体１０６が載置されたガラス基板１０８とを備える。 Next, the detailed configuration of the display medium 100 will be described with reference to FIG. In the following description, the side closer to the front surface of the display device 1 is referred to as the upper side, and the side closer to the rear surface side of the display device 1 is referred to as the lower side. The display medium 100 includes a protective film 101, a transparent adhesive layer 102, an electrode forming film 103, a laminated body 106 including a polymer binder 104, and a glass substrate 108 on which the laminated body 106 is placed.
　積層体１０６の構成について詳細に説明する。保護フィルム１０１は、積層体１０６の最も上側に位置する層である。保護フィルム１０１は、ＰＥＴで形成された透明なプラスティックフィルムである。保護フィルム１０１の上面には、紫外線の照射を吸収するための保護層、酸素または湿気の侵入を防止するための障壁層、及び、光学特性を改善するための反射防止コーティング、防眩コーティングなどが施されている。 The configuration of the laminate 106 will be described in detail. The protective film 101 is a layer located on the uppermost side of the laminated body 106. The protective film 101 is a transparent plastic film made of PET. On the upper surface of the protective film 101, there are a protective layer for absorbing ultraviolet radiation, a barrier layer for preventing intrusion of oxygen or moisture, an antireflection coating for improving optical characteristics, an antiglare coating, and the like. It has been subjected.
　保護フィルム１０１の下に、透明接着層１０２がある。透明接着層１０２はアクリルを主成分とする透明なアクリル系接着剤で形成されている。透明接着層１０２は、保護フィルムの下面と、電極形成フィルム１０３の上面とを接着している。 There is a transparent adhesive layer 102 under the protective film 101. The transparent adhesive layer 102 is formed of a transparent acrylic adhesive mainly composed of acrylic. The transparent adhesive layer 102 adheres the lower surface of the protective film and the upper surface of the electrode forming film 103.
　透明接着層１０２の下に、電極形成フィルム１０３がある。電極形成フィルム１０３は、ＰＥＴで形成された透明なプラスティックフィルムである。電極形成フィルム１０３の下面は電極形成面１０３Ａである。電極形成面１０３Ａに、すべての画素に対して共通に設けられた共通電極が形成されている。共通電極はＩＴＯ（Ｉｎｄｉｕｍ　Ｔｉｎ　Ｏｘｉｄｅ）で形成されている。電極形成面１０３ＡにＩＴＯが蒸着されることにより。電極形成フィルム１０３に共通電極が形成される。尚、図３に共通電極は図示されていない。 There is an electrode forming film 103 under the transparent adhesive layer 102. The electrode forming film 103 is a transparent plastic film made of PET. The lower surface of the electrode forming film 103 is an electrode forming surface 103A. A common electrode provided in common to all the pixels is formed on the electrode formation surface 103A. The common electrode is made of ITO (Indium Tin Oxide). By depositing ITO on the electrode forming surface 103A. A common electrode is formed on the electrode forming film 103. Incidentally, the common electrode is not shown in FIG.
　電極形成フィルム１０３に形成された共通電極の更に下に、複数のマイクロカプセル１０５を備えたポリマーバインダ１０４がある。ポリマーバインダ１０４は、電極形成フィルム１０３と一体的に形成されている。ポリマーバインダ１０４は、ポリウレタン等の樹脂材料により形成される。マイクロカプセル１０５は、ポリマーバインダ１０４内に形成された小さな空間である。マイクロカプセル１０５は、炭化水素ベースの流体が収納されている。その炭化水素ベースの流体中に、多数の白色帯電粒子１５１及び多数の黒色帯電粒子１５２が分散された状態で保持されている。白色帯電粒子１５１は、負に帯電した白色の粒子である。黒色帯電粒子は、正に帯電した黒色の粒子である。ポリマーバインダ１０４は、積層体１０６のもっとも下に位置する層である。 A polymer binder 104 having a plurality of microcapsules 105 is provided below the common electrode formed on the electrode forming film 103. The polymer binder 104 is formed integrally with the electrode forming film 103. The polymer binder 104 is formed of a resin material such as polyurethane. The microcapsule 105 is a small space formed in the polymer binder 104. The microcapsule 105 contains a hydrocarbon-based fluid. In the hydrocarbon-based fluid, a large number of white charged particles 151 and a large number of black charged particles 152 are held in a dispersed state. The white charged particles 151 are negatively charged white particles. The black charged particles are positively charged black particles. The polymer binder 104 is a layer located at the bottom of the laminated body 106.
　上述したように、積層体１０６は、複数の層が順番に積層されている。保護フィルム１０１と、透明接着層１０２と、電極形成フィルム１０３と、ポリマーバインダ１０４とは、上から見たとき略同じ大きさの矩形の形状である。積層体１０６は、上から見たときに積層体１０６よりも一回り大きい大きさのガラス基板１０８上に減光性両面テープ１０７を介して配置されている。ガラス基板１０８と、積層体１０６とは、減光性両面テープ１０７により接着されている。 As described above, the laminate 106 has a plurality of layers laminated in order. The protective film 101, the transparent adhesive layer 102, the electrode forming film 103, and the polymer binder 104 are rectangular shapes having substantially the same size when viewed from above. The laminated body 106 is disposed via a light-reducing double-sided tape 107 on a glass substrate 108 that is slightly larger than the laminated body 106 when viewed from above. The glass substrate 108 and the laminate 106 are bonded with a light-reducing double-sided tape 107.
　ガラス基板１０８は、ガラスで形成された基板である。ガラス基板１０８は、回路形成面１０８Ａを備える。回路形成面１０８Ａは、ガラス基板１０８の上面である。図３では、省略して記載していないが、回路形成面１０８Ａに、後述の画素電極１３５、ＴＦＴ１４０、ゲート電極線１１１、ソース電極線１２１等から構成されるアクティブマトリクス回路が形成されている（図４、図５参照）。また、回路形成面１０８Ａにゲート電極線１１１へのゲート信号の出力を制御するためのゲートドライバ１１０（図３、図４参照）、及び、ソース電極線１２１へのソース信号の出力を制御するためのソースドライバ１２０（図４参照）が設置されている。これらの構成の詳細については後述する。 The glass substrate 108 is a substrate formed of glass. The glass substrate 108 includes a circuit forming surface 108A. The circuit formation surface 108A is the upper surface of the glass substrate 108. Although not shown in FIG. 3, an active matrix circuit including a pixel electrode 135, a TFT 140, a gate electrode line 111, a source electrode line 121, and the like, which will be described later, is formed on the circuit formation surface 108A (see FIG. 3). (See FIGS. 4 and 5). Further, the gate driver 110 (see FIGS. 3 and 4) for controlling the output of the gate signal to the gate electrode line 111 on the circuit formation surface 108A and the output of the source signal to the source electrode line 121 are controlled. Source driver 120 (see FIG. 4) is installed. Details of these configurations will be described later.
　回路形成面１０８Ａ上に形成された画素電極１３５、ＴＦＴ１４０、ゲート電極線１１１、ソース電極線１２１等を上から覆うように配置された減光性両面テープ１０７により、ガラス基板１０８と積層体１０６とが接着されている。減光性両面テープ１０７は、ポリエステルフィルムで形成された基材の両面に、アクリルを主成分とするアクリル系接着剤を備えた両面テープである。太陽光などの白色光を減光できるように基材のポリエステルフィルムに、所定量の染料または顔料が含有されている。この基材のポリエステルフィルムの光の透過率は５０％以下である。たとえば、光源から物体に１００，０００ｌｘの照度の光が照射されている場合に、光源から物体との間にこのポリエステルフィルムの基材を配置し光源からの光をさえぎったとき、物体に５０，０００ｌｘ以下の光が照射されることになる。 The glass substrate 108 and the laminate 106 are formed by a light-reducing double-sided tape 107 disposed so as to cover the pixel electrode 135, the TFT 140, the gate electrode line 111, the source electrode line 121, and the like formed on the circuit formation surface 108A. Is glued. The light-reducing double-sided tape 107 is a double-sided tape provided with an acrylic adhesive mainly composed of acrylic on both sides of a base material formed of a polyester film. A predetermined amount of dye or pigment is contained in the polyester film of the substrate so that white light such as sunlight can be reduced. The light transmittance of the polyester film of the substrate is 50% or less. For example, when light having an illuminance of 100,000 lx is irradiated from a light source to an object, when the polyester film substrate is placed between the light source and the object and the light from the light source is blocked, 50, The light of 000 lx or less is irradiated.
　したがって、この減光性両面テープ１０７により、表示装置１の外側からの入射される光が減光される。これにより、ＴＦＴ１４０に強い光が入射してリーク電流が発生することを防止できる。真夏の太陽光の下での照度がおよそ１００,０００ｌｘ程度である。表示媒体１００を備えた表示装置１を真夏の太陽光の下で使用したとしても、ＴＦＴ１４０に照射される光は減光性両面テープ１０７により減衰され、ＴＦＴ１４０での照度は５０，０００ｌｘ以下に減衰されるのでリーク電流が発生しない。 Therefore, incident light from the outside of the display device 1 is reduced by the light-reducing double-sided tape 107. Thereby, it is possible to prevent a leak current from being generated due to strong light entering the TFT 140. Illuminance under midsummer sunlight is about 100,000 lx. Even when the display device 1 including the display medium 100 is used in the midsummer sunlight, the light applied to the TFT 140 is attenuated by the light-reducing double-sided tape 107, and the illuminance at the TFT 140 is attenuated to 50,000 lx or less. Leak current does not occur.
　また、減光性両面テープ１０７には、青色の染料または顔料が含有されることが好ましい。電極形成フィルム１０３に形成される共通電極はＩＴＯで少し黄色いため、表示媒体１００で表示される画像も少し黄色く表示される。これに対し、減光性両面テープ１０７の色を青にすることで、黄色味がかった表示を改善することが出来る。 The light-reducing double-sided tape 107 preferably contains a blue dye or pigment. Since the common electrode formed on the electrode forming film 103 is a little yellow with ITO, the image displayed on the display medium 100 is also displayed a little yellow. On the other hand, the yellowish display can be improved by setting the color of the light-reducing double-sided tape 107 to blue.
　積層体１０６と、ガラス基板１０８とは、積層体１０６の側面に沿って形成されたシリコンモールド１０９によって、固定されている。シリコンモールドは、積層体１０６の側面と、ガラス基板１０８の回路形成面１０８Ａとに沿って形成されている。 The laminated body 106 and the glass substrate 108 are fixed by a silicon mold 109 formed along the side surface of the laminated body 106. The silicon mold is formed along the side surface of the laminated body 106 and the circuit formation surface 108 </ b> A of the glass substrate 108.
　次に図４、図５を参照し、回路形成面１０８Ａに形成されているアクティブマトリクス回路について説明する。図４に示すように回路形成面１０８Ａには、複数のゲートドライバ１１０が配置されている。各ゲートドライバ１１０の一端側の端子は、多数のゲート電極線１１１と電気的に接続されている。また、各ゲートドライバ１１０の他端側の端子は複数の信号線１１２と電気的に接続されている。上述の回路基板７の表示コントローラからの制御信号が、この信号線１１２を介してゲートドライバ１１０に入力される。ゲートドライバ１１０は、信号線１１２から入力される制御信号に従って、各ゲート電極線１１１へ出力するゲート信号を制御する。信号線１１２は、上述のＦＰＣ６を介して回路基板７の回路と接続されている。 Next, the active matrix circuit formed on the circuit formation surface 108A will be described with reference to FIGS. As shown in FIG. 4, a plurality of gate drivers 110 are arranged on the circuit forming surface 108A. A terminal on one end side of each gate driver 110 is electrically connected to a number of gate electrode lines 111. Further, the terminal on the other end side of each gate driver 110 is electrically connected to the plurality of signal lines 112. A control signal from the display controller of the circuit board 7 is input to the gate driver 110 via the signal line 112. The gate driver 110 controls a gate signal output to each gate electrode line 111 in accordance with a control signal input from the signal line 112. The signal line 112 is connected to the circuit of the circuit board 7 through the FPC 6 described above.
　また、回路形成面１０８Ａには、複数のソースドライバ１２０が配置されている。各ソースドライバ１２０の一端側の端子は、複数のソース電極線１２１と接続されている。また、各ソースドライバの他端側の端子は複数の信号線１２２と電気的に接続されている。信号線１２２は、上述の回路基板７の表示コントローラからの制御信号が、この信号線１２２を介してソースドライバ１２０に入力される。ソースドライバ１２０は、信号線１２２から入力される制御信号に従って、各ソース電極線１２１へ出力するソース信号を制御する。信号線１２２と、上述のＦＰＣ６を介して回路基板７の回路と接続される。 A plurality of source drivers 120 are arranged on the circuit forming surface 108A. A terminal on one end side of each source driver 120 is connected to a plurality of source electrode lines 121. The terminals on the other end side of each source driver are electrically connected to the plurality of signal lines 122. In the signal line 122, a control signal from the display controller of the circuit board 7 is input to the source driver 120 through the signal line 122. The source driver 120 controls a source signal output to each source electrode line 121 in accordance with a control signal input from the signal line 122. The signal line 122 is connected to the circuit of the circuit board 7 through the FPC 6 described above.
　多数のゲート電極線１１１と、多数のソース電極線１２１とは、互いに交差するように、格子状に配列している。ゲート電極線１１１とソース電極線１２１との交点の近傍には、ＴＦＴ１４０と画素電極１３５がそれぞれひとつずつ配置している。この交点近傍の詳細な構成を、図５を参照して説明する。 A large number of gate electrode lines 111 and a large number of source electrode lines 121 are arranged in a lattice pattern so as to cross each other. One TFT 140 and one pixel electrode 135 are disposed in the vicinity of the intersection of the gate electrode line 111 and the source electrode line 121. A detailed configuration near the intersection will be described with reference to FIG.
　図５に示すように、ゲート電極線１１１とソース電極線１２１との交点近傍には、一つの画素電極１３５が配置している。ゲート電極線１１１の交点近傍に、画素電極１３５側に突出したゲート電極部１１１Ａがある。また、ソース電極線１２１の交点近傍に、画素電極１３５側に突出したソース電極部１２１Ａがある。ゲート電極部１１１Ａの上に、絶縁膜１３３が形成されており、更にその上には半導体膜１３２が形成されている。ソース電極部１２１Ａは、半導体膜１３２の一端側にかぶさるように形成されている。ドレイン電極１３１が、半導体膜１３２の他端側にかぶさるように形成されている。ドレイン電極１３１は、画素電極１３５と電気的に接続されている。このように、ソース電極部１２１Ａ、絶縁膜１３３、半導体膜１３２、ゲート電極部１１１Ａ、ドレイン電極１３１等からＴＦＴ１４０は構成されている。尚、ゲート電極線１１１とソース電極線１２１との交点には、ゲート電極線１１１とソース電極線１２１とが電気的に接続されることを防止するため絶縁膜１３４が形成されている。絶縁膜１３４は、ゲート電極線１１１とソース電極線１２１との間に形成されている。 As shown in FIG. 5, one pixel electrode 135 is arranged in the vicinity of the intersection of the gate electrode line 111 and the source electrode line 121. In the vicinity of the intersection of the gate electrode lines 111, there is a gate electrode portion 111A protruding to the pixel electrode 135 side. Further, near the intersection of the source electrode lines 121, there is a source electrode portion 121A protruding toward the pixel electrode 135 side. An insulating film 133 is formed on the gate electrode portion 111A, and a semiconductor film 132 is further formed thereon. The source electrode portion 121 </ b> A is formed so as to cover one end side of the semiconductor film 132. A drain electrode 131 is formed so as to cover the other end side of the semiconductor film 132. The drain electrode 131 is electrically connected to the pixel electrode 135. As described above, the TFT 140 includes the source electrode portion 121A, the insulating film 133, the semiconductor film 132, the gate electrode portion 111A, the drain electrode 131, and the like. Note that an insulating film 134 is formed at an intersection of the gate electrode line 111 and the source electrode line 121 in order to prevent the gate electrode line 111 and the source electrode line 121 from being electrically connected. The insulating film 134 is formed between the gate electrode line 111 and the source electrode line 121.
　次に図６を参照して、上述の減光性両面テープ１０７がガラス基板１０８を覆う領域を説明する。図６に点線で示した減光領域Ｂは、上述の減光性両面テープ１０７が、ガラス基板１０８を覆う領域である。図６の減光領域Ｂで示したように、減光性両面テープ１０７は、回路形成面１０８Ａに形成された全てのＴＦＴ１４０と全ての画素電極１３５を覆うように配置される。このように、表示媒体１００によれば、ＴＦＴ１４０に入射される光を確実に減光することが出来る。 Next, with reference to FIG. 6, the area | region where the above-mentioned light-reducible double-sided tape 107 covers the glass substrate 108 is demonstrated. A light-reducing area B indicated by a dotted line in FIG. 6 is an area where the above-mentioned light-reducing double-sided tape 107 covers the glass substrate 108. As shown in the dimming region B of FIG. 6, the light-reducing double-sided tape 107 is disposed so as to cover all the TFTs 140 and all the pixel electrodes 135 formed on the circuit forming surface 108A. Thus, according to the display medium 100, the light incident on the TFT 140 can be reliably reduced.
　尚、積層体１０６の下面、すなわち、ポリマーバインダ１０４の下面に先ず減光性両面テープ１０７の両面テープを貼り付けた後、両面テープが貼り付けられた積層体１０６をガラス基板１０８に載置することで、積層体１０６と、ガラス基板１０８とは、減光性両面テープ１０７により接着される。尚、このとき使用される減光性両面テープ１０７は、上述したように全てのＴＦＴ１４０と全ての画素電極１３５を覆うような両面テープであるため、減光性両面テープ１０７を積層体１０６の下面に貼り付ける際の位置あわせの精度はそれほど高くなくても良い。また、減光性両面テープ１０７は、上述したように、全てのＴＦＴ１４０と全ての画素電極１３５とを覆うように配置されている。このため、光をより確実に減光することが出来る。 The double-sided tape of the light-reducing double-sided tape 107 is first attached to the lower surface of the laminated body 106, that is, the lower surface of the polymer binder 104, and then the laminated body 106 with the double-sided tape attached thereto is placed on the glass substrate 108. As a result, the laminate 106 and the glass substrate 108 are bonded together with the light-reducing double-sided tape 107. Note that the light-reducing double-sided tape 107 used at this time is a double-sided tape that covers all the TFTs 140 and all the pixel electrodes 135 as described above. The accuracy of alignment when affixing to the sheet may not be so high. Further, the light-reducing double-sided tape 107 is disposed so as to cover all the TFTs 140 and all the pixel electrodes 135 as described above. For this reason, light can be reduced more reliably.
　尚、上述の実施形態における電極形成フィルム１０３が、特許請求の範囲に記載の第一基板に相当する。また、上述の実施形態におけるガラス基板１０８が、特許請求の範囲に記載の第二基板に相当する。また、上述の実施形態における画素電極１３５が、特許請求の範囲に記載の画素電極に相当する。また、上述の実施形態におけるＴＦＴ１４０が、特許請求の範囲に記載の薄膜トランジスタに相当する。また、上述の実施形態におけるポリマーバインダ１０４、及び、マイクロカプセル１０５が、特許請求の範囲に記載の帯電粒子層に相当する。また、上述の実施形態における減光性両面テープ１０７が、特許請求の範囲に記載の減光層、及び、減光部材に相当する。また、上述の実施形態における表示媒体１００が、特許請求の範囲に記載の表示媒体に相当する。また、上述の実施形態における表示装置１が、特許請求の範囲に記載の表示装置に相当する。 In addition, the electrode formation film 103 in the above-mentioned embodiment is equivalent to the 1st board | substrate as described in a claim. Moreover, the glass substrate 108 in the above-mentioned embodiment is equivalent to the 2nd board | substrate as described in a claim. Further, the pixel electrode 135 in the above-described embodiment corresponds to the pixel electrode described in the claims. Further, the TFT 140 in the above-described embodiment corresponds to the thin film transistor described in the claims. Further, the polymer binder 104 and the microcapsule 105 in the above-described embodiment correspond to the charged particle layer described in the claims. Further, the light-reducing double-sided tape 107 in the above-described embodiment corresponds to the light-reducing layer and the light-reducing member described in the claims. Further, the display medium 100 in the above-described embodiment corresponds to the display medium described in the claims. Further, the display device 1 in the above-described embodiment corresponds to the display device described in the claims.
　本発明の表示媒体及び表示装置は、上記した実施の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲内において種々変更を加え得ることは勿論である。 The display medium and the display device of the present invention are not limited to the above-described embodiments, and it is needless to say that various modifications can be made without departing from the gist of the present invention.
　たとえば、上述の実施形態によれば、上述の減光性両面テープ１０７は、上述したように、全てのＴＦＴ１４０と全ての画素電極１３５とを覆うように配置されているものとして説明した。しかし、ＴＦＴ１４０の上部のみに減光性のある両面テープを設け、画素電極１３５の上部には減光性のある両面テープを設けない変形例も考えられる。この変形例でも、ＴＦＴ１４０へ直接入射される光は減光性のある両面テープにより減光される。この変形例によれば、使用する減光性の両面テープの量を減らすことができ、製造コストを削減することができる。しかし、この場合は、減光性のある両面テープの位置決めを精度を良くする必要がある。また、減光性のある両面テープが設けられていない画素電極１３５の上部から入射されてくる光が、ＴＦＴ１４０側に回り込みこむ可能性がある。これに比べ、全てのＴＦＴ１４０と全ての画素電極１３５とを覆うように配置されている上述の実施形態によれば、光をより確実に減光することが出来る。 For example, according to the above-described embodiment, the above-described light-reducing double-sided tape 107 has been described as being disposed so as to cover all the TFTs 140 and all the pixel electrodes 135 as described above. However, a modification in which a light-reducing double-sided tape is provided only on the TFT 140 and a light-reducing double-sided tape is not provided on the pixel electrode 135 is also conceivable. Even in this modification, the light that is directly incident on the TFT 140 is attenuated by the double-sided tape having a light-reducing property. According to this modification, the amount of the light-reducing double-sided tape to be used can be reduced, and the manufacturing cost can be reduced. However, in this case, it is necessary to improve the positioning of the light-reducing double-sided tape. In addition, light incident from the upper part of the pixel electrode 135 on which the light-reducing double-sided tape is not provided may enter the TFT 140 side. Compared to this, according to the above-described embodiment that is arranged so as to cover all the TFTs 140 and all the pixel electrodes 135, it is possible to reduce light more reliably.
　また、上述の実施形態によれば、全てのＴＦＴ１４０と全ての画素電極１３５とを覆う大きさの減光性両面テープ１０７を用いるものとして説明したが、本発明はこれに限らない。たとえば、上述の実施形態のサイズの小さいサイズの減光性両面テープ１０７を複数用いてもよい。図７にしめすように減光領域Ｂ１、減光領域Ｂ２、減光領域Ｂ３をそれぞれ覆う大きさの減光性両面テープ１０７を用いるようにしてもよい。このように、複数のＴＦＴ１４０と複数の画素電極１３５を覆う複数の減光性両面テープ１０７を組み合わせて使うことにより、ＴＦＴ１４０へ入射される光を減光するようにしても良い。 Further, according to the above-described embodiment, it has been described that the light-reducing double-sided tape 107 having a size covering all the TFTs 140 and all the pixel electrodes 135 is used, but the present invention is not limited to this. For example, a plurality of small-size light-reducing double-sided tapes 107 of the above-described embodiment may be used. As shown in FIG. 7, a light-reducing double-sided tape 107 having a size covering each of the light-reducing area B1, the light-reducing area B2, and the light-reducing area B3 may be used. In this way, by using a plurality of light-reducing double-sided tapes 107 covering a plurality of TFTs 140 and a plurality of pixel electrodes 135 in combination, light incident on the TFTs 140 may be reduced.
　また、上述の実施形態によれば、減光層として、減光性両面テープ１０７を用いるものとして説明したが、本発明はこれに限らない。たとえば、減光性両面テープ１０７ではなく、光を減光するために染料や顔料が含有されたアクリル系の接着剤を減光層として利用しても良い。この場合、この接着剤は、ダイコーティングなどにより積層体１０６の下面側に塗布したあと、減光性のある接着剤が塗布された積層体１０６をガラス基板１０８に配置することで接着する。 Further, according to the above-described embodiment, the description has been made assuming that the light-reducing double-sided tape 107 is used as the light-reducing layer, but the present invention is not limited to this. For example, instead of the light-reducing double-sided tape 107, an acrylic adhesive containing a dye or pigment may be used as the light-reducing layer in order to reduce light. In this case, the adhesive is applied to the lower surface side of the laminated body 106 by die coating or the like, and then the laminated body 106 to which the light-reducing adhesive is applied is disposed on the glass substrate 108.
　また、上述の実施形態によれば、減光性両面テープ１０７に青色の染料、または、顔料が含有されているものとして説明したが、他の色の染料、または、顔料が含有されているものでもよい。また、染料と顔料との両方が含有されているものでも良い。 Further, according to the above-described embodiment, the light-reducing double-sided tape 107 has been described as containing a blue dye or pigment, but other color dyes or pigments are contained. But you can. Moreover, what contains both dye and a pigment may be sufficient.
　また、上述の実施形態によれば、減光性両面テープ１０７を用いるものとして説明したが、染料または顔料が含有されたＰＥＴフィルムを減光層として用いても良い。この場合、そのＰＥＴフィルムの両面に両面テープを貼り付けて、積層体１０６とガラス基板１０８とを接着させても良い。 Further, according to the above-described embodiment, it has been described that the light-reducing double-sided tape 107 is used, but a PET film containing a dye or a pigment may be used as the light-reducing layer. In this case, a double-sided tape may be attached to both sides of the PET film, and the laminate 106 and the glass substrate 108 may be bonded.
　また、上述の実施形態によれば、帯電粒子層として、マイクロカプセル１０５を備えたポリマーバインダ１０４として説明したが、本発明はこれに限らない。対向する一対の基板間に複数の隔壁を設け、その一対の基板と隔壁とにより区画される領域内に帯電粒子を備えた表示媒体に本発明を適用しても良い。 Further, according to the above-described embodiment, the polymer binder 104 including the microcapsules 105 is described as the charged particle layer, but the present invention is not limited to this. The present invention may be applied to a display medium in which a plurality of partition walls are provided between a pair of opposing substrates, and charged particles are provided in a region defined by the pair of substrates and the partition walls.
　また、上述の実施形態によれば、炭化水素ベースの流体内に帯電粒子が分散されている表示媒体１００を例に説明したが、本発明はこれに限るものではない。たとえば、気体中に帯電粒子が分散されている表示媒体に本発明を適用しても良い。 Further, according to the above-described embodiment, the display medium 100 in which charged particles are dispersed in a hydrocarbon-based fluid has been described as an example, but the present invention is not limited to this. For example, the present invention may be applied to a display medium in which charged particles are dispersed in a gas.
　また、上述の実施形態によれば、白色粒子と黒色粒子とを備えた表示媒体１００を例に説明したが、本発明はこれに限るものではない。たとえば、白色の流体中に黒色粒子を備え、流体の白と黒色粒子の黒との組み合わせで画像を表示する表示媒体であっても良い。 Further, according to the above-described embodiment, the display medium 100 including white particles and black particles has been described as an example, but the present invention is not limited to this. For example, a display medium that includes black particles in a white fluid and displays an image with a combination of fluid white and black black particles may be used.
　また、本発明の減光層は、光を減光する性質を有していればいかようでもよく、金属クロム膜などの金属を用いてもよい。 Further, the light reducing layer of the present invention may be any material as long as it has the property of reducing light, and a metal such as a metal chromium film may be used.
　１　　　　表示装置
　７　　　　回路基板
　１００　　表示媒体
　１０１　　保護フィルム
　１０２　　透明接着層
　１０３　　電極形成フィルム
　１０３Ａ　電極形成面
　１０４　　ポリマーバインダ
　１０５　　マイクロカプセル
　１０６　　積層体
　１０７　　両面テープ
　１０８　　ガラス基板
　１０９　　シリコンモールド
　１１０　　ゲートドライバ
　１１１　　ゲート電極線
　１２０　　ソースドライバ
　１２１　　ソース電極線
　１３５　　画素電極
　１４０　　ＴＦＴ DESCRIPTION OF SYMBOLS 1 Display apparatus 7 Circuit board 100 Display medium 101 Protective film 102 Transparent adhesive layer 103 Electrode formation film 103A Electrode formation surface 104 Polymer binder 105 Microcapsule 106 Laminate body 107 Double-sided tape 108 Glass substrate 109 Silicon mold 110 Gate driver 111 Gate electrode wire 120 Source driver 121 Source electrode line 135 Pixel electrode 140 TFT

Claims (5)

  1. 　透明な第一基板と、
    　前記第一基板と対向する第二基板と、
    　前記第二基板に形成された複数の画素電極と、
    　前記第二基板に形成され、且つ、前記複数の画素電極毎に設けられた複数の薄膜トランジスタと、
    　前記第一基板と前記第二基板との間に配置され、多数の帯電粒子を備えた帯電粒子層と、
    　前記薄膜トランジスタと前記帯電粒子層との間に配置され、前記第一基板側から入射される光を減光する減光層と、
    　を備えたことを特徴とする表示媒体。     A transparent first substrate,
    A second substrate facing the first substrate;
    A plurality of pixel electrodes formed on the second substrate;
    A plurality of thin film transistors formed on the second substrate and provided for each of the plurality of pixel electrodes;
    A charged particle layer that is disposed between the first substrate and the second substrate and includes a large number of charged particles;
    A dimming layer disposed between the thin film transistor and the charged particle layer and dimming light incident from the first substrate side;
    A display medium comprising:
  2. 　前記減光層は、複数の薄膜トランジスタ及び複数の画素電極を覆うように設けられている少なくとも１つ以上の減光部材により形成されていることを特徴とする請求項１に記載の表示媒体。 The display medium according to claim 1, wherein the dimming layer is formed of at least one dimming member provided so as to cover the plurality of thin film transistors and the plurality of pixel electrodes.
  3. 　前記減光層には、青色の染料または顔料が含有されていることを特徴とする請求項１に記載の表示媒体。 The display medium according to claim 1, wherein the light-reducing layer contains a blue dye or pigment.
  4. 　前記減光層の光の透過率が５０％以下であることを特徴とする請求項１に記載の表示媒体。 The display medium according to claim 1, wherein the light transmittance of the light reducing layer is 50% or less.
  5. 　請求項１に記載の表示媒体と、
    　前記表示媒体の表示を書き換えるための電子回路が形成された回路基板と、を備えた表示装置。     A display medium according to claim 1;
    And a circuit board on which an electronic circuit for rewriting the display on the display medium is formed.
PCT/JP2011/062932 2010-06-30 2011-06-06 Display medium and display device WO2012002110A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002540591A (en) * 1998-12-15 2002-11-26 イー−インク コーポレイション Method of printing transistor array on plastic substrate
JP2005024743A (en) * 2003-06-30 2005-01-27 Stanley Electric Co Ltd Electrophoretic display device
JP2009276763A (en) * 2008-04-16 2009-11-26 Nec Lcd Technologies Ltd Image display device having memory property, driving control device and driving method to be used for the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02308131A (en) * 1989-05-22 1990-12-21 Sharp Corp Liquid crystal display device
TWI387831B (en) * 2009-02-24 2013-03-01 Prime View Int Co Ltd Reflective display apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002540591A (en) * 1998-12-15 2002-11-26 イー−インク コーポレイション Method of printing transistor array on plastic substrate
JP2005024743A (en) * 2003-06-30 2005-01-27 Stanley Electric Co Ltd Electrophoretic display device
JP2009276763A (en) * 2008-04-16 2009-11-26 Nec Lcd Technologies Ltd Image display device having memory property, driving control device and driving method to be used for the same

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