WO2012001767A1

WO2012001767A1 - Process for producing radiating substrate for semiconductor mounting

Info

Publication number: WO2012001767A1
Application number: PCT/JP2010/061034
Authority: WO
Inventors: 山口　雅弘; 文夫大下
Original assignee: 株式会社高松メッキ
Priority date: 2010-06-29
Filing date: 2010-06-29
Publication date: 2012-01-05

Abstract

A process for producing a radiating substrate for semiconductor mounting is provided in which a clad metal is not used or is used only as a base located at the center of layers and in which metal layers are formed so as to be unreleasably integrated. The radiating substrate hence suffers no interlaminar separation, retains stable heat dissipation properties and mechanical strength, and has high reliability. The process is characterized by forming one or more metal layers by plating on each surface of a base material serving as the layer-thickness center, so that the metal layers are vertically symmetrical with respect to the center. Since no clad metal is used, except for the base material, and the metal layers are formed on the base material as the center by plating so as to be unreleasably integrated, no interlaminar separation occurs. This configuration, coupled with the structure including the precisely formed vertical symmetry, enables the radiating substrate for semiconductor mounting to retain stable heat dissipation properties and mechanical strength and have high reliability.

Description

Manufacturing method of heat dissipation board for semiconductor mounting

The present invention relates to a method for manufacturing a semiconductor-mounted heat dissipation substrate that functions to hold a semiconductor element such as an LED and prevent it from storing heat.

In LEDs (light emitting diodes), semiconductor integrated circuits, and the like, the amount of heat radiation tends to increase due to recent increases in density and output. As for the LED (see the left figure of FIG. 11), the LED is mounted on a sapphire substrate, but if this is the case, the heat generated from the light emitting part of the LED has poor thermal conductivity. It tends to accumulate between the substrate (see the left figure in FIG. 12), and in many semiconductor elements, the function is reduced when there is heat storage, especially in the case of LEDs, which has a negative effect due to its brightness and low reflectance. A metal heat radiating substrate having good heat conductivity is used for the portion (see the right figure in FIG. 11). For example, a metal called a metal wafer such as copper, molybdenum, tungsten, titanium, or molybdenum. And it is known that what mainly sandwiched molybdenum (Mo) with copper (Cu, Cu) (DMD) is good (see the right figure of FIG. 12). *

As for the properties or performances required for the heat dissipation substrate, in addition to excellent thermal conductivity, stability without thermal distortion, high mechanical strength, and machinability are required. In addition, it is sometimes required to be suitable for bonding or brazing for attaching a semiconductor element, and to be excellent in chemical resistance. Conventionally, development has been progressed so that these properties are comprehensively exhibited by the combination of a plurality of metal layers as shown in the right diagrams of FIGS. 11 and 12 (Patent Documents 1 and 2). Conventionally, a rolling method or a hot uniaxial machining method has been used as means for taking this multilayer structure.

JP-A-6-268115 Japanese Patent No. 3862737

In both the rolling method and the hot uniaxial processing method, a plurality of laminated metal materials (also referred to as grad materials and grad metals) are overlapped and compressed to flatten due to thermoplasticity, and the laminated materials are thermocompression bonded. Although it forms a grad layer, it is difficult to match the conditions such as overheating temperature, time, and compressive strength, and it is not reliable that it will not peel off. When peeling occurs, it is supported by mechanical strength and heat dissipation performance ( There is a problem in that, for example, heat is accumulated in the peeled portion, and the coupling with the package substrate and the semiconductor element becomes unstable due to the rise. *

Further, as a method for preventing warpage accompanying the joining of different kinds of metals, a multi-metal laminated metal material is arranged so as to be symmetrical with respect to the upper and lower surfaces around the base material as the center. However, since dissimilar metals with different thermal deformations are simultaneously heat-compressed, uneven distribution in the thickness of the grad layer and undulation and colony are likely to occur in the layer, and these occurrences also cause overall warpage, There has also been a problem that it becomes a factor inducing mechanical strength and heat dissipation performance. *

In view of the above situation, the present invention has been earnestly studied by using only the base material at the center of the layer without using a laminated material. Therefore, an object of the present invention is to provide a highly reliable method for manufacturing a semiconductor-mounted heat dissipation substrate that does not cause separation between layers and maintains stable heat dissipation and mechanical strength.

In order to solve the above-mentioned problems, the present invention is characterized in that one or more metal layers are formed on both surfaces of a base material which is the central portion of the layer thickness so as to be vertically symmetrically arranged by plating. Provided is a method for manufacturing a mounting heat dissipation board. *

Since the semiconductor mounting heat dissipating board is formed as described above, the base matrix is used for this purpose by bonding a single metal piece of a composite material or a multi-metal composite material on both sides of the composite material. In this method, a rolling method, a hot uniaxial processing method, or the like is used, and a metal layer is reliably formed by plating on the both surfaces using the base base material as a core.

As described above, according to the present invention, a metal member other than the base material is not used, and since each metal layer is formed in a single piece by plating around this, no separation occurs between the layers, Combined with the structure in which the upper and lower parts are evenly and accurately formed, it is possible to provide a highly reliable method for manufacturing a semiconductor-mounted heat dissipation board that maintains stable heat dissipation and mechanical strength.

It is explanatory drawing which shows the manufacturing method of the semiconductor mounting heat dissipation board concerning 1st Example of this invention in order of an arrow, and a cross section typically. It is a perspective view of the semiconductor mounting heat dissipation board by the manufacturing method. It is explanatory drawing which shows typically the cross section which shows the use condition of the heat sink for semiconductor mounting. It is explanatory drawing corresponding to FIG. 1 which concerns on 2nd Example. It is explanatory drawing corresponding to FIG. 1 which concerns on 3rd Example. It is explanatory drawing corresponding to FIG. 1 which concerns on 4th Example. It is explanatory drawing corresponding to FIG. 1 which concerns on 5th Example. It is explanatory drawing corresponding to FIG. 1 which concerns on 6th Example. It is explanatory drawing corresponding to FIG. 1 which concerns on 7th Example. It is explanatory drawing corresponding to FIG. 1 which concerns on 8th Example. It is explanatory drawing of a prior art example. It is explanatory drawing of a prior art example.

In the present invention, the

plated layers

8 and 8 are formed on both surfaces of the base base materials 1 and 2 made of a laminated metal material to be a core having a layer thickness, and are formed symmetrically in the vertical direction to manufacture the plated layer semiconductor mounting heat dissipation substrate P. (FIG. 3). The base base material may be a single base base material 1 made of a single metal or a composite base base material 2 having a plurality of sandwich structures. In both cases, metal flakes are used as the bonding material, and in the case of the composite base material 2, they are integrated by being pressed by a rolling method, a hot uniaxial processing method, or the like. *

Molybdenum (Mo), tungsten (W), or the like having a relatively low thermal conductivity is used for the metals of the base materials 1 and 2. The raw multi-layer material thus polymerized is subdivided vertically and horizontally by cutting, as in the case of wafer chip formation. *

On both surfaces of the base base materials 1 and 2 thus manufactured, other metal layers having relatively good thermal conductivity are formed by plating in a vertically symmetrical manner. The thicknesses of these metal layers are, for example, 0.05 to 1.5 μm for the Au layer, 0.02 to 10 μm for the Ni or Ni alloy layer, and 0.2 to 0.2 for the Au / Sn alloy layer. It is preferable that the thickness is 10 μm, the Sn layer is 0.2 to 5.0 μm, and the Cu layer is 0.2 to 40 μm. Of these, particularly when the Au layer 7 is on the outer surface, it is difficult to oxidize, so that the adhesiveness to the package substrate 10, the LED light emitter 12 and the like (see FIG. 3) is preferable. For bonding the semiconductor mounting heat dissipation board P to other components, if the surface is the

Au layer

7, 7 or the

Sn layer

11, 11, an Ag-based or Au-Sn-based paste or adhesive is preferably used. The *

Plating is preferably electrolysis, electroless, ion plating (IP) method or the like, but is not particularly limited as long as it is plating. In any case, the thickness of each metal layer is formed into a uniform layer with vertical symmetry by plating, and the layers are tightly coupled. For forming the Cu metal layer, a Cu ion plating method can be optimally used in addition to Cu plating. *

The ion plating method can be plated with a slight surface modification, unlike dry, wet plating. Mo is a metal that is very difficult to adhere to plating. When applying Cu plating without losing surface roughness, the ion plating method is optimal. In this case, when Cu is plated on Mo, a thin film of copper is attached by IP, and then the Cu plating is performed electrolytically or electrolessly, thereby achieving the above object. That is, the best method is to form a Cu layer on the Mo metal piece by, for example, about 0.2 μm by the ion plating method, and apply Cu plating (electrolytic or electroless) thereon. Electroless plating has better plating uniformity than electrolytic plating. The plating efficiency is electrolytic plating> electroless> copper plating (electrolysis / electroless).

FIG. 1 to FIG. 3 show Example 1, and a wide raw material to be a composite base material 2 is a three-layer structure in which a Mo layer 3 is sandwiched between Cu layers 4 and 4 (FIG. 1). For this purpose, the surfaces of the Cu layers 4 and 4 of the base material 2 are polished by a polishing machine 18 and then Ni plating is performed on both surfaces to form Ni layers 5 and 5 (layer thickness 1.0 μm). The

layers

5 and 5 are plated with Au, and both surfaces are formed as Au layers 7 and 7 (layer thickness 2 μm). A plating base material widely manufactured through a plating process is subdivided and processed by vertical and horizontal canting. Although FIG. 2 shows the heat dissipation board P as a product thus processed, it is not necessarily circular. *

FIG. 3 shows a use state in which LEDs are mounted. A semiconductor mounting heat dissipation substrate P is mounted on the package substrate 10 via an adhesive 14, and the LEDs 12 are mounted thereon via an adhesive 16. The In any case, since the surfaces are the Au layers 7 and 7, the

adhesives

14 and 16 are easily mounted and the adhesiveness is good. In addition, there is an advantage that the reflection efficiency of the LED 12 is reflected by the Au layer 7 and the light of the metal layer is good and the heat storage amount is small even if it is not reflected.

In FIG. 4, there is a difference that the Au layers 7 and 7 are alloys thereof with respect to the embodiment. That is, the heat dissipation substrate P is formed by forming both surfaces as Au / Sn alloy layers 9 and 9 by plating. This embodiment also has the same advantages as described above due to the nature of Au. The same applies to the following.

In FIG. 5, the heat dissipation substrate P is different from the first embodiment in that the Ni layers 5 and 5 are

Sn layers

11 and 11.

In FIG. 6, the heat dissipation substrate P has Au layers 7 and 7 formed on both sides of the composite base material 2, and Sn layers 11 and 11 formed thereon.

In FIG. 7, the heat dissipation substrate P is a single base matrix 1 made of a metal material with the Mo layer 3 combined. First, Cu layers 4 and 4 are plated on both surfaces (also by Cu ion plating). And the case where the Ni layers 5 and 5 and the Cu layers 4 and 4 are sequentially plated on both surfaces of the Mo layer 3. Each is as follows. *

As for the former, the Ni layers 5 and 5 and the Au layers 7 and 7 were successively formed on the Cu layers 4 and 4 on both sides, and the heat dissipation substrate P was manufactured. In the latter case, Ni layers 5 and 5 and Au layers 7 and 7 were sequentially formed on the Cu layers 4 and 4 on both sides thereof to manufacture the heat dissipation substrate P.

Also in FIG. 8, the Mo layer 3 is a single base matrix 1, and also in this case, the Cu layers 4 and 4 are first plated on both surfaces (also by Cu ion plating), It is divided into the case where Ni layers 5 and 5 and Cu layers 4 and 4 are sequentially plated on both surfaces of the Mo layer 3. Each is as follows. *

That is, as for the former, Ni layers 5 and 5 are formed on the Cu layers 4 and 4 on both sides by plating, and Au / Sn alloy layers 9 and 9 are plated on the Ni layers 5 and 5, respectively. Formed. In the latter case, Ni layers 5 and 5 were formed on the Cu layers 4 and 4 on both sides, and Au / Sn alloy layers 9 and 9 were further formed thereon to constitute the raw material of the heat dissipation substrate P.

9, the case where the Cu layers 4 and 4 are formed on both surfaces of the base material 1 as the Mo layer 3 by plating and the case where the Ni layers 5 and 5 and the Cu layers 4 and 4 are sequentially formed by plating are divided. Manufactured. Each is further described as follows. *

In other words, in the former, the Ni layers 5 and 5 are formed on the Cu layers 4 and 4 by plating, and the Sn layers 11 and 11 and the Au layers 7 and 7 are formed thereon by plating, so that the raw material of the heat dissipation substrate P is made. It is done. In the latter case, the Ni layers 5 and 5 are formed on the Cu layers 4 and 4, and the Sn layers 11 and 11 and the Au layers 7 and 7 are formed thereon by plating, whereby the raw material of the heat dissipation substrate P is made. .

10, in this case as well, the Cu layers 4 and 4 are formed on both surfaces of the single base material 1 as the Mo layer 3 by plating, and the Ni layers 5 and 5 and the Cu layer. 4 and 4 are sequentially formed by plating, and further plating is performed for each.

In the former case, the Ni layers 5 and 5 are formed on the Cu layers 4 and 4 by plating, and the Au layers 7 and 7 and the Sn layers 11 and 11 are sequentially formed on the Ni layers 5 and 5 by plating. A material is formed. In the latter case, Ni layers 5 and 5 are formed on the Cu layers 4 and 4 by plating, and Au layers 7 and 7 and Sn layers 11 and 11 are sequentially formed on the Ni layers 5 and 5 by plating. Thus, the raw material of the heat dissipation board P is made.

P Heat-dissipating board for semiconductor mounting 1 Single base material 2 Composite base material 3 Mo layer 4 Cu layer 5 Ni layer 7 Au layer 9 Au / Sn alloy layer 11 Sn layer

Claims

A method for manufacturing a semiconductor-mounted heat dissipation substrate, wherein one or more metal layers are formed on both surfaces of a base metal material made of a laminated metal material so as to have a vertically symmetrical arrangement by plating.
2. A semiconductor-mounted heat dissipation substrate according to claim 1, wherein the base material is a composite base material in which Cu layers are formed on both sides of the central Mo layer, or a single base material of the Mo layer. Method.
3. The method for manufacturing a semiconductor-mounted heat dissipation substrate according to claim 2, wherein a Ni layer and an Au layer are sequentially formed on the Cu layers on both surfaces of the composite base material by plating.
3. The semiconductor according to claim 2, wherein an Ni layer is formed on the Cu layers on both sides of the composite base material by plating, and an Au layer or an Au / Sn alloy layer is further formed thereon by plating. Manufacturing method of mounting heat dissipation board.
3. The heat radiation for mounting a semiconductor according to claim 2, wherein one of an Sn layer and an Au layer is sequentially formed on the Cu layers (4, 4) on both surfaces of the composite base material by plating so as to be an outer surface. A method for manufacturing a substrate.
Whether a Cu layer is formed by plating on both surfaces of a single base material of the Mo layer, a Ni layer is formed by plating on the Cu layer, and an Au / Sn alloy layer is formed by plating on both Ni layers 3. The method for manufacturing a semiconductor-mounted heat dissipation substrate according to claim 2, wherein the Au layer and the Sn layer are formed by plating so that one of them is on the outside.
The Ni layer and the Cu layer are respectively formed on both surfaces of the single base material of the Mo layer by plating, and further, the Au layer or the Au / Sn alloy layer is formed on the Ni layer by plating. Item 3. A method for manufacturing a semiconductor-mounted heat dissipation board according to Item 2.
An Ni layer and a Cu layer are formed by plating on both surfaces of a single base material of the Mo layer, and further, an Ni layer is formed by plating on the Cu layer, and an Au layer and an Sn layer are formed on the Ni layer. The method for manufacturing a semiconductor mounting heat dissipation board according to claim 2, wherein the first and second electrodes are sequentially plated so as to be on the outer side.