WO2011158546A1

WO2011158546A1 - Stacked filter

Info

Publication number: WO2011158546A1
Application number: PCT/JP2011/059157
Authority: WO
Inventors: 邦俊花岡
Original assignee: 株式会社村田製作所
Priority date: 2010-06-16
Filing date: 2011-04-13
Publication date: 2011-12-22

Abstract

Provided is a stacked filter wherein electromagnetic interference by a capacitor is reduced. In a stacked filter (20), electrically connected capacitor electrodes (27a, 28a, and 29a) and capacitor electrodes (27b, 28b, and 29b) are opposed across a capacitor electrode (30) which is a floating electrode. Accordingly, when an AC signal is input from an input terminal (P1), the electromagnetic field generated between the capacitor electrodes (27a, 28a, and 29a) and the capacitor electrode (30), and the electromagnetic field generated between the capacitor electrodes (27b, 28b, and 29b), become opposite in orientation so as to weaken each other.

Description

Multilayer filter

The present invention relates to a multilayer filter used for each communication device, and more particularly to a multilayer filter composed of an inductor and a capacitor.

For example, Patent Document 1 discloses a multilayer filter used in a conventional communication device. 4 and 5 show the multilayer filter 10 disclosed in Patent Document 1. FIG.

FIG. 4 is a circuit diagram of the multilayer filter 10. The multilayer filter 10 includes input / output terminals P11 and P12, capacitors C11, C12, and C13, and an inductor L11. The capacitor C11 and the capacitor C12 are connected in series between the input / output terminals P11 and P12. One end of the inductor L11 is connected to the connection portion between the capacitor C11 and the capacitor C12, and the other end is connected to the capacitor C13. The other end of the capacitor C13 is grounded. With such a circuit configuration, the multilayer filter 10 functions as a high-pass filter.

FIG. 5 is an exploded perspective view of the multilayer filter 10. The multilayer filter 10 is configured by sequentially laminating a dielectric layer 11 and dielectric layers 12 to 15 having electrodes formed on the surface thereof.

Capacitor electrodes

16 and 17 are formed on the surface of the dielectric layer 12. The

capacitor electrodes

16 and 17 are led out to one short side and the other short side of the dielectric layer 12 by

lead electrodes

16a and 17a, respectively. The

extraction electrodes

16a and 17a are exposed on the side surfaces of the dielectric layer 12, and input / output ends P11 and P12 are formed. A capacitor electrode 18 is formed on the entire surface of the dielectric layer 13. The

capacitor electrodes

16 and 17 are respectively opposed to the capacitor electrode 18 through the dielectric layer 12 to form capacitors C11 and C12. An inductor electrode 21 and a capacitor electrode 22 are formed on the surface of the dielectric layer 14. An inductor L11 is constituted by 21 on the inductor electrode. A via electrode 19 penetrating the dielectric layer 13 is formed at one end of the inductor electrode 21, and the inductor electrode 21 is electrically connected to the capacitor electrode 18 through the via electrode. The other end of the inductor electrode 21 is connected to the capacitor electrode 22. A ground electrode 23 is formed on the surface of the dielectric layer 15. The ground electrode 23 is opposed to the capacitor electrode 22 with the dielectric layer 14 interposed therebetween, thereby forming a capacitor C13. The capacitor C13 is grounded by the ground electrode 23.

Japanese Patent Laid-Open No. 2005-160008

However, in the conventional multilayer filter, the electromagnetic field generated in the capacitors C1 and C2 spreads around, and electromagnetic interference occurs between the capacitors C1 and C2 or between the capacitors C1 and C2 and the inductor L11. For this reason, there has been a problem that filter characteristics such as insertion loss deteriorate.

The present invention has been made in view of the above-described problems, and an object thereof is to provide a multilayer filter in which electromagnetic interference due to a capacitor is reduced.

In order to solve the above problems, a multilayer filter according to the present invention is a multilayer filter including a series capacitor circuit in which first and second capacitors are connected in series, and includes a plurality of dielectric layers and a capacitor. In the multilayer filter composed of a plurality of electrode layers including the capacitor electrode to be operated, the first capacitor has first, second, and third capacitor electrodes, and the first capacitor is overlapped when viewed from the stacking direction. The first, second, and third capacitor electrodes are formed in order, and the first and third capacitor electrodes are formed so as to be electrically connected, and the first, third, and second capacitor electrodes are electrically connected. A first capacitor is formed between the capacitor electrode, and the second capacitor has fourth, fifth, and sixth capacitor electrodes. The fourth, fifth, and fifth capacitors are overlapped when viewed from the stacking direction. 6 capacitor power Are formed in order, and the fourth and sixth capacitor electrodes are formed so as to be electrically connected, and the second capacitor is interposed between the fourth and sixth capacitor electrodes and the fifth capacitor electrode. The second and fifth capacitor electrodes are floating electrodes and are electrically connected to each other.

In this case, the electromagnetic field generated by the first and second capacitors is weakened. Therefore, electromagnetic interference between the first and second capacitors and between the first and second capacitors and other circuit elements such as an inductor can be reduced, and electrical characteristics such as insertion loss of the multilayer filter can be reduced. improves.

Furthermore, in the multilayer filter according to the present invention, it is preferable that the second and fifth capacitor electrodes are formed on the same dielectric layer.

In this case, the second and fifth capacitor electrodes can be easily formed, and the capacitor can be configured with a smaller number of layers, so that the multilayer filter can be reduced in size.

Further, the first capacitor electrode and the third capacitor electrode are electrically connected by a via electrode penetrating the dielectric layer in the stacking direction, and the fourth capacitor electrode and the sixth capacitor electrode are It is preferable that they are electrically connected by via electrodes penetrating the dielectric layer in the stacking direction.

In this case, the input / output impedance of the multilayer filter can be adjusted to a desired value by changing the number of via electrodes or the via diameter.

Further, the first and third capacitor electrodes are formed at the same distance from the second capacitor electrode, and the fourth and sixth capacitor electrodes are formed at the same distance from the fifth capacitor electrode. Is preferred.

In this case, the electric field generated in the first and second capacitors can be weakened more reliably. Therefore, electromagnetic interference between the first and second capacitors and between the first and second capacitors and other circuit elements such as an inductor can be reduced, and electrical characteristics such as insertion loss of the multilayer filter can be reduced. improves.

Further, when viewed from the stacking direction, a pair of capacitor electrodes are further formed so as to overlap the second or fifth capacitor electrode and sandwich the second or fifth capacitor electrode, and the pair of capacitor electrodes are electrically A third capacitor is preferably formed between the second and fifth capacitor electrodes that are connected.

Furthermore, the present invention is also directed to a circuit module incorporating the multilayer filter.

In this case, electromagnetic interference between the multilayer filter and other circuit elements constituting the circuit module can be reduced, and the characteristics of the circuit module are improved.

According to the present invention, it is possible to provide a multilayer filter that can weaken the electromagnetic field generated in the capacitor and reduce electromagnetic interference caused by the electromagnetic field.

1 is a circuit diagram of a multilayer filter according to a first embodiment of the present invention. It is a disassembled perspective view of the multilayer filter of FIG. It is a comparison figure of the electrical property of the multilayer filter of FIG. 1, and the conventional multilayer filter. It is a circuit diagram of the conventional multilayer filter. It is a disassembled perspective view of the conventional multilayer filter.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 1 is a circuit diagram showing a circuit configuration of the multilayer filter according to the first embodiment of the present invention. As shown in FIG. 1, the multilayer filter 20 includes input / output terminals P1 and P2, a capacitor C1 (for example, corresponding to a first capacitor according to the present invention), and a capacitor C2 (for example, a second capacitor according to the present invention). Capacitor C3), a capacitor C3 (e.g., corresponding to a third capacitor according to the present invention), and an inductor L1.

The capacitor C1 has one end connected to the input end P1 and the other end connected to one end of the capacitor C2. The other end of the capacitor C2 is connected to the output end P2, and one end of the capacitor C3 is connected to a connection portion between the capacitors C1 and C2. The other end of the capacitor C3 is connected to one end of the inductor L1. The other end of the inductor L1 is grounded.

Thus, the multilayer filter 20 is configured as a T-type high-pass filter by the capacitor C1, the capacitor C2, the capacitor C3, and the inductor L1. The capacitors C1 and C2, the capacitors C1 and C3, and the capacitors C2 and C3 all have a series capacitor circuit configuration in which two capacitors are connected in series.

Subsequently, FIG. 2 is an exploded perspective view showing a laminated structure of the laminated filter 20. The multilayer filter 20 is formed by sequentially laminating a dielectric layer 21 having no electrode pattern on the surface and dielectric layers 22 to 26 having an electrode pattern on the surface. Here, the

dielectric layers

22 and 23 have the same thickness.

The electrode pattern is formed, for example, by applying a photosensitive conductive paste on the insulator layer by a spin coat method or the like and using a photolithography method. Further, the conductive paste may be directly formed on the insulator layer by screen printing through a metal mask.

Also, the dielectric layer is produced by applying a slurry made of a ceramic dielectric material such as barium titanate as a raw material on a film by a doctor blade method.

On the surface of the dielectric layer 22, a capacitor electrode 27a, a capacitor electrode 28a, and a capacitor electrode 29a are formed. The capacitor electrode 27a is formed on one short side of the dielectric layer 22, and is drawn out to one short side of the dielectric layer 22 by the lead electrode 27c.

The capacitor electrode 29a is formed on the other short side of the dielectric layer 22, and is drawn out to the other short side of the dielectric layer 22 by the lead electrode 29c. The lead electrode 27c and the lead electrode 29c are exposed on the side surface of the dielectric layer 22, and the input end P1 and the output end P2 in FIG. 1 are configured. A capacitor electrode 28a is formed between the

capacitor electrodes

27a and 29a.

On the surface of the dielectric layer 23, a capacitor electrode 30a and a capacitor electrode 30b are formed. The capacitor electrode 30a and the capacitor electrode 30b are formed in a continuous manner by printing or the like, and are formed as a single capacitor electrode 30 extending over substantially the entire surface of the dielectric layer 23. When viewed from the stacking direction, the capacitor electrode 30 overlaps the

capacitor electrodes

27a, 28a, and 29a formed on the dielectric layer 22. The capacitor electrode 30 is a floating electrode that is not electrically connected to other electrode patterns.

Capacitor electrodes

27b, 28b, and 29b are formed on the surface of the dielectric layer 24.

The capacitor electrode 27b is formed on one short side of the dielectric layer 24 and overlaps the

capacitor electrodes

27a and 30 formed on the dielectric layer 22 when viewed from the stacking direction. In addition, an extraction electrode 27d is formed on the dielectric layer 24 continuously with the capacitor electrode 27a. The capacitor electrode 27b is drawn toward one short side of the dielectric layer 24 by the lead electrode 27d.

The capacitor 29b is formed on the other short side of the dielectric layer 24 and overlaps the

capacitor electrodes

29a and 30 when viewed from the stacking direction. In addition, an extraction electrode 29 d is formed on the dielectric layer 24 continuously with the capacitor electrode 29 a. The capacitor electrode 29b is drawn toward the other short side of the dielectric layer 24 by the lead electrode 29d.

Between the capacitor electrode 27b and the capacitor electrode 29b, a capacitor electrode 28b is formed. The capacitor electrode 28b overlaps the

capacitor electrodes

28a and 30 when viewed from the stacking direction.

Further, via electrodes v2 and v3 and via electrodes v1 and v4 penetrating the

dielectric layers

22 and 23 are formed on the capacitor electrode 28b and the

lead electrodes

27d and 29d formed on the dielectric layer 24, respectively.

Here, the via electrodes v1 to v4 are arranged so as to be electrically insulated from the capacitor electrode 30.

The via electrode v1 is formed so as to connect between the extraction electrode 27c and the extraction electrode 27d. Therefore, the capacitor electrode 27a and the capacitor electrode 27b are electrically connected via the via electrode v1 and the

extraction electrodes

27c and 27d. Therefore, the capacitor electrode 27a and the capacitor electrode 27b are opposed to each other with the capacitor electrode 30 interposed therebetween, and a capacitance corresponding to the capacitor C1 in FIG. 1 is configured between the capacitor electrode 27a and the capacitor electrode 30 and between the capacitor electrode 27b and the capacitor electrode 30. Has been.

The via electrodes v2 and v3 are formed so as to connect between the capacitor electrode 28a and the capacitor electrode 28b. Therefore, the capacitor electrode 28a and the capacitor electrode 28b are electrically connected via the via electrodes v2 and v3. Therefore, the capacitor electrode 28a and the capacitor electrode 28b face each other with the capacitor electrode 30 in between, and a capacitance corresponding to the capacitor C3 in FIG. 1 is configured between the capacitor electrode 28a and the capacitor electrode 30 and between the capacitor electrode 28b and the capacitor electrode 30. Has been.

The via electrode v4 is formed so as to connect between the extraction electrode 29c and the extraction electrode 29d. Accordingly, the capacitor electrode 29a and the capacitor 29b are electrically connected via the via electrode v4 and the

extraction electrodes

29c and 29d. Therefore, the capacitor electrode 29a and the capacitor electrode 29b are opposed to each other with the capacitor electrode 30 interposed therebetween, and a capacitance corresponding to the capacitor C2 in FIG. 1 is present between the capacitor electrode 29a and the capacitor electrode 30 and between the capacitor electrode 29b and the capacitor electrode 30. It is configured.

An inductor electrode 31 is formed on the surface of the dielectric layer 25. A via electrode v <b> 5 that penetrates the dielectric layer 24 is formed on the inductor electrode 31. The inductor electrode 31 constitutes an inductor corresponding to the inductor L1 in FIG. One end of the inductor electrode 31 is formed so as to be electrically connected to the capacitor electrode 28b by a via electrode v5. The other end of the inductor electrode 31 is drawn out so as to be exposed at the other short side of the dielectric layer 25, and is connected to a side electrode 31a formed on the side surface of the dielectric layer.

A ground electrode 32 is formed on the surface of the dielectric layer 26. The ground electrode 32 is formed on substantially the entire surface of the dielectric layer 26. The lead electrode 32a is led out so as to be exposed at the other short side of the dielectric layer 26 and is connected to the side electrode 31a. Therefore, the inductor electrode 31 is connected to the ground electrode 32 via the extraction electrode 32a and the side electrode 31a. The inductor electrode 31 is grounded by the ground electrode 32.

Further, by matching the area where the capacitor electrode 27a and the capacitor electrode 30 overlap with each other in the stacking direction, and the area where the capacitor electrode 27b and the capacitor electrode 30 overlap with each other in the stacking direction, the distance between the

capacitor electrodes

27a and 30 can be reduced. The magnitudes of the reverse electromagnetic fields generated between the

capacitor electrodes

27b and 30 can be matched. For this reason, the electromagnetic field generated by the capacitors C1 and C2 can be further weakened. This configuration can also be applied to the capacitors C3 and C4.

The high-pass filter having the circuit configuration shown in FIG. 1 is realized by the laminated structure described above.

Subsequently, the effects of the first embodiment of the present invention will be described in detail below.

In the multilayer filter 20, the electrically connected

capacitor electrodes

27a, 28a, 29a and the

capacitor electrodes

27b, 28b, 29b are opposed to each other with the capacitor electrode 30 that is a floating electrode interposed therebetween. Therefore, when an AC signal is input from the input terminal P1, the electromagnetic field generated between the

capacitor electrodes

27a, 28a, 29a and the capacitor electrode 30 is opposite to the electromagnetic field generated between the

capacitor electrodes

27b, 28b, 29b. It becomes the direction. Therefore, the electromagnetic field leaking between the

capacitor electrodes

27a, 28a, 29a and the capacitor electrode 30 and the electromagnetic field leaking between the

capacitor electrodes

27b, 28b, 29b are also opposite to each other and weaken each other. For this reason, electromagnetic interference between the capacitors and between the capacitors and the inductors constituting the multilayer filter can be reduced, and filter characteristics such as insertion loss are improved.

Furthermore, in the multilayer filter 20, the

dielectric layers

22 and 23 have the same thickness. In other words, the

capacitor electrodes

27a, 28a, 29a and the capacitor electrode 30 and the

capacitor electrodes

27b, 28b, 29b and the capacitor electrode 30 are arranged apart by the same distance. Therefore, the electromagnetic field generated between the

capacitor electrodes

27a, 28a, 29a and the capacitor electrode 30 and the electromagnetic field generated between the

capacitor electrodes

27b, 28b, 29b and the capacitor 30 are opposite to each other. The size is almost the same. For this reason, the electromagnetic field generated by the capacitors C1, C2, and C3 is more reliably weakened.

The

capacitor electrodes

30a and 30b are formed on the surface of the same dielectric layer 23 as one continuous capacitor electrode 30. Thus, the

capacitor electrodes

30a and 30b can be formed at the same time, and the electrode pattern can be easily formed. Furthermore, by forming the

capacitor electrodes

30a and 30b on the same dielectric layer, the capacitors C1, C2, and C3 can be configured with fewer layers, and the multilayer filter 20 can be downsized.

Further, the

capacitor electrodes

27a and 27b connected to the input terminal P1 and the

capacitor electrodes

29a and 29b connected to the output terminal P2 are connected by the via electrode v1 and the via electrode v4, respectively. By changing the number of these via electrodes and the via diameter, the input / output impedance can be freely adjusted. For this reason, adjustment of matching when the multilayer filter 20 is connected to other electronic components to configure a functional circuit is simplified.

Further, a circuit module can be manufactured using the multilayer filter 10. In this case, electromagnetic interference between the multilayer filter 10 and other circuit elements constituting the circuit module is reduced, so that the characteristics of the circuit module are improved.

Next, FIG. 3 is a comparison diagram of electrical characteristics of the multilayer filter 20 according to the present embodiment and the multilayer filter having the conventional configuration. Here, the multilayer filter having the conventional configuration is a multilayer filter in which the capacitor electrode 30 that is a floating electrode and the via electrodes v1, v2, v3, and v4 are not formed in FIG. This conventional multilayer filter has the same circuit configuration as that of the multilayer filter 20 according to the present embodiment, and the value of each circuit element is also the same.

FIG. 3A shows pass characteristics in a wide frequency band of the multilayer filter 20 and the conventional multilayer filter. FIG. 3B is an enlarged view in which the electrical characteristics of FIG. 3A are enlarged in the range of 2 GHz to 3 GHz. In FIG. 3, the solid line indicates the electrical characteristics of the multilayer filter of the present embodiment, and the broken line indicates the electrical characteristics of the conventional multilayer filter.

As shown in FIG. 3, the insertion loss of the multilayer filter of the present embodiment is reduced in the pass band on the higher frequency side than 2.2 GHz, which is the cutoff frequency of the multilayer filter 20, as compared with the conventional multilayer filter. It can be seen that the insertion loss is improved by about 0.2 dB over the conventional multilayer filter in the vicinity of 2.4 GHz, which is the frequency used by the wireless LAN and Bluetooth (registered trademark).

In the present embodiment, a T-type high-pass filter has been described. However, if the circuit configuration includes two capacitors connected in series, the configuration of the present embodiment is also applied to the band-pass filter and the low-pass filter. Needless to say.

C1, C2, C3, C11, C12, C13 Capacitors L1, L11 Inductors P1, P2, P11, P22 Input /

output terminals

10, 20 Multilayer filters 11-15, 21-26

Dielectric layers

17a, 17b, 18, 27a,

27b

28a, 28b, 29a, 29b, 22 Capacitor electrode 19, v1 to

v5 Via electrode

21, 31

Inductor electrode

27c, 27d, 29c, 29d, 32a Lead electrode 30 Floating electrode

31a Side electrode

23, 32 Ground electrode

Claims

A multilayer filter including a series capacitor circuit in which first and second capacitors are connected in series,
In a multilayer filter composed of a plurality of dielectric layers and a plurality of electrode layers including a capacitor electrode constituting the capacitor,
The first capacitor has first, second, and third capacitor electrodes, and the first, second, and third capacitor electrodes are sequentially formed so as to overlap each other when viewed from the stacking direction. The first and third capacitor electrodes are formed to be electrically connected, and the first capacitor is configured between the first and third capacitor electrodes and the second capacitor electrode. And
The second capacitor has fourth, fifth, and sixth capacitor electrodes, and the fourth, fifth, and sixth capacitor electrodes are formed in order so as to overlap each other when viewed from the stacking direction. The fourth and sixth capacitor electrodes are formed so as to be electrically connected, and the second capacitor is configured between the fourth and sixth capacitor electrodes and the fifth capacitor electrode,
The multilayer filter, wherein the second and fifth capacitor electrodes are floating electrodes and are electrically connected.
The multilayer filter according to claim 1, wherein the second and fifth capacitor electrodes are formed on the same dielectric layer.
The first capacitor electrode and the third capacitor electrode are electrically connected by a via electrode penetrating the dielectric layer in the stacking direction,
3. The multilayer filter according to claim 1, wherein the fourth capacitor electrode and the sixth capacitor electrode are electrically connected by a via electrode penetrating the dielectric layer in the stacking direction.
The first and third capacitor electrodes are formed away from the second capacitor electrode by the same distance in the stacking direction, and the fourth and sixth capacitor electrodes are separated from the fifth capacitor electrode by the same distance. It forms, The multilayer filter as described in any one of Claims 1-3 characterized by the above-mentioned.
A pair of capacitor electrodes is further formed so as to overlap the second or fifth capacitor electrode as viewed from the stacking direction and sandwich the second or fifth capacitor electrode,
The pair of capacitor electrodes are electrically connected, and constitute a third capacitor between the second or fifth capacitor electrodes. The multilayer filter as described.
A multilayer module comprising the multilayer filter according to any one of claims 1 to 5.