WO2011135420A1 - Procédé destiné à la production d'une couche de semi-conducteur composite - Google Patents

Procédé destiné à la production d'une couche de semi-conducteur composite Download PDF

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Publication number
WO2011135420A1
WO2011135420A1 PCT/IB2011/000833 IB2011000833W WO2011135420A1 WO 2011135420 A1 WO2011135420 A1 WO 2011135420A1 IB 2011000833 W IB2011000833 W IB 2011000833W WO 2011135420 A1 WO2011135420 A1 WO 2011135420A1
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WIPO (PCT)
Prior art keywords
coating
cover
layer
compound semiconductor
process according
Prior art date
Application number
PCT/IB2011/000833
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English (en)
Inventor
Lorenz Eisenmann
Andreas Kampmann
Immo KÖTSCHAU
Dieter Schmid
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Centrotherm Photovoltaics Ag
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Publication of WO2011135420A1 publication Critical patent/WO2011135420A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02568—Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • C23C14/5846—Reactive treatment
    • C23C14/5866—Treatment with sulfur, selenium or tellurium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/60—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using solids, e.g. powders, pastes
    • C23C8/62—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using solids, e.g. powders, pastes only one element being applied
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02614—Transformation of metal, e.g. oxidation, nitridation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0322—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/541—CuInSe2 material PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention concerns a process for the production of a compound semiconductor layer according to the preamble of claim 1.
  • Compound semiconductor layers can be produced in a wide variety of ways, for example by co-evaporation of the elements involved.
  • Another production option involves so-called deposi- tion reaction processes, in which firstly a metallic precursor layer is deposited and this is then converted with chalcogens into a compound semiconductor.
  • chalcogens are required in quantities which amount to as much as twice those amounts which correspond to the exact stoichiometric proportion of the respective chalcogen to the compound semiconductor layer formed. This represents a material expense which affects the costs of process management.
  • WO 2009/135685 A2 discloses how, during the tempering of an object in a treatment chamber, the object can be provided with a process box, thus reducing losses due to evaporating materials. This requires treatment chambers or furnaces which are costly to construct, in which one or more process boxes are moveably arranged.
  • the present invention is based on the problem of providing a low-cost process for producing a I-III- VI-compound semiconductor layer.
  • the process according to the invention makes provision that a substrate is provided with a coating which has a metallic precursor layer.
  • This coating is heated and kept at temperatures of at least 350°C for the duration of a process time.
  • the metallic precursor layer is converted, in the presence of a chalcogen, into a I-III-VI-compound semiconductor layer.
  • areal contact is made between a preponderant proportion of a free surface of the coating and a cover.
  • the provision of areal contact in this case means that it is ensured that for at least part of the process time there is areal contact between the preponderant proportion of the free surface of the coating and the cover.
  • the term "the' free surface of the coating” in this sense means those surface portions of the coating which are not already directly covered in some way, even without the cover.
  • surface area portions of the coating can be directly covered by the substrate or a back contact arranged on the substrate.
  • a I-III-VI-compound semiconductor layer means a layer consisting of a compound semiconductor which is formed from elements in group IB of the periodic system, for example copper, from elements in Group IIIA of the periodic system, for example aluminium, gallium or indium, and at least one chalcogen from group VIA of the periodic system, for example sulphur, selenium or tellurium.
  • the coating is kept at temperatures of at least 350°C should not be taken to mean that the coating is heated up to a certain temperature and kept at this certain temperature throughout the entire process time. Instead, the invention provides that, during the process time, the coating exhibits any temperatures greater than or equal to 350°C.
  • the temperature of the coating may vary during the process time, but it is always at least 350°C throughout the process time.
  • the process time can in principle be interrupted by phases in which the temperature of the coating is lower than 350°C.
  • the process time in such a case is composed of the sum of those times in which the temperature of the coating is greater than or equal to 350°C.
  • a coating within the meaning of the present invention can con- sist solely of a metallic precursor layer, for example a layer including the metals copper, gallium and indium, or can have further components, for example a chalcogen layer, which is deposited onto the metallic precursor layer.
  • the term "coating” thus covers, in the present case, all layers arranged on the substrate and any metallic back contact layer provided there. Following partial conversion of the metallic precursor layer the coating consists, for example, in part of a compound semiconductor. The compound semiconductor layer present following complete conversion is also a coating in the present sense.
  • the process according to the invention enables the production of the compound semiconductor layer with low consumption of chalcogens. This is attributable to the fact that in the areas of the free surface of the -coating in contact with the cover, any loss of evaporated chalcogens is almost precluded. It has been found that compound semiconductor layers of good quality can be produced, despite the contact of the cover with the free surface of the coating. Surprisingly, it has also been found that after conversion of the metallic precursor layer the cover can be easily separated from the coating, without damaging the compound semiconductor layer produced. The process according to the invention is therefore universally usable and not limited to such applications in which the cover can remain on the coating. One variant embodiment of the invention therefore makes provision that after conversion of the metallic precursor layer, the cover is separated from the coating.
  • the cover can in principle, however, also be brought into first contact with the free surface of the coating in a furnace or coating chamber.
  • Corresponding suitable devices would then have to be provided.
  • any substrates which are not adversely affected by the effect of heat or chemical reactions during the carrying out of the process can be used in the process according to the invention. So, in addition to glass substrates, for exam- pie, strips of metal can also be used.
  • the substrate is provided with a back contact.
  • a metal layer in particular a molybdenum layer
  • the back contact is preferably divided into a number of strips by a structure, as a result of which a serial connection of various solar cell elements of the finished solar module can be realised.
  • Said molybdenum coating is not a component of the metallic precursor layer or of the coating in the sense of the present invention.
  • the metallic precursor layer can, for example, contain copper, indium and gallium and be applied using technologies known in the art, for example by means of sputtering.
  • the me- tallic precursor layer can then in principle consist of several metallic layers, for example firstly a layer containing copper and gallium can be provided and an indium layer can be applied on top of this.
  • the metallic precursor layer can be constructed from several identical sub-layers, for example several layers containing copper and gallium. It is also possible to provide repeated sequences of layers.
  • the metallic precursor layer can contain chalcogens, e.g. in the form of chalcogenides .
  • the metallic precursor layer is converted into a CIS- or CIGS- compound semiconductor layer.
  • One variant embodiment of the invention provides for a
  • the process time of less than 1200 seconds, preferably less than 600 seconds. Especially preferably, the process time has a duration of between 150 and 500 seconds.
  • a cover which is: produced from a material with comparatively high thermal conductivity, for example from graphite or another carbon modification or silicon carbide.
  • a material with comparatively high thermal conductivity for example from graphite or another carbon modification or silicon carbide.
  • a chalcogen layer with at least one chalcogen is deposited on the metallic precursor layer. Areal contact is subsequently provided essentially between the chalcogen layer and the cover. To this end, the areal contact is preferably formed before the coating is heated.
  • the at least one chalcogen-containing chalcogen layer is advantageously deposited by means of physical deposition from the vapour phase at atmospheric pressure (APPVD) . It is especially preferable for the chalcogen deposition to take place in a continuous process. In particular, sulphur or selenium can be deposited.
  • the deposited chalcogen layer serves as chalcogen source for the conversion of the metallic precursor layer into the compound semiconductor layer.
  • a cover is used which is coated, on its side facing towards the coating, at least partially, with one or more chalcogens, preferably with selenium.
  • a chalcogen coating of the cover of this type can be used as the sole or additional chalcogen source for the conversion of the metallic precursor layer into the compound semiconductor layer.
  • it can be provided as an alternative or in addition to a chalcogen layer deposited on the metallic precursor layer.
  • the coating of the cover with one or more chalcogens can, again, advantageously be carried out by means of a physical deposition from the vapour phase at atmospheric pressure.
  • the areal contact between the preponderant proportion of the free surface of the coating and the cover is provided throughout the entire process time. In all variant embodiments of the invention, the described areal contact can also be provided outside the process time.
  • the coating is arranged, together with the cover, at least during the process time, in a protective gas atmosphere, preferably in a nitrogen or inert gas atmosphere.
  • a protective gas atmosphere preferably in a nitrogen or inert gas atmosphere.
  • both coat- ing and cover are already arranged in the protective gas atmosphere during a heating phase preceding the process time and this is maintained ' until the coating has cooled to an uncritical temperature.
  • the arrangement of coating and cover in a protective gas atmosphere serves, inter alia, to guarantee the lowest possible oxygen partial, pressure during a thermal treatment of the coating, especially during its conversion into a compound semiconductor layer, since a supply of oxygen can trigger unwanted chemical reactions. So it has been found that solar cells or solar cell modules fabricated from com- pound semiconductor layers which have been produced in the presence of oxygen are less efficient.
  • the protective gas atmosphere can also serve to keep the hydrogen partial pressure and/or partial pressures of gases containing hydrogen in the process atmosphere as low as possible, so that the formation of toxic gases, for example of selenium hydride, is largely prevented when selenium is used as chalcogen.
  • the formation of backside metal chalcogenides can be controlled via the supply of chalcogens.
  • the thickness of the molybdenum selenide layer formed can be influenced via the quantity of selenium supplied. This can be used, for example, to optimise a solar cell or solar module manufactured using the compound semiconductor layer produced.
  • a plate is used as cover.
  • the term "plate” means a flat object, whose longitudinal and lateral extension amounts to a multiple of its thickness.
  • a silicon carbide plate and especially preferably a graphite plate or a plate made from carbon fibre-reinforced carbon is used, since these materials have good thermal conductivity.
  • the use of a plate with good thermal conductivity enables any temperature inho- mogeneities within a furnace to be equalised, as a result of which the homogeneity of the compound semiconductor layer produced can be improved. So plates with good thermal conductivity enable large-area, homogeneous compound semiconductor lay- ers to be produced.
  • any contamination of the compound semiconductor layer produced, due to contaminants originating from the furnace, can be reduced.
  • a glass plate, a quartz plate or a sapphire plate could also be used. Plates of the type described can easily be separated from the coating following conversion of the metallic precursor layer into the compound semiconductor layer. Measures to facilitate the separation procedure are not necessary.
  • the rigidity of the plate is, in principle, immaterial for the execution of the process according to the invention.
  • it can be a highly rigid plate or a flexible mat or film. If the plate is ascribed ; a supporting function in the practi- cal implementation of the process according to the invention, then its rigidity must be selected accordingly.
  • One variant embodiment of the process according to the invention makes provision that the areal contact between the pre- ponderant proportion of the free surface of the coating and of the cover is provided before the coating is placed in a furnace for the purpose of converting the metallic precursor layer into the compound semiconductor layer.
  • a wall of a furnace in which the coating is heated is used as cover.
  • This wall can, for example, be formed by a plate, in particular a silicon carbide plate or a graphite plate or a plate made from carbon fibre-reinforced carbon.
  • the areal contact between the preponderant proportion of the free surface of the coating and the wall can, for example, be produced by the coating, following insertion in the furnace, being placed against the wall of the furnace. In this case, the furnace would have to be equipped accordingly with suitable devices.
  • cover instead of the wall of the furnace, other suitable furnace components could be used as cover.
  • a shielding plate provided in the furnace could be used as cover.
  • a stack formed from substrate, coating and cover, as which, in particular, a plate can be provided, can in principle be arranged at any point in space.
  • a stack of flat components could be arranged in such a way that the planes extend essentially horizontally or vertically.
  • the coating and the cover can be arranged either on the upper side of the substrate or on the underside of the substrate.
  • the cover is ascribed a supportive function, so that its rigidity and/or sta- bility must be selected accordingly.
  • the coating can be heated homogeneously by selectively heating the cover which is in areal contact with the coating -for a specified time.
  • Selective heating can, for example, be realised by irradiating the cover plate with short-wave electromagnetic radiation of a wavelength which is strongly absorbed by the cover plate.
  • the material used to produce the cover plate and the wavelength of the electromagnetic radiation used must be co-ordinated with each other accordingly.
  • the metallic precursor layer is converted into the compound semiconductor layer at a process pressure which is close to atmospheric ambient pressure.
  • the process pressure can then, for example, deviate from atmospheric ambient pressure due to flows in the process environment.
  • the process environment evacuated is the process pressure is no more than 50 mbar less than atmospheric ambient pressure. This obviates the need for time-consuming and expensive vacuum systems .
  • the coating is heated in a continuous furnace. This makes it pos ⁇ sible to produce compound semiconductor layers, especially in conjunction with the production of solar cells or solar mod- ules, on an industrial scale. In principle, however, heating can also occur in a so-called batch furnace designed for stack operation .
  • a segmented continuous furnace in which the coating can be heated to various temperatures in various segments of the continuous furnace.
  • a flat substrate, a flat coating and a plate as cover and the resulting stack is aligned in such a way that the planes extend essentially horizontally.
  • the stack is then transported through the segmented continuous furnace. This transport can in particular take place in stages. It has been shown that in the variant embodiment described, gas flows prevailing in the continuous furnace relative to the coating at those points at which areal contact between the free surface of the coating and the cover is pro ⁇ vided, have almost no harmful effect on the compound semiconductor layer formed. If glass substrates are used, it can be advantageous to arrange the stack on an additional support plate during transport through the continuous furnace, so that even if the glass breaks, the stack is still transported out of the continuous furnace.
  • the coating and the substrate are arranged on the cover and the cover is used as support for a stack formed out of coating and sub ⁇ strate.
  • the stack can then be transported through the continuous furnace on the cover functioning as support. Since in this case the cover is ascribed a supporting function, its ri- gidity and/or stability must be designed accordingly.
  • a protective plate can be arranged on that side of the substrate which is on top in the arrangement described. This results in greater stabilisation.
  • the cover is heated before areal contact is formed between it and the preponderant proportion of the free surface of the coating.
  • the coating can in this way be heated, by thermal transfer from the cover to the coating, to a higher temperature than the substrate.
  • the cover is preferably heated to a temperature of at least 400°C, especially preferably to a value of at least 600°C and most especially preferably to a value of at least 640°C.
  • Figure 1 schematic diagram of a first embodiment of the
  • Figure 2 sample schematic view of a substrate and layers arranged thereon before conversion of the metallic precursor layer into the compound semiconductor layer with the process according to the embodiment from Figure 1
  • FIG. 4 sample schematic illustration of the laying-on of a selenium-coated graphite plate according to the process from the embodiment in Figure 3
  • Figure 6 schematic diagram of the heating of the coating in a segmented continuous furnace
  • FIG. 7 solar cell according to the state of the art
  • Figure 8 schematic partial diagram of a further embodiment of the process according to the invention
  • Figure 1 shows a schematic diagram of a first embodiment of the process according to the invention. This will next be ex- plained in more detail, making reference to Figure 2, which shows by way of example a schematic view of a substrate and layers arranged thereon before conversion of the metallic precursor layer into the compound semiconductor layer using the process shown in Figure 1.
  • a metallic precursor layer 57 is sputtered onto a glass substrate 50 provided with a back contact 52.
  • the back contact 52 provided on the glass substrate 50 can, for example, be formed by sputtering on a molybdenum layer.
  • the metallic precursor layer 57 is composed of a copper-gallium layer 54 and an indium layer 56.
  • a selenium layer 58 is formed 12 on the metallic precursor layer 57.
  • the selenium layer 58 forms a coating 63 with the metallic precursor layer 57.
  • a graphite plate 60 is laid 14 on the selenium layer 58 as cover. Before this laying- on 14 of the graphite plate 60, the selenium layer 58, and hence also the coating 63, is not covered on its top side.
  • the graphite plate 60 is separated 18 from the coating 63, which now consists at least partially of a compound semiconductor layer.
  • FIG 3 shows in a schematic diagram a second embodiment of the process according to the invention. This differs from that in Figure 1 in that no selenium layer is deposited onto the metallic precursor layer 57. Instead, as shown schematically in Figure 4, a graphite plate 70, which is provided on its side facing towards the coating with a selenium layer 72, is laid on the coating, and as a result areal contact with the coating is provided 24. In the embodiment illustrated in Figures 3 and 4, the coating is formed solely by the metallic precursor layer 57. Its uncovered surface thus represents a free surface 25 of the coating.
  • FIG. 1 The embodiments from Figures 1 and 3 can be combined in such a way that firstly a chalcogen layer is deposited onto the metallic precursor layer 57, so that the coating 63, as shown in Figure 2, has a selenium coating 58, and in addition a cover provided with a selenium coating, for example the graphite plate 70 provided with a selenium coating 72 from Figure 4, is laid on the coating and in this way areal contact is provided between the free surface of the coating and the cover.
  • chalcogens than selenium can be used.
  • a different chalcogen can be deposited on the metallic precursor layer than that of the cover later laid on.
  • graphite plate 70 from Figure 4 this could, for example, be coated with selenium, while a layer of sulphur is deposited before the cover is laid on the metallic precursor layer. In principle, however, these layers can also consist of the same chalcogen.
  • Figure 5 shows in a schematic view an example of the compound semiconductor layer which can be produced with the process according to Figures 1 or 3.
  • Figure 5 illustrates the situation following the separation 18 provided in Figures 1 and 3 of the graphite plates 60, 70 respectively, from the coating. If the metallic precursor layer 57 has been fully converted, as is the case in the example in Figure 5, there remains on the back contact 52 a CIGS-compound semiconductor layer 80 with no residue of the metallic precursor layer.
  • the heating and keeping 16 of the coating at a temperature of at least 350°C for the duration of the process time is advan ⁇ tageously realised, in the embodiments in Figures 1 and 3, in a continuous furnace, preferably in a segmented continuous furnace.
  • Figure 6 illustrates this by way of example on the basis of a continuous furnace 90, which has two segments Si and S2, in which the coating 63 can be brought to various temperatures.
  • the continuous furnace 90 shown has a feed opening 91 to insert the substrates 50 and the layers arranged thereon in the continuous furnace 90 and an outlet opening 92 to extract same from the continuous furnace 90.
  • Feed opening 91 and outlet opening 92 are provided with a gas lock 96, to prevent any penetration of environmental air into the continuous furnace 90.
  • gas curtains of nitrogen or an inert gas can be used as gas locks 96. In this way, compound semiconductor layers can be produced on an industrial scale in a continuous process.
  • a transport device 98 is provided in order to transport the substrates 50 and the layers arranged thereon into, through, and finally out of the continuous furnace 90.
  • This can in principle be any known transport system, for example a con ⁇ veyor belt, roller transport devices or walking beam systems.
  • the transport device 98 is preferably operated stepwise. So a glass substrate 50 with layers arranged thereon can firstly be inserted through the feed opening 91 into the first segment SI of the continuous furnace, where the coating is heated to a temperature of at least 350°C, so that a conversion of the me- tallic precursor layer into a compound semiconductor layer, in this case a CIGS-compound semiconductor layer 80, takes place.
  • the glass substrate with the layers arranged thereon is transported into segment S2 of the continuous furnace 90, in which cooling to a temperature of less than 300°C takes place by means of a cooling device 95. Following this cooling, the glass substrates 50 and the layers arranged thereon are transported out of the continuous furnace 90 and the graphite plate 60 is removed.
  • a heater 94 is provided in segment SI for the purpose of heating the coating. Also, a nitrogen atmosphere 93 is formed in the interior of the continuous furnace 90, in order to prevent the previously described undesired reactions with oxygen or hydrogen.
  • FIG 6 shows by way of example the use of the continuous furnace 90 in the process from Figure 1.
  • the continuous fur- nace 90 can obviously be used in similar fashion in the embodiment from Figure 3.
  • the glass substrate, following the laying-on 24 of the graphite plate 70 provided with the selenium coating, shown in Figure 4 would be inserted through the feed opening 91 into segment SI of the continuous furnace 90.
  • segment SI Following the conversion of the metallic precursor layer, essentially the same sequence of layers would be present in segment S2 as shown in Figure 6.
  • the graphite plate 60 instead of the graphite plate 60, only the graphite plate 70 would be present on the CIGS-compound semiconductor layer 80 produced.
  • the glass substrate 50 is lying' on the transport device 98.
  • the glass substrate 50 is thus being used as support for the layers and graphite plates.
  • the graphite plates used could serve as sup- ports. To do so, the glass substrates and the sequence of layers arranged thereon would merely have to be inserted into the continuous furnace 90 upside-down, so that the graphite plates come to lie on the transport device 98. The glass substrates would then be on top. If this procedure is used, the graphite plates used would have to be designed with sufficient stabil ⁇ ity.
  • Figure 8 illustrates a further embodiment of the process ac- cording to the invention.
  • a glass substrate 50 provided with a back contact 52 is provided with a coating 63 which has a metallic precursor layer and a chalcogen layer, the chalco- gen layer having been deposited onto the metallic precursor layer.
  • the coating 63 can, for example, be formed as explained in connection with Figures 1 and 2.
  • the coating is subsequently heated in the continuous furnace 99 shown in Figure 8 and kept for the duration of the process time at a temperature of at least 350°C.
  • the metallic precursor layer is thereby converted into the CIGS-compound semiconductor layer 80.
  • a continuous furnace 99 is used which largely corresponds to the continuous furnace 90 described in Figure 6.
  • the continuous furnace 99 is designed in such a way that a preponderant proportion of the free surface of the coating 63 can be brought into areal contact with a wall 100 of the continuous furnace 99.
  • the wall 100 of the continuous furnace 99 is used as cover.
  • the transport device 98 can be designed to be displaceable in its vertical orientation, for example. In this way the coatings 63 can be brought up against the wall 100, thus providing areal contact.
  • the wall 100 of the continuous furnace 99 is advantageously produced from a material with good thermal conductivity, preferably graphite or silicon carbide.
  • the compound semiconductor layers produced using the process according to the invention can advantageously be used in the manufacture of thin-layer solar cells, or thin-layer solar cell modules.
  • Figure 7 shows one such solar cell 86 which is known in the art.
  • compound semiconductor layers produced with the process according to the invention can easily be further processed into thin-layer solar cells.
  • a cadmium sulphide layer 82 can be applied to the produced CIGS-compound semiconductor layer 80. This is preferably done in a chemical bath.
  • a zinc oxide layer 84 is applied, for example by sputtering.
  • a serial connection of finished solar cells into a solar module can be realised with additional structural steps known in the art.

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  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
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  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
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  • Mechanical Engineering (AREA)
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Abstract

La présente invention concerne un procédé destiné à la production d'une couche de semi-conducteur composite I-III-VI (80), dans lequel un substrat (50) est muni (10, 12) d'un revêtement (63) qui présente une couche de précurseur métallique (57), le revêtement (63) étant chauffé et conservé pendant la durée d'un temps de traitement à des températures d'au moins 350 °C (16) et la couche de précurseur métallique (57) est ainsi convertie (16), en présence d'un chalcogène (58; 72), en couche de semi-conducteur composite (80) lorsque s'effectue un contact surfacique (14; 24) entre une proportion prépondérante (15a) d'une surface libre (15a, 15b; 25) du revêtement (63) et un couvercle (60; 70) pendant au moins une partie du temps de traitement.
PCT/IB2011/000833 2010-04-27 2011-04-14 Procédé destiné à la production d'une couche de semi-conducteur composite WO2011135420A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2991122A1 (fr) * 2014-08-25 2016-03-02 Sunshine PV Corp. Procédé de traitement thermique pour couche précurseur de composé semiconducteur

Citations (5)

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Publication number Priority date Publication date Assignee Title
EP0662247B1 (fr) 1992-09-22 1999-03-10 Siemens Aktiengesellschaft Procede rapide de realisation d'un semi-conducteur en chalcopyrite sur un substrat
WO2009033674A2 (fr) 2007-09-11 2009-03-19 Centrotherm Photovoltaics Ag Procédé et appareil pour convertir thermiquement des couches précurseurs métalliques en couches semiconductrices, et module solaire
WO2009076322A2 (fr) * 2007-12-06 2009-06-18 Craig Leidholm Procédés et dispositifs de traitement d'une couche de précurseur dans un environnement de groupe via
WO2009135685A2 (fr) 2008-05-08 2009-11-12 Avancis Gmbh & Co. Kg Dispositif et procédé de régulation de température d'objets dans une chambre de traitement
US20100015754A1 (en) * 2008-07-21 2010-01-21 Basol Bulent M Method and apparatus to form thin layers of photovoltaic absorbers

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EP1739213B1 (fr) * 2005-07-01 2011-04-13 Freiberger Compound Materials GmbH Appareil et procédé de récuit des plaquettes III-V ainsi que des plaquettes monocristallines récuites du semiconducteur type III-V

Patent Citations (5)

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Publication number Priority date Publication date Assignee Title
EP0662247B1 (fr) 1992-09-22 1999-03-10 Siemens Aktiengesellschaft Procede rapide de realisation d'un semi-conducteur en chalcopyrite sur un substrat
WO2009033674A2 (fr) 2007-09-11 2009-03-19 Centrotherm Photovoltaics Ag Procédé et appareil pour convertir thermiquement des couches précurseurs métalliques en couches semiconductrices, et module solaire
WO2009076322A2 (fr) * 2007-12-06 2009-06-18 Craig Leidholm Procédés et dispositifs de traitement d'une couche de précurseur dans un environnement de groupe via
WO2009135685A2 (fr) 2008-05-08 2009-11-12 Avancis Gmbh & Co. Kg Dispositif et procédé de régulation de température d'objets dans une chambre de traitement
US20100015754A1 (en) * 2008-07-21 2010-01-21 Basol Bulent M Method and apparatus to form thin layers of photovoltaic absorbers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2991122A1 (fr) * 2014-08-25 2016-03-02 Sunshine PV Corp. Procédé de traitement thermique pour couche précurseur de composé semiconducteur
US10053364B2 (en) 2014-08-25 2018-08-21 Sunshine Pv Corporation Heat treatment method and the product prepared therefrom

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DE102010018595A1 (de) 2011-10-27

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