WO2011122182A1 - Anti-fuse module - Google Patents

Anti-fuse module Download PDF

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Publication number
WO2011122182A1
WO2011122182A1 PCT/JP2011/054071 JP2011054071W WO2011122182A1 WO 2011122182 A1 WO2011122182 A1 WO 2011122182A1 JP 2011054071 W JP2011054071 W JP 2011054071W WO 2011122182 A1 WO2011122182 A1 WO 2011122182A1
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WO
WIPO (PCT)
Prior art keywords
antifuse
layer
voltage
antifuse element
electrostatic protection
Prior art date
Application number
PCT/JP2011/054071
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French (fr)
Japanese (ja)
Inventor
俊幸 中磯
竹島　裕
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株式会社村田製作所
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Publication of WO2011122182A1 publication Critical patent/WO2011122182A1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62—Protection against overvoltage, e.g. fuses, shunts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to an antifuse module including an antifuse element.
  • a general fuse blows when the voltage exceeds a certain level and cuts off the current.
  • an antifuse element has been proposed in which a short circuit occurs when a voltage exceeds a certain level and current flows.
  • liquid crystal display devices and various lighting devices electronic components such as a number of light emitting diodes (LEDs) are mounted as light emitting sources.
  • the antifuse element is used in a circuit in which a large number of these electronic components are connected in series and electrically connected to each electronic component in parallel.
  • This antifuse element is in an insulated state when the electronic component is operating normally. When a specific electronic component is disconnected due to its life or the like and an open failure occurs, the antifuse element is short-circuited and becomes conductive. And it can avoid that other electronic components stop operation
  • Patent Document 1 discloses an antifuse element as shown in FIG.
  • the antifuse element 100 of FIG. 5 includes a substrate 111, an adhesion layer 112, a lower electrode layer 121, an insulating layer 122, an upper electrode layer 123, a first inorganic protective layer 131, and a second inorganic protective layer.
  • 132, a first organic protective layer 133, a second organic protective layer 134, extraction electrodes 141 and 142, and mounting electrodes 143 and 144 are provided.
  • the mounting electrode 143 is electrically connected to the lower electrode layer 121 through the extraction electrode 141.
  • the mounting electrode 144 is electrically connected to the upper electrode layer 123 through the extraction electrode 142.
  • the mounting electrodes 143 and 144 are provided for mounting on a circuit board such as a printed board.
  • a voltage is applied between the mounting electrodes 143 and 144.
  • the insulating layer 122 breaks down. Then, due to the dielectric breakdown of the insulating layer 122, the lower electrode layer 121 and the upper electrode layer 123 are short-circuited and become conductive.
  • the mounting electrode of the antifuse element When mounting an antifuse element having a mounting electrode as in Patent Document 1 on a circuit board, for example, the mounting electrode of the antifuse element is installed on a land on the circuit board side. Then, the mounting electrode is fixed with solder or the like. At that time, if the circuit board has static electricity, the antifuse element may break down when the antifuse element comes into contact with the land of the circuit board.
  • the present invention has been made in view of the above problems, and an object thereof is to provide an antifuse module in which an antifuse element does not break down during mounting.
  • An antifuse module includes an insulating layer, a pair of electrode layers formed on the upper and lower surfaces of the insulating layer, and a mounting electrode electrically connected to each of the electrode layers. And an electrostatic protection element connected in parallel with the antifuse element.
  • the antifuse element and the electrostatic protection element are connected in parallel. Therefore, it is possible to prevent dielectric breakdown of the antifuse element due to static electricity during mounting.
  • the electrostatic protection element is a capacitor, and a dielectric breakdown voltage of the capacitor is larger than a breakdown voltage of the antifuse element due to static electricity.
  • the antifuse element will not malfunction when static electricity occurs.
  • the capacitor has a capacitance of 0.1 ⁇ F or more.
  • the applied voltage 4 kV in the human body model can be reduced to about 15 V.
  • the electrostatic protection element is a Zener diode
  • the Zener voltage of the Zener diode is larger than the operating voltage of the antifuse element, and is higher than the breakdown voltage of the antifuse element due to static electricity. Small is preferable.
  • the electrostatic protection element is a varistor
  • a varistor voltage of the varistor is larger than an operating voltage of the antifuse element and smaller than a breakdown voltage due to static electricity of the antifuse element. Is preferred.
  • the pair of electrode layers of the antifuse element is made of metal or an alloy thereof, and a capacitance between the pair of electrode layers is 15 nF or less, and the pair of electrode layers When a voltage equal to or higher than the operating voltage is applied for a certain period of time, the pair of electrode layers are preferably melted and short-circuited to become conductive.
  • the material of the insulating layer is (Ba, Sr) TiO 3
  • the material of the pair of electrode layers is gold, silver, platinum, palladium, rhodium, iridium, ruthenium, osmium. It is preferably a metal composed of at least one element selected from the group consisting of or an alloy thereof.
  • the material of the insulating layer is (Ba, Sr) TiO 3
  • the dielectric constant is about 400, and the design of the thickness and area of the insulating layer for obtaining desired characteristics becomes easy.
  • the material of the pair of electrode layers is a metal composed of at least one element selected from the group consisting of gold, silver, platinum, palladium, rhodium, iridium, ruthenium, and osmium or an alloy thereof, the pair of electrodes is Even when a current is passed for a long time after a short circuit, it is possible to prevent problems such as ball formation due to oxidation.
  • an antifuse element and an electrostatic protection element are connected in parallel. Therefore, for example, even when static electricity is generated during mounting and a high voltage is applied instantaneously, the voltage applied to the antifuse element can be further reduced. For this reason, it is possible to prevent dielectric breakdown of the antifuse element due to static electricity during mounting.
  • FIG. 1 is a cross-sectional view of an antifuse element 10 used in an antifuse module according to the present invention.
  • the antifuse element 10 is formed on the substrate 11 using, for example, a thin film formation process.
  • Examples of the material of the substrate 11 include a Si single crystal substrate.
  • an adhesion layer 12 On the substrate 11, an adhesion layer 12, a lower electrode layer 21, an insulating layer 22, an upper electrode layer 23, and a first inorganic protective film 31 are sequentially laminated.
  • the lower electrode layer 21 and the upper electrode layer 23 are formed on the upper and lower surfaces of the insulating layer 22.
  • the adhesion layer 12 is formed in order to achieve adhesion between the substrate 11 and the lower electrode layer 21.
  • the same material as that of the insulating layer 22 is used for the adhesion layer 12, there is an advantage that the manufacturing is simplified.
  • a metal material is used for the lower electrode layer 21 and the upper electrode layer 23.
  • a current flows through the antifuse element 10 for a long time after the short circuit.
  • a noble metal for the lower electrode layer 21 and the upper electrode layer 23 in order to prevent problems such as a resistance increase due to oxidation.
  • gold, silver, platinum, palladium, rhodium, iridium, ruthenium, or osmium is used alone or in an alloy.
  • the insulating layer 22 exhibits a property such that when a constant voltage equal to or higher than the operating voltage is applied between the lower electrode layer 21 and the upper electrode layer 23, the dielectric layer breaks down and short-circuits the lower electrode layer 21 and the upper electrode layer 23. Things are good.
  • the material of the insulating layer 22 includes, for example, (Ba, Sr) TiO 3 . Further, as the material of the insulating layer 22, it is possible to use SiO 2 , SiN x , Al 2 O 3 , or TiO 2 . These materials are cheaper than (Ba, Sr) TiO 3 and have high moisture resistance in an insulating state. Therefore, the first inorganic protective layer 31 and the second inorganic protective layer 32 described later can be omitted, and low-cost production is possible.
  • low resistance Si in the Si substrate may be used as the lower electrode layer 21 and a SiO 2 oxide layer on the Si substrate may be used as the insulating layer 22.
  • a material that can make ohmic contact with the Si substrate may be used for the upper electrode layer 23.
  • an Au / Sb layer or an Al layer is preferable for an n-type Si substrate.
  • the first inorganic protective layer 31 is formed in order to reduce the leakage current.
  • the same material as that of the insulating layer 22 is used for the first inorganic protective layer 31, there is an advantage that the manufacturing is simplified.
  • the adhesion layer 12, the lower electrode layer 21, the insulating layer 22, the upper electrode layer 23, and the first inorganic protective layer 31 are covered with a second inorganic protective layer 32 and a first organic protective layer 33.
  • the second inorganic protective layer 32 and the first organic protective layer 33 are formed to prevent moisture from entering.
  • Examples of the material of the second inorganic protective layer 32 include SiN x , SiO 2 , Al 2 O 3 , and TiO 2 .
  • a polyimide resin and an epoxy resin are mentioned, for example.
  • the extraction electrodes 41 and 42 are formed on the first organic protective layer 33.
  • the extraction electrodes 41 and 42 are formed so as to penetrate the second inorganic protective layer 32 and the first organic protective layer 33.
  • the second organic protective layer 34 is formed so as to cover the second inorganic protective layer 32 and the first organic protective layer 33. Even when the first inorganic protective layer 33 and the second inorganic protective layer 32 are peeled off due to the dielectric breakdown of the insulating layer 22, for example, the sealing is performed by the second organic protective layer 34. Can do.
  • the material of the second organic protective layer 34 is, for example, a polyimide resin or an epoxy resin, like the first organic protective layer 33.
  • the second organic protective layer 34 is formed so that the mounting electrodes 43 and 44 are exposed on the surface of the antifuse element 10.
  • the mounting electrode 43 is electrically connected to the lower electrode layer 21 through the extraction electrode 41.
  • the mounting electrode 44 is electrically connected to the upper electrode layer 23 through the extraction electrode 42.
  • an oxide layer may be formed on the surface of the substrate 11 for the purpose of suppressing mutual diffusion with the adhesion layer 12.
  • the oxide layer is formed, for example, by heat treating the substrate 11.
  • the operating principle of the antifuse element 10 is as follows.
  • the mounting electrodes 43 and 44 of the antifuse element 10 are electrically connected in parallel with each electronic component in a circuit in which a large number of electronic components such as LEDs are connected in series.
  • the antifuse element 10 is in an insulated state when the electronic component is performing a normal operation.
  • a voltage is applied between the mounting electrodes 43 and 44.
  • the insulating layer 22 breaks down.
  • the lower electrode layer 21 and the upper electrode layer 23 are short-circuited and become conductive.
  • the antifuse element 10 becomes conductive due to dielectric breakdown of the insulating layer 22.
  • the voltage application time differs between the voltage applied when the electronic component has an open failure and the instantaneous high voltage due to static electricity. Therefore, the breakdown voltage due to static electricity of the antifuse element 10 is generally larger than the operating voltage of the antifuse element 10.
  • the breakdown voltage due to static electricity of the anti-fuse element 10 having an operating voltage of 20V is 25V.
  • the antifuse module according to the present invention is manufactured, for example, by the following process.
  • 2 to 4 are views showing a manufacturing process of the antifuse module according to the present invention.
  • 2A to 4A are top views.
  • FIGS. 2 to 4B are bottom views.
  • 2C is a cross-sectional view taken along line AA of FIG. 2A to FIG. 4A.
  • 2D to 4D are cross-sectional views taken along the line BB of FIG. 2A to FIG. 4A.
  • a wiring board 72 is prepared in which connection wirings 61 and 62 and external connection terminals 65 and 66 are patterned on the surface in advance.
  • the through-hole electrode 63 electrically connects the connection wiring 61 and the external connection terminal 65.
  • the through-hole electrode 64 electrically connects the connection wiring 62 and the external connection terminal 66.
  • Examples of the material of the wiring board 72 include a glass epoxy board.
  • copper is mentioned, for example.
  • the antifuse element 10 and the electrostatic protection element 50 are mounted on the connection wirings 61 and 62. Specifically, a solder paste (not shown) is printed on the connection wirings 61 and 62. Then, mounting electrodes (not shown) of the antifuse element 10 and terminals of the electrostatic protection element 50 are installed on the connection wirings 61 and 62 on which the solder paste is printed, and soldering is performed by heating in a reflow furnace. The electrostatic protection element 50 is mounted on the connection wirings 61 and 62 so as to be electrically connected to the antifuse element 10 in parallel.
  • the mounted antifuse element 10 and the electrostatic protection element 50 are covered with a cover layer 71 to obtain the antifuse module 1.
  • the cover layer 71 is provided to physically protect the antifuse element 10 and the electrostatic protection element 50 and to smooth the surface of the antifuse module 1.
  • Examples of the material of the cover layer 71 include a thermosetting resin such as an epoxy resin.
  • the antifuse element 10 and the electrostatic protection element 50 are electrically connected to the external connection terminals 65 and 66.
  • the external connection terminals 65 and 66 are provided on the lower surface of the antifuse module 1.
  • the antifuse module 1 is electrically connected in parallel with electronic components on a circuit board, for example.
  • the external connection terminals 65 and 66 are mounted on the land on the circuit board side with solder or the like.
  • the electrostatic protection element 50 is for protecting the antifuse element 10 when a high voltage is momentarily applied due to static electricity, for example.
  • Examples of the electrostatic protection element 50 include a capacitor, a Zener diode, and a varistor.
  • the electrostatic protection element 50 is a capacitor
  • the instantaneous high voltage peak applied to the antifuse element 10 can be blunted by the impedance of the capacitor.
  • the larger the capacitance of the capacitor the more prominent the effect of peak blunting.
  • the dielectric breakdown voltage of the capacitor is preferably larger than the breakdown voltage due to static electricity of the antifuse element 10.
  • the capacitor breaks down first when static electricity is applied, and a high voltage is applied to the antifuse element 10. End up. As a result, the antifuse element 10 may also break down.
  • the electrostatic protection element 50 may be a Zener diode. Even if a high voltage is momentarily applied to the antifuse module 1 due to static electricity, a large current flows through the Zener diode. This is because a voltage value higher than the Zener voltage is not applied to the antifuse element 10.
  • the Zener voltage of the Zener diode is preferably larger than the operating voltage of the antifuse element 10 and smaller than the breakdown voltage of the antifuse element 10 due to static electricity.
  • the Zener voltage is equal to or higher than the breakdown voltage due to static electricity of the antifuse element 10
  • the Zener voltage breaks down at the voltage value of the Zener voltage.
  • the Zener voltage is equal to or lower than the operating voltage of the anti-fuse element 10
  • an electronic component such as a light emitting diode connected in parallel with the anti-fuse module 1 causes an open defect after mounting described later, This is because the antifuse element 10 is not short-circuited.
  • the electrostatic protection element 50 may be a varistor. Even if a high voltage is momentarily applied to the antifuse module 1 due to static electricity, a large current flows through the varistor. This is because a voltage value higher than the varistor voltage is not applied to the antifuse element 10.
  • the varistor voltage of the varistor is larger than the operating voltage of the antifuse element 10 and smaller than the breakdown voltage of the antifuse element 10 due to static electricity.
  • the varistor voltage is equal to or higher than the breakdown voltage due to static electricity of the antifuse element 10
  • the antifuse element 10 breaks down at the voltage value of the varistor voltage.
  • the varistor voltage is equal to or lower than the operating voltage of the anti-fuse element 10
  • the anti-fuse element will not be short-circuited when an electronic component causes an open failure after mounting, as with the Zener diode.
  • the antifuse module according to the present invention when the antifuse module according to the present invention is mounted so as to be electrically connected in parallel with each electronic component in a circuit in which a large number of electronic components such as LEDs are connected in series, for example, only at the time of mounting.
  • the presence of the electrostatic protection element can prevent the dielectric breakdown of the anti-fuse element due to a surge voltage or the like in the circuit.
  • after mounting not only the antifuse element but also electronic components such as LEDs can be protected. That is, by using the antifuse module according to the present invention, it is possible to protect electronic components such as antifuse elements and LEDs from a sudden rise in voltage.
  • Si substrate Si single crystal substrate
  • Si oxide layer silicon oxide layer
  • an adhesion layer, a lower electrode layer, an insulating layer, an upper electrode layer, and a first inorganic protective layer were formed.
  • a barium strontium titanate ((Ba, Sr) TiO 3 , hereinafter referred to as “BST”) layer was formed as an adhesion layer by a chemical solution deposition (CSD) method.
  • CSD chemical solution deposition
  • a BST layer having a thickness of 45 nm was formed.
  • a 300 nm-thick platinum (hereinafter referred to as “Pt”) layer was formed on the adhesion layer by a sputtering method.
  • Pt 300 nm-thick platinum
  • a 90 nm thick BST layer was formed as an insulating layer on the Pt layer by the same method as the BST layer described above.
  • a 300-nm-thick Pt layer was formed as an upper electrode layer by the same method as the Pt layer described above.
  • a BST layer having a thickness of 90 nm was formed as a first inorganic protective layer by the same method as the BST layer described above.
  • the first inorganic protective layer, the upper electrode layer, the insulating layer, the lower electrode layer, and the adhesion layer were patterned.
  • the first inorganic protective layer and the upper electrode layer were patterned. That is, a resist was applied on the Pt layer as the upper electrode layer, and a resist pattern was formed by exposure and development. Then, after patterning into a predetermined shape by Ar ion milling, the resist was removed by ashing. After patterning the insulating layer, the lower electrode layer, and the adhesion layer by the same method, the resist was removed. And it heat-processed on 800 degreeC and the conditions for 30 minutes.
  • a second inorganic protective layer was formed so as to cover the upper surface and side surfaces of the exposed first inorganic protective layer, upper electrode layer, insulating layer, lower electrode layer, and adhesion layer.
  • an SiN x layer having a thickness of 300 nm was formed by a sputtering method.
  • the 1st organic protective layer was formed on the 2nd inorganic protective layer.
  • photosensitive polyimide was applied by spin coating, and was heated at 350 ° C. for 1 hour after exposure and development. In this way, a polyimide layer having a thickness of 2 ⁇ m was formed.
  • this first organic protective layer was used as a mask pattern, and the second inorganic protective layer was dry etched using CHF 3 gas. And the upper electrode layer and a part of lower electrode layer were exposed.
  • an extraction electrode was formed. Specifically, a Ti layer (layer thickness: 100 nm) and a Cu layer (layer thickness: 1000 nm) were continuously formed by magnetron sputtering. Thereafter, a resist pattern was formed by sequentially performing resist coating, exposure, and development. Then, using the resist pattern as a mask, the exposed Cu layer and Ti layer were patterned by Ar ion milling. In this way, an extraction electrode was formed.
  • a second organic protective layer was formed so that a part of the extraction electrode was exposed.
  • a polyimide layer having a thickness of 2 ⁇ m was obtained by spin-coating photosensitive polyimide and sequentially performing exposure, development, and curing.
  • a mounting electrode was formed on the exposed portion of the extraction electrode using the second organic protective layer as a solder resist. Specifically, an Ni layer having a thickness of 2 ⁇ m and an Au layer having a thickness of 0.1 ⁇ m were formed by electroless plating in the opening of the resist pattern.
  • the substrate was cut using a dicing saw, and a 0.6 ⁇ 0.3 ⁇ 0.3 mm chip-shaped antifuse element was taken out.
  • the characteristics of the antifuse element manufactured as described above were measured.
  • the resistance before the short circuit was 1 M ⁇ or more, and the resistance after the short circuit was 5 ⁇ or less.
  • the operating voltage at which the antifuse element is short-circuited was 20V.
  • the breakdown voltage due to static electricity was 25V.
  • the effective electrode area was 0.3 mm 2 .
  • the capacitance was 12 nF.
  • an antifuse module was produced using the antifuse element produced as described above.
  • a capacitor was used as the electrostatic protection element.
  • the capacitance of the capacitor was 0.1 ⁇ F.
  • the size of the capacitor was 0.6 ⁇ 0.3 ⁇ 0.3 mm.
  • a wiring board provided with external connection terminals and connection wiring in advance on the surface was prepared.
  • the material of the wiring board was glass epoxy resin, and FR-4 was used.
  • an anti-fuse element and an electrostatic protection element were mounted on the connection wiring. Specifically, first, a solder paste was printed on the connection wiring. And the mounting electrode of the antifuse element and the terminal of the electrostatic protection element were installed on the connection wiring on which the solder paste was printed. And it soldered by heating with a reflow furnace.
  • a cover layer was formed so as to cover the antifuse element and the electrostatic protection element.
  • the material of the cover layer was an epoxy resin. Then, a heat treatment was performed in an oven at 150 ° C. for 60 minutes to cure the cover layer.
  • the antifuse module manufactured as described above was designated as Experimental Example 1. And the antifuse element which has not connected the electrostatic protection element was made into the comparative example 1. The characteristics of the samples of Experimental Example 1 and Comparative Example 1 were compared. Specifically, a withstand voltage test was performed on a machine model and a human body model.
  • the machine model is a model that discharges when a charge charged on a metal device touches a sample, and applies a voltage to the sample in a pulsed manner.
  • the human body model is a model that discharges when a charge charged on the human body touches the sample.
  • the human body model assumes a higher voltage than the machine model.
  • the withstand voltage test was started from 0.2 kV, and when the resistance deterioration of one digit or more was not observed in the sample, the test was repeated by increasing the test voltage by 0.2 kV up to 1.0 kV. After 1.0 kV, tests were performed in the order of 2.0 kV, 4.0 kV, and 8.0 kV.
  • the maximum value of the test voltage at which no single-digit or more resistance deterioration was observed in all measurement samples was taken as the withstand voltage.
  • the maximum value of the test voltage was 8.0 kV.
  • Table 1 shows the results of the withstand voltage test.
  • Example 2 an antifuse element was manufactured using a 50 nm thick SiN x layer as the insulating layer. And the antifuse element was produced by the method similar to Experimental example 1 except having omitted the 1st inorganic protective layer and the 2nd inorganic protective layer. Since the SiN x layer is in an insulating state and has high moisture resistance, the first inorganic protective layer and the second inorganic protective layer can be omitted, and manufacturing at low cost is possible.
  • the SiN x layer was formed by magnetron sputtering. In this case, it is possible to continuously form the lower electrode layer, the insulating layer, and the upper electrode layer as compared with Experimental Example 1, and it is possible to manufacture at a lower cost.
  • the operating voltage of the antifuse element fabricated in Experimental Example 2 was 25V.
  • an antifuse module was produced in the same manner as in Experimental Example 1.
  • the electrostatic protection element the same capacitor as in Experimental Example 1 was used.
  • the antifuse module manufactured as described above was defined as Experimental Example 2.
  • the antifuse element which has not connected the electrostatic protection element was made into the comparative example 2.
  • the antifuse module according to the present invention is not limited to being used by being electrically connected in parallel with each electronic component in a circuit in which a large number of electronic components are connected in series.
  • the antifuse module is electrically connected to the secondary battery and the power supply circuit in parallel.
  • an antifuse element in the antifuse module can be preferentially short-circuited to use the secondary battery and the power supply circuit.

Abstract

Disclosed is an anti-fuse module wherein an anti-fuse element does not break down when the anti-fuse module is mounted. The anti-fuse module is provided with: the anti-fuse element (10), which is provided with an insulating layer, a pair of electrode layers formed on the upper and lower surfaces of the insulating layer, and a mounting electrode electrically connected to each of the electrode layers; and an electrostatic protection element (50), which is connected in parallel to the anti-fuse element (10).

Description

アンチヒューズモジュールAntifuse module
　本発明は、アンチヒューズ素子を備えるアンチヒューズモジュールに関する。 The present invention relates to an antifuse module including an antifuse element.
　一般的なヒューズは一定以上の電圧になると切れ、電流を遮断する。これとは逆に、一定以上の電圧になると短絡し、電流が流れるようになるアンチヒューズ素子が提案されている。 一般 A general fuse blows when the voltage exceeds a certain level and cuts off the current. On the other hand, an antifuse element has been proposed in which a short circuit occurs when a voltage exceeds a certain level and current flows.
　液晶表示装置や各種照明装置には、発光源として多数の発光ダイオード（ＬＥＤ；Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）等の電子部品が搭載されている。アンチヒューズ素子はこれらの電子部品が多数直列接続されている回路において、各電子部品と電気的に並列に接続して使用される。 In liquid crystal display devices and various lighting devices, electronic components such as a number of light emitting diodes (LEDs) are mounted as light emitting sources. The antifuse element is used in a circuit in which a large number of these electronic components are connected in series and electrically connected to each electronic component in parallel.
　このアンチヒューズ素子は、電子部品が通常動作を行っているときは絶縁状態である。特定の電子部品が寿命等により断線して開放不良を起こしたときに、アンチヒューズ素子が短絡して導通状態になる。そして、他の電子部品が動作停止するのを回避することができる。 This antifuse element is in an insulated state when the electronic component is operating normally. When a specific electronic component is disconnected due to its life or the like and an open failure occurs, the antifuse element is short-circuited and becomes conductive. And it can avoid that other electronic components stop operation | movement.
　例えば、特許文献１には、図５のようなアンチヒューズ素子が開示されている。図５のアンチヒューズ素子１００は、基板１１１と、密着層１１２と、下部電極層１２１と、絶縁層１２２と、上部電極層１２３と、第１の無機保護層１３１と、第２の無機保護層１３２と、第１の有機保護層１３３と、第２の有機保護層１３４と、引出電極１４１、１４２と、実装電極１４３、１４４と、を備えている。実装電極１４３は、引出電極１４１を介して下部電極層１２１と電気的に接続されている。また、実装電極１４４は、引出電極１４２を介して上部電極層１２３と電気的に接続されている。実装電極１４３、１４４は、プリント基板等の回路基板に実装されるために設けられる。電子部品が断線等により開放不良を起こした場合、実装電極１４３と１４４との間に電圧が印加される。そして、実装電極１４３と１４４との間に動作電圧以上の電圧が、一定の時間印加された場合に、絶縁層１２２が絶縁破壊する。そして絶縁層１２２の絶縁破壊により、下部電極層１２１と上部電極層１２３とが短絡して、導通状態になる。 For example, Patent Document 1 discloses an antifuse element as shown in FIG. The antifuse element 100 of FIG. 5 includes a substrate 111, an adhesion layer 112, a lower electrode layer 121, an insulating layer 122, an upper electrode layer 123, a first inorganic protective layer 131, and a second inorganic protective layer. 132, a first organic protective layer 133, a second organic protective layer 134, extraction electrodes 141 and 142, and mounting electrodes 143 and 144 are provided. The mounting electrode 143 is electrically connected to the lower electrode layer 121 through the extraction electrode 141. In addition, the mounting electrode 144 is electrically connected to the upper electrode layer 123 through the extraction electrode 142. The mounting electrodes 143 and 144 are provided for mounting on a circuit board such as a printed board. When the electronic component causes an open failure due to disconnection or the like, a voltage is applied between the mounting electrodes 143 and 144. When a voltage higher than the operating voltage is applied between the mounting electrodes 143 and 144 for a certain period of time, the insulating layer 122 breaks down. Then, due to the dielectric breakdown of the insulating layer 122, the lower electrode layer 121 and the upper electrode layer 123 are short-circuited and become conductive.
特開２００９－２６７２９３号公報JP 2009-267293 A
　特許文献１のような実装電極を備えるアンチヒューズ素子を回路基板に実装する場合には、例えばアンチヒューズ素子の実装電極を、回路基板側のランド上に設置する。そして、実装電極をはんだ等で固定する。その際、回路基板が静電気を有する場合には、アンチヒューズ素子と回路基板のランドとの接触時に、アンチヒューズ素子が絶縁破壊する恐れがあった。 When mounting an antifuse element having a mounting electrode as in Patent Document 1 on a circuit board, for example, the mounting electrode of the antifuse element is installed on a land on the circuit board side. Then, the mounting electrode is fixed with solder or the like. At that time, if the circuit board has static electricity, the antifuse element may break down when the antifuse element comes into contact with the land of the circuit board.
　本発明は、かかる課題に鑑み、実装時にアンチヒューズ素子が絶縁破壊することのないアンチヒューズモジュールを提供することを目的とする。 The present invention has been made in view of the above problems, and an object thereof is to provide an antifuse module in which an antifuse element does not break down during mounting.
　本発明に係るアンチヒューズモジュールは、絶縁層と、前記絶縁層の上下面に形成された一対の電極層と、前記電極層の各々と電気的に接続された実装電極と、を備えるアンチヒューズ素子と、前記アンチヒューズ素子と並列に接続された静電気保護素子と、を備えることを特徴としている。 An antifuse module according to the present invention includes an insulating layer, a pair of electrode layers formed on the upper and lower surfaces of the insulating layer, and a mounting electrode electrically connected to each of the electrode layers. And an electrostatic protection element connected in parallel with the antifuse element.
　本発明の構造では、アンチヒューズ素子と静電気保護素子とが並列に接続されている。したがって、実装時の静電気によるアンチヒューズ素子の絶縁破壊を防ぐことが可能となる。 In the structure of the present invention, the antifuse element and the electrostatic protection element are connected in parallel. Therefore, it is possible to prevent dielectric breakdown of the antifuse element due to static electricity during mounting.
　また、本発明に係るアンチヒューズモジュールは、前記静電気保護素子がコンデンサであり、前記コンデンサの絶縁破壊電圧が前記アンチヒューズ素子の静電気による破壊電圧よりも大きいことが好ましい。 In the antifuse module according to the present invention, it is preferable that the electrostatic protection element is a capacitor, and a dielectric breakdown voltage of the capacitor is larger than a breakdown voltage of the antifuse element due to static electricity.
　かかる場合には、静電気の発生時に、アンチヒューズ素子が誤動作することがない。 In such a case, the antifuse element will not malfunction when static electricity occurs.
　また、本発明に係るアンチヒューズモジュールは、前記コンデンサの静電容量が０．１μＦ以上であることが好ましい。 In the antifuse module according to the present invention, it is preferable that the capacitor has a capacitance of 0.1 μF or more.
　かかる場合には、ヒューマンボディモデルにおける印加電圧４ｋＶを１５Ｖ程度にまで低減することが可能になる。 In such a case, the applied voltage 4 kV in the human body model can be reduced to about 15 V.
　また、本発明に係るアンチヒューズモジュールは、前記静電気保護素子がツェナーダイオードであり、前記ツェナーダイオードのツェナー電圧が前記アンチヒューズ素子の動作電圧よりも大きく、前記アンチヒューズ素子の静電気による破壊電圧よりも小さいことが好ましい。 Further, in the antifuse module according to the present invention, the electrostatic protection element is a Zener diode, the Zener voltage of the Zener diode is larger than the operating voltage of the antifuse element, and is higher than the breakdown voltage of the antifuse element due to static electricity. Small is preferable.
　かかる場合には、静電気の発生時に、ツェナーダイオードに電流が流れて、アンチヒューズ素子が誤動作して絶縁破壊することがない。 In such a case, when static electricity occurs, a current flows through the Zener diode, and the antifuse element does not malfunction and break down.
　また、本発明に係るアンチヒューズモジュールは、前記静電気保護素子がバリスタであり、前記バリスタのバリスタ電圧が前記アンチヒューズ素子の動作電圧よりも大きく、前記アンチヒューズ素子の静電気による破壊電圧よりも小さいことが好ましい。 In the antifuse module according to the present invention, the electrostatic protection element is a varistor, and a varistor voltage of the varistor is larger than an operating voltage of the antifuse element and smaller than a breakdown voltage due to static electricity of the antifuse element. Is preferred.
　かかる場合には、静電気の発生時に、バリスタに電流が流れて、アンチヒューズ素子が誤動作して絶縁破壊することがない。 In such a case, when static electricity occurs, a current flows through the varistor, and the antifuse element does not malfunction and break down.
　また、本発明に係るアンチヒューズモジュールは、前記アンチヒューズ素子の前記一対の電極層が金属またはその合金からなるとともに、前記一対の電極層間の静電容量が１５ｎＦ以下であり、前記一対の電極層間に動作電圧以上の電圧が一定の時間印加された場合に、前記一対の電極層が溶融し、短絡して導通状態になるものであることが好ましい。 In the antifuse module according to the present invention, the pair of electrode layers of the antifuse element is made of metal or an alloy thereof, and a capacitance between the pair of electrode layers is 15 nF or less, and the pair of electrode layers When a voltage equal to or higher than the operating voltage is applied for a certain period of time, the pair of electrode layers are preferably melted and short-circuited to become conductive.
　かかる場合には、一対の電極層の金属又はその合金が溶融により短絡しているので、短絡後、その状態が維持される。したがって、大電流が通電した時も低抵抗であり、短絡後の抵抗値も安定する。また、静電容量が１５ｎＦ以下であるため、電圧が印加されてから短絡までの反応時間をより短くすることができ、電子部品が断線等により開放不良を起こした場合、より早く導通状態にすることが可能となる。 In such a case, since the metal of the pair of electrode layers or the alloy thereof is short-circuited by melting, the state is maintained after the short-circuit. Therefore, even when a large current is applied, the resistance is low, and the resistance value after a short circuit is stable. In addition, since the capacitance is 15 nF or less, the reaction time from when a voltage is applied to the short circuit can be shortened, and when an electronic component causes an open failure due to disconnection or the like, it becomes conductive earlier. It becomes possible.
　また、本発明に係るアンチヒューズモジュールは、前記絶縁層の材質が（Ｂａ，Ｓｒ）ＴｉＯ3であり、前記一対の電極層の材質が金、銀、白金、パラジウム、ロジウム、イリジウム、ルテニウム、オスミウムからなる群より選ばれる少なくとも一種の元素で構成される金属又はその合金であることが好ましい。 In the antifuse module according to the present invention, the material of the insulating layer is (Ba, Sr) TiO 3 , and the material of the pair of electrode layers is gold, silver, platinum, palladium, rhodium, iridium, ruthenium, osmium. It is preferably a metal composed of at least one element selected from the group consisting of or an alloy thereof.
　かかる場合には、絶縁層の材質が（Ｂａ，Ｓｒ）ＴｉＯ3であるので、誘電率が４００程度であり、所望の特性を得るための絶縁層の厚さや面積等の設計が容易となる。また、一対の電極層の材質が金、銀、白金、パラジウム、ロジウム、イリジウム、ルテニウム、オスミウムからなる群より選ばれる少なくとも一種の元素で構成される金属又はその合金であるので、一対の電極が短絡した後に長時間電流を流す場合であっても、酸化による玉化等の不具合を防ぐことが可能となる。 In this case, since the material of the insulating layer is (Ba, Sr) TiO 3 , the dielectric constant is about 400, and the design of the thickness and area of the insulating layer for obtaining desired characteristics becomes easy. Further, since the material of the pair of electrode layers is a metal composed of at least one element selected from the group consisting of gold, silver, platinum, palladium, rhodium, iridium, ruthenium, and osmium or an alloy thereof, the pair of electrodes is Even when a current is passed for a long time after a short circuit, it is possible to prevent problems such as ball formation due to oxidation.
　本発明に係るアンチヒューズモジュールは、アンチヒューズ素子と静電気保護素子とが並列に接続されている。したがって、例えば実装時に静電気が発生して瞬間的に高電圧が印加されたとしても、アンチヒューズ素子に印加される電圧をより低くすることができる。そのため、実装時の静電気によるアンチヒューズ素子の絶縁破壊を防ぐことが可能となる。 In the antifuse module according to the present invention, an antifuse element and an electrostatic protection element are connected in parallel. Therefore, for example, even when static electricity is generated during mounting and a high voltage is applied instantaneously, the voltage applied to the antifuse element can be further reduced. For this reason, it is possible to prevent dielectric breakdown of the antifuse element due to static electricity during mounting.
本発明に係るアンチヒューズモジュールに用いられるアンチヒューズ素子の断面図である。It is sectional drawing of the antifuse element used for the antifuse module which concerns on this invention. 本発明に係るアンチヒューズモジュールの製造方法において、配線基板を用意する工程を示す図である。It is a figure which shows the process of preparing a wiring board in the manufacturing method of the antifuse module which concerns on this invention. 本発明に係るアンチヒューズモジュールの製造方法において、アンチヒューズ素子と静電気保護素子とを実装する工程を示す図である。It is a figure which shows the process of mounting an antifuse element and an electrostatic protection element in the manufacturing method of the antifuse module which concerns on this invention. 本発明に係るアンチヒューズモジュールの製造方法において、カバー層を被覆する工程を示す図である。It is a figure which shows the process of coat | covering a cover layer in the manufacturing method of the antifuse module which concerns on this invention. 従来のアンチヒューズ素子の断面図である。It is sectional drawing of the conventional antifuse element.
　以下において、本発明を実施するための形態について説明する。 Hereinafter, embodiments for carrying out the present invention will be described.
　図１は本発明に係るアンチヒューズモジュールに用いられるアンチヒューズ素子１０の断面図である。アンチヒューズ素子１０は、基板１１上に、例えば薄膜形成プロセスを用いて形成される。基板１１の材質としては、例えばＳｉ単結晶基板が挙げられる。 FIG. 1 is a cross-sectional view of an antifuse element 10 used in an antifuse module according to the present invention. The antifuse element 10 is formed on the substrate 11 using, for example, a thin film formation process. Examples of the material of the substrate 11 include a Si single crystal substrate.
　基板１１の上には、密着層１２、下部電極層２１、絶縁層２２、上部電極層２３、第１の無機保護膜３１が順次積層されている。下部電極層２１と上部電極層２３とは、絶縁層２２の上下面に形成される。 On the substrate 11, an adhesion layer 12, a lower electrode layer 21, an insulating layer 22, an upper electrode layer 23, and a first inorganic protective film 31 are sequentially laminated. The lower electrode layer 21 and the upper electrode layer 23 are formed on the upper and lower surfaces of the insulating layer 22.
　密着層１２は、基板１１と下部電極層２１との密着をとるために形成される。密着層１２に絶縁層２２と同じ材料を用いた場合には、製造が簡単になる利点を有する。 The adhesion layer 12 is formed in order to achieve adhesion between the substrate 11 and the lower electrode layer 21. When the same material as that of the insulating layer 22 is used for the adhesion layer 12, there is an advantage that the manufacturing is simplified.
　下部電極層２１と上部電極層２３には、金属材料を用いる。アンチヒューズ素子１０には、短絡した後に長時間電流が流れることになる。その場合であっても、酸化による抵抗上昇等の不具合を防ぐため、下部電極層２１と上部電極層２３には貴金属を用いることが好ましい。例えば、金、銀、白金、パラジウム、ロジウム、イリジウム、ルテニウム、オスミウムを、単体又は合金で用いる。 A metal material is used for the lower electrode layer 21 and the upper electrode layer 23. A current flows through the antifuse element 10 for a long time after the short circuit. Even in this case, it is preferable to use a noble metal for the lower electrode layer 21 and the upper electrode layer 23 in order to prevent problems such as a resistance increase due to oxidation. For example, gold, silver, platinum, palladium, rhodium, iridium, ruthenium, or osmium is used alone or in an alloy.
　絶縁層２２は、下部電極層２１と上部電極層２３の間に動作電圧以上の一定の電圧が印加されると絶縁破壊され、下部電極層２１と上部電極層２３を短絡させるような性質を示すものが良い。かかる要求を満たすため、絶縁層２２の材質としては、例えば（Ｂａ，Ｓｒ）ＴｉＯ3が挙げられる。また、絶縁層２２の材質として、ＳｉＯ2、ＳｉＮx、Ａｌ2Ｏ3、ＴｉＯ2を用いることも可能である。これらの材質は（Ｂａ，Ｓｒ）ＴｉＯ3に比べて安価であり、絶縁状態での耐湿性が高い。したがって後述する第１の無機保護層３１や第２の無機保護層３２を省略することができ、低コストの製造が可能となる。 The insulating layer 22 exhibits a property such that when a constant voltage equal to or higher than the operating voltage is applied between the lower electrode layer 21 and the upper electrode layer 23, the dielectric layer breaks down and short-circuits the lower electrode layer 21 and the upper electrode layer 23. Things are good. In order to satisfy this requirement, the material of the insulating layer 22 includes, for example, (Ba, Sr) TiO 3 . Further, as the material of the insulating layer 22, it is possible to use SiO 2 , SiN x , Al 2 O 3 , or TiO 2 . These materials are cheaper than (Ba, Sr) TiO 3 and have high moisture resistance in an insulating state. Therefore, the first inorganic protective layer 31 and the second inorganic protective layer 32 described later can be omitted, and low-cost production is possible.
　また、更に構造を簡略化するために、下部電極層２１としてＳｉ基板中の低抵抗Ｓｉを用いて、絶縁層２２としてＳｉ基板上のＳｉＯ2酸化物層を用いても良い。この場合には、上部電極層２３として、Ｓｉ基板とのオーミックコンタクトをとることができる材料を用いれば良い。例えば、ｎ型Ｓｉ基板に対しては、Ａｕ／Ｓｂ層やＡｌ層が好ましい。 In order to further simplify the structure, low resistance Si in the Si substrate may be used as the lower electrode layer 21 and a SiO 2 oxide layer on the Si substrate may be used as the insulating layer 22. In this case, a material that can make ohmic contact with the Si substrate may be used for the upper electrode layer 23. For example, an Au / Sb layer or an Al layer is preferable for an n-type Si substrate.
　第１の無機保護層３１は、リーク電流を低減するために形成される。第１の無機保護層３１に絶縁層２２と同じ材料を用いた場合には、製造が簡単になる利点を有する。 The first inorganic protective layer 31 is formed in order to reduce the leakage current. When the same material as that of the insulating layer 22 is used for the first inorganic protective layer 31, there is an advantage that the manufacturing is simplified.
　密着層１２、下部電極層２１、絶縁層２２、上部電極層２３、及び第１の無機保護層３１は、第２の無機保護層３２と第１の有機保護層３３とで覆われている。第２の無機保護層３２と第１の有機保護層３３とは、水分の浸入を防ぐために形成される。第２の無機保護層３２の材質としては、例えばＳｉＮx、ＳｉＯ2、Ａｌ2Ｏ3、ＴｉＯ2が挙げられる。また、第１の有機保護層３３の材質としては、例えばポリイミド樹脂やエポキシ樹脂が挙げられる。 The adhesion layer 12, the lower electrode layer 21, the insulating layer 22, the upper electrode layer 23, and the first inorganic protective layer 31 are covered with a second inorganic protective layer 32 and a first organic protective layer 33. The second inorganic protective layer 32 and the first organic protective layer 33 are formed to prevent moisture from entering. Examples of the material of the second inorganic protective layer 32 include SiN x , SiO 2 , Al 2 O 3 , and TiO 2 . Moreover, as a material of the 1st organic protective layer 33, a polyimide resin and an epoxy resin are mentioned, for example.
　引出電極４１、４２は、第１の有機保護層３３上に形成されている。引出電極４１、４２は第２の無機保護層３２と第１の有機保護層３３とを貫通するように形成されている。 The extraction electrodes 41 and 42 are formed on the first organic protective layer 33. The extraction electrodes 41 and 42 are formed so as to penetrate the second inorganic protective layer 32 and the first organic protective layer 33.
　第２の有機保護層３４は、第２の無機保護層３２と第１の有機保護層３３とを覆うように形成される。絶縁層２２の絶縁破壊に起因して、例えば第１の無機保護層３３と第２の無機保護層３２との層間の剥離が生じた場合でも、第２の有機保護層３４により封止することができる。第２の有機保護層３４の材質は、第１の有機保護層３３と同様に、例えばポリイミド樹脂やエポキシ樹脂が挙げられる。第２の有機保護層３４は、実装電極４３、４４がアンチヒューズ素子１０の表面に露出するように形成されている。実装電極４３は引出電極４１を介して下部電極層２１と電気的に接続されている。また、実装電極４４は引出電極４２を介して上部電極層２３と電気的に接続されている。 The second organic protective layer 34 is formed so as to cover the second inorganic protective layer 32 and the first organic protective layer 33. Even when the first inorganic protective layer 33 and the second inorganic protective layer 32 are peeled off due to the dielectric breakdown of the insulating layer 22, for example, the sealing is performed by the second organic protective layer 34. Can do. The material of the second organic protective layer 34 is, for example, a polyimide resin or an epoxy resin, like the first organic protective layer 33. The second organic protective layer 34 is formed so that the mounting electrodes 43 and 44 are exposed on the surface of the antifuse element 10. The mounting electrode 43 is electrically connected to the lower electrode layer 21 through the extraction electrode 41. The mounting electrode 44 is electrically connected to the upper electrode layer 23 through the extraction electrode 42.
　なお、基板１１の表面には密着層１２との相互拡散を抑制する目的で、酸化物層が形成されていても良い。酸化物層は、例えば基板１１を熱処理することで形成される。 It should be noted that an oxide layer may be formed on the surface of the substrate 11 for the purpose of suppressing mutual diffusion with the adhesion layer 12. The oxide layer is formed, for example, by heat treating the substrate 11.
　アンチヒューズ素子１０の動作原理は下記の通りである。アンチヒューズ素子１０の実装電極４３と４４は、例えばＬＥＤ等の電子部品が多数直列接続されている回路において、各電子部品と電気的に並列に接続される。このアンチヒューズ素子１０は、電子部品が通常動作を行っているときは絶縁状態にある。電子部品が断線等により開放不良を起こした場合、実装電極４３と４４との間に電圧が印加される。そして、実装電極４３と４４との間に動作電圧以上の電圧が、一定の時間印加された場合に、絶縁層２２が絶縁破壊する。そして絶縁層２２の絶縁破壊により、下部電極層２１と上部電極層２３とが短絡して、導通状態になる。 The operating principle of the antifuse element 10 is as follows. The mounting electrodes 43 and 44 of the antifuse element 10 are electrically connected in parallel with each electronic component in a circuit in which a large number of electronic components such as LEDs are connected in series. The antifuse element 10 is in an insulated state when the electronic component is performing a normal operation. When an electronic component causes an open failure due to disconnection or the like, a voltage is applied between the mounting electrodes 43 and 44. Then, when a voltage higher than the operating voltage is applied between the mounting electrodes 43 and 44 for a certain period of time, the insulating layer 22 breaks down. Then, due to the dielectric breakdown of the insulating layer 22, the lower electrode layer 21 and the upper electrode layer 23 are short-circuited and become conductive.
　一方、アンチヒューズ素子１０に例えば静電気のように瞬間的に高電圧が印加された場合にも、絶縁層２２の絶縁破壊により導通状態になる。ところが、電子部品が開放不良を起こした場合に印加される電圧と、静電気による瞬間的な高電圧とでは、電圧の印加される時間が異なる。そのため、一般的に、アンチヒューズ素子１０の静電気による破壊電圧は、アンチヒューズ素子１０の動作電圧よりも大きい。例えば、動作電圧が２０Ｖのアンチヒューズ素子１０の静電気による破壊電圧は２５Ｖである。 On the other hand, even when a high voltage is momentarily applied to the antifuse element 10 such as static electricity, the antifuse element 10 becomes conductive due to dielectric breakdown of the insulating layer 22. However, the voltage application time differs between the voltage applied when the electronic component has an open failure and the instantaneous high voltage due to static electricity. Therefore, the breakdown voltage due to static electricity of the antifuse element 10 is generally larger than the operating voltage of the antifuse element 10. For example, the breakdown voltage due to static electricity of the anti-fuse element 10 having an operating voltage of 20V is 25V.
　本発明に係るアンチヒューズモジュールは、例えば以下の工程で作製される。図２～図４は、本発明に係るアンチヒューズモジュールの製造工程を示す図である。図２～図４の（Ａ）は上面図である。そして図２～図４の（Ｂ）は下面図である。そして、図２～図４の（Ｃ）は、図２～図４の（Ａ）のＡ－Ａ断面図である。そして、図２～図４の（Ｄ）は、図２～図４の（Ａ）のＢ－Ｂ断面図である。 The antifuse module according to the present invention is manufactured, for example, by the following process. 2 to 4 are views showing a manufacturing process of the antifuse module according to the present invention. 2A to 4A are top views. FIGS. 2 to 4B are bottom views. 2C is a cross-sectional view taken along line AA of FIG. 2A to FIG. 4A. 2D to 4D are cross-sectional views taken along the line BB of FIG. 2A to FIG. 4A.
　まず、図２のように、あらかじめ接続配線６１、６２や外部接続端子６５、６６が表面上にパターニングされた配線基板７２を用意する。スルーホール電極６３は、接続配線６１と外部接続端子６５とを電気的に接続している。また、スルーホール電極６４は、接続配線６２と外部接続端子６６とを電気的に接続している。配線基板７２の材質としては、例えばガラスエポキシ基板が挙げられる。また、接続配線６１、６２と外部接続端子６５、６６の材質としては、例えば銅が挙げられる。 First, as shown in FIG. 2, a wiring board 72 is prepared in which connection wirings 61 and 62 and external connection terminals 65 and 66 are patterned on the surface in advance. The through-hole electrode 63 electrically connects the connection wiring 61 and the external connection terminal 65. The through-hole electrode 64 electrically connects the connection wiring 62 and the external connection terminal 66. Examples of the material of the wiring board 72 include a glass epoxy board. Moreover, as a material of the connection wirings 61 and 62 and the external connection terminals 65 and 66, copper is mentioned, for example.
　その後、図３のように、接続配線６１、６２の上に、アンチヒューズ素子１０と静電気保護素子５０とを実装する。具体的には、接続配線６１、６２の上に、はんだペースト（図示せず）を印刷する。そして、はんだペーストが印刷された接続配線６１、６２上にアンチヒューズ素子１０の実装電極（図示せず）と静電気保護素子５０の端子とを設置し、リフロー炉で加熱してはんだ付けを行う。静電気保護素子５０は、接続配線６１、６２上に、アンチヒューズ素子１０と電気的に並列に接続されるように実装される。 Thereafter, as shown in FIG. 3, the antifuse element 10 and the electrostatic protection element 50 are mounted on the connection wirings 61 and 62. Specifically, a solder paste (not shown) is printed on the connection wirings 61 and 62. Then, mounting electrodes (not shown) of the antifuse element 10 and terminals of the electrostatic protection element 50 are installed on the connection wirings 61 and 62 on which the solder paste is printed, and soldering is performed by heating in a reflow furnace. The electrostatic protection element 50 is mounted on the connection wirings 61 and 62 so as to be electrically connected to the antifuse element 10 in parallel.
　その後、図４のように、実装されたアンチヒューズ素子１０と静電気保護素子５０とを、カバー層７１で被覆してアンチヒューズモジュール１を得る。カバー層７１は、アンチヒューズ素子１０と静電気保護素子５０とを物理的に保護するためと、アンチヒューズモジュール１の表面を平滑にするために設けられる。カバー層７１の材質としては、例えばエポキシ樹脂等の熱硬化性樹脂が挙げられる。アンチヒューズ素子１０と静電気保護素子５０は、外部接続端子６５、６６と電気的に接続されている。外部接続端子６５、６６は、アンチヒューズモジュール１の下面に設けられている。 Thereafter, as shown in FIG. 4, the mounted antifuse element 10 and the electrostatic protection element 50 are covered with a cover layer 71 to obtain the antifuse module 1. The cover layer 71 is provided to physically protect the antifuse element 10 and the electrostatic protection element 50 and to smooth the surface of the antifuse module 1. Examples of the material of the cover layer 71 include a thermosetting resin such as an epoxy resin. The antifuse element 10 and the electrostatic protection element 50 are electrically connected to the external connection terminals 65 and 66. The external connection terminals 65 and 66 are provided on the lower surface of the antifuse module 1.
　アンチヒューズモジュール１は例えば回路基板上に、電子部品と電気的に並列に接続される。回路基板上に実装する場合には、外部接続端子６５、６６をはんだ等で回路基板側のランド上に実装する。 The antifuse module 1 is electrically connected in parallel with electronic components on a circuit board, for example. When mounting on the circuit board, the external connection terminals 65 and 66 are mounted on the land on the circuit board side with solder or the like.
　静電気保護素子５０は、例えば静電気により瞬間的に高電圧が印加された場合に、アンチヒューズ素子１０を保護するためのものである。静電気保護素子５０の例としては、例えばコンデンサや、ツェナーダイオードや、バリスタ等が挙げられる。 The electrostatic protection element 50 is for protecting the antifuse element 10 when a high voltage is momentarily applied due to static electricity, for example. Examples of the electrostatic protection element 50 include a capacitor, a Zener diode, and a varistor.
　例えば静電気保護素子５０がコンデンサの場合には、コンデンサのインピーダンスにより、アンチヒューズ素子１０に印加される瞬間的な高電圧のピークを鈍化させることができる。また、コンデンサの静電容量が大きいほど、ピークの鈍化の効果が顕著である。この時、コンデンサの絶縁破壊電圧が、アンチヒューズ素子１０の静電気による破壊電圧よりも大きいことが好ましい。コンデンサの絶縁破壊電圧がアンチヒューズ素子１０の静電気による破壊電圧よりも小さい場合には、静電気が印加された際にコンデンサが先に絶縁破壊してしまい、アンチヒューズ素子１０に高電圧が印加されてしまう。その結果、アンチヒューズ素子１０も絶縁破壊する恐れがある。 For example, when the electrostatic protection element 50 is a capacitor, the instantaneous high voltage peak applied to the antifuse element 10 can be blunted by the impedance of the capacitor. Moreover, the larger the capacitance of the capacitor, the more prominent the effect of peak blunting. At this time, the dielectric breakdown voltage of the capacitor is preferably larger than the breakdown voltage due to static electricity of the antifuse element 10. When the breakdown voltage of the capacitor is smaller than the breakdown voltage due to static electricity of the antifuse element 10, the capacitor breaks down first when static electricity is applied, and a high voltage is applied to the antifuse element 10. End up. As a result, the antifuse element 10 may also break down.
　また、静電気保護素子５０がツェナーダイオードであっても良い。静電気により瞬間的に高電圧がアンチヒューズモジュール１に印加されても、ツェナーダイオードに大電流が流れる。そしてアンチヒューズ素子１０にはツェナー電圧以上の電圧値が印加されないためである。 Further, the electrostatic protection element 50 may be a Zener diode. Even if a high voltage is momentarily applied to the antifuse module 1 due to static electricity, a large current flows through the Zener diode. This is because a voltage value higher than the Zener voltage is not applied to the antifuse element 10.
　この場合、ツェナーダイオードのツェナー電圧がアンチヒューズ素子１０の動作電圧よりも大きく、アンチヒューズ素子１０の静電気による破壊電圧よりも小さいことが好ましい。ツェナー電圧がアンチヒューズ素子１０の静電気による破壊電圧以上である場合には、ツェナー電圧の電圧値でアンチヒューズ素子１０が絶縁破壊してしまう。また、ツェナー電圧がアンチヒューズ素子１０の動作電圧以下である場合には、後述する実装後において、アンチヒューズモジュール１と並列に接続される発光ダイオード等の電子部品が開放不良を起こした場合に、アンチヒューズ素子１０が短絡しなくなるためである。 In this case, the Zener voltage of the Zener diode is preferably larger than the operating voltage of the antifuse element 10 and smaller than the breakdown voltage of the antifuse element 10 due to static electricity. When the Zener voltage is equal to or higher than the breakdown voltage due to static electricity of the antifuse element 10, the antifuse element 10 breaks down at the voltage value of the Zener voltage. In addition, when the Zener voltage is equal to or lower than the operating voltage of the anti-fuse element 10, when an electronic component such as a light emitting diode connected in parallel with the anti-fuse module 1 causes an open defect after mounting described later, This is because the antifuse element 10 is not short-circuited.
　また、静電気保護素子５０がバリスタであっても良い。静電気により瞬間的に高電圧がアンチヒューズモジュール１に印加されても、バリスタに大電流が流れる。そして、アンチヒューズ素子１０にはバリスタ電圧以上の電圧値が印加されないためである。 Further, the electrostatic protection element 50 may be a varistor. Even if a high voltage is momentarily applied to the antifuse module 1 due to static electricity, a large current flows through the varistor. This is because a voltage value higher than the varistor voltage is not applied to the antifuse element 10.
　この場合、バリスタのバリスタ電圧がアンチヒューズ素子１０の動作電圧よりも大きく、アンチヒューズ素子１０の静電気による破壊電圧よりも小さいことが好ましい。バリスタ電圧がアンチヒューズ素子１０の静電気による破壊電圧以上である場合には、バリスタ電圧の電圧値でアンチヒューズ素子１０が絶縁破壊してしまう。また、バリスタ電圧がアンチヒューズ素子１０の動作電圧以下である場合には、ツェナーダイオードと同様に、実装後において電子部品が開放不良を起こした場合に、アンチヒューズ素子が短絡しなくなるためである。 In this case, it is preferable that the varistor voltage of the varistor is larger than the operating voltage of the antifuse element 10 and smaller than the breakdown voltage of the antifuse element 10 due to static electricity. When the varistor voltage is equal to or higher than the breakdown voltage due to static electricity of the antifuse element 10, the antifuse element 10 breaks down at the voltage value of the varistor voltage. Further, when the varistor voltage is equal to or lower than the operating voltage of the anti-fuse element 10, the anti-fuse element will not be short-circuited when an electronic component causes an open failure after mounting, as with the Zener diode.
　また、本発明に係るアンチヒューズモジュールを、例えばＬＥＤ等の電子部品が多数直列接続されている回路において、各電子部品と電気的に並列に接続するように実装する場合には、実装時だけでなく、実装後においても下記の利点を有する。すなわち、静電気保護素子の存在により、サージ電圧等、回路中の電圧の急上昇によるアンチヒューズ素子の絶縁破壊を防止することができる。また、実装後には、アンチヒューズ素子だけでなくＬＥＤ等の電子部品も保護することができる。すなわち、本発明に係るアンチヒューズモジュールを使用することにより、アンチヒューズ素子やＬＥＤ等の電子部品を電圧の急上昇から保護することが可能となる。 In addition, when the antifuse module according to the present invention is mounted so as to be electrically connected in parallel with each electronic component in a circuit in which a large number of electronic components such as LEDs are connected in series, for example, only at the time of mounting. In addition, it has the following advantages even after mounting. That is, the presence of the electrostatic protection element can prevent the dielectric breakdown of the anti-fuse element due to a surge voltage or the like in the circuit. Moreover, after mounting, not only the antifuse element but also electronic components such as LEDs can be protected. That is, by using the antifuse module according to the present invention, it is possible to protect electronic components such as antifuse elements and LEDs from a sudden rise in voltage.
　例えばＬＥＤ等の電子部品が多数直列接続されている回路において、特定の電子部品が故障して開放状態となると、故障した電子部品に並列に接続されたアンチヒューズモジュール中のアンチヒューズ素子に動作電圧以上の一定の電圧が印加され、アンチヒューズ素子が短絡して、導通する。その結果、他の電子部品は正常動作をし続けることが可能となる。 For example, in a circuit in which a large number of electronic components such as LEDs are connected in series, when a specific electronic component fails and becomes open, the operating voltage is applied to the antifuse element in the antifuse module connected in parallel to the failed electronic component. When the above constant voltage is applied, the antifuse element is short-circuited and becomes conductive. As a result, other electronic components can continue to operate normally.
　〔実験例１〕
　以下のように、アンチヒューズモジュールを作製した。 [Experimental Example 1]
An antifuse module was produced as follows.
　まず、以下のように、アンチヒューズ素子を作製した。最初に、基板として、熱酸化によりシリコン酸化物層が形成されたＳｉ単結晶基板（以下「Ｓｉ基板」）を用意した。 First, an antifuse element was manufactured as follows. First, a Si single crystal substrate (hereinafter referred to as “Si substrate”) on which a silicon oxide layer was formed by thermal oxidation was prepared as a substrate.
　次に、密着層、下部電極層、絶縁層、上部電極層、第１の無機保護層を形成した。まず、密着層としてチタン酸バリウムストロンチウム（（Ｂａ，Ｓｒ）ＴｉＯ3，以下「ＢＳＴ」という）層を化学溶液堆積（ＣＳＤ；Ｃｈｅｍｉｃａｌ　Ｓｏｌｕｔｉｏｎ　Ｄｅｐｏｓｉｔｉｏｎ）法で形成した。具体的には、Ｓｉ基板の上面に、Ｂａ：Ｓｒ：Ｔｉ＝７０：３０：１００（モル比）と有機化合物とを混合した原料液をスピンコートにより塗布し、３５０℃のホットプレート上で乾燥した。その後６５０℃３０分の条件で熱処理して結晶化させた。このようにして厚さ４５ｎｍのＢＳＴ層を形成した。次に、下部電極層として、密着層の上にスパッタリング法を用いて厚さ３００ｎｍの白金（以下「Ｐｔ」という）層を形成した。そしてＰｔ層の上に、絶縁層として、前述したＢＳＴ層と同様の方法で、厚さ９０ｎｍのＢＳＴ層を形成した。このＢＳＴ層の上に、上部電極層として、前述したＰｔ層と同様の方法で、厚さ３００ｎｍのＰｔ層を形成した。そしてＰｔ層の上に、第１の無機保護層として、前述したＢＳＴ層と同様の方法で、厚さ９０ｎｍのＢＳＴ層を形成した。 Next, an adhesion layer, a lower electrode layer, an insulating layer, an upper electrode layer, and a first inorganic protective layer were formed. First, a barium strontium titanate ((Ba, Sr) TiO 3 , hereinafter referred to as “BST”) layer was formed as an adhesion layer by a chemical solution deposition (CSD) method. Specifically, a raw material liquid in which Ba: Sr: Ti = 70: 30: 100 (molar ratio) and an organic compound are mixed is applied onto the upper surface of the Si substrate by spin coating, and dried on a hot plate at 350 ° C. did. Thereafter, it was crystallized by heat treatment at 650 ° C. for 30 minutes. In this way, a BST layer having a thickness of 45 nm was formed. Next, as a lower electrode layer, a 300 nm-thick platinum (hereinafter referred to as “Pt”) layer was formed on the adhesion layer by a sputtering method. Then, a 90 nm thick BST layer was formed as an insulating layer on the Pt layer by the same method as the BST layer described above. On this BST layer, a 300-nm-thick Pt layer was formed as an upper electrode layer by the same method as the Pt layer described above. On the Pt layer, a BST layer having a thickness of 90 nm was formed as a first inorganic protective layer by the same method as the BST layer described above.
　次に、第１の無機保護層、上部電極層、絶縁層、下部電極層、密着層のパターニングを行った。まず、第１の無機保護層と上部電極層のパターニングを行った。すなわち、上部電極層であるＰｔ層の上にレジストを塗布し、露光、現像によりレジストパターンを形成した。そして、Ａｒイオンミリング法により、所定形状にパターニングした後、アッシングによりレジストを除去した。同様の方法で、絶縁層、下部電極層、密着層をパターニングした後、レジストを除去した。そして、８００℃、３０分の条件で熱処理を行った。 Next, the first inorganic protective layer, the upper electrode layer, the insulating layer, the lower electrode layer, and the adhesion layer were patterned. First, the first inorganic protective layer and the upper electrode layer were patterned. That is, a resist was applied on the Pt layer as the upper electrode layer, and a resist pattern was formed by exposure and development. Then, after patterning into a predetermined shape by Ar ion milling, the resist was removed by ashing. After patterning the insulating layer, the lower electrode layer, and the adhesion layer by the same method, the resist was removed. And it heat-processed on 800 degreeC and the conditions for 30 minutes.
　次に、露出された第１の無機保護層、上部電極層、絶縁層、下部電極層および密着層の上面と側面を覆うように第２の無機保護層を形成した。具体的には、スパッタリング法により厚さ３００ｎｍのＳｉＮx層を形成した。そして、第２の無機保護層上に、第１の有機保護層を形成した。具体的には感光性ポリイミドをスピンコートにより塗布し、露光、現像後に３５０℃、１時間の条件で加熱した。このようにして膜厚２μｍのポリイミド層を形成した。 Next, a second inorganic protective layer was formed so as to cover the upper surface and side surfaces of the exposed first inorganic protective layer, upper electrode layer, insulating layer, lower electrode layer, and adhesion layer. Specifically, an SiN x layer having a thickness of 300 nm was formed by a sputtering method. And the 1st organic protective layer was formed on the 2nd inorganic protective layer. Specifically, photosensitive polyimide was applied by spin coating, and was heated at 350 ° C. for 1 hour after exposure and development. In this way, a polyimide layer having a thickness of 2 μm was formed.
　次に、この第１の有機保護層をマスクパターンとして使用し、ＣＨＦ3ガスを用いて第２の無機保護層をドライエッチングした。そして、上部電極層と下部電極層の一部を露出させた。 Next, this first organic protective layer was used as a mask pattern, and the second inorganic protective layer was dry etched using CHF 3 gas. And the upper electrode layer and a part of lower electrode layer were exposed.
　次に、引出電極を形成した。具体的には、マグネトロンスパッタ法を用いて、Ｔｉ層（層厚１００ｎｍ）、Ｃｕ層（層厚１０００ｎｍ）を連続的に形成した。その後、レジスト塗布、露光、現像を順に行うことによりレジストパターンを形成した。そして、レジストパターンをマスクにして、露出したＣｕ層とＴｉ層をＡｒイオンミリング法でパターニングした。このようにして引出電極を形成した。 Next, an extraction electrode was formed. Specifically, a Ti layer (layer thickness: 100 nm) and a Cu layer (layer thickness: 1000 nm) were continuously formed by magnetron sputtering. Thereafter, a resist pattern was formed by sequentially performing resist coating, exposure, and development. Then, using the resist pattern as a mask, the exposed Cu layer and Ti layer were patterned by Ar ion milling. In this way, an extraction electrode was formed.
　次に、引出電極の一部が露出するように第２の有機保護層を形成した。感光性ポリイミドをスピンコートし、露光、現像、キュアを順に行うことにより、膜厚２μｍのポリイミド層を得た。 Next, a second organic protective layer was formed so that a part of the extraction electrode was exposed. A polyimide layer having a thickness of 2 μm was obtained by spin-coating photosensitive polyimide and sequentially performing exposure, development, and curing.
　そして、第２の有機保護層をソルダーレジストとして、引出電極の露出部分に実装電極を形成した。具体的には、レジストパターンの開口部に、無電解めっきで厚さ２μｍのＮｉ層と厚さ０．１μｍのＡｕ層を形成した。 Then, a mounting electrode was formed on the exposed portion of the extraction electrode using the second organic protective layer as a solder resist. Specifically, an Ni layer having a thickness of 2 μm and an Au layer having a thickness of 0.1 μm were formed by electroless plating in the opening of the resist pattern.
　そして、ダイシングソーを用いて基板をカットし、０．６×０．３×０．３ｍｍのチップ形状のアンチヒューズ素子を取り出した。 Then, the substrate was cut using a dicing saw, and a 0.6 × 0.3 × 0.3 mm chip-shaped antifuse element was taken out.
　上記のように作製されたアンチヒューズ素子の特性を測定した。短絡前の抵抗は１ＭΩ以上であり、短絡後の抵抗は５Ω以下であった。そして、アンチヒューズ素子が短絡する動作電圧は２０Ｖであった。また、静電気による破壊電圧は２５Ｖであった。さらに、有効電極面積は０．３ｍｍ2であった。また、静電容量は１２ｎＦであった。 The characteristics of the antifuse element manufactured as described above were measured. The resistance before the short circuit was 1 MΩ or more, and the resistance after the short circuit was 5Ω or less. The operating voltage at which the antifuse element is short-circuited was 20V. The breakdown voltage due to static electricity was 25V. Furthermore, the effective electrode area was 0.3 mm 2 . The capacitance was 12 nF.
　次に、上記のように作製されたアンチヒューズ素子を用いてアンチヒューズモジュールを作製した。本実験例では、静電気保護素子にコンデンサを用いた。コンデンサの静電容量は０．１μＦであった。また、コンデンサのサイズは０．６×０．３×０．３ｍｍであった。 Next, an antifuse module was produced using the antifuse element produced as described above. In this experimental example, a capacitor was used as the electrostatic protection element. The capacitance of the capacitor was 0.1 μF. The size of the capacitor was 0.6 × 0.3 × 0.3 mm.
　具体的には、表面に外部接続端子や接続配線をあらかじめ備えた配線基板を用意した。配線基板の材質はガラスエポキシ樹脂であり、ＦＲ－４を使用した。 Specifically, a wiring board provided with external connection terminals and connection wiring in advance on the surface was prepared. The material of the wiring board was glass epoxy resin, and FR-4 was used.
　そして接続配線の上にアンチヒューズ素子と静電気保護素子を実装した。具体的には、まず接続配線上にはんだペーストを印刷した。そして、はんだペーストが印刷された接続配線上にアンチヒューズ素子の実装電極と静電気保護素子の端子とを設置した。そしてリフロー炉で加熱してはんだ付けを行った。 And an anti-fuse element and an electrostatic protection element were mounted on the connection wiring. Specifically, first, a solder paste was printed on the connection wiring. And the mounting electrode of the antifuse element and the terminal of the electrostatic protection element were installed on the connection wiring on which the solder paste was printed. And it soldered by heating with a reflow furnace.
　そして、アンチヒューズ素子と静電気保護素子を覆うようにカバー層を形成した。カバー層の材質はエポキシ樹脂とした。そして、オーブンで１５０℃、６０分間の熱処理を行って、カバー層を硬化させた。 Then, a cover layer was formed so as to cover the antifuse element and the electrostatic protection element. The material of the cover layer was an epoxy resin. Then, a heat treatment was performed in an oven at 150 ° C. for 60 minutes to cure the cover layer.
　上記のように作製したアンチヒューズモジュールを実験例１とした。そして、静電気保護素子を接続していないアンチヒューズ素子を比較例１とした。実験例１と比較例１の試料について、特性の比較を行った。具体的には、マシンモデルとヒューマンボディモデルの耐電圧試験を行った。 The antifuse module manufactured as described above was designated as Experimental Example 1. And the antifuse element which has not connected the electrostatic protection element was made into the comparative example 1. The characteristics of the samples of Experimental Example 1 and Comparative Example 1 were compared. Specifically, a withstand voltage test was performed on a machine model and a human body model.
　マシンモデルとは、金属製機器に帯電した電荷が試料に触れた時に放電するモデルであり、試料にパルス的に電圧を印加するものである。試験方法はＥＩＡＪ　ＥＤ－４７０１／３０４に準拠した。試験数はｎ＝１０とした。試験は各試料それぞれ正負１回ずつ行った。試験電圧は０．０５ｋＶより開始して、試料に一桁以上の抵抗劣化がみられない場合、試験電圧を０．０５ｋＶずつ上げて試験を繰り返した。そして全ての測定試料で一桁以上の抵抗劣化がみられない試験電圧の最大値を耐電圧とした。試験電圧の最大値は０．４ｋＶとした。 The machine model is a model that discharges when a charge charged on a metal device touches a sample, and applies a voltage to the sample in a pulsed manner. The test method conformed to EIAJ ED-4701 / 304. The number of tests was n = 10. The test was performed once for each sample. The test voltage started from 0.05 kV, and when resistance deterioration of one digit or more was not observed in the sample, the test was repeated by increasing the test voltage by 0.05 kV. The maximum value of the test voltage at which no single-digit or more resistance deterioration was observed in all measurement samples was taken as the withstand voltage. The maximum value of the test voltage was 0.4 kV.
　また、ヒューマンボディモデルとは、人体に帯電した電荷が試料に触れた時に放電するモデルである。ヒューマンボディモデルは、マシンモデルよりも高電圧を想定している。試験方法はＩＥＣ６１０００－４－２に準拠した。試験数はｎ＝１０とした。試験は各試料それぞれ正負１回ずつ行った。耐電圧試験は０．２ｋＶより開始して、試料に一桁以上の抵抗劣化がみられない場合、試験電圧を１．０ｋＶまでは０．２ｋＶずつ上げて試験を繰り返した。１．０ｋＶ以降は２．０ｋＶ、４．０ｋＶ、８．０ｋＶの順で試験を行った。そして全ての測定試料で一桁以上の抵抗劣化がみられない試験電圧の最大値を耐電圧とした。試験電圧の最大値は８．０ｋＶとした。 Also, the human body model is a model that discharges when a charge charged on the human body touches the sample. The human body model assumes a higher voltage than the machine model. The test method conformed to IEC61000-4-2. The number of tests was n = 10. The test was performed once for each sample. The withstand voltage test was started from 0.2 kV, and when the resistance deterioration of one digit or more was not observed in the sample, the test was repeated by increasing the test voltage by 0.2 kV up to 1.0 kV. After 1.0 kV, tests were performed in the order of 2.0 kV, 4.0 kV, and 8.0 kV. The maximum value of the test voltage at which no single-digit or more resistance deterioration was observed in all measurement samples was taken as the withstand voltage. The maximum value of the test voltage was 8.0 kV.
　表１に、耐電圧試験の結果を示す。 Table 1 shows the results of the withstand voltage test.
Figure JPOXMLDOC01-appb-T000001
 　実験例１では、マシンモデル、ヒューマンボディモデルのいずれの場合にも、比較例１に比べて高い耐電圧を示すことが分かった。なお、ヒューマンボディモデルにおいて、試験電圧が４．０ｋＶの時にアンチヒューズ素子に印加された電圧のピーク値は１５Ｖ程度であった。
Figure JPOXMLDOC01-appb-T000001
 In Experimental Example 1, it was found that both the machine model and the human body model showed higher withstand voltage than Comparative Example 1. In the human body model, the peak value of the voltage applied to the antifuse element when the test voltage was 4.0 kV was about 15V.
　［実験例２］
　実験例２では、絶縁層として、厚さ５０ｎｍのＳｉＮx層を用いてアンチヒューズ素子を作製した。そして第１の無機保護層や第２の無機保護層を省略した以外は、実験例１と同様の方法でアンチヒューズ素子を作製した。ＳｉＮx層は絶縁状態で耐湿性が高いため、第１の無機保護層や第２の無機保護層を省略することができ、低コストでの製造が可能になる。また、ＳｉＮx層はマグネトロンスパッタ法で形成した。この場合、実験例１に比べて下部電極層、絶縁層、上部電極層を連続的に形成することが可能であり、より低コストでの製造が可能になる。実験例２で作製されたアンチヒューズ素子の動作電圧は２５Vであった。 [Experiment 2]
In Experimental Example 2, an antifuse element was manufactured using a 50 nm thick SiN x layer as the insulating layer. And the antifuse element was produced by the method similar to Experimental example 1 except having omitted the 1st inorganic protective layer and the 2nd inorganic protective layer. Since the SiN x layer is in an insulating state and has high moisture resistance, the first inorganic protective layer and the second inorganic protective layer can be omitted, and manufacturing at low cost is possible. The SiN x layer was formed by magnetron sputtering. In this case, it is possible to continuously form the lower electrode layer, the insulating layer, and the upper electrode layer as compared with Experimental Example 1, and it is possible to manufacture at a lower cost. The operating voltage of the antifuse element fabricated in Experimental Example 2 was 25V.
　そして、実験例１と同様の方法でアンチヒューズモジュールを作製した。静電気保護素子は実験例１と同様のコンデンサを用いた。上記のように作製したアンチヒューズモジュールを実験例２とした。そして、静電気保護素子を接続していないアンチヒューズ素子を比較例２とした。 Then, an antifuse module was produced in the same manner as in Experimental Example 1. As the electrostatic protection element, the same capacitor as in Experimental Example 1 was used. The antifuse module manufactured as described above was defined as Experimental Example 2. And the antifuse element which has not connected the electrostatic protection element was made into the comparative example 2.
　実験例１と同様の方法で、マシンモデルとヒューマンボディモデルの耐電圧試験を行った。表２に結果を示す。 In the same manner as in Experimental Example 1, the machine model and the human body model were subjected to a withstand voltage test. Table 2 shows the results.
Figure JPOXMLDOC01-appb-T000002
 　比較例１と比較例２のアンチヒューズ素子を比較すると、比較例２の耐電圧が低いことが分かる。しかし、その場合においても、静電気保護素子を並列に接続することで、実験例２では高い耐電圧を示すことが分かった。したがって、実験例２により、ＢＳＴ層以外でも絶縁層に耐湿性が高いＳｉＮxを用いて、低コストでアンチヒューズ素子を製造できることが明らかとなった。
Figure JPOXMLDOC01-appb-T000002
 When the antifuse elements of Comparative Example 1 and Comparative Example 2 are compared, it can be seen that the withstand voltage of Comparative Example 2 is low. However, even in that case, it was found that Experimental Example 2 shows a high withstand voltage by connecting the electrostatic protection elements in parallel. Therefore, Experimental Example 2 revealed that an antifuse element can be manufactured at low cost using SiN x having high moisture resistance for the insulating layer other than the BST layer.
　なお、本発明に係るアンチヒューズモジュールは、電子部品が多数直列接続されている回路において各電子部品と電気的に並列に接続して使用されるだけにとどまらない。例えば、アンチヒューズモジュールは、二次電池や電源回路と電気的に並列に接続される。そして、例えば過電圧が印加された場合には、アンチヒューズモジュール中のアンチヒューズ素子を優先的に短絡させて、二次電池や電源回路を保護するような使用方法も可能である。 Note that the antifuse module according to the present invention is not limited to being used by being electrically connected in parallel with each electronic component in a circuit in which a large number of electronic components are connected in series. For example, the antifuse module is electrically connected to the secondary battery and the power supply circuit in parallel. For example, when an overvoltage is applied, an antifuse element in the antifuse module can be preferentially short-circuited to use the secondary battery and the power supply circuit.
　　１　アンチヒューズモジュール
　　１０　アンチヒューズ素子
　　１１　基板
　　１２　密着層
　　２１　下部電極層
　　２２　絶縁層
　　２３　上部電極層
　　３１　第１の無機保護層
　　３２　第２の無機保護層
　　３３　第１の有機保護層
　　３４　第２の有機保護層
　　４１，４２　引出電極
　　４３，４４　実装電極
　　５０　静電気保護素子
　　６１，６２　接続配線
　　６３，６４　スルーホール電極
　　６５，６６　外部接続端子
　　７１　カバー層
　　７２　配線基板
　　１００　アンチヒューズ素子
　　１１１　基板
　　１１２　密着層
　　１２１　下部電極層
　　１２２　絶縁層
　　１２３　上部電極層
　　１３１　第１の無機保護層
　　１３２　第２の無機保護層
　　１３３　第１の有機保護層
　　１３４　第２の有機保護層
　　１４１，１４２　引出電極
　　１４３，１４４　実装電極

　 DESCRIPTION OF SYMBOLS 1 Antifuse module 10 Antifuse element 11 Board | substrate 12 Adhesion layer 21 Lower electrode layer 22 Insulating layer 23 Upper electrode layer 31 1st inorganic protective layer 32 2nd inorganic protective layer 33 1st organic protective layer 34 2nd organic Protective layer 41, 42 Lead electrode 43, 44 Mounting electrode 50 Electrostatic protective element 61, 62 Connection wiring 63, 64 Through- hole electrode 65, 66 External connection terminal 71 Cover layer 72 Wiring board 100 Antifuse element 111 Substrate 112 Adhesion layer 121 Lower part Electrode layer 122 Insulating layer 123 Upper electrode layer 131 First inorganic protective layer 132 Second inorganic protective layer 133 First organic protective layer 134 Second organic protective layer 141, 142 Lead electrodes 143, 144 Mounting electrode

Claims (7)

  1. 　絶縁層と、
    　前記絶縁層の上下面に形成された一対の電極層と、
    　前記電極層の各々と電気的に接続された実装電極と、
    を備えるアンチヒューズ素子と、
    前記アンチヒューズ素子と並列に接続された静電気保護素子と、
    を備える、アンチヒューズモジュール。     An insulating layer;
    A pair of electrode layers formed on the upper and lower surfaces of the insulating layer;
    A mounting electrode electrically connected to each of the electrode layers;
    An antifuse element comprising:
    An electrostatic protection element connected in parallel with the antifuse element;
    An antifuse module comprising:
  2. 　前記静電気保護素子がコンデンサであり、前記コンデンサの絶縁破壊電圧が前記アンチヒューズ素子の静電気による破壊電圧よりも大きい、請求項１に記載のアンチヒューズモジュール。 The antifuse module according to claim 1, wherein the electrostatic protection element is a capacitor, and a dielectric breakdown voltage of the capacitor is larger than a breakdown voltage due to static electricity of the antifuse element.
  3. 　前記コンデンサの静電容量が０．１μＦ以上である、請求項２に記載のアンチヒューズモジュール。 The antifuse module according to claim 2, wherein the capacitor has a capacitance of 0.1 µF or more.
  4. 　前記静電気保護素子がツェナーダイオードであり、前記ツェナーダイオードのツェナー電圧が前記アンチヒューズ素子の動作電圧よりも大きく、前記アンチヒューズ素子の静電気による破壊電圧よりも小さい、請求項１に記載のアンチヒューズモジュール。 2. The antifuse module according to claim 1, wherein the electrostatic protection element is a Zener diode, and a Zener voltage of the Zener diode is larger than an operating voltage of the antifuse element and smaller than a breakdown voltage due to static electricity of the antifuse element. .
  5. 　前記静電気保護素子がバリスタであり、前記バリスタのバリスタ電圧が前記アンチヒューズ素子の動作電圧よりも大きく、前記アンチヒューズ素子の静電気による破壊電圧よりも小さい、請求項１に記載のアンチヒューズモジュール。 The antifuse module according to claim 1, wherein the electrostatic protection element is a varistor, and a varistor voltage of the varistor is larger than an operating voltage of the antifuse element and smaller than a breakdown voltage due to static electricity of the antifuse element.
  6. 　前記アンチヒューズ素子の前記一対の電極層が金属またはその合金からなるとともに、前記一対の電極層間の静電容量が１５ｎＦ以下であり、前記一対の電極層間に動作電圧以上の電圧が一定の時間印加された場合に、前記一対の電極層が溶融し、短絡して導通状態になるものである、請求項１～５のいずれか１項に記載のアンチヒューズモジュール。 The pair of electrode layers of the antifuse element is made of metal or an alloy thereof, and the capacitance between the pair of electrode layers is 15 nF or less, and a voltage higher than the operating voltage is applied between the pair of electrode layers for a certain period of time. 6. The antifuse module according to claim 1, wherein the pair of electrode layers are melted and short-circuited when turned on to be in a conductive state.
  7. 　前記絶縁層の材質が（Ｂａ，Ｓｒ）ＴｉＯ3であり、前記一対の電極層の材質が金、銀、白金、パラジウム、ロジウム、イリジウム、ルテニウム、オスミウムからなる群より選ばれる少なくとも一種の元素で構成される金属又はその合金である、請求項６に記載のアンチヒューズモジュール。

    　　　

    　　　     The material of the insulating layer is (Ba, Sr) TiO 3 , and the material of the pair of electrode layers is at least one element selected from the group consisting of gold, silver, platinum, palladium, rhodium, iridium, ruthenium, and osmium. The antifuse module according to claim 6, which is a configured metal or an alloy thereof.



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WO2015060278A1 (en) * 2013-10-24 2015-04-30 株式会社村田製作所 Composite protection circuit, composite protection element, and led element for lighting
JP6070858B2 (en) * 2013-10-24 2017-02-01 株式会社村田製作所 Composite protective circuit, composite protective element and LED element for lighting
US10043786B2 (en) 2013-10-24 2018-08-07 Murata Manufacturing Co., Ltd. Composite protection circuit, composite protection element, and LED device for illumination

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