WO2011111322A1 - Drive voltage supply circuit, display device - Google Patents

Drive voltage supply circuit, display device Download PDF

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Publication number
WO2011111322A1
WO2011111322A1 PCT/JP2011/001042 JP2011001042W WO2011111322A1 WO 2011111322 A1 WO2011111322 A1 WO 2011111322A1 JP 2011001042 W JP2011001042 W JP 2011001042W WO 2011111322 A1 WO2011111322 A1 WO 2011111322A1
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WIPO (PCT)
Prior art keywords
short
circuit
source lines
lines
line
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PCT/JP2011/001042
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French (fr)
Japanese (ja)
Inventor
田中啓司
糸滿辰夫
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パナソニック株式会社
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Publication of WO2011111322A1 publication Critical patent/WO2011111322A1/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

Definitions

  • the present invention relates to a drive voltage supply circuit for supplying a plurality of drive voltages to a plurality of source lines, and more particularly to a charge sharing technique for redistributing charges among a plurality of source lines.
  • n source lines provided on a display panel with n drive voltages corresponding to n (n is an integer of 2 or more) pixel values given every horizontal period.
  • a drive voltage supply circuit for example, a source driver for supplying the signal to each is used.
  • the n drive voltages respectively supplied to the n source lines are consumed by parasitic capacitance parasitic on the n source lines and charging / discharging of display elements (for example, liquid crystal elements) provided in the pixel portion of the display panel. Is done.
  • a charge sharing technique is used in a display device that employs a dot inversion driving method (for example, Patent Document 1).
  • the dot inversion driving method is a driving in which the polarity of n driving voltages (polarity with respect to the common voltage) is inverted for each source line and the polarity of n driving voltages is inverted every horizontal period. It is a method.
  • the charge sharing technique when the polarity of n driving voltages is reversed in the h-th horizontal period, n driving voltages are supplied to n source lines in the h-th horizontal period, respectively.
  • This is a technique for changing the voltage of n source lines to near the common voltage by simultaneously shorting all n source lines and redistributing charges among the n source lines. . With this technique, the voltage fluctuation amount of the n source lines in the h-th horizontal period can be reduced, and as a result, power consumption in the n source lines can be reduced.
  • the conventional charge sharing technique is based on the premise that the polarities of n driving voltages are reversed, so that the voltage fluctuation amount of n source lines is reduced when the polarities of n driving voltages are not reversed. It may not be possible. For example, when the polarity of the n drive voltages is not inverted in the h-th horizontal period, the conventional charge is performed before the n drive voltages are supplied to the n source lines in the h-th horizontal period. Even if share processing (processing for simultaneously shorting all n source lines) is performed, if there is a bias in the change direction or amount of voltage of the n source lines, n in the h-th horizontal period In some cases, the voltage fluctuation amount of the source line cannot be reduced. As described above, in the conventional charge sharing technique, it is difficult to efficiently perform charge redistribution among n source lines when the polarities of n driving voltages are not reversed.
  • n driving voltages is inverted for every P source lines (P is an integer of 1 or more), and n for every Q (Q is an integer of 2 or more) horizontal periods.
  • a dot inversion driving method (hereinafter referred to as a P ⁇ Q dot inversion driving method) for inverting the polarity of the driving voltage is becoming mainstream.
  • charge sharing processing processing for simultaneously shorting all n source lines
  • Q is an integer of 2 or more
  • an object of the present invention is to provide a drive voltage supply circuit that can efficiently perform charge redistribution among n source lines even when the polarity of n drive voltages is not reversed.
  • the driving voltage supply circuit is provided with n current pixel values respectively corresponding to n (n is an integer of 2 or more) source lines for each horizontal period.
  • a drive voltage generation unit for converting to a drive voltage
  • a pixel value storage unit for storing n current pixel values corresponding to the (h-1) th horizontal period as n previous pixel values, a plurality of short-circuit lines, On the number line indicating the pixel value, n pixel vectors respectively directed from the n previous pixel values stored in the pixel value storage unit to the n current pixel values corresponding to the h-th horizontal period.
  • the source line is A charge share control unit for deciding which of the short-circuit lines to be assigned, or whether the source line is not assigned to any of the plurality of short-circuit lines, and the plurality of short-circuit lines by the charge share control unit And a connection switching unit that electrically connects the source line assigned to each of the short circuit lines.
  • the possibility that the total amount of voltage fluctuations of n source lines can be reduced can be increased as compared with the case where all n source lines are short-circuited simultaneously. In this way, even when the polarity of the n drive voltages is not reversed, charge redistribution can be efficiently performed among the n source lines.
  • each of the plurality of short-circuit lines includes a plurality of second short distances from the target value corresponding to the short-circuit line to the respective end point values on the number line, which are shorter than the distances from the respective start point values to the end point values.
  • One candidate vector and a plurality of second candidate vectors are associated with each other, and the start point values of the plurality of second candidate vectors associated with each of the plurality of short-circuited lines are based on target values corresponding to the short-circuited lines.
  • the charge share control unit performs the source line for each of the n source lines.
  • the drive voltage supply circuit it is possible to increase the possibility that the average value of the previous pixel values corresponding to the source line assigned to the short-circuit line is close to (or coincides with) the target value corresponding to the short-circuit line.
  • the absolute value sum of the short-circuit vectors (vectors from the average value of the previous pixel values to the current pixel value) corresponding to the source lines assigned to the short-circuit lines is a pixel vector (vector from the previous pixel value to the current pixel value).
  • the pixel value storage unit includes n storage units corresponding to the n source lines, and the charge share control unit includes n control units corresponding to the n source lines.
  • Each of the n storage units stores a current pixel value corresponding to the storage unit among n current pixel values corresponding to the h ⁇ 1th horizontal period as a previous pixel value
  • Each of the n control units includes n number corresponding to the h-th horizontal period from the previous pixel value stored in the storage unit corresponding to the control unit among the n storage units on the number line.
  • a plurality of first candidate vectors and a plurality of second candidate vectors in which a pixel vector toward the current pixel value corresponding to the control unit is associated with any one of the plurality of short-circuit lines If it matches any one of the The source line response may be assigned to the short-circuit line.
  • the drive voltage supply circuit further includes an allocation control unit and a control switching unit, and the allocation control unit is allocated to the short-circuit group in each of the plurality of short-circuit groups respectively corresponding to the plurality of short-circuit lines.
  • the sum of absolute values of the plurality of short-circuit vectors respectively directed from the average value of the plurality of previous pixel values corresponding to the plurality of source lines to the plurality of current pixel values corresponding to the plurality of source lines is applied to the plurality of source lines.
  • the source line is set to be smaller than the sum of absolute values of a plurality of pixel vectors respectively directed from a plurality of corresponding previous pixel values to a plurality of current pixel values corresponding to the source line.
  • the control switching unit corresponds to the short-circuit group corresponding to the source line assigned to each of the plurality of short-circuit groups by the assignment control unit.
  • the connection switching unit may be controlled so that the line is electrically connected to the short-circuit line.
  • assignment control unit may execute the group assignment process so that the number of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups is maximized.
  • the assignment control unit is directed from a plurality of previous pixel values corresponding to a plurality of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups to a target value corresponding to the short-circuit group.
  • the group assignment process may be executed so that the sum of a plurality of target vectors is minimized.
  • the drive voltage supply circuit further includes n adjustment units corresponding to the n source lines, and the drive voltage generation unit includes n drive units respectively corresponding to the n source lines.
  • Each of the n driving units converts a current pixel value corresponding to the driving unit among the n current pixel values corresponding to the h-th horizontal period into the driving voltage, and
  • Each of the adjustment units when the control unit corresponding to the adjustment unit among the n control units assigns the source line corresponding to the adjustment unit to any one of the plurality of short-circuit lines, Of the n current pixel values corresponding to the h-th horizontal period, the n driving units of the n driving units are set according to a difference between a current pixel value corresponding to the adjustment unit and a target value corresponding to the short-circuit line. Of these, the output current amount of the drive unit corresponding to the adjustment unit may be adjusted. With this configuration, noise generated in n source lines can be reduced.
  • the charge share control unit for each of the plurality of short-circuit lines, a plurality of corresponding to the plurality of source lines from an average value of a plurality of previous pixel values corresponding to the plurality of source lines allocated to the short-circuit line A plurality of pixels each of which has a sum of absolute values of a plurality of short-circuit vectors respectively directed to the current pixel value, from a plurality of previous pixel values corresponding to the plurality of source lines to a plurality of current pixel values corresponding to the plurality of source lines.
  • the connection switching unit may be controlled so that a plurality of source lines assigned to the short circuit line are electrically connected to the short circuit line.
  • the charge share control unit in each of the plurality of short-circuit groups respectively corresponding to the plurality of short-circuit lines, from the average value of the plurality of previous pixel values corresponding to the plurality of source lines assigned to the short-circuit group
  • the absolute value sum of a plurality of short-circuit vectors respectively directed to a plurality of current pixel values corresponding to a plurality of source lines is a plurality of current pixel values corresponding to the source lines from a plurality of previous pixel values corresponding to the plurality of source lines.
  • the source line For each of the n source lines, to which of the plurality of short circuit groups the source line is assigned to the short circuit group or the source so as to be smaller than the absolute value sum of the plurality of pixel vectors respectively directed to You may perform the group allocation process which determines whether a line is not allocated to any of the said several short circuit group. With this configuration, the total amount of voltage fluctuations of the n source lines can be reduced, and the efficiency of charge redistribution among the n source lines can be increased.
  • FIG. 3 is a diagram illustrating a configuration example of a display device including a drive voltage supply circuit according to Embodiment 1.
  • FIG. 2 is a diagram illustrating a configuration example of a pixel portion illustrated in FIG. 1. The figure for demonstrating a candidate vector. The figure for demonstrating the charge share operation
  • FIG. 5 is a diagram illustrating a configuration example of a drive voltage supply circuit according to a second embodiment.
  • movement by the drive voltage supply circuit shown in FIG. The figure for demonstrating the modification 1 of the charge share operation
  • movement by the drive voltage supply circuit shown in FIG. The figure for demonstrating the modification 1 of the charge share operation
  • FIG. 10 is a diagram illustrating a configuration example of a drive voltage supply circuit according to a third embodiment. The figure for demonstrating an adjustment part.
  • FIG. 1 shows a configuration example of a display device including a drive voltage supply circuit 1 according to the first embodiment.
  • This display device includes a display panel 10 and a gate driver 20 in addition to the drive voltage supply circuit 1.
  • the display panel 10 includes n (n is an integer of 2 or more) source lines SL1, SL2,..., SLn, and m (m is an integer of 2 or more) gate lines GL1, GL2,. , N ⁇ m pixel units 100, 100,.
  • Each of the pixel portions 100, 100, ..., 100 is electrically connected to any one of the source lines SL1, SL2, ..., SLn and any one of the gate lines GL1, GL2, ..., GLm.
  • the gate driver 20 sequentially activates the gate lines GL1, GL2,... GLm every horizontal period. As shown in FIG.
  • each of the pixel units 100, 100,..., 100 includes a switching transistor T100 and a liquid crystal element C100.
  • the switching transistor T100 When the gate line GL corresponding to the pixel unit 100 is activated, the switching transistor T100 is turned on, and the voltage of the source line SL corresponding to the pixel unit 100 is applied to the pixel electrode of the liquid crystal element C100.
  • a common voltage VCOM is applied to the counter electrode of the liquid crystal element C100.
  • the drive voltage supply circuit 1 is provided with n pixel values D1, D2,..., Dn for each horizontal period, and corresponds to the n pixel values D1, D2,.
  • the n driving voltages VD1, VD2,..., VDn are supplied to the n source lines SL1, SL2,.
  • the drive voltage supply circuit 1 includes a drive voltage generation unit 101 (for example, a source driver), a pixel value storage unit 102, a charge share control unit 103, k short circuits STL1, k (k is an integer of 2 or more). STL2,..., STLk, and a connection switching unit 104.
  • the driving voltage generation unit 101 converts n pixel values D1, D2,..., Dn into n driving voltages VD1, VD2,. That is, the drive voltage generation unit 101 includes n pixel values D1, D2,..., Dn (hereinafter, current pixel values D1 (h) , D2 (h) ,..., Dn ( h) is converted into n drive voltages VD1, VD2,..., VDn.
  • the driving voltage generator 101 the current pixel value D1 (h), D2 (h ), ..., Dn (h) increases, the drive voltage VD1, VD2, ..., a higher VDn.
  • the drive voltage generation unit 101 includes n drive units 111, 112,..., 11n corresponding to the n source lines SL1, SL2,.
  • the drive units 111, 112,..., 11n convert the current pixel values D1 (h) , D2 (h) ,..., Dn (h) into n drive voltages VD1, VD2,.
  • each of the n driving units 111, 112,..., 11n captures and holds a pixel value in synchronization with the horizontal synchronization signal, and converts the pixel value held in the latch circuit into a driving voltage.
  • Digital-to-analog converter Digital-to-analog converter.
  • the pixel value storage unit 102 stores n pixel values D1, D2,..., Dn supplied every horizontal period. That is, the pixel value storage unit 102, n pieces of pixel values D1, D2 corresponding to the h-1 th horizontal period, ..., Dn of n previous pixel value (hereinafter, previous pixel value D1 (h-1 ), D2 (h-1) , ..., stored as Dn (h-1) hereinafter).
  • the pixel value storage unit 102 includes n storage units 121, 122,..., 12n corresponding to n source lines SL1, SL2,.
  • the n storage units 121, 122, ..., 12n store n previous pixel values D1 (h-1) , D2 (h-1) , ..., Dn (h-1) , respectively.
  • the charge share control unit 103 includes n previous pixel values D1 (h-1) , D2 (h-2) ,..., Dn (h ) stored in the pixel value storage unit 102 on the number line indicating the pixel values. -1) to n current pixel values D1 (h) , D2 (h) ,..., Dn (h) based on the distribution of n pixel vectors VP1, VP2,. For each of the source lines SL1, SL2,..., SLn, which of the short-circuit lines STL1, STL2,..., STLk is assigned to the source line, or the source line is assigned to the short-circuit lines STL1, STL2,. Decide whether to assign to any of the above.
  • the charge share control unit 103 includes n control units 131, 132,..., 13n corresponding to n source lines SL1, SL2,.
  • connection switching unit 104 switches the connection state between the source lines SL1, SL2,..., SLn and the drive voltage generation unit 101 (drive units 111, 112,..., 11n) in response to control by the charge share control unit 103. .
  • the connection switching unit 104 responds to control (allocation result) by the charge share control unit 103, and includes n source lines SL1, SL2,..., SLn and k short-circuit lines STL1, STL2,. Switch the connection status of.
  • the connection switching unit 104 includes n supply switches SW1, SW2, which switch connection / disconnection between n source lines SL1, SL2,..., SLn and n drive units 111, 112,.
  • SWn n source lines SL1, SL2, ..., SLn and k short-circuit lines STL1, STL2, ..., STLk, nxk short-circuit switches SW11, SW12, ... , SWnk.
  • Each of the k short-circuit lines STL1, STL2,..., STLk is associated with a plurality of first candidate vectors and a plurality of second candidate vectors.
  • the distance from the target value DT1 (pixel value level LV5) corresponding to the short-circuit line to the end point value (pixel value level LV6) of the first candidate vector Va1 on the number line indicating the pixel values. Is shorter than the distance from the start point value (pixel value level LV9) to the end point value (pixel value level LV6) of the first candidate vector Va1.
  • the starting point value (pixel value level LV1) of the second candidate vector Vb1 is the starting point value (pixel) of the first candidate vector Va1 with the target value DT1 (pixel value level LV5) as an axis. They are arranged symmetrically with respect to the value level LV9).
  • the other second candidate vectors Vb2, ..., Vbx That is, the average value of the starting point values of the first candidate vectors Va1, Va2,..., Vax and the second candidate vectors Vb1, Vb2,..., Vbx matches the target value DT1 corresponding to the short circuit line.
  • each of the k short-circuit lines STL1, STL2,..., STLk includes a first start point range and a first end point range to which start point values and end point values of a plurality of first candidate vectors respectively belong, A second start point range and a second end point range to which the start point value and end point value of the second candidate vector belong are associated with each other.
  • the start point value and the end point value of the first candidate vectors Va1, Va2,..., Vax are respectively the first start point range SR1a (pixel value levels LV7 to LV9) associated with the short-circuit line.
  • first end point range ER1a range of pixel value levels LV5 to LV6
  • start point value and end point value of the second candidate vectors Vb1, Vb2, belongs to the second start point range SR1b (pixel value level LV1 to LV3 range) and the second end point range ER1b (pixel value level LV4 to LV5).
  • the median value of the second start point range SR1b is arranged at a symmetrical position with respect to the median value of the first start point range SR1a with the target value DT1 corresponding to the short circuit line as an axis.
  • the median value of the end point range ER1b is arranged at a symmetrical position with respect to the median value of the first end point range ER1a around the target value DT1 corresponding to the short circuit line.
  • control unit 13i the operation by the i-th control unit (hereinafter referred to as control unit 13i) among the control units 131, 132,..., 13n will be described as an example.
  • the control unit 13i controls the i-th current pixel value (hereinafter, the current pixel value ) among the n current pixel values D1 (h) , D2 (h) ,..., Dn (h) in the h-th horizontal period. Di (h)) and the previous pixel value stored in the i-th storage unit among the n storage units 121, 122,..., 12n (hereinafter referred to as the previous pixel value Di (h-1)) ) And receive.
  • Di (h) the previous pixel value stored in the i-th storage unit among the n storage units 121, 122,..., 12n
  • the controller 13i sets the variable j to “1”. That is, the control unit 13i selects the first short-circuit line STL1 among the k short-circuit lines STL1, STL2,.
  • the control unit 13i matches any one of the first candidate vectors Va1, Va2,..., Vax and the second candidate vectors Vb1, Vb2,..., Vbx in which the pixel vector VPi is associated with the short circuit line STLj. It is determined whether or not to do.
  • the pixel vector VPi is a pixel vector from the previous pixel value Di (h ⁇ 1) to the current pixel value Di (h)
  • the short-circuit line STLj is k short-circuit lines STL1, STL2,. , STLk, the jth short-circuit line selected as the determination target. If the determination result indicates “mismatch”, the process proceeds to step ST104, and if the determination result indicates “match”, the process proceeds to step ST106.
  • control unit 13i adds “1” to the variable j. That is, the control unit 13i selects a short-circuit line that is not selected as a determination target among the k short-circuit lines STL1, STL2,. Next, the process proceeds to step ST103.
  • step ST106 the control unit 13i selects the i-th source line (hereinafter referred to as the source line SLi) among the n source lines SL1, SL2,. Assigned to short circuit line STLj.
  • connection switching unit 104 responds to the control by the control unit 13 i and is the i-th among the n drive units 111, 112,.
  • the source line SLi is disconnected from the drive unit (hereinafter, drive unit 11i).
  • the connection switching unit 104 electrically connects the source line SLi (the source line assigned to the short circuit line STLi) to the short circuit line STLj.
  • the process proceeds to step ST109.
  • step ST108 when it is determined in step ST104 that the variable j has reached the maximum value jmax (no short-circuit lines not selected as determination targets remain in the k short-circuit lines STL1, STL2,..., STLk). ), The control unit 13i does not assign the source line SLi to any of the short-circuit lines STL1, STL2,..., STLk. Therefore, in the charge share period in the h-th horizontal period, the connection switching unit 104 does not electrically connect the source line SLi to any of the short-circuit lines STL1, STL2,. Next, the process proceeds to step ST109.
  • control unit 13i determines whether or not to end the operation. When the operation is continued, the process proceeds to step ST101.
  • ⁇ h-1 horizontal period >> In the (h ⁇ 1) th horizontal period P (h ⁇ 1) (the period from the h ⁇ 1th rising edge to the hth rising edge of the horizontal synchronization signal), the m gate lines GL1, GL2,. , GLm, the (h ⁇ 1) th gate line GL (h ⁇ 1) is activated and corresponds to the (h ⁇ 1) th pixel row in the n ⁇ m pixel units 100, 100,.
  • the voltages of n source lines SL1, SL2,..., SLn are applied to the n pixel portions.
  • the pixel value storage unit 102 stores pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., Dn (h ⁇ 1) .
  • the drive voltage generation unit 101 takes in the pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., Dn (h ⁇ 1) in synchronization with the h-th rising edge of the horizontal synchronization signal, and value D1 (h-1), D2 (h-1), ..., Dn (h-1) a drive voltage VD1 (h-1), VD2 (h-1), ... converted to VDn (h-1) To do.
  • the voltages of the source lines SL1, SL2,..., SLn change to drive voltages VD1 (h-1) , VD2 (h-1) , ..., VDn (h-1) , respectively.
  • the h-th horizontal period P (h) is the h-th period in the driving period (the period from the h-th rising edge of the horizontal synchronization signal to the end of the activation period of the gate line GL (h))
  • Pixel values D1 (h) , D2 (h) ,..., Dn (h) corresponding to the horizontal period P (h) are supplied to the drive voltage supply circuit 1.
  • the charge share control unit 103 includes pixel values D1 (h) , D2 (h) ,..., Dn (h) and pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) stored in the pixel value storage unit 102.
  • n source lines SL1, SL2,..., SLn are assigned to k short-circuit lines STL1, STL2,.
  • the charge share control unit 103 assigns the source lines SL1, SL2, SL9, and SL10 to the short circuit line STL1.
  • the pixel value storage unit 102 stores the pixel values D1 (h) , D2 (h) ,..., Dn (h) .
  • connection switching is performed.
  • unit 104 changes the connection state between n source lines SL1, SL2,..., SLn and k short lines STL1, STL2,. Switch.
  • the connection switching unit 104 electrically connects the source lines SL1, SL2, SL9, and SL10 to the short-circuit line STL1.
  • the voltage of the source line SL1, SL2, SL9, SL10 respectively, the drive voltage VD1 (h-1), VD2 (h-1), VD9 (h-1), the average voltage from VD10 (h-1) Vave (average voltage of drive voltages VD1 (h-1) , VD2 (h-1) , VD9 (h-1) , VD10 (h-1)) .
  • Drive voltage generating unit 101 in synchronization with the h + 1 th rising edge of the horizontal synchronizing signal, the pixel value D1 (h), D2 (h ), ..., captures Dn (h), the pixel value D1 (h), D2 (h), ..., Dn (h) a drive voltage VD1 (h), VD2 (h ), ..., is converted into VDn (h).
  • the voltages of the source lines SL1, SL2, SL9, and SL10 change from the average voltage Vave to the drive voltages VD1 (h) , VD2 (h) ,..., VDn (h) , respectively.
  • the short-circuit lines STL1, STL2, and STL3 are connected to the first start point ranges SR1a, SR2a, SR3a, the first end point ranges ER1a, ER2a, ER3a, and the second shown in FIGS. 3A, 3B, and 3C, respectively. It is assumed that the start point ranges SR1b, SR2b, SR3b and the second end point ranges ER1b, ER2b, ER3b are associated with each other.
  • the pixel value storage unit 102 stores the previous pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., D10 (h ⁇ 1) as shown in FIG.
  • the previous pixel values D1 (h-1) and D2 (h-1) and the current pixel values D1 (h) and D2 (h) are the first start point range SR1a associated with the short-circuit line STL1 and the first pixel range SR1a. Belongs to one end point range ER1a.
  • the pixel vectors VP1 and VP2 are any of the first candidate vectors associated with the short-circuit line STL1 (candidate vectors whose start point value belongs to the first start point range SR1a and whose end point value belongs to the first end point range ER1a). Or one of them.
  • the previous pixel values D9 (h-1) and D10 (h-1) and the current pixel values D9 (h) and D10 (h) are the second start point range SR1b and the second range corresponding to the short-circuit line STL1. Belongs to the end point range ER1b. Therefore, the charge share control unit 103 assigns the source lines SL1, SL2, SL9, and SL10 to the short circuit line STL1.
  • the pixel vectors VP6 and VP5 are respectively first candidate vectors associated with the short-circuit line STL2 (candidate vectors whose start point values belong to the first start point range SR2a and end point values belong to the first end point range ER2a). And the second candidate vector (candidate vectors whose start point value belongs to the first start point range SR2b and whose end point value belongs to the first end point range ER2b). Furthermore, the pixel vectors VP8 and VP7 are each a first candidate vector associated with the short-circuit line STL3 (a candidate vector whose start point value belongs to the first start point range SR3a and whose end point value belongs to the first end point range ER3a).
  • the charge share control unit 103 assigns the source lines SL5 and SL6 to the short-circuit line STL2, and assigns the source lines SL7 and SL8 to the short-circuit line STL3.
  • the previous pixel value D3 (h ⁇ 1) belongs to the first start point range SR2b associated with the short-circuit line STL2, but the current pixel value D3 (h) is the first pixel range associated with the short-circuit line STL2. Does not belong to the end point range ER2b.
  • the current pixel value D4 (h) belongs to the second end point range ER2a associated with the short-circuit line STL2, but the previous pixel value D4 (h-1) is the second end point range associated with the short-circuit line STL2. Does not belong to the start point range SR2a.
  • the charge share control unit 103 does not assign the source lines SL3, SL4 to any of the short-circuit lines STL1, STL2, STL3.
  • the connection switching unit 104 sends the source lines SL1, SL2,..., SL10 to the drive voltage generation unit 101 ( .., 1110).
  • the connection switching unit 104 electrically connects the source lines SL1, SL2, SL9, and SL10 to the short-circuit line STL1 based on the allocation result (FIG. 6) by the charge share control unit 103, and the source lines SL5 and SL6.
  • the short-circuit line STL2 Are electrically connected to the short-circuit line STL2
  • the source lines SL7 and SL8 are electrically connected to the short-circuit line STL3.
  • Connection switching unit 104 does not electrically connect source lines SL3 and SL4 to any of short-circuit lines STL1, STL2, and STL3.
  • the voltages of the source lines SL1, SL2, SL9, and SL10 correspond to the previous pixel values D1 (h-1) , D2 (h-1) , D9 (h-1) , and D10 (h-1) , respectively.
  • the average value DA1 previous pixel values D1 (h-1) , D2 (h-1) ) , D9 (h-1) , D10 (h-1) average value.
  • the voltages of the source lines SL5 and SL6 are average values DA2 (from the drive voltages VD5 (h-1) and VD6 (h-1) corresponding to the previous pixel values D5 (h-1) and D6 (h-1) , respectively.
  • the average voltages according to the previous pixel values D5 (h-1) and D6 (h-1)) are changed, and the voltages of the source lines SL7 and SL8 are respectively changed to the previous pixel values D7 (h-1) , Drive voltage VD7 (h-1) , VD8 (h-1) corresponding to D8 (h-1) is changed to an average value DA3 (average value of previous pixel values D7 (h-1) , D8 (h-1) ). It changes to the corresponding average voltage.
  • the connection switching unit 104 connects the source lines SL1, SL2,..., SL10 to the short-circuit lines STL1, STL2, STL3 in response to the control by the charge share control unit 103. .., SL10 are connected to the driving units 111, 112,.
  • the driving units 111, 112,..., 1110 use the current pixel values D1 (h) , D2 (h) ,..., D10 (h) as driving voltages in synchronization with the (h + 1) th rising edge of the horizontal synchronizing signal.
  • VD1 (h) , VD2 (h) ,..., VD10 (h) are converted.
  • the voltages of the source lines SL1, SL2, SL9, and SL10 are changed from the average voltage corresponding to the average value DA1 to the current pixel values D1 (h) , D2 (h) , D9 (h) , and D10 (h) , respectively.
  • the corresponding drive voltages VD1 (h) , VD2 (h) , VD9 (h) , and VD10 (h) are changed.
  • the voltages of the source lines SL5 and SL6 change from the average voltage corresponding to the average value DA2 to the drive voltages VD5 (h) and VD6 (h) corresponding to the current pixel values D5 (h) and D6 (h) .
  • the voltages of the source lines SL7 and SL8 change from the average voltage corresponding to the average value DA3 to the drive voltages VD7 (h) and VD8 (h) corresponding to the current pixel values D7 (h) and D8 (h) .
  • the distance from the target value corresponding to the short-circuit line STLj to the current pixel value corresponding to the source line assigned to the short-circuit line STLj is the current pixel value from the previous pixel value corresponding to the source line assigned to the short-circuit line STLj. Shorter than the distance to. Therefore, the average value of the starting point values of the pixel vectors corresponding to the source lines assigned to the short-circuit line STLj (that is, the average value of the previous pixel values) is close to (or matches) the target value corresponding to the short-circuit line STLj.
  • the absolute value sum of the short-circuit vector corresponding to the source line assigned to the short-circuit line STLj may be smaller than the absolute value sum of the pixel vector corresponding to the source line assigned to the short-circuit line STLj. Can be increased.
  • the source lines SL1, SL2, SL9, SL10 corresponding to the pixel vectors VP1, VP2, VP9, VP10 that match any one of the candidate vectors associated with the short circuit line STL1 are used as the short circuit line STL1.
  • the average value DA1 of -1) approaches the target value DT1 corresponding to the short-circuit line STL1.
  • the absolute value sum of the short-circuit vectors VS1, VS2, VS9, VS10 is smaller than the absolute value sum of the pixel vectors VP1, VP2, VP9, VP10 (FIG. 6).
  • the absolute value sum of the short-circuit vectors VS5 and VS6 becomes smaller than the absolute value sum of the pixel vectors VP5 and VP6, and the source lines SL7 and SL8 are connected.
  • the absolute value sum of the short-circuit vectors VS7 and VS8 becomes smaller than the absolute value sum of the pixel vectors VP7 and VP8.
  • the sum of absolute values of the short-circuit vectors VS1, VS2, VS9, and VS10 is obtained by calculating average voltages (drive voltages VD1 (h-1) , VD2 (h-1) , VD9 (h-1) , VD10 (h-1). Equivalent to the sum of the voltage fluctuations from the drive voltage VD1 (h) , VD2 (h) , VD9 (h) , VD10 (h) to the drive voltages VD1 (h) , VD2 (h) , VD10 (h) .
  • the source lines SL5 and SL6 are electrically connected to the short-circuit line STL2
  • the source lines SL7 and SL8 are electrically connected to the short-circuit line STL3, whereby the source lines SL5 and SL5 in the (h + 1) th horizontal period are connected. It is possible to reduce the sum of the voltage fluctuations of SL6 and the sum of the voltage fluctuations of the source lines SL7 and SL8.
  • each of the n source lines SL1, SL2,..., SLn is any one of k short-circuit lines STL1, STL2,..., STLk based on the distribution of the pixel vectors VP1, VP2,.
  • the voltage fluctuations of the source lines SL1, SL2,..., SLn than when applying the conventional charge sharing technique (when all the source lines SL1, SL2,.
  • the possibility of reducing the total amount (that is, power consumption in the source lines SL1, SL2,..., SLn) can be increased.
  • the driving method of the driving voltage supply circuit 1 may be a P ⁇ Q dot inversion driving method as shown in FIG.
  • the case where the drive voltage is higher than the common voltage VCOM is expressed as “positive polarity”, and the case where the drive voltage is lower than the common voltage VCOM is expressed as “negative polarity”.
  • the drive voltage is “positive polarity”
  • the drive voltage increases as the pixel value increases.
  • the drive voltage is “negative polarity”
  • the drive voltage decreases as the pixel value increases.
  • the drive voltage generation unit 101 (drive units 111, 112,..., 11n) and the charge share control unit 103 (control units 131, 132,. ) Is supplied with a polarity inversion signal SPR for inverting the polarity of the drive voltage every Q horizontal periods.
  • the drive voltage generator 101 inverts the polarities of n drive voltages VD1, VD2,..., VDn for each P source lines in one horizontal period, and n drive voltages VD1 for each Q horizontal periods. , VD2,..., VDn are inverted in polarity.
  • Each of the driving units 111, 112,..., 11n has a positive drive mode for converting a given pixel value into a positive drive voltage, and a negative drive mode for converting a given pixel value into a negative drive voltage.
  • the drive modes of the drive units 111, 112,..., 11n are set so that the drive polarity is inverted every P drive units. Further, each of the drive units 111, 112,..., 11n switches the drive mode in response to the polarity inversion signal SPR.
  • the i-th pixel value Di (h) corresponding to the i-th source line SLi is processed as a “positive number”
  • the polarity of the drive voltage VDi (h) is “negative polarity”.
  • the pixel value Di (h) is processed as a “negative number”.
  • the signs of the pixel values D1, D2,..., Dn in the control units 131, 132,..., 13n are set so that the sign of the pixel value is inverted every P control units. 132,..., 13n invert the signs of the pixel values D1, D2,.
  • the driving period (from the (h ⁇ 1) th rising edge of the horizontal synchronization signal to the end of the activation period of the gate line GL (h ⁇ 1) .
  • the odd-numbered drive units 111, 113,... are set in the negative electrode drive mode, and the even-numbered drive units 112, 114,. That is, the polarity of odd-numbered drive voltages VD1, VD3,... Is negative, and the polarity of even-numbered drive voltages VD2, VD4,.
  • the driving voltage generation unit 101 synchronizes with the h-th rising edge of the horizontal synchronization signal in pixel values D1 (h ⁇ 1) , D2 (h-1) ,..., Dn (h-1) are converted into drive voltages VD1 (h-1) , VD2 (h-1) , ..., VDn (h-1) .
  • the polarities of the odd-numbered drive voltages VD1 (h-1) , VD3 (h-1) ,... are positive, and the even-numbered drive voltages VD2 (h-1) , VD4 (h-1) The polarity of, ... is negative.
  • pixel values D1 (h) , D2 (h) ,..., Dn (h) corresponding to the h-th horizontal period P (h) are supplied to the drive voltage supply circuit 1.
  • the charge share control unit 103 outputs the odd-numbered pixel values D1 (h) , D3 (h) ,... And the odd-numbered pixel values D1 (h ⁇ 1) , D3 ( h-1), ... a "positive number" to the even-numbered pixel value D2 (h), D4 (h ), ... and the pixel value storage portion even-numbered pixel values stored in the 102 D2 (h-1 ) , D4 (h ⁇ 1) ,... Are set as “negative numbers”, and the allocation process is executed.
  • the short-circuit lines STL1, STL2, and STL3 include a first start point range SR1a, SR2a, SR3a, a first end point range ER1a, ER2a, ER3a, a second start point range SR1b, SR2b, SR3b, as shown in FIG.
  • the second end point ranges ER1b, ER2b, and ER3b are associated with each other.
  • the sign of the pixel value in the odd-numbered control units 131, 133,..., 139 is set to “positive”, and the sign of the pixel value in the even-numbered control units 132, 134,. It is assumed that
  • the charge share control unit 103 performs odd-numbered current pixel values D1 (h) , D3 (h) ,... And odd-numbered previous pixel values D1 (h ⁇ 1) ,. D3 (h ⁇ 1) ,... Are “positive numbers”, and even-numbered current pixel values D2 (h) , D4 (h) ,... And even-numbered previous pixel values D2 (h ⁇ 1) , D4 (h ⁇ 1) ,... Are set as “negative numbers” and the allocation process is executed. As a result, a distribution of pixel values as shown in FIG. 11 is obtained.
  • the charge share control unit 103 assigns the source lines SL1, SL2, SL9, and SL10 to the short circuit line STL1, assigns the source lines SL5 and SL9 to the short circuit line STL2, and assigns the source lines SL6 and SL10 to the short circuit line STL3. Note that the charge share control unit 103 does not assign the source lines SL7 and SL8 to any of the short-circuit lines STL1, STL2, and STL3.
  • all of the source lines SL1, SL2,..., SLn are not executed in the driving period in the h ⁇ 1th horizontal period without performing the allocation process based on the pixel vectors VP1, VP2,.
  • the short-circuit lines STL1, STL2,..., STLk may be assigned to one predetermined short-circuit line (for example, the short-circuit line STL1).
  • the connection switching unit 104 electrically connects the source lines SL1, SL2,..., SLn to the predetermined short-circuit line STL1. .
  • FIG. 12 shows a configuration example of the drive voltage supply circuit 2 according to the second embodiment.
  • the drive voltage supply circuit 2 includes a pixel value storage unit 202 and a charge share control unit 203 instead of the pixel value storage unit 102 and the charge share control unit 103 shown in FIG. Other configurations are the same as those in FIG.
  • the drive method of the drive voltage supply circuit 2 may be a P ⁇ Q dot inversion drive method, or may be a drive method that does not invert the polarity of the drive voltages VD1, VD2,.
  • the pixel value storage unit 202 stores n pixel values D1, D2,..., Dn supplied every horizontal period. That is, the pixel value storage unit 202 converts the n pixel values D1, D2,..., Dn corresponding to the (h ⁇ 1) th horizontal period into n previous pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., Dn (h-1) .
  • the charge share control unit 203 includes n previous pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., Dn (h ) stored in the pixel value storage unit 202 on a number line indicating pixel values. -1) to n current pixel values D1 (h) , D2 (h) ,..., Dn (h) based on the distribution of n pixel vectors VP1, VP2,. For each of the source lines SL1, SL2,..., SLn, to which of the short-circuit lines STL1, STL2,. Decide whether to assign to any of the above.
  • the charge share control unit 203 assigns the short-circuit lines to the short-circuit lines from the average value of the previous pixel values corresponding to the source lines assigned to the short-circuit lines.
  • the sum of the absolute values of the short-circuit vector toward the current pixel value corresponding to the selected source line is smaller than the sum of the absolute values of the pixel vector toward the current pixel value from the previous pixel value corresponding to the source line assigned to the short-circuit line.
  • the connection switching unit 104 is controlled so that the source line assigned to the short-circuit line is electrically connected to the short-circuit line.
  • the charge share control unit 203 sets the variable i to “1”. That is, the charge share control unit 203 selects the first source line SL1 among the n source lines SL1, SL2,.
  • the charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit line STL1 from among the k short-circuit lines STL1, STL2,.
  • the charge share control unit 203 determines whether or not the pixel vector VPi matches any one of the candidate vectors associated with the short circuit line STLj.
  • the pixel vector VPi is a previous pixel value Di corresponding to the i-th source line (hereinafter referred to as a source line SLi) selected as a determination target among the n source lines SL1, SL2,.
  • This is a pixel vector from (h ⁇ 1) to the current pixel value Di (h)
  • the short circuit line STLj is the jth selected as the determination target among the k short circuit lines STL1, STL2,. It is the second short-circuit line.
  • the process proceeds to step ST205, and when the variable j has reached the maximum value jmax, the process proceeds to step ST207.
  • the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects a short-circuit line that is not selected as a determination target among the k short-circuit lines STL1, STL2,. Next, the process proceeds to step ST203.
  • step ST206 when the determination result in step ST203 indicates “match”, the charge share control unit 203 assigns the source line SLi to the short-circuit line STLj.
  • the charge share control unit 203 adds “1” to the variable i. That is, the charge share control unit 203 selects a source line that is not selected as a determination target among the n source lines SL1, SL2,. Next, the process proceeds to step ST202.
  • ⁇ ST209 >> On the other hand, when it is determined in step ST207 that the variable i has reached the maximum value imax (no source line not selected as a determination target remains in n source lines SL1, SL2,..., SLn). ), The charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit line STL1 from among the k short-circuit lines STL1, STL2,.
  • the charge share control unit 203 determines whether or not a source line is assigned to the short-circuit line STLj. If a source line is assigned to the short-circuit line STLj, the process proceeds to step ST211. If not, the process proceeds to step ST213.
  • the charge share control unit 203 calculates a short-circuit vector based on the average value of the previous pixel values corresponding to the source line assigned to the short-circuit line STLj and the current pixel value corresponding to the source line assigned to the short-circuit line STLj.
  • a pixel vector is calculated based on the previous pixel value and the current pixel value corresponding to the source line assigned to the short-circuit line STLj.
  • the charge share control unit 203 determines whether or not the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors.
  • the charge share control unit 203 calculates the current pixel value D1 ( from the average value of the previous pixel values D1 (h ⁇ 1) and D2 (h ⁇ 1).
  • connection switching unit 104 supplies the source lines SL1, SL2,..., SLn to the drive voltage generation unit 101 (in response to the control by the charge share control unit 203 in the charge share period in the h-th horizontal period.
  • the source line assigned to the short circuit line STLj is electrically connected to the short circuit line STLj.
  • the process proceeds to step ST214.
  • step ST213 if it is determined in step ST210 that no source line is assigned to the short-circuit line STLj, or if it is determined in step ST211 that the absolute value sum of the short-circuit vectors is not smaller than the absolute value sum of the pixel vectors, The connection switching unit 104 does not electrically connect the source lines SL1, SL2,..., SLn to the short-circuit line STLj in the charge share period in the hth horizontal period. Next, the process proceeds to step ST214.
  • the charge share control unit 203 determines whether or not the variable j has reached the maximum value jmax. That is, the charge share control unit 203 determines whether or not a short circuit line not selected as a determination target remains in the k short circuit lines STL1, STL2,..., STLk. If the variable j has not reached the maximum value jmax, the process proceeds to step ST215. If the variable j has reached the maximum value jmax, the process proceeds to step ST216.
  • ⁇ ST215 the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects a short-circuit line that is not selected as a determination target among the k short-circuit lines STL1, STL2,. Next, the process proceeds to step ST210.
  • step ST216 when it is determined in step ST214 that the variable j has reached the maximum value jmax (no short-circuit lines not selected as determination targets remain in k short-circuit lines STL1, STL2,..., STLk). ), The charge share control unit 203 determines whether or not to end the operation. When the operation is continued, the process proceeds to step ST201.
  • the charge share control unit 203 may omit step ST211. Even in this case, the sum of the voltage fluctuation amounts of the source lines SL1, SL2,..., SLn (that is, when all the source lines SL1, SL2,. , Power consumption in the source lines SL1, SL2,..., SLn) can be increased.
  • the charge share control unit 203 uses the source lines assigned to the short-circuit groups in each of the k short-circuit groups SGR1, SGR2,.
  • the sum of the absolute values of the short-circuit vectors respectively going from the average value of the previous pixel values corresponding to the current pixel value corresponding to the source line assigned to the short-circuit group to the previous pixel corresponding to the source line assigned to the short-circuit group N source lines SL1, SL2,..., SLn are short-circuited so as to be smaller than the sum of absolute values of pixel vectors respectively directed from the value to the current pixel value corresponding to the source line assigned to the short-circuit group.
  • Group assignment processing assigned to the groups SGR1, SGR2,..., SGRk may be executed.
  • the connection switching unit 104 electrically connects the source line assigned to the short-circuit group SGRj to the short-circuit line STLj corresponding to the short-circuit group SGRj. You may connect to.
  • the total voltage fluctuation amount of the source lines SL1, SL2,..., SLn can be reduced. Thereby, the efficiency of charge redistribution among the source lines SL1, SL2,..., SLn can be increased. Further, even if the polarity of the drive voltages VD1, VD2,..., VDn is not reversed, charge redistribution can be efficiently performed among the source lines SL1, SL2,.
  • the charge share control unit 203 performs group assignment processing so that the number of source lines assigned to the short-circuit group is maximized in at least one of the k short-circuit groups SGR1, SGR2,. May be executed.
  • the initial state of the average calculation group, the candidate group, and the selection target group is a state in which none of the source lines SL1, SL2,.
  • the charge share control unit 203 assigns n source lines SL1, SL2,..., SLn to k preprocessing groups PGR1, PGR2,. For example, the charge share control unit 203 uses the n source lines SL1 based on the range of pixel value levels to which each of the n current pixel values D1 (h) , D2 (h) ,..., Dn (h) belongs. , SL2,..., SLn are assigned to k preprocessing groups PGR1, PGR2,.
  • the charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit line STL1 from among the k short-circuit lines STL1, STL2,.
  • the charge share control unit 203 assigns the source line assigned to the preprocessing group PGRj to the average calculation group.
  • the preprocessing group PGRj is a jth preprocessing group selected as a determination target among the k preprocessing groups PGR1, PGR2,..., PGRk.
  • the charge share control unit 203 calculates the average value of the previous pixel values corresponding to the source lines assigned to the average calculation group.
  • the charge share control unit 203 sets the variable i to “1”. That is, the charge share control unit 203 selects the first source line among the source lines assigned to the preprocessing group PGRj as a determination target.
  • ⁇ ST306 >> Next, based on the average value calculated in step ST304 and the previous pixel value and the current pixel value corresponding to the source line SLi assigned to the preprocessing group PGRj, the charge share control unit 203 uses the short circuit vector VSi and the pixel. A vector VPi is calculated.
  • the source line SLi assigned to the preprocessing group PGRj is the i-th source line selected as a determination target among the source lines assigned to the preprocessing group PGRj, and the short circuit vector VSi is , A vector from the average value calculated in step ST304 toward the current pixel value Di (h) corresponding to the source line SLi, and the pixel vector VPi is the previous pixel value Di (h ⁇ ) corresponding to the source line SLi. This is a vector from 1) to the current pixel value Di (h-1) .
  • the charge share control unit 203 determines whether or not the short circuit vector VSi is shorter than the pixel vector VPi. If the short circuit vector VSi is shorter than the pixel vector VPi, the process proceeds to step ST307, and if not, the process proceeds to step ST308.
  • the charge share control unit 203 assigns the source line SLi assigned to the preprocessing group PGRj to the selection target group.
  • the charge share control unit 203 determines whether or not the variable i has reached the maximum value imax (here, imax is the number of source lines included in the preprocessing group PGRj). That is, the charge share control unit 203 determines whether there are any source lines that are not selected as a determination target among the source lines included in the preprocessing group PGRj.
  • the process proceeds to step ST309, and when the variable i has reached the maximum value imax, the process proceeds to step ST310.
  • the charge share control unit 203 adds “1” to the variable i. That is, the charge share control unit 203 selects a source line that is not selected as a determination target from among the source lines included in the preprocessing group PGRj as the next determination target. Next, the process proceeds to step ST306.
  • step ST310 determines that the number of source lines allocated to the selection target group is the number of source lines allocated to the candidate group. It is determined whether the number is greater than the number. If the number of source lines allocated to the selection target group is not greater than the number of source lines allocated to the candidate group, the process proceeds to step ST311 and the number of source lines allocated to the selection target group is determined as the candidate group. If the number is greater than the number of allocated source lines, the process proceeds to step ST312.
  • the charge share control unit 203 calculates the absolute value sum of the short-circuit vector and the absolute value sum of the pixel vector based on the previous pixel value and the current pixel value corresponding to the source line assigned to the candidate group. Then, the charge share control unit 203 determines whether or not the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors. For example, when the source lines SL1 and SL2 are assigned to the candidate group, the charge share control unit 203 calculates the current pixel value D1 (h ) from the average value of the previous pixel values D1 (h-1) and D2 (h-1).
  • VP1 and VP2 are calculated, and it is determined whether or not the absolute value sum of the short-circuit vectors VP1 and VP2 is smaller than the absolute value sum of the pixel vectors VP1 and VP2. If the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors VP1 and VP2. If the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors, the process proceeds to step ST313. Otherwise, the process proceeds to step ST312.
  • the charge share control unit 203 changes the source line assigned to each of the average calculation group and the candidate group to the source line assigned to the selection target group. For example, when the source lines SL1, SL2, and SL3 are assigned to the selection target group, the charge share control unit 203 deletes the source lines assigned to the average calculation group and the candidate group, and calculates the average calculation group and the candidate. Source lines SL1, SL2, and SL3 are newly assigned to each of the groups. Next, the process proceeds to step ST304.
  • step ST313 when it is determined in step ST311 that the absolute value sum of the short-circuit vectors corresponding to the candidate group is smaller than the absolute value sum of the pixel vectors, the charge share control unit 203 uses the source line assigned to the candidate group as the short-circuit group. Assign to SGRj.
  • the short-circuit group SGRj is the j-th short-circuit group corresponding to the pretreatment group PGRj among the k short-circuit groups SGR1, SGR2,.
  • step ST311 When the number of source lines assigned to the candidate group in step ST311 is “0” or “1”, the charge share control unit 203 performs the processing in step ST311 (the absolute value sum of the short-circuit vectors is the absolute value of the pixel vector).
  • the process of step ST314 may be executed after executing the process of allocating the source line to the short-circuit group SGRj without executing the process of determining whether or not the sum is smaller than the value sum) and the process of step ST313.
  • the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects, as the next determination target, a preprocessing group that is not selected as a determination target from among the k preprocessing groups PGR1, PGR2,. Further, the charge share control unit 203 sets the average calculation group, the candidate group, and the selection target group to an initial state (a state where none of the source lines SL1, SL2,..., SLn is assigned). Next, the process proceeds to step ST303.
  • step ST316 when it is determined in step ST316 that the variable j has reached the maximum value jmax, the charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit group SGR1 from among the k short-circuit groups SGR1, SGR2,.
  • the charge share control unit 203 determines whether or not a source line is assigned to the short-circuit group SGRj. If a source line is assigned to the short-circuit group SGRj, the process proceeds to step ST318, and if not, the process proceeds to step ST319.
  • connection switching unit 104 responds to the control by the charge share control unit 203 (result of the group assignment process), and the source line assigned to the short-circuit group SGRj. Is electrically connected to the short-circuit line STLj.
  • the process proceeds to step ST320.
  • step ST319 when it is determined in step ST317 that the source line is not assigned to the short-circuit group SGRj, the connection switching unit 104 electrically connects the source lines SL1, SL2,. Do not connect to. Next, the process proceeds to step ST320.
  • ⁇ ST321 the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects a short-circuit group that is not selected as a determination target from among the k short-circuit groups SGR1, SGR2,. Next, the process proceeds to step ST317.
  • step ST322 determines whether or not to end the operation. When the operation is continued, the process proceeds to step ST301.
  • the pixel value storage unit 202 stores the previous pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., D20 (h ⁇ 1) as shown in FIG.
  • step ST301 is executed, and odd-numbered source lines SL1, SL3,..., SL19 (source lines to which a positive drive voltage is supplied) are assigned to the preprocessing group PGR1, and even-numbered source lines SL2, SL4,..., SL20 (source lines to which a negative drive voltage is supplied) are assigned to the preprocessing group PGR2.
  • steps ST302 to ST304 are executed, and the source lines SL1, SL3,..., SL19 assigned to the preprocessing group PGR1 are assigned to the average calculation group, and the previous pixels corresponding to the source lines SL1, SL3,.
  • An average value AVEP1 of the values D1 (h-1) , D3 (h-1) , ..., D19 (h-1) is calculated.
  • steps ST305 to ST309 are executed, and odd-numbered source lines SL1, SL3,..., SL15 excluding the source lines SL11, SL17, and SL19 are assigned to the selection target group.
  • step ST310 is executed.
  • step ST312 is executed.
  • odd-numbered source lines SL1, SL3,..., SL15 source lines assigned to the selection target group
  • SL11, SL17, SL19 are assigned to the average calculation group and the candidate group.
  • step ST304 is executed, and previous pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , D7 (h-1) assigned to the average calculation group and corresponding to the source line are executed. , D9 (h-1) , D13 (h-1) , D15 (h-1) average value AVEP2 is calculated.
  • steps ST305 to ST309 are executed, and the odd-numbered source lines SL1, SL3,..., SL19 excluding the source lines SL11 and SL17 are assigned to the selection target group.
  • step ST310 is executed.
  • step ST312 is executed. Accordingly, source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, and SL19 (source lines assigned to the selection target group) are assigned to each of the average calculation group and the candidate group.
  • step ST304 is executed, and previous pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , D7 (h-1) assigned to the average calculation group and corresponding to the source line are executed.
  • D9 (h-1) , D13 (h-1) , D15 (h-1) , D19 (h-1) are averaged AVEP3.
  • steps ST305 to ST309 are executed, and the odd-numbered source lines SL1, SL3,..., SL19 excluding the source lines SL11 and SL17 are assigned to the selection target group.
  • step ST310 is executed.
  • step ST311 is executed.
  • the absolute value sum of the short-circuit vectors respectively corresponding to the odd-numbered source lines SL1, SL3,..., SL19 (source lines assigned to the candidate group) excluding the source lines SL11 and SL17 is the absolute value sum of the pixel vectors.
  • Step ST313 is executed. Thereby, the odd-numbered source lines SL1, SL3,..., SL19 (source lines assigned to the candidate group) excluding the source lines SL11, SL17 are assigned to the short-circuit group SGR1.
  • steps ST314 and ST315 are executed, and the preprocessing group PGR2 is selected as a determination target.
  • the same processing as described above is executed for the preprocessing group PGR2. That is, in the first determination process (ST303 to ST312), the even-numbered source lines SL2, SL4,..., SL20 are assigned to the average calculation group, and the even-numbered previous pixel values D2 (h ⁇ 1) , D4 ( h-1) , ..., D20 Based on the average value AVEN1 of (h-1) , even-numbered source lines SL2, SL4, ..., SL16 excluding the source lines SL12, SL18, SL20 are assigned to the selection target group.
  • even-numbered source lines SL2, SL4,..., SL16 excluding the source lines SL12, SL18, SL20 are assigned to the average calculation group, and the previous pixel value D12 ( average of even-numbered previous pixel values D2 (h-1) , D4 (h-1) , ..., D16 (h-1) excluding h-1) , D18 (h-1) , D20 (h-1) Based on the value AVEN2, even-numbered source lines SL2, SL4,.
  • even-numbered source lines SL2, SL4,..., SL20 excluding the source lines SL12, SL18 are assigned to the average calculation group, and the previous pixel value D12 ( h-1) , D18 (h-1) excluding even-numbered previous pixel values D2 (h-1) , D4 (h-1) , ..., D20 (h-1) based on the average value AVEN3
  • the even-numbered source lines SL2, SL4,..., SL20 excluding the lines SL12, SL18 are assigned to the selection target group, and in step ST313, the even-numbered source lines SL2, SL4,.
  • the source line assigned to the candidate group) is assigned to the short-circuit group SGR2.
  • the connection switching unit 104 sends the source lines SL1, SL2,..., SL20 to the drive voltage generation unit 101 (drive unit 111) in response to the control by the charge share control unit 203. , 112,..., 1120), and then the source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, SL19 assigned to the short-circuit group SGR1 are made short-circuit lines STL1 based on the result of the group assignment process.
  • the source lines SL2, SL4, SL6, SL8, SL10, ST14, ST16, SL20 assigned to the short-circuit group SGR2 are electrically connected to the short-circuit line STL2.
  • Connection switching unit 104 does not electrically connect source lines SL11, SL12, SL17, and SL18 to any of short-circuit lines STL1 and STL2.
  • the voltages of the source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, and SL19 are changed to the previous pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , Drive voltages VD1 (h-1) , VD3 (h- ) corresponding to D7 (h-1) , D9 (h-1) , D13 (h-1) , D15 (h-1) , D19 (h-1) 1) , VD5 (h-1) , VD7 (h-1) , VD9 (h-1) , VD13 (h-1) , VD15 (h-1) , VD19 (h-1) from the average value DAP (previous Pixel values D1 (h-1) , D3 (h)
  • the voltages of the source lines SL2, SL4, SL6, SL8, SL10, ST14, ST16, SL20 are respectively the previous pixel values D2 (h-1) , D4 (h-1) , D6 (h-1) , D8 (h -1) , D10 (h-1) , D14 (h-1) , D16 (h-1) , D20 (h-1) according to drive voltages VD2 (h-1) , VD4 (h-1) , VD6 (h-1) , VD8 (h-1) , VD10 (h-1) , VD14 (h-1) , VD16 (h-1) , VD20 (h-1) from the average value DAN (previous pixel value D2 (H-1) , D4 (h-1) , D6 (h-1) , D8 (h-1) , D10 (h-1) , D14 (h-1) , D16 (h-1) , D20 (h-1) from the average
  • the voltages of the source lines SL11, SL12, SL17, and SL18 correspond to the previous pixel values D11 (h-1) , D12 (h-1) , D17 (h-1) , and D18 (h-1) , respectively.
  • the drive voltages VD11 (h-1) , VD12 (h-1) , VD17 (h-1) , and VD18 (h-1) are maintained.
  • the connection switching unit 104 disconnects the source lines SL1, SL2,..., SL20 from the short-circuit lines STL1, STL2 in response to the control by the charge share control unit 203. Then, the source lines SL1, SL2,..., SL20 are connected to the drive voltage generation unit 101 (drive units 111, 112,..., 1120). Further, the driving units 111, 112,..., 1120 drive the current pixel values D1 (h) , D2 (h) ,..., D20 (h) as driving voltages in synchronization with the (h + 1) th rising edge of the horizontal synchronizing signal.
  • VD1 (h) , VD2 (h) , ..., VD20 (h) are converted.
  • the voltages of the source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, and SL19 are changed from the average voltage corresponding to the average value DAP to the current pixel values D1 (h) , D3 (h) , and D5 ( h) , D7 (h) , D9 (h) , D13 (h) , D15 (h) , D19 (h) corresponding to drive voltages VD1 (h) , VD3 (h) , VD5 (h) , VD7 (h ) ) , VD9 (h) , VD13 (h) , VD15 (h) , VD19 (h) .
  • the voltages of the source lines SL2, SL4, SL6, SL8, SL10, ST14, ST16, SL20 are determined from the average voltage corresponding to the average value DAN to the current pixel values D2 (h) , D4 (h) , D6 (h) , D8 ( h) , D10 (h) , D14 (h) , D16 (h) , D20 (h) corresponding to drive voltages VD2 (h) , VD4 (h) , VD6 (h) , VD8 (h) , VD10 (h ) ) , VD14 (h) , VD16 (h) , VD20 (h) .
  • the voltages of the source lines SL11, SL12, SL17, and SL18 are changed from the driving voltages VD11 (h ⁇ 1) , VD12 (h ⁇ 1) , VD17 (h ⁇ 1) , VD18 (h ⁇ 1)) to the current pixel, respectively.
  • the drive voltages VD11 (h) , VD12 (h) , VD17 (h) , and VD18 (h) change according to the values D11 (h) , D12 (h) , D17 (h) , and D18 (h) .
  • the charge share control unit 203 corresponds to the short-circuit group from the previous pixel value corresponding to the source line associated with the short-circuit group in at least one of the k short-circuit groups SGR1, SGR2,.
  • the group assignment process may be executed so that the sum of the target vectors toward the target value to be approximated to “0”.
  • charge share control section 203 executes steps ST401 to ST415 instead of step ST301 shown in FIG. It is assumed that the initial state of the addition / subtraction calculation group is a state where none of the source lines SL1, SL2,.
  • the charge share control unit 203 uses the n source lines SL1 based on the range of pixel value levels to which each of the n current pixel values D1 (h) , D2 (h) ,..., Dn (h) belongs. , SL2,..., SLn are assigned to y weighting groups WGR1, WGR2,.
  • the charge share control unit 203 sets the variable z to “1”. That is, the charge share control unit 203 selects the first weighting group among the y weighting groups WGR1, WGR2,..., WGRy as a determination target.
  • the charge share control unit 203 adds a weight value to the source line assigned to the weighting group WGRz.
  • the weighting group WGRz is the z-th weighting group selected as the determination target among the y weighting groups WGR1, WGR2,..., WGRy.
  • the weight value is the position of the previous pixel value corresponding to the source line assigned to the weighting group WGRz (the position on the number line indicating the pixel value), the position of the current pixel value, and the target corresponding to the weighting group WGRz. You may determine based on a value etc. For example, as shown in FIGS.
  • the absolute value of the weight value increases, and the sign of the weight value indicates that the previous pixel value is smaller than the current pixel value. In this case, it is “positive”, and it is “negative” when the previous pixel value is larger than the current pixel value.
  • the weight value corresponding to the case of moving from the previous pixel value to the current pixel value without straddling the target value is “0”, and the amount of movement from the previous pixel value to the target value is Of the two weight values that are the same, “(L)” is added to the smaller moving amount from the previous pixel value to the current pixel value, and the moving amount from the previous pixel value to the current pixel value is larger. Is appended with “(H)”.
  • the charge share control unit 203 adds source values to which weight values +2 (H), +2 (L), ⁇ 2 (H), and ⁇ 2 (L) are added among the source lines assigned to the weighting group WGRz. Is assigned to an addition / subtraction calculation group.
  • ⁇ ST405 the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. When the sum of the weight values is not “0”, the process proceeds to step ST406, and when the sum of the weight values is “0”, the process proceeds to step ST413.
  • the charge share control unit 203 increases the weight value + 1 of the source lines assigned to the weighting group WGRz so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”.
  • a source line to which (L) or -1 (L) is added is assigned to an addition / subtraction calculation group.
  • the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. If the sum of the weight values is not “0”, the process proceeds to step ST408, and if the sum of the weight values is “0”, the process proceeds to step ST413.
  • the charge share control unit 203 increases the weight value + 1 of the source lines assigned to the weighting group WGRz so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”.
  • a source line to which (H) or -1 (H) is added is assigned to an addition / subtraction calculation group.
  • the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. If the sum of the weight values is not “0”, the process proceeds to step ST410, and if the sum of the weight values is “0”, the process proceeds to step ST413.
  • the charge share control unit 203 adds the weight value +2 (L) or ⁇ 2 (L) so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”. Delete the selected source line from the addition / subtraction calculation group.
  • the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. If the sum of the weight values is not “0”, the process proceeds to step ST412. If the sum of the weight values is “0”, the process proceeds to step ST413.
  • ⁇ ST412 the charge share control unit 203 adds the weight value +2 (H) or ⁇ 2 (H) so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”. Delete the selected source line from the addition / subtraction calculation group.
  • the charge share control unit 203 selects one of the k preprocessing groups PGR1, PGR2,..., PGRk as the source line allocated to the addition / subtraction calculation group (the source line is allocated). Assign to no preprocessing group).
  • the charge share control unit 203 assigns source lines not assigned to the addition / subtraction calculation group among the source lines assigned to the weighting group WGRz to another of the k preprocessing groups PGR1, PGR2,. Assign to a preprocessing group (a preprocessing group to which no source line is assigned).
  • the charge share control unit 203 adds “1” to the variable z. That is, the charge share control unit 203 selects a weighting group that is not selected as a determination target among the y weighting groups WGR1, WGR2,..., WGRy as the next determination target. In addition, the charge share control unit 203 sets the addition / subtraction calculation group to an initial state (a state in which none of the source lines SL1, SL2,..., SLn is assigned). Next, the process proceeds to step ST403.
  • the charge share control unit 203 instead of determining whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. It may be determined whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is within a predetermined allowable range (allowable range including “0”).
  • the current pixel value D1 as shown in FIG. 23 (h), D2 (h ), ..., D20 (h) is supplied to the drive voltage supply circuit 2. Further, the pixel value storage unit 202 stores the previous pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., D20 (h ⁇ 1) as shown in FIG.
  • step ST401 is executed, and odd-numbered source lines SL1, SL3,..., SL19 (source lines to which positive drive voltage is supplied) are assigned to the weighting group WGR1 and even-numbered source lines SL2, SL4. ,..., SL20 (source line to which a negative drive voltage is supplied) is assigned to the weighting group WGR2.
  • steps ST402 and ST403 are executed, and the sources assigned to the weighting group WGR1 as shown in FIG. 23 based on the correspondence relationship between the position of the previous pixel value and the current pixel value and the weight value shown in FIG. A weight value is added to each of the lines SL1, SL3,.
  • steps ST404 to ST413 are executed, and the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 assigned to the addition / subtraction calculation group are assigned to the preprocessing group PGR1, and the source lines SL1, SL7, and SL15 are assigned. Assigned to the preprocessing group PGR2.
  • Steps ST415 and ST416 are executed, and the weighting group WGR2 is selected as a determination target.
  • steps ST402 and ST403 are executed, and the source lines assigned to the weighting group WGR2 as shown in FIG. 23 based on the correspondence relationship between the positions of the previous pixel value and the current pixel value and the weight values shown in FIG. A weight value is added to each of SL2, SL4,.
  • steps ST404 to ST413 are executed, and the source lines SL8, SL10, SL14, SL18, SL20 assigned to the addition / subtraction calculation group are assigned to the preprocessing group PGR3, and the source lines SL2, SL4, SL6, SL12, SL16 are assigned. Assigned to the preprocessing group PGR4.
  • steps ST302 to ST315 are executed for each of the preprocessing groups PGR1, PGR2, PGR3, and PGR4.
  • the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 are assigned to the short-circuit group SGR1
  • the source lines SL1, SL7, and SL15 are assigned to the short-circuit group SGR2
  • the source line is connected to the short-circuit group SGR3.
  • SL8, SL10, SL14, SL18, and SL20 are assigned
  • source lines SL4, SL6, and SL16 are assigned to the short-circuit group SGR4.
  • the source lines SL2 and SL12 are not assigned to any of the short-circuit groups SGR1, SGR2, SGR3, and SGR4.
  • the connection switching unit 104 sends the source lines SL1, SL2,..., SL20 to the drive voltage generation unit 101 (drive unit 111) in response to the control by the charge share control unit 203. , 112,..., 1120), the source lines SL3, SL5, SL9, SL11, SL13, SL17, SL19 assigned to the short-circuit group SGR1 are electrically connected to the short-circuit line STL1 and assigned to the short-circuit group SGR2.
  • the connected source lines SL1, SL7, SL15 are electrically connected to the short-circuit line STL2, and the source lines SL8, SL10, SL14, SL18, SL20 assigned to the short-circuit group SGR3 are electrically connected to the short-circuit line STL3.
  • Source lines SL4, SL6, SL1 assigned to group SGR4 Electrically connected to the short-circuit line STL4 a.
  • Connection switching unit 104 does not electrically connect source lines SL2 and SL12 to any of short-circuit lines STL1, STL2, STL3, and STL4.
  • the voltages of the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 are changed to the previous pixel values D3 (h-1) , D5 (h-1) , D9 (h-1) , and D11 ( h-1) , D13 (h-1) , D17 (h-1) , D19 (h-1) according to drive voltages VD3 (h-1) , VD5 (h-1) , VD9 (h-1) , VD11 (h-1) , VD13 (h-1) , VD17 (h-1) , VD19 (h-1) to the average value DAP1 (previous pixel values D3 (h-1) , D5 (h-1) , D9 (h-1) , D11 (h-1) , D13 (h-1) , D17 (h-1) , D19 (h-1) average value).
  • Source lines SL1, SL7, SL15 voltage respectively, before the pixel value D1 (h-1), D7 (h-1), D15 (h-1) driving voltage corresponding to VD1 (h-1), VD7 ( h-1) and VD15 (h-1) to an average voltage corresponding to the average value DAP2 (average value of previous pixel values D1 (h-1) , D7 (h-1) and D15 (h-1)) To do.
  • the voltages of the source lines SL8, SL10, SL14, SL18, SL20 are respectively the previous pixel values D8 (h-1) , D10 (h-1) , D14 (h-1) , D18 (h-1) , D20 ( h-1) according to the drive voltage VD8 (h-1) , VD10 (h-1) , VD14 (h-1) , VD18 (h-1) , VD20 (h-1) from the average value DAN1 (previous pixel)
  • the average voltage changes according to the values D8 (h-1) , D10 (h-1) , D14 (h-1) , D18 (h-1) , D20 (h-1)) .
  • the voltages of the source lines SL4, SL6, and SL16 are respectively driven by driving voltages VD4 (h-1) and VD6 ( in accordance with the previous pixel values D4 (h-1) , D6 (h-1) and D16 (h-1). h-1) , VD16 (h-1) to an average voltage DAN2 (average value of previous pixel values D4 (h-1) , D6 (h-1) , D16 (h-1)) To do.
  • the voltage of the source line SL2, SL12 respectively, before the pixel value D2 (h-1), D12 (h-1) driving voltage corresponding to the VD2 (h-1), maintained at VD12 (h-1) Is done.
  • the connection switching unit 104 connects the source lines SL1, SL2,..., SL20 to the short-circuit lines STL1, STL2, STL3 in response to the control by the charge share control unit 203.
  • STL4 the source lines SL1, SL2,..., SL20 are connected to the drive voltage generation unit 101 (drive units 111, 112,..., 1120).
  • the driving units 111, 112,..., 1120 drive the current pixel values D1 (h) , D2 (h) ,..., D20 (h) as driving voltages in synchronization with the (h + 1) th rising edge of the horizontal synchronizing signal.
  • VD1 (h) , VD2 (h) , ..., VD20 (h) are converted.
  • the voltages of the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 are changed from the average voltage corresponding to the average value DAP1 to the current pixel values D3 (h) , D5 (h) , and D9 (h), respectively.
  • Source lines SL1, SL7, SL15 voltage respectively, the mean value the current pixel value from the average voltage corresponding to DAP2 D1 (h), D7 ( h), D15 (h) drive voltage VD1 (h) in response to, VD7 (H) , VD15 (h) .
  • the voltages of the source lines SL8, SL10, SL14, SL18, and SL20 are the current pixel values D8 (h) , D10 (h) , D14 (h) , D18 (h) , D20 from the average voltage corresponding to the average value DAN1, respectively.
  • the drive voltages VD8 (h) , VD10 (h) , VD14 (h) , VD18 (h) , VD20 (h) corresponding to (h) are changed.
  • Source line SL4, SL6, SL16 voltage respectively, the mean value the current pixel value from the average voltage corresponding to DAN2 D4 (h), D6 ( h), D16 drive voltage VD4 corresponding to (h) (h), VD6 (H) and VD16 (h) .
  • the voltage of the source line SL2, SL12 respectively, the drive voltage VD2 (h-1), VD12 (h-1) from the current pixel value D2 (h), D12 (h ) a drive voltage corresponding to the VD2 (h) , VD12 (h) .
  • FIG. 25 shows a configuration example of the drive voltage supply circuit 3 according to the third embodiment.
  • the drive voltage supply circuit 3 includes a pixel value storage unit 302, an assignment control unit 303, and a control switching unit 304 in addition to the configuration of the drive voltage supply circuit 1 shown in FIG.
  • the drive system of the drive voltage supply circuit 3 may be a drive system that does not invert the polarity of the drive voltages VD1, VD2,..., VDn, or may be a P ⁇ Q dot inversion drive system.
  • the pixel value storage unit 302 stores n pixel values D1, D2,..., Dn supplied every horizontal period. That is, the pixel value storage unit 202 converts the n pixel values D1, D2,..., Dn corresponding to the (h ⁇ 1) th horizontal period into n previous pixel values D1 (h ⁇ 1) , D2 (h ⁇ 1) ,..., Dn (h-1) .
  • the assignment control unit 303 corresponds to the source line assigned to the short-circuit group in each of the k short-circuit groups SGR1, SGR2,.
  • the absolute value sum of the short-circuit vectors respectively going from the average value of the previous pixel values to the current pixel value corresponding to the source line assigned to the short-circuit group is calculated from the previous pixel value corresponding to the source line assigned to the short-circuit group.
  • the n source lines SL1, SL2,..., SLn are divided into k short-circuit groups SGR1, so as to be smaller than the absolute value sum of the pixel vectors respectively directed to the current pixel values corresponding to the source lines assigned to the short-circuit groups.
  • a group assignment process to assign to SGR2,..., SGRk is executed. Note that the allocation control unit 303 may execute the same operation as the operation of the charge share control unit 203 (FIGS. 13, 14 to 16, FIG. 19, FIG. 20, etc.).
  • the control switching unit 304 includes k short-circuit lines STL1 having k source lines assigned to the k short-circuit groups SGR1, SGR2,. , STL2,..., STLk are controlled so as to be electrically connected to each other.
  • the control switching unit 304 is assigned to the k short-circuit lines STL1, STL2,..., STLk by the n control units 131, 132,.
  • the connection switching unit 104 is controlled so that the source line is electrically connected to the k short-circuit lines STL1, STL2,.
  • the control switching unit 304 includes n switching units 311, 312,..., 31 n respectively corresponding to n source lines SL 1, SL 2,.
  • the i-th switching unit (hereinafter referred to as a switching unit 31i) among the switching units 311, 312, ..., 31 responds to the control by the allocation control unit 303.
  • the connection switching unit 104 (the supply switch SWi and the k short-circuit switches SWi1, SWi2,..., SWik) is controlled.
  • the switching unit 31i responds to the control by the control unit 13i, and the connection switching unit 104 (the supply switch SWi and the k short-circuit switches SWi1, SWi2,. SWik) is controlled.
  • the supply switch SWi is a supply switch corresponding to the i-th source line SLi among the n supply switches SW1, SW2,..., SWn, and the short-circuit switches SWi1, SWi2,. , N ⁇ k short-circuit switches SW11, SW12,..., SWnk are k short-circuit switches corresponding to the i-th source line SLi.
  • the drive voltage generation unit 101, the pixel value storage unit 102, the charge share control unit 103, the connection switching unit 104, and the control switching unit 304 are mounted on a semiconductor chip, and the pixel value storage unit 302 and the allocation control unit 303 are externally controlled. You may mount in an apparatus (for example, image engine etc.). As described above, by causing the external control device provided outside the semiconductor chip to perform arithmetic processing (group allocation processing or the like), the configuration of the semiconductor chip can be simplified and the manufacturing cost can be reduced.
  • the drive voltage supply circuit 1 may further include n adjustment units 411, 412,..., 41n corresponding to the n source lines SL1, SL2,.
  • the control unit 13i uses the source line SLi as one of the short-circuit lines STL1, STL2,. Is assigned to the target value corresponding to the short-circuit line to which the source line SLi is assigned and the current pixel value Di (h ) so that the voltage of the source line SLi becomes the drive voltage VDi during a predetermined settling period. )
  • the adjustment unit 41i increases the output current amount of the drive unit 11i as the difference between the target value corresponding to the short-circuit line to which the source line SLi is assigned and the current pixel value Di (h) is larger.
  • the adjustment units 411, 412,..., 41n are also applicable to the drive voltage supply circuits shown in FIGS.
  • the drive voltage supply circuit described above can efficiently perform charge redistribution among n source lines even when the polarity of n drive voltages is not reversed. Useful for.
  • Display panel 20 Gate driver 101
  • Source driver 102 Pixel value storage unit 103
  • Charge share control unit 104 Connection switching unit STL1, STL2, ..., STLk Short-circuit line SL1, SL2, ..., SLn Source line GL1, GL2,..., GLm gate line 100 pixel unit 111, 112,..., 11n drive unit 121, 122,..., 12n storage unit 131, 132,.

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Abstract

A drive voltage generator unit (101) converts n present pixel values corresponding to an hth horizontal period into n drive voltages (VD1, VD2, …, VDn). A pixel value storage unit (102) stores n present pixel values corresponding to an h-1th horizontal period as n prior pixel values. A charge share control unit (103) determines, on the basis of the distribution of n pixel vectors heading from the n prior pixel values stored in the pixel value storage unit (102) to the respective n present pixel values corresponding to the hth horizontal period, either which short circuit line, from among short circuit lines (STL1, STL2, …, STLk), to which source lines (SL1, SL2, …, SLn) are to be allocated, or not to allocate the source lines to any of the short circuit lines. A connection switch unit (104) electrically connects the source lines that are allocated to the respective short circuit lines (STL1, STL2, …, STLk) to the short circuit lines thereof.

Description

駆動電圧供給回路、表示装置Drive voltage supply circuit, display device
　この発明は、複数の駆動電圧を複数のソース線にそれぞれ供給する駆動電圧供給回路に関し、さらに詳しくは、複数のソース線の間で電荷を再分配するチャージシェア技術に関する。 The present invention relates to a drive voltage supply circuit for supplying a plurality of drive voltages to a plurality of source lines, and more particularly to a charge sharing technique for redistributing charges among a plurality of source lines.
　アクティブマトリクス型の表示装置などにおいて、１水平期間毎に与えられるｎ個（ｎは、２以上の整数）の画素値に応じたｎ個の駆動電圧を表示パネルに設けられたｎ本のソース線にそれぞれ供給する駆動電圧供給回路（例えば、ソースドライバ）が利用されている。ｎ本のソース線にそれぞれ供給されたｎ個の駆動電圧は、ｎ本のソース線に寄生する寄生容量や表示パネルの画素部に設けられた表示素子（例えば、液晶素子）の充放電によって消費される。ｎ本のソース線における消費電力を削減するために、ドット反転駆動方式を採用した表示装置では、チャージシェア技術が利用されている（例えば、特許文献１など）。ここで、ドット反転駆動方式とは、１本のソース線毎にｎ個の駆動電圧の極性（コモン電圧に対する極性）を反転させるとともに１水平期間毎にｎ個の駆動電圧の極性を反転させる駆動方式のことである。また、チャージシェア技術とは、第ｈ番目の水平期間においてｎ個の駆動電圧の極性を反転させる場合に、第ｈ番目の水平期間においてｎ個の駆動電圧がｎ本のソース線にそれぞれ供給される前に、ｎ本のソース線を全て同時に短絡させてｎ本のソース線の間で電荷を再分配することにより、ｎ本のソース線の電圧をコモン電圧付近に変化させる技術のことである。この技術により、第ｈ番目の水平期間におけるｎ本のソース線の電圧変動量を削減でき、その結果、ｎ本のソース線における消費電力を削減できる。 In an active matrix display device or the like, n source lines provided on a display panel with n drive voltages corresponding to n (n is an integer of 2 or more) pixel values given every horizontal period. A drive voltage supply circuit (for example, a source driver) for supplying the signal to each is used. The n drive voltages respectively supplied to the n source lines are consumed by parasitic capacitance parasitic on the n source lines and charging / discharging of display elements (for example, liquid crystal elements) provided in the pixel portion of the display panel. Is done. In order to reduce power consumption in n source lines, a charge sharing technique is used in a display device that employs a dot inversion driving method (for example, Patent Document 1). Here, the dot inversion driving method is a driving in which the polarity of n driving voltages (polarity with respect to the common voltage) is inverted for each source line and the polarity of n driving voltages is inverted every horizontal period. It is a method. In the charge sharing technique, when the polarity of n driving voltages is reversed in the h-th horizontal period, n driving voltages are supplied to n source lines in the h-th horizontal period, respectively. This is a technique for changing the voltage of n source lines to near the common voltage by simultaneously shorting all n source lines and redistributing charges among the n source lines. . With this technique, the voltage fluctuation amount of the n source lines in the h-th horizontal period can be reduced, and as a result, power consumption in the n source lines can be reduced.
特開２００５－２２２０７２号公報JP 2005-222072 A
　しかしながら、従来のチャージシェア技術では、ｎ個の駆動電圧の極性を反転させることを前提としているので、ｎ個の駆動電圧の極性を反転させない場合にはｎ本のソース線の電圧変動量を削減できない可能性がある。例えば、第ｈ番目の水平期間においてｎ個の駆動電圧の極性を反転させない場合、第ｈ番目の水平期間においてｎ個の駆動電圧がｎ本のソース線にそれぞれ供給される前に、従来のチャージシェア処理（ｎ本のソース線を全て同時に短絡させる処理）を実行したとしても、ｎ本のソース線の電圧の変化方向や変化量に偏りがある場合には、第ｈ番目の水平期間におけるｎ本のソース線の電圧変動量を削減できない場合がある。このように、従来のチャージシェア技術では、ｎ個の駆動電圧の極性を反転させない場合にｎ本のソース線の間で電荷再分配を効率良く実行することが困難である。 However, the conventional charge sharing technique is based on the premise that the polarities of n driving voltages are reversed, so that the voltage fluctuation amount of n source lines is reduced when the polarities of n driving voltages are not reversed. It may not be possible. For example, when the polarity of the n drive voltages is not inverted in the h-th horizontal period, the conventional charge is performed before the n drive voltages are supplied to the n source lines in the h-th horizontal period. Even if share processing (processing for simultaneously shorting all n source lines) is performed, if there is a bias in the change direction or amount of voltage of the n source lines, n in the h-th horizontal period In some cases, the voltage fluctuation amount of the source line cannot be reduced. As described above, in the conventional charge sharing technique, it is difficult to efficiently perform charge redistribution among n source lines when the polarities of n driving voltages are not reversed.
　また、近年では、Ｐ本（Ｐは、１以上の整数）のソース線毎にｎ個の駆動電圧の極性を反転させるとともにＱ個（Ｑは、２以上の整数）の水平期間毎にｎ個の駆動電圧の極性を反転させるドット反転駆動方式（以下、Ｐ×Ｑドット反転駆動方式と表記）が主流になってきている。Ｐ×Ｑドット反転駆動方式の場合、１水平期間毎ではなくＱ個の水平期間毎にチャージシェア処理（ｎ本のソース線を全て同時に短絡させる処理）が実行されることになるため、チャージシェア処理を実行する回数が少なくなる傾向にある。したがって、ｎ本のソース線における消費電力を削減するためには、ｎ個の駆動電圧の極性を反転させない場合においてもｎ本のソース線の間で電荷再分配を効率良く実行することが重要となりつつある。 Further, in recent years, the polarity of n driving voltages is inverted for every P source lines (P is an integer of 1 or more), and n for every Q (Q is an integer of 2 or more) horizontal periods. A dot inversion driving method (hereinafter referred to as a P × Q dot inversion driving method) for inverting the polarity of the driving voltage is becoming mainstream. In the case of the P × Q dot inversion driving method, charge sharing processing (processing for simultaneously shorting all n source lines) is performed every Q horizontal periods instead of every horizontal period. There is a tendency that the number of times the process is executed is reduced. Therefore, in order to reduce the power consumption of the n source lines, it is important to efficiently perform charge redistribution among the n source lines even when the polarity of the n drive voltages is not reversed. It's getting on.
　そこで、この発明は、ｎ個の駆動電圧の極性を反転させない場合であってもｎ本のソース線の間で電荷再分配を効率良く実行できる駆動電圧供給回路を提供することを目的とする。 Therefore, an object of the present invention is to provide a drive voltage supply circuit that can efficiently perform charge redistribution among n source lines even when the polarity of n drive voltages is not reversed.
　この発明の１つの局面に従うと、駆動電圧供給回路は、１水平期間毎に、ｎ本（ｎは、２以上の整数）のソース線にそれぞれ対応するｎ個の現画素値が与えられ、当該ｎ個の現画素値に応じたｎ個の駆動電圧を上記ｎ本のソース線にそれぞれ供給する回路であって、第ｈ番目の水平期間に対応するｎ個の現画素値を上記ｎ個の駆動電圧に変換する駆動電圧生成部と、第ｈ－１番目の水平期間に対応するｎ個の現画素値をｎ個の前画素値として格納する画素値格納部と、複数の短絡線と、画素値を示した数直線上において上記画素値格納部に格納されたｎ個の前画素値から上記第ｈ番目の水平期間に対応するｎ個の現画素値へそれぞれ向かうｎ個の画素ベクトルの分布に基づいて、上記ｎ本のソース線の各々について、当該ソース線を上記複数の短絡線のうちどの短絡線に割り当てるのか、または、当該ソース線を上記複数の短絡線のいずれにも割り当てないのかを決定するチャージシェア制御部と、上記チャージシェア制御部によって上記複数の短絡線の各々に割り当てられたソース線を当該短絡線に電気的に接続する接続切替部とを備える。 According to one aspect of the present invention, the driving voltage supply circuit is provided with n current pixel values respectively corresponding to n (n is an integer of 2 or more) source lines for each horizontal period. a circuit for supplying n driving voltages corresponding to n current pixel values to the n source lines, respectively, wherein the n current pixel values corresponding to the h-th horizontal period are A drive voltage generation unit for converting to a drive voltage, a pixel value storage unit for storing n current pixel values corresponding to the (h-1) th horizontal period as n previous pixel values, a plurality of short-circuit lines, On the number line indicating the pixel value, n pixel vectors respectively directed from the n previous pixel values stored in the pixel value storage unit to the n current pixel values corresponding to the h-th horizontal period. Based on the distribution, for each of the n source lines, the source line is A charge share control unit for deciding which of the short-circuit lines to be assigned, or whether the source line is not assigned to any of the plurality of short-circuit lines, and the plurality of short-circuit lines by the charge share control unit And a connection switching unit that electrically connects the source line assigned to each of the short circuit lines.
　上記駆動電圧供給回路では、ｎ本のソース線を全て同時に短絡させる場合よりも、ｎ本のソース線の電圧変動量の総和を削減できる可能性を高めることができる。このように、ｎ個の駆動電圧の極性を反転させない場合であってもｎ本のソース線の間で電荷再分配を効率良く実行できる。 In the drive voltage supply circuit, the possibility that the total amount of voltage fluctuations of n source lines can be reduced can be increased as compared with the case where all n source lines are short-circuited simultaneously. In this way, even when the polarity of the n drive voltages is not reversed, charge redistribution can be efficiently performed among the n source lines.
　また、上記複数の短絡線の各々には、上記数直線上において当該短絡線に対応する目標値からそれぞれの終点値までの距離がそれぞれの始点値から終点値までの距離よりも短い複数の第１候補ベクトルおよび複数の第２候補ベクトルが対応付けられており、上記複数の短絡線の各々に対応付けられた複数の第２候補ベクトルの始点値は、当該短絡線に対応する目標値を軸として当該短絡線に対応付けられた複数の第１候補ベクトルの始点値に対してそれぞれ対称的な位置に配置され、上記チャージシェア制御部は、上記ｎ本のソース線の各々について、当該ソース線に対応する前画素値から現画素値へ向かう画素ベクトルが上記複数の短絡線のいずれか１つに対応付けられた複数の第１候補ベクトルおよび複数の第２候補ベクトルのいずれか１つに一致する場合に、当該ソース線を当該短絡線に割り当てても良い。 Further, each of the plurality of short-circuit lines includes a plurality of second short distances from the target value corresponding to the short-circuit line to the respective end point values on the number line, which are shorter than the distances from the respective start point values to the end point values. One candidate vector and a plurality of second candidate vectors are associated with each other, and the start point values of the plurality of second candidate vectors associated with each of the plurality of short-circuited lines are based on target values corresponding to the short-circuited lines. Are arranged at symmetrical positions with respect to the start point values of the plurality of first candidate vectors associated with the short-circuit line, and the charge share control unit performs the source line for each of the n source lines. Any of a plurality of first candidate vectors and a plurality of second candidate vectors in which a pixel vector from the previous pixel value corresponding to to the current pixel value is associated with any one of the plurality of short-circuit lines If it matches one, it may be assigned the source line to the short-circuit line.
　上記駆動電圧供給回路では、短絡線に割り当てられたソース線に対応する前画素値の平均値が短絡線に対応する目標値に近くなる（または、一致する）可能性を高めることができる。これにより、短絡線に割り当てられたソース線に対応する短絡ベクトル（前画素値の平均値から現画素値へ向かうベクトル）の絶対値和が画素ベクトル（前画素値から現画素値へ向かうベクトル）の絶対値和よりも小さくなる可能性を高めることができる。すなわち、ｎ本のソース線の電圧変動量の総和を削減できる可能性を高めることができる。 In the drive voltage supply circuit, it is possible to increase the possibility that the average value of the previous pixel values corresponding to the source line assigned to the short-circuit line is close to (or coincides with) the target value corresponding to the short-circuit line. Thus, the absolute value sum of the short-circuit vectors (vectors from the average value of the previous pixel values to the current pixel value) corresponding to the source lines assigned to the short-circuit lines is a pixel vector (vector from the previous pixel value to the current pixel value). The possibility of becoming smaller than the sum of absolute values of can be increased. That is, it is possible to increase the possibility that the total amount of voltage fluctuations of n source lines can be reduced.
　なお、上記画素値格納部は、上記ｎ本のソース線にそれぞれ対応するｎ個の格納部を含み、上記チャージシェア制御部は、上記ｎ本のソース線にそれぞれ対応するｎ個の制御部を含み、上記ｎ個の格納部の各々は、上記第ｈ－１番目の水平期間に対応するｎ個の現画素値のうち当該格納部に対応する現画素値を前画素値として格納し、上記ｎ個の制御部の各々は、上記数直線上において上記ｎ個の格納部のうち当該制御部に対応する格納部に格納された前画素値から上記第ｈ番目の水平期間に対応するｎ個の現画素値のうち当該制御部に対応する現画素値に向かう画素ベクトルが上記複数の短絡線のいずれか１つに対応付けられた複数の第１の候補ベクトルおよび複数の第２の候補ベクトルのいずれか１つに一致する場合に、当該制御部に対応するソース線を当該短絡線に割り当てても良い。 The pixel value storage unit includes n storage units corresponding to the n source lines, and the charge share control unit includes n control units corresponding to the n source lines. Each of the n storage units stores a current pixel value corresponding to the storage unit among n current pixel values corresponding to the h−1th horizontal period as a previous pixel value, Each of the n control units includes n number corresponding to the h-th horizontal period from the previous pixel value stored in the storage unit corresponding to the control unit among the n storage units on the number line. Among the current pixel values, a plurality of first candidate vectors and a plurality of second candidate vectors in which a pixel vector toward the current pixel value corresponding to the control unit is associated with any one of the plurality of short-circuit lines If it matches any one of the The source line response may be assigned to the short-circuit line.
　また、上記駆動電圧供給回路は、割当制御部と、制御切替部とをさらに備え、上記割当制御部は、上記複数の短絡線にそれぞれ対応する複数の短絡グループの各々において、当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値の平均値から当該複数のソース線に対応する複数の現画素値へそれぞれ向かう複数の短絡ベクトルの絶対値和が、当該複数のソース線に対応する複数の前画素値から当該ソース線に対応する複数の現画素値へそれぞれ向かう複数の画素ベクトルの絶対値和よりも小さくなるように、上記ｎ本のソース線の各々について、当該ソース線を上記複数の短絡グループのうちどの短絡グループに割り当てるのか、または、当該ソース線を上記複数の短絡グループのいずれにも割り当てないのかを決定するグループ割当処理を実行し、上記制御切替部は、上記グループ割当処理が実行された場合には、上記割当制御部によって上記複数の短絡グループの各々に割り当てられたソース線が当該短絡グループに対応する短絡線に電気的に接続されるように上記接続切替部を制御し、上記グループ割当処理が実行されない場合には、上記ｎ個の制御部によって上記複数の短絡線の各々に割り当てられたソース線が当該短絡線に電気的に接続されるように上記接続切替部を制御しても良い。 The drive voltage supply circuit further includes an allocation control unit and a control switching unit, and the allocation control unit is allocated to the short-circuit group in each of the plurality of short-circuit groups respectively corresponding to the plurality of short-circuit lines. The sum of absolute values of the plurality of short-circuit vectors respectively directed from the average value of the plurality of previous pixel values corresponding to the plurality of source lines to the plurality of current pixel values corresponding to the plurality of source lines is applied to the plurality of source lines. For each of the n source lines, the source line is set to be smaller than the sum of absolute values of a plurality of pixel vectors respectively directed from a plurality of corresponding previous pixel values to a plurality of current pixel values corresponding to the source line. Is assigned to any of the plurality of short-circuit groups, or the source line is not assigned to any of the plurality of short-circuit groups. When the group assignment process is executed, the control switching unit corresponds to the short-circuit group corresponding to the source line assigned to each of the plurality of short-circuit groups by the assignment control unit. A source assigned to each of the plurality of short-circuit lines by the n control units when the connection switching unit is controlled so as to be electrically connected to the short-circuit line and the group assignment process is not executed. The connection switching unit may be controlled so that the line is electrically connected to the short-circuit line.
　なお、上記割当制御部は、上記複数の短絡グループのうち少なくとも１つにおいて当該短絡グループに割り当てられたソース線の本数が最大になるように、上記グループ割当処理を実行しても良い。 Note that the assignment control unit may execute the group assignment process so that the number of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups is maximized.
　または、上記割当制御部は、上記複数の短絡グループのうち少なくとも１つにおいて当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値から当該短絡グループに対応する目標値へそれぞれ向かう複数の目標ベクトルの和が最小になるように、上記グループ割当処理を実行しても良い。 Alternatively, the assignment control unit is directed from a plurality of previous pixel values corresponding to a plurality of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups to a target value corresponding to the short-circuit group. The group assignment process may be executed so that the sum of a plurality of target vectors is minimized.
　なお、上記駆動電圧供給回路は、上記ｎ本のソース線にそれぞれ対応するｎ個の調整部をさらに備え、上記駆動電圧生成部は、上記ｎ本のソース線にそれぞれ対応するｎ個の駆動部を含み、上記ｎ個の駆動部の各々は、上記第ｈ番目の水平期間に対応するｎ個の現画素値のうち当該駆動部に対応する現画素値を上記駆動電圧に変換し、上記ｎ個の調整部の各々は、上記ｎ個の制御部のうち当該調整部に対応する制御部が当該調整部に対応するソース線を上記複数の短絡線のいずれか１つに割り当てた場合に、上記第ｈ番目の水平期間に対応するｎ個の現画素値のうち当該調整部に対応する現画素値と当該短絡線に対応する目標値との差に応じて、上記ｎ個の駆動部のうち当該調整部に対応する駆動部の出力電流量を調整しても良い。このように構成することにより、ｎ本のソース線に発生するノイズを低減できる。 The drive voltage supply circuit further includes n adjustment units corresponding to the n source lines, and the drive voltage generation unit includes n drive units respectively corresponding to the n source lines. Each of the n driving units converts a current pixel value corresponding to the driving unit among the n current pixel values corresponding to the h-th horizontal period into the driving voltage, and Each of the adjustment units, when the control unit corresponding to the adjustment unit among the n control units assigns the source line corresponding to the adjustment unit to any one of the plurality of short-circuit lines, Of the n current pixel values corresponding to the h-th horizontal period, the n driving units of the n driving units are set according to a difference between a current pixel value corresponding to the adjustment unit and a target value corresponding to the short-circuit line. Of these, the output current amount of the drive unit corresponding to the adjustment unit may be adjusted. With this configuration, noise generated in n source lines can be reduced.
　また、上記チャージシェア制御部は、上記複数の短絡線の各々について、当該短絡線に割り当てられた複数のソース線に対応する複数の前画素値の平均値から当該複数のソース線に対応する複数の現画素値にそれぞれ向かう複数の短絡ベクトルの絶対値和が、当該複数のソース線に対応する複数の前画素値から当該複数のソース線に対応する複数の現画素値にそれぞれ向かう複数の画素ベクトルの絶対値和よりも小さい場合に、当該短絡線に割り当てられた複数のソース線が当該短絡線に電気的に接続されるように上記接続切替部を制御しても良い。このように構成することにより、ｎ本のソース線の電圧変動量の総和を削減でき、ｎ本のソース線の間における電荷再分配の効率を高めることができる。 In addition, the charge share control unit, for each of the plurality of short-circuit lines, a plurality of corresponding to the plurality of source lines from an average value of a plurality of previous pixel values corresponding to the plurality of source lines allocated to the short-circuit line A plurality of pixels each of which has a sum of absolute values of a plurality of short-circuit vectors respectively directed to the current pixel value, from a plurality of previous pixel values corresponding to the plurality of source lines to a plurality of current pixel values corresponding to the plurality of source lines. When the sum of the absolute values of the vectors is smaller, the connection switching unit may be controlled so that a plurality of source lines assigned to the short circuit line are electrically connected to the short circuit line. With this configuration, the total amount of voltage fluctuations of the n source lines can be reduced, and the efficiency of charge redistribution among the n source lines can be increased.
　または、上記チャージシェア制御部は、上記複数の短絡線にそれぞれ対応する複数の短絡グループの各々において、当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値の平均値から当該複数のソース線に対応する複数の現画素値へそれぞれ向かう複数の短絡ベクトルの絶対値和が、当該複数のソース線に対応する複数の前画素値から当該ソース線に対応する複数の現画素値へそれぞれ向かう複数の画素ベクトルの絶対値和よりも小さくなるように、上記ｎ本のソース線の各々について、当該ソース線を上記複数の短絡グループのうちどの短絡グループに割り当てるのか、または、当該ソース線を上記複数の短絡グループのいずれにも割り当てないのかを決定するグループ割当処理を実行しても良い。このように構成することにより、ｎ本のソース線の電圧変動量の総和を削減でき、ｎ本のソース線の間における電荷再分配の効率を高めることができる。 Alternatively, the charge share control unit, in each of the plurality of short-circuit groups respectively corresponding to the plurality of short-circuit lines, from the average value of the plurality of previous pixel values corresponding to the plurality of source lines assigned to the short-circuit group The absolute value sum of a plurality of short-circuit vectors respectively directed to a plurality of current pixel values corresponding to a plurality of source lines is a plurality of current pixel values corresponding to the source lines from a plurality of previous pixel values corresponding to the plurality of source lines. For each of the n source lines, to which of the plurality of short circuit groups the source line is assigned to the short circuit group or the source so as to be smaller than the absolute value sum of the plurality of pixel vectors respectively directed to You may perform the group allocation process which determines whether a line is not allocated to any of the said several short circuit group. With this configuration, the total amount of voltage fluctuations of the n source lines can be reduced, and the efficiency of charge redistribution among the n source lines can be increased.
　以上のように、ｎ個の駆動電圧の極性を反転させない場合であってもｎ本のソース線の間で電荷再分配を効率良く実行できる。 As described above, even when the polarity of the n drive voltages is not reversed, charge redistribution can be efficiently performed among the n source lines.
実施形態１による駆動電圧供給回路を備えた表示装置の構成例を示す図。FIG. 3 is a diagram illustrating a configuration example of a display device including a drive voltage supply circuit according to Embodiment 1. 図１に示した画素部の構成例を示す図。FIG. 2 is a diagram illustrating a configuration example of a pixel portion illustrated in FIG. 1. 候補ベクトルについて説明するための図。The figure for demonstrating a candidate vector. 図１に示した駆動電圧供給回路によるチャージシェア動作について説明するための図。The figure for demonstrating the charge share operation | movement by the drive voltage supply circuit shown in FIG. チャージシェア動作のタイミングについて説明するための図。The figure for demonstrating the timing of charge share operation | movement. チャージシェア動作における割当処理について説明するための図。The figure for demonstrating the allocation process in charge share operation | movement. チャージシェア動作によるソース線の電圧変動について説明するための図。The figure for demonstrating the voltage fluctuation of the source line by charge share operation | movement. Ｐ×Ｑドット反転駆動方式について説明するための図。The figure for demonstrating a PxQ dot inversion drive system. 図１に示した駆動電圧供給回路の変形例について説明するための図。The figure for demonstrating the modification of the drive voltage supply circuit shown in FIG. Ｐ×Ｑドット反転駆動方式の極性反転タイミングについて説明するための図。The figure for demonstrating the polarity inversion timing of a PxQ dot inversion drive system. Ｐ×Ｑドット反転駆動方式におけるソース線の電圧変動について説明するための図。The figure for demonstrating the voltage fluctuation of the source line in a PxQ dot inversion drive system. 実施形態２による駆動電圧供給回路の構成例を示した図。FIG. 5 is a diagram illustrating a configuration example of a drive voltage supply circuit according to a second embodiment. 図１２に示した駆動電圧供給回路によるチャージシェア動作について説明するための図。The figure for demonstrating the charge share operation | movement by the drive voltage supply circuit shown in FIG. 図１２に示した駆動電圧供給回路によるチャージシェア動作の変形例１について説明するための図。The figure for demonstrating the modification 1 of the charge share operation | movement by the drive voltage supply circuit shown in FIG. 図１２に示した駆動電圧供給回路によるチャージシェア動作の変形例１について説明するための図。The figure for demonstrating the modification 1 of the charge share operation | movement by the drive voltage supply circuit shown in FIG. 図１２に示した駆動電圧供給回路によるチャージシェア動作の変形例１について説明するための図。The figure for demonstrating the modification 1 of the charge share operation | movement by the drive voltage supply circuit shown in FIG. チャージシェア動作の変形例１におけるグループ割当処理について説明するための図。The figure for demonstrating the group allocation process in the modification 1 of a charge share operation | movement. チャージシェア動作の変形例１によるソース線の電圧変動について説明するための図。The figure for demonstrating the voltage fluctuation of the source line by the modification 1 of a charge share operation | movement. 図１２に示した駆動電圧供給回路によるチャージシェア動作の変形例２について説明するための図。The figure for demonstrating the modification 2 of the charge share operation | movement by the drive voltage supply circuit shown in FIG. 図１２に示した駆動電圧供給回路によるチャージシェア動作の変形例２について説明するための図。The figure for demonstrating the modification 2 of the charge share operation | movement by the drive voltage supply circuit shown in FIG. 重み値（正極）の具体例について説明するための図。The figure for demonstrating the specific example of a weight value (positive electrode). 重み値（負極）の具体例について説明するための図。The figure for demonstrating the specific example of a weight value (negative electrode). チャージシェア動作の変形例２における重み付け処理について説明するための図。The figure for demonstrating the weighting process in the modification 2 of a charge share operation | movement. チャージシェア動作の変形例２によるソース線の電圧変動について説明するための図。The figure for demonstrating the voltage fluctuation of the source line by the modification 2 of a charge share operation | movement. 実施形態３による駆動電圧供給回路の構成例を示す図。FIG. 10 is a diagram illustrating a configuration example of a drive voltage supply circuit according to a third embodiment. 調整部について説明するための図。The figure for demonstrating an adjustment part.
　以下、実施の形態を図面を参照して詳しく説明する。なお、図中同一または相当部分には同一の符号を付しその説明は繰り返さない。 Hereinafter, embodiments will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.
　（実施形態１）
　図１は、実施形態１による駆動電圧供給回路１を備えた表示装置の構成例を示す。この表示装置は、駆動電圧供給回路１の他に、表示パネル１０と、ゲートドライバ２０とを備える。 (Embodiment 1)
FIG. 1 shows a configuration example of a display device including a drive voltage supply circuit 1 according to the first embodiment. This display device includes a display panel 10 and a gate driver 20 in addition to the drive voltage supply circuit 1.
　　〔表示パネル，ゲートドライバ〕
　表示パネル１０は、ｎ本（ｎは、２以上の整数）のソース線ＳＬ１，ＳＬ２，…，ＳＬｎと、ｍ本（ｍは、２以上の整数）のゲート線ＧＬ１，ＧＬ２，…，ＧＬｍと、ｎ×ｍ個の画素部１００，１００，…，１００とを含む。画素部１００，１００，…，１００の各々は、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎのいずれか１本およびゲート線ＧＬ１，ＧＬ２，…，ＧＬｍのいずれか１本に電気的に接続されている。ゲートドライバ２０は、１水平期間毎にゲート線ＧＬ１，ＧＬ２，…，ＧＬｍを順次活性化させる。図２のように、画素部１００，１００，…，１００の各々は、スイッチングトランジスタＴ１００と、液晶素子Ｃ１００とを含む。画素部１００に対応するゲート線ＧＬが活性化されると、スイッチングトランジスタＴ１００がオン状態になり、画素部１００に対応するソース線ＳＬの電圧が液晶素子Ｃ１００の画素電極に印加される。また、液晶素子Ｃ１００の対向電極には、コモン電圧ＶＣＯＭが印加される。 [Display panel, gate driver]
The display panel 10 includes n (n is an integer of 2 or more) source lines SL1, SL2,..., SLn, and m (m is an integer of 2 or more) gate lines GL1, GL2,. , N × m pixel units 100, 100,. Each of the pixel portions 100, 100, ..., 100 is electrically connected to any one of the source lines SL1, SL2, ..., SLn and any one of the gate lines GL1, GL2, ..., GLm. . The gate driver 20 sequentially activates the gate lines GL1, GL2,... GLm every horizontal period. As shown in FIG. 2, each of the pixel units 100, 100,..., 100 includes a switching transistor T100 and a liquid crystal element C100. When the gate line GL corresponding to the pixel unit 100 is activated, the switching transistor T100 is turned on, and the voltage of the source line SL corresponding to the pixel unit 100 is applied to the pixel electrode of the liquid crystal element C100. A common voltage VCOM is applied to the counter electrode of the liquid crystal element C100.
　　〔駆動電圧供給回路〕
　図１に戻って、駆動電圧供給回路１は、１水平期間毎に、ｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎが与えられ、ｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎに応じたｎ個の駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎをｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎにそれぞれ供給する。駆動電圧供給回路１は、駆動電圧生成部１０１（例えば、ソースドライバ）と、画素値格納部１０２と、チャージシェア制御部１０３と、ｋ本（ｋは、２以上の整数）の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋと、接続切替部１０４とを備える。 [Drive voltage supply circuit]
Returning to FIG. 1, the drive voltage supply circuit 1 is provided with n pixel values D1, D2,..., Dn for each horizontal period, and corresponds to the n pixel values D1, D2,. The n driving voltages VD1, VD2,..., VDn are supplied to the n source lines SL1, SL2,. The drive voltage supply circuit 1 includes a drive voltage generation unit 101 (for example, a source driver), a pixel value storage unit 102, a charge share control unit 103, k short circuits STL1, k (k is an integer of 2 or more). STL2,..., STLk, and a connection switching unit 104.
　　　《駆動電圧生成部》
　駆動電圧生成部１０１は、１水平期間毎に、ｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎをｎ個の駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎに変換する。すなわち、駆動電圧生成部１０１は、第ｈ番目の水平期間に対応するｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎ（以下、現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）と表記）をｎ個の駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎに変換する。ここでは、駆動電圧生成部１０１は、現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）が大きくなるほど、駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎを高くする。また、駆動電圧生成部１０１は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎにそれぞれ対応するｎ個の駆動部１１１，１１２，…，１１ｎを含む。駆動部１１１，１１２，…，１１ｎは、それぞれ、現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）をｎ個の駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎに変換する。例えば、ｎ個の駆動部１１１，１１２，…，１１ｎの各々は、水平同期信号に同期して画素値を取り込んで保持するラッチ回路と、ラッチ回路に保持された画素値を駆動電圧に変換するデジタル・アナログ変換器とを含む。 <Drive voltage generator>
The driving voltage generation unit 101 converts n pixel values D1, D2,..., Dn into n driving voltages VD1, VD2,. That is, the drive voltage generation unit 101 includes n pixel values D1, D2,..., Dn (hereinafter, current pixel values D1 (h) , D2 (h) ,..., Dn ( h) is converted into n drive voltages VD1, VD2,..., VDn. Here, the driving voltage generator 101, the current pixel value D1 (h), D2 (h ), ..., Dn (h) increases, the drive voltage VD1, VD2, ..., a higher VDn. The drive voltage generation unit 101 includes n drive units 111, 112,..., 11n corresponding to the n source lines SL1, SL2,. The drive units 111, 112,..., 11n convert the current pixel values D1 (h) , D2 (h) ,..., Dn (h) into n drive voltages VD1, VD2,. For example, each of the n driving units 111, 112,..., 11n captures and holds a pixel value in synchronization with the horizontal synchronization signal, and converts the pixel value held in the latch circuit into a driving voltage. Digital-to-analog converter.
　　　《画素値格納部》
　画素値格納部１０２は、１水平期間毎に供給されたｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎを格納する。すなわち、画素値格納部１０２は、第ｈ－１番目の水平期間に対応するｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎをｎ個の前画素値（以下、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）と表記）として格納する。ここでは、画素値格納部１０２は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎにそれぞれ対応するｎ個の格納部１２１，１２２，…，１２ｎを含む。ｎ個の格納部１２１，１２２，…，１２ｎは、それぞれ、ｎ個の前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）を格納する。 <Pixel value storage unit>
The pixel value storage unit 102 stores n pixel values D1, D2,..., Dn supplied every horizontal period. That is, the pixel value storage unit 102, n pieces of pixel values D1, D2 corresponding to the h-1 th horizontal period, ..., Dn of n previous pixel value (hereinafter, previous pixel value D1 (h-1 ), D2 (h-1) , ..., stored as Dn (h-1) hereinafter). Here, the pixel value storage unit 102 includes n storage units 121, 122,..., 12n corresponding to n source lines SL1, SL2,. The n storage units 121, 122, ..., 12n store n previous pixel values D1 (h-1) , D2 (h-1) , ..., Dn (h-1) , respectively.
　　　《チャージシェア制御部》
　チャージシェア制御部１０３は、画素値を示した数直線上において画素値格納部１０２に格納されたｎ個の前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－２），…，Ｄｎ（ｈ－１）からｎ個の現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）へそれぞれ向かうｎ個の画素ベクトルＶＰ１，ＶＰ２，…，ＶＰｎの分布に基づいて、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの各々について、そのソース線を短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうちどの短絡線に割り当てるのか、または、そのソース線を短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのいずれにも割り当てないのかを決定する。ここでは、チャージシェア制御部１０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎにそれぞれ対応するｎ個の制御部１３１，１３２，…，１３ｎを含む。 《Charge share control unit》
The charge share control unit 103 includes n previous pixel values D1 (h-1) , D2 (h-2) ,..., Dn (h ) stored in the pixel value storage unit 102 on the number line indicating the pixel values. -1) to n current pixel values D1 (h) , D2 (h) ,..., Dn (h) based on the distribution of n pixel vectors VP1, VP2,. For each of the source lines SL1, SL2,..., SLn, which of the short-circuit lines STL1, STL2,..., STLk is assigned to the source line, or the source line is assigned to the short-circuit lines STL1, STL2,. Decide whether to assign to any of the above. Here, the charge share control unit 103 includes n control units 131, 132,..., 13n corresponding to n source lines SL1, SL2,.
　　　《接続切替部》
　接続切替部１０４は、チャージシェア制御部１０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎと駆動電圧生成部１０１（駆動部１１１，１１２，…，１１ｎ）との接続状態を切り替える。また、接続切替部１０４は、チャージシェア制御部１０３による制御（割当結果）に応答して、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎとｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋとの接続状態を切り替える。例えば、接続切替部１０４は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎとｎ個の駆動部１１１，１１２，…，１１ｎとの接続／非接続を切り替えるｎ個の供給スイッチＳＷ１，ＳＷ２，…，ＳＷｎと、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎとｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋとの接続／非接続を切り替えるｎ×ｋ個の短絡スイッチＳＷ１１，ＳＷ１２，…，ＳＷｎｋとを含む。 《Connection switching unit》
The connection switching unit 104 switches the connection state between the source lines SL1, SL2,..., SLn and the drive voltage generation unit 101 (drive units 111, 112,..., 11n) in response to control by the charge share control unit 103. . In addition, the connection switching unit 104 responds to control (allocation result) by the charge share control unit 103, and includes n source lines SL1, SL2,..., SLn and k short-circuit lines STL1, STL2,. Switch the connection status of. For example, the connection switching unit 104 includes n supply switches SW1, SW2, which switch connection / disconnection between n source lines SL1, SL2,..., SLn and n drive units 111, 112,. ..., SWn, n source lines SL1, SL2, ..., SLn and k short-circuit lines STL1, STL2, ..., STLk, nxk short-circuit switches SW11, SW12, ... , SWnk.
　　〔候補ベクトル〕
　ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの各々には、複数の第１候補ベクトルおよび複数の第２候補ベクトルが対応付けられている。例えば、図３Ａのように、画素値を示した数直線上において、短絡線に対応する目標値ＤＴ１（画素値レベルＬＶ５）から第１候補ベクトルＶａ１の終点値（画素値レベルＬＶ６）までの距離は、第１候補ベクトルＶａ１の始点値（画素値レベルＬＶ９）から終点値（画素値レベルＬＶ６）までの距離よりも短い。その他の第１候補ベクトルＶａ２，…，Ｖａｘおよび第２候補ベクトルＶｂ１，Ｖｂ２，…，Ｖｂｘについても同様である。また、画素値を示した数直線上において、第２候補ベクトルＶｂ１の始点値（画素値レベルＬＶ１）は、目標値ＤＴ１（画素値レベルＬＶ５）を軸として第１候補ベクトルＶａ１の始点値（画素値レベルＬＶ９）に対して対称的な位置に配置されている。その他の第２候補ベクトルＶｂ２，…，Ｖｂｘについても同様である。すなわち、第１候補ベクトルＶａ１，Ｖａ２，…，Ｖａｘおよび第２候補ベクトルＶｂ１，Ｖｂ２，…，Ｖｂｘの始点値の平均値は、短絡線に対応する目標値ＤＴ１に一致する。 [Candidate vector]
Each of the k short-circuit lines STL1, STL2,..., STLk is associated with a plurality of first candidate vectors and a plurality of second candidate vectors. For example, as shown in FIG. 3A, the distance from the target value DT1 (pixel value level LV5) corresponding to the short-circuit line to the end point value (pixel value level LV6) of the first candidate vector Va1 on the number line indicating the pixel values. Is shorter than the distance from the start point value (pixel value level LV9) to the end point value (pixel value level LV6) of the first candidate vector Va1. The same applies to the other first candidate vectors Va2,..., Vax and the second candidate vectors Vb1, Vb2,. On the number line indicating the pixel value, the starting point value (pixel value level LV1) of the second candidate vector Vb1 is the starting point value (pixel) of the first candidate vector Va1 with the target value DT1 (pixel value level LV5) as an axis. They are arranged symmetrically with respect to the value level LV9). The same applies to the other second candidate vectors Vb2, ..., Vbx. That is, the average value of the starting point values of the first candidate vectors Va1, Va2,..., Vax and the second candidate vectors Vb1, Vb2,..., Vbx matches the target value DT1 corresponding to the short circuit line.
　ここでは、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの各々には、複数の第１候補ベクトルの始点値および終点値がそれぞれ属する第１の始点範囲および第１の終点範囲と、複数の第２候補ベクトルの始点値および終点値がそれぞれ属する第２の始点範囲および第２の終点範囲とが対応付けられている。例えば、図３Ａのように、第１候補ベクトルＶａ１，Ｖａ２，…，Ｖａｘの始点値および終点値は、それぞれ、短絡線に対応付けられた第１の始点範囲ＳＲ１ａ（画素値レベルＬＶ７～ＬＶ９の範囲）および第１の終点範囲ＥＲ１ａ（画素値レベルＬＶ５～ＬＶ６の範囲）に属し、第２候補ベクトルＶｂ１，Ｖｂ２，…，Ｖｂｘの始点値および終点値は、それぞれ、短絡線に対応付けられた第２の始点範囲ＳＲ１ｂ（画素値レベルＬＶ１～ＬＶ３の範囲）および第２の終点範囲ＥＲ１ｂ（画素値レベルＬＶ４～ＬＶ５）に属する。 Here, each of the k short-circuit lines STL1, STL2,..., STLk includes a first start point range and a first end point range to which start point values and end point values of a plurality of first candidate vectors respectively belong, A second start point range and a second end point range to which the start point value and end point value of the second candidate vector belong are associated with each other. For example, as shown in FIG. 3A, the start point value and the end point value of the first candidate vectors Va1, Va2,..., Vax are respectively the first start point range SR1a (pixel value levels LV7 to LV9) associated with the short-circuit line. Range) and first end point range ER1a (range of pixel value levels LV5 to LV6), and the start point value and end point value of the second candidate vectors Vb1, Vb2,. It belongs to the second start point range SR1b (pixel value level LV1 to LV3 range) and the second end point range ER1b (pixel value level LV4 to LV5).
　また、ここでは、第２の始点範囲ＳＲ１ｂの中央値は、短絡線に対応する目標値ＤＴ１を軸として第１の始点範囲ＳＲ１ａの中央値に対して対称的な位置に配置され、第２の終点範囲ＥＲ１ｂの中央値は、短絡線に対応する目標値ＤＴ１を軸として第１の終点範囲ＥＲ１ａの中央値に対して対称的な位置に配置されている。 In addition, here, the median value of the second start point range SR1b is arranged at a symmetrical position with respect to the median value of the first start point range SR1a with the target value DT1 corresponding to the short circuit line as an axis. The median value of the end point range ER1b is arranged at a symmetrical position with respect to the median value of the first end point range ER1a around the target value DT1 corresponding to the short circuit line.
　　〔動作〕
　次に、図４を参照して、図１に示した駆動電圧供給回路１によるチャージシェア動作について説明する。ここでは、制御部１３１，１３２，…，１３ｎのうち第ｉ番目の制御部（以下、制御部１３ｉと表記）による動作を例に挙げて説明する。 [Operation]
Next, referring to FIG. 4, the charge sharing operation by the drive voltage supply circuit 1 shown in FIG. 1 will be described. Here, the operation by the i-th control unit (hereinafter referred to as control unit 13i) among the control units 131, 132,..., 13n will be described as an example.
　　　《ＳＴ１０１》
　制御部１３ｉは、第ｈ番目の水平期間において、ｎ個の現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）のうち第ｉ番目の現画素値（以下、現画素値Ｄｉ（ｈ）と表記）と、ｎ個の格納部１２１，１２２，…，１２ｎのうち第ｉ番目の格納部に格納された前画素値（以下、前画素値Ｄｉ（ｈ－１）と表記）とを受け取る。 << ST101 >>
The control unit 13i controls the i-th current pixel value (hereinafter, the current pixel value ) among the n current pixel values D1 (h) , D2 (h) ,..., Dn (h) in the h-th horizontal period. Di (h)) and the previous pixel value stored in the i-th storage unit among the n storage units 121, 122,..., 12n (hereinafter referred to as the previous pixel value Di (h-1)) ) And receive.
　　　《ＳＴ１０２》
　次に、制御部１３ｉは、変数ｊを“１”に設定する。すなわち、制御部１３ｉは、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち第１番目の短絡線ＳＴＬ１を判定対象として選択する。 << ST102 >>
Next, the controller 13i sets the variable j to “1”. That is, the control unit 13i selects the first short-circuit line STL1 among the k short-circuit lines STL1, STL2,.
　　　《ＳＴ１０３》
　次に、制御部１３ｉは、画素ベクトルＶＰｉが短絡線ＳＴＬｊに対応付けられた第１候補ベクトルＶａ１，Ｖａ２，…，Ｖａｘおよび第２候補ベクトルＶｂ１，Ｖｂ２，…，Ｖｂｘのいずれか１つに一致するか否かを判定する。なお、画素ベクトルＶＰｉとは、前画素値Ｄｉ（ｈ－１）から現画素値Ｄｉ（ｈ）へ向かう画素ベクトルのことであり、短絡線ＳＴＬｊとは、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち判定対象として選択された第ｊ番目の短絡線のことである。判定結果が“不一致”を示す場合には、ステップＳＴ１０４へ進み、判定結果が“一致”を示す場合には、ステップＳＴ１０６へ進む。 << ST103 >>
Next, the control unit 13i matches any one of the first candidate vectors Va1, Va2,..., Vax and the second candidate vectors Vb1, Vb2,..., Vbx in which the pixel vector VPi is associated with the short circuit line STLj. It is determined whether or not to do. The pixel vector VPi is a pixel vector from the previous pixel value Di (h−1) to the current pixel value Di (h) , and the short-circuit line STLj is k short-circuit lines STL1, STL2,. , STLk, the jth short-circuit line selected as the determination target. If the determination result indicates “mismatch”, the process proceeds to step ST104, and if the determination result indicates “match”, the process proceeds to step ST106.
　　　《ＳＴ１０４》
　判定結果が“不一致”を示す場合、制御部１３ｉは、変数ｊが最大値ｊｍａｘ（ここでは、ｊｍａｘ＝ｋ）に到達している否かを判定する。すなわち、制御部１３ｉは、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの中に判定対象として選択されていない短絡線が残っているか否かを判定する。変数ｊが最大値ｊｍａｘに到達していない場合には、ステップＳＴ１０５へ進み、変数ｊが最大値ｊｍａｘに到達している場合には、ステップＳＴ１０８へ進む。 << ST104 >>
When the determination result indicates “mismatch”, the control unit 13i determines whether or not the variable j has reached the maximum value jmax (here, jmax = k). That is, the control unit 13i determines whether or not the short-circuit lines that are not selected as the determination target remain in the k short-circuit lines STL1, STL2,. If the variable j has not reached the maximum value jmax, the process proceeds to step ST105, and if the variable j has reached the maximum value jmax, the process proceeds to step ST108.
　　　《ＳＴ１０５》
　次に、制御部１３ｉは、変数ｊに“１”を加算する。すなわち、制御部１３ｉは、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち判定対象として選択されていない短絡線を次の判定対象として選択する。次に、ステップＳＴ１０３へ進む。 << ST105 >>
Next, the control unit 13i adds “1” to the variable j. That is, the control unit 13i selects a short-circuit line that is not selected as a determination target among the k short-circuit lines STL1, STL2,. Next, the process proceeds to step ST103.
　　　《ＳＴ１０６》
　一方、ステップＳＴ１０３における判定結果が“一致”を示す場合、制御部１３ｉは、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎのうち第ｉ番目のソース線（以下、ソース線ＳＬｉと表記）を短絡線ＳＴＬｊに割り当てる。 << ST106 >>
On the other hand, when the determination result in step ST103 indicates “match”, the control unit 13i selects the i-th source line (hereinafter referred to as the source line SLi) among the n source lines SL1, SL2,. Assigned to short circuit line STLj.
　　　《ＳＴ１０７》
　次に、第ｈ番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、制御部１３ｉによる制御に応答して、ｎ個の駆動部１１１，１１２，…，１１ｎのうち第ｉ番目の駆動部（以下、駆動部１１ｉ）からソース線ＳＬｉを切り離す。次に、接続切替部１０４は、ソース線ＳＬｉ（短絡線ＳＴＬｉに割り当てられたソース線）を短絡線ＳＴＬｊに電気的に接続する。次に、ステップＳＴ１０９へ進む。 << ST107 >>
Next, in the charge share period in the h-th horizontal period, the connection switching unit 104 responds to the control by the control unit 13 i and is the i-th among the n drive units 111, 112,. The source line SLi is disconnected from the drive unit (hereinafter, drive unit 11i). Next, the connection switching unit 104 electrically connects the source line SLi (the source line assigned to the short circuit line STLi) to the short circuit line STLj. Next, the process proceeds to step ST109.
　　　《ＳＴ１０８》
　一方、ステップＳＴ１０４において変数ｊが最大値ｊｍａｘに到達していると判定された場合（ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの中に判定対象として選択されていない短絡線が残っていない場合）、制御部１３ｉは、ソース線ＳＬｉを短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのいずれにも割り当てない。したがって、第ｈ番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、ソース線ＳＬｉを短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのいずれにも電気的に接続しない。次に、ステップＳＴ１０９へ進む。 << ST108 >>
On the other hand, when it is determined in step ST104 that the variable j has reached the maximum value jmax (no short-circuit lines not selected as determination targets remain in the k short-circuit lines STL1, STL2,..., STLk). ), The control unit 13i does not assign the source line SLi to any of the short-circuit lines STL1, STL2,..., STLk. Therefore, in the charge share period in the h-th horizontal period, the connection switching unit 104 does not electrically connect the source line SLi to any of the short-circuit lines STL1, STL2,. Next, the process proceeds to step ST109.
　　　《ＳＴ１０９》
　次に、制御部１３ｉは、動作を終了するか否かを判定する。動作を継続する場合には、ステップＳＴ１０１へ進む。 << ST109 >>
Next, the control unit 13i determines whether or not to end the operation. When the operation is continued, the process proceeds to step ST101.
　　〔動作タイミング〕
　次に、図５を参照して、図１に示した駆動電圧供給回路１によるチャージシェア動作のタイミングについて説明する。ここでは、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を代表例として挙げている。 [Operation timing]
Next, the timing of the charge sharing operation by the drive voltage supply circuit 1 shown in FIG. 1 will be described with reference to FIG. Here, source lines SL1, SL2, SL9, and SL10 are given as representative examples.
　　　《第ｈ－１番目の水平期間》
　第ｈ－１番目の水平期間Ｐ（ｈ－１）（水平同期信号の第ｈ－１番目の立ち上がりエッジから第ｈ番目の立ち上がりエッジまでの期間）では、ｍ本のゲート線ＧＬ１，ＧＬ２，…，ＧＬｍのうち第ｈ－１番目のゲート線ＧＬ（ｈ－１）が活性化され、ｎ×ｍ個の画素部１００，１００，…，１００のうち第ｈ－１番目の画素行に対応するｎ個の画素部にｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧が印加される。また、第ｈ－１番目の水平期間Ｐ（ｈ－１）に対応する画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）が駆動電圧供給回路１に供給される。画素値格納部１０２は、画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）を格納する。 << h-1 horizontal period >>
In the (h−1) th horizontal period P (h−1) (the period from the h−1th rising edge to the hth rising edge of the horizontal synchronization signal), the m gate lines GL1, GL2,. , GLm, the (h−1) th gate line GL (h−1) is activated and corresponds to the (h−1) th pixel row in the n × m pixel units 100, 100,. The voltages of n source lines SL1, SL2,..., SLn are applied to the n pixel portions. Further, the pixel values D1 (h-1) , D2 (h-1) ,..., Dn (h-1) corresponding to the h-1st horizontal period P (h-1) are supplied to the drive voltage supply circuit 1. Supplied. The pixel value storage unit 102 stores pixel values D1 (h−1) , D2 (h−1) ,..., Dn (h−1) .
　　　《第ｈ番目の水平期間》
　第ｈ番目の水平期間Ｐ（ｈ）（水平同期信号の第ｈ番目の立ち上がりエッジから第ｈ＋１番目の立ち上がりエッジまでの期間）では、ｍ本のゲート線ＧＬ１，ＧＬ２，…，ＧＬｍのうち第ｈ番目のゲート線ＧＬ（ｈ）が活性化され、ｎ×ｍ個の画素部１００，１００，…，１００のうち第ｈ番目の画素行に対応するｎ個の画素部にｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧が印加される。駆動電圧生成部１０１は、水平同期信号の第ｈ番目の立ち上がりエッジに同期して、画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）を取り込み、画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）を駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），…，ＶＤｎ（ｈ－１）に変換する。これにより、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧は、それぞれ、駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），…，ＶＤｎ（ｈ－１）に変化する。 《Hth horizontal period》
In the h-th horizontal period P (h) (the period from the h-th rising edge of the horizontal synchronization signal to the h + 1-th rising edge), the h-th among m gate lines GL1, GL2,. The nth gate line GL (h) is activated, and n source lines SL1 are connected to n pixel portions corresponding to the hth pixel row among the n × m pixel portions 100, 100,. , SL2,..., SLn are applied. The drive voltage generation unit 101 takes in the pixel values D1 (h−1) , D2 (h−1) ,..., Dn (h−1) in synchronization with the h-th rising edge of the horizontal synchronization signal, and value D1 (h-1), D2 (h-1), ..., Dn (h-1) a drive voltage VD1 (h-1), VD2 (h-1), ... converted to VDn (h-1) To do. As a result, the voltages of the source lines SL1, SL2,..., SLn change to drive voltages VD1 (h-1) , VD2 (h-1) , ..., VDn (h-1) , respectively.
　また、第ｈ番目の水平期間Ｐ（ｈ）のうち駆動期間（水平同期信号の第ｈ番目の立ち上がりエッジからゲート線ＧＬ（ｈ）の活性化期間の終了までの期間）において、第ｈ番目の水平期間Ｐ（ｈ）に対応する画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）が駆動電圧供給回路１に供給される。チャージシェア制御部１０３は、画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）および画素値格納部１０２に格納された画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）に基づいて、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋに割り当てる。ここでは、チャージシェア制御部１０３は、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に割り当てる。また、画素値格納部１０２は、画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）を格納する。 In the h-th horizontal period P (h) , the h-th horizontal period P (h) is the h-th period in the driving period (the period from the h-th rising edge of the horizontal synchronization signal to the end of the activation period of the gate line GL (h)) Pixel values D1 (h) , D2 (h) ,..., Dn (h) corresponding to the horizontal period P (h) are supplied to the drive voltage supply circuit 1. The charge share control unit 103 includes pixel values D1 (h) , D2 (h) ,..., Dn (h) and pixel values D1 (h−1) , D2 (h−1) stored in the pixel value storage unit 102. ,..., Dn (h−1) , n source lines SL1, SL2,..., SLn are assigned to k short-circuit lines STL1, STL2,. Here, the charge share control unit 103 assigns the source lines SL1, SL2, SL9, and SL10 to the short circuit line STL1. Further, the pixel value storage unit 102 stores the pixel values D1 (h) , D2 (h) ,..., Dn (h) .
　次に、第ｈ番目の水平期間Ｐ（ｈ）のうちチャージシェア期間（ゲート線ＧＬ（ｈ）の活性化期間の終了から水平同期信号の第ｈ＋１番目の立ち上がりエッジまでの期間）において、接続切替部１０４は、チャージシェア制御部１０３による制御（割当結果）に応答して、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎとｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋとの接続状態を切り替える。ここでは、接続切替部１０４は、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に電気的に接続する。これにより、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０の電圧は、それぞれ、駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１０（ｈ－１）から平均電圧Ｖａｖｅ（駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１０（ｈ－１）の平均電圧）に変化する。 Next, in the charge share period (the period from the end of the activation period of the gate line GL (h) to the ( h + 1) th rising edge of the horizontal synchronization signal ) in the hth horizontal period P (h) , connection switching is performed. In response to the control (allocation result) by charge share control unit 103, unit 104 changes the connection state between n source lines SL1, SL2,..., SLn and k short lines STL1, STL2,. Switch. Here, the connection switching unit 104 electrically connects the source lines SL1, SL2, SL9, and SL10 to the short-circuit line STL1. Thus, the voltage of the source line SL1, SL2, SL9, SL10, respectively, the drive voltage VD1 (h-1), VD2 (h-1), VD9 (h-1), the average voltage from VD10 (h-1) Vave (average voltage of drive voltages VD1 (h-1) , VD2 (h-1) , VD9 (h-1) , VD10 (h-1)) .
　　　《第ｈ＋１番目の水平期間》
　第ｈ＋１番目の水平期間Ｐ（ｈ＋１）では、ｍ本のゲート線ＧＬ１，ＧＬ２，…，ＧＬｍのうち第ｈ＋１番目のゲート線ＧＬ（ｈ＋１）が活性化され、ｎ×ｍ個の画素部１００，１００，…，１００のうち第ｈ＋１番目の画素行に対応するｎ個の画素部にｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧が印加される。駆動電圧生成部１０１は、水平同期信号の第ｈ＋１番目の立ち上がりエッジに同期して、画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）を取り込み、画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）を駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），…，ＶＤｎ（ｈ）に変換する。その結果、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０の電圧は、それぞれ、平均電圧Ｖａｖｅから駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），…，ＶＤｎ（ｈ）へと変化する。 << h + 1st horizontal period >>
In the (h + 1) th horizontal period P (h + 1) , the (h + 1) th gate line GL (h + 1) among the m gate lines GL1, GL2,. 100,..., 100, n source lines SL1, SL2,..., SLn are applied to n pixel portions corresponding to the (h + 1) th pixel row. Drive voltage generating unit 101, in synchronization with the h + 1 th rising edge of the horizontal synchronizing signal, the pixel value D1 (h), D2 (h ), ..., captures Dn (h), the pixel value D1 (h), D2 (h), ..., Dn (h) a drive voltage VD1 (h), VD2 (h ), ..., is converted into VDn (h). As a result, the voltages of the source lines SL1, SL2, SL9, and SL10 change from the average voltage Vave to the drive voltages VD1 (h) , VD2 (h) ,..., VDn (h) , respectively.
　　〔割当処理〕
　次に、図６を参照して、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの割当処理について具体例を挙げて説明する。ここでは、ｎ＝１０，ｋ＝３であるものする。また、短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３には、それぞれ、図３Ａ，図３Ｂ，図３Ｃに示した第１の始点範囲ＳＲ１ａ，ＳＲ２ａ，ＳＲ３ａ，第１の終点範囲ＥＲ１ａ，ＥＲ２ａ，ＥＲ３ａ，第２の始点範囲ＳＲ１ｂ，ＳＲ２ｂ，ＳＲ３ｂ，および第２の終点範囲ＥＲ１ｂ，ＥＲ２ｂ，ＥＲ３ｂが対応付けられているものとする。 [Assignment processing]
Next, with reference to FIG. 6, the allocation process of the source lines SL1, SL2,. Here, n = 10 and k = 3. Further, the short-circuit lines STL1, STL2, and STL3 are connected to the first start point ranges SR1a, SR2a, SR3a, the first end point ranges ER1a, ER2a, ER3a, and the second shown in FIGS. 3A, 3B, and 3C, respectively. It is assumed that the start point ranges SR1b, SR2b, SR3b and the second end point ranges ER1b, ER2b, ER3b are associated with each other.
　まず、第ｈ番目の水平期間のうち駆動期間において、図６のような現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ１０（ｈ）が駆動電圧供給回路１に供給される。また、画素値格納部１０２には、図６のような前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄ１０（ｈ－１）が格納されている。ここで、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１）および現画素値Ｄ１（ｈ），Ｄ２（ｈ）は、短絡線ＳＴＬ１に対応付けられた第１の始点範囲ＳＲ１ａおよび第１の終点範囲ＥＲ１ａにそれぞれ属する。すなわち、画素ベクトルＶＰ１，ＶＰ２は、短絡線ＳＴＬ１に対応付けられた第１候補ベクトル（第１の始点範囲ＳＲ１ａに始点値が属するとともに第１の終点範囲ＥＲ１ａに終点値が属する候補ベクトル）のいずれか１つに一致していることになる。また、前画素値Ｄ９（ｈ－１），Ｄ１０（ｈ－１）および現画素値Ｄ９（ｈ），Ｄ１０（ｈ）は、短絡線ＳＴＬ１に対応付けられた第２の始点範囲ＳＲ１ｂおよび第２の終点範囲ＥＲ１ｂにそれぞれ属する。したがって、チャージシェア制御部１０３は、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に割り当てる。 First, in the driving period in the h-th horizontal period, current pixel values D1 (h) , D2 (h) ,..., D10 (h) as shown in FIG. Further, the pixel value storage unit 102 stores the previous pixel values D1 (h−1) , D2 (h−1) ,..., D10 (h−1) as shown in FIG. Here, the previous pixel values D1 (h-1) and D2 (h-1) and the current pixel values D1 (h) and D2 (h) are the first start point range SR1a associated with the short-circuit line STL1 and the first pixel range SR1a. Belongs to one end point range ER1a. That is, the pixel vectors VP1 and VP2 are any of the first candidate vectors associated with the short-circuit line STL1 (candidate vectors whose start point value belongs to the first start point range SR1a and whose end point value belongs to the first end point range ER1a). Or one of them. The previous pixel values D9 (h-1) and D10 (h-1) and the current pixel values D9 (h) and D10 (h) are the second start point range SR1b and the second range corresponding to the short-circuit line STL1. Belongs to the end point range ER1b. Therefore, the charge share control unit 103 assigns the source lines SL1, SL2, SL9, and SL10 to the short circuit line STL1.
　また、画素ベクトルＶＰ６，ＶＰ５は、それぞれ、短絡線ＳＴＬ２に対応付けられた第１候補ベクトル（始点値が第１の始点範囲ＳＲ２ａに属するとともに終点値が第１の終点範囲ＥＲ２ａに属する候補ベクトル）のいずれか１つおよび第２候補ベクトル（始点値が第１の始点範囲ＳＲ２ｂに属するとともに終点値が第１の終点範囲ＥＲ２ｂに属する候補ベクトル）のいずれか１つに一致している。さらに、画素ベクトルＶＰ８，ＶＰ７は、それぞれ、短絡線ＳＴＬ３に対応付けられた第１候補ベクトル（始点値が第１の始点範囲ＳＲ３ａに属するとともに終点値が第１の終点範囲ＥＲ３ａに属する候補ベクトル）のいずれか１つおよび第２候補ベクトル（始点値が第１の始点範囲ＳＲ３ｂに属するとともに終点値が第１の終点範囲ＥＲ３ｂに属する候補ベクトル）のいずれか１つに一致している。したがって、チャージシェア制御部１０３は、ソース線ＳＬ５，ＳＬ６を短絡線ＳＴＬ２に割り当て、ソース線ＳＬ７，ＳＬ８を短絡線ＳＴＬ３に割り当てる。 The pixel vectors VP6 and VP5 are respectively first candidate vectors associated with the short-circuit line STL2 (candidate vectors whose start point values belong to the first start point range SR2a and end point values belong to the first end point range ER2a). And the second candidate vector (candidate vectors whose start point value belongs to the first start point range SR2b and whose end point value belongs to the first end point range ER2b). Furthermore, the pixel vectors VP8 and VP7 are each a first candidate vector associated with the short-circuit line STL3 (a candidate vector whose start point value belongs to the first start point range SR3a and whose end point value belongs to the first end point range ER3a). And a second candidate vector (a candidate vector whose start point value belongs to the first start point range SR3b and whose end point value belongs to the first end point range ER3b). Therefore, the charge share control unit 103 assigns the source lines SL5 and SL6 to the short-circuit line STL2, and assigns the source lines SL7 and SL8 to the short-circuit line STL3.
　なお、前画素値Ｄ３（ｈ－１）は、短絡線ＳＴＬ２に対応付けられた第１の始点範囲ＳＲ２ｂに属するが、現画素値Ｄ３（ｈ）は、短絡線ＳＴＬ２に対応付けられた第１の終点範囲ＥＲ２ｂに属していない。また、現画素値Ｄ４（ｈ）は、短絡線ＳＴＬ２に対応付けられた第２の終点範囲ＥＲ２ａに属するが、前画素値Ｄ４（ｈ－１）は、短絡線ＳＴＬ２に対応付けられた第２の始点範囲ＳＲ２ａに属していない。ここでは、画素ベクトルＶＰ３，ＶＰ４は、短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３の各々に対応付けられた候補ベクトルのいずれにも一致していない。したがって、チャージシェア制御部１０３は、ソース線ＳＬ３，ＳＬ４を短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３のいずれにも割り当てない。 The previous pixel value D3 (h−1) belongs to the first start point range SR2b associated with the short-circuit line STL2, but the current pixel value D3 (h) is the first pixel range associated with the short-circuit line STL2. Does not belong to the end point range ER2b. In addition, the current pixel value D4 (h) belongs to the second end point range ER2a associated with the short-circuit line STL2, but the previous pixel value D4 (h-1) is the second end point range associated with the short-circuit line STL2. Does not belong to the start point range SR2a. Here, the pixel vectors VP3 and VP4 do not match any of the candidate vectors associated with each of the short-circuit lines STL1, STL2, and STL3. Therefore, the charge share control unit 103 does not assign the source lines SL3, SL4 to any of the short-circuit lines STL1, STL2, STL3.
　　〔ソース線の電圧変動〕
　次に、図７を参照して、チャージシェア動作によるソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動について説明する。ここでは、ｎ＝１０，ｋ＝３であるものする。また、図７では、ソース線ＳＬ１，ＳＬ２，…，ＳＬ１０の電圧変動は、画素値を用いて表現されている。 [Voltage fluctuation of source line]
Next, voltage fluctuations of the source lines SL1, SL2,..., SLn due to the charge sharing operation will be described with reference to FIG. Here, n = 10 and k = 3. In FIG. 7, voltage fluctuations of the source lines SL1, SL2,..., SL10 are expressed using pixel values.
　次に、第ｈ番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、チャージシェア制御部１０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬ１０を駆動電圧生成部１０１（駆動部１１１，１１２，…，１１１０）からそれぞれ切り離す。次に、接続切替部１０４は、チャージシェア制御部１０３による割当結果（図６）に基づいて、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に電気的に接続し、ソース線ＳＬ５，ＳＬ６を短絡線ＳＴＬ２に電気的に接続し、ソース線ＳＬ７，ＳＬ８を短絡線ＳＴＬ３に電気的に接続する。なお、接続切替部１０４は、ソース線ＳＬ３，ＳＬ４を短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３のいずれにも電気的に接続しない。これにより、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０の電圧は、それぞれ、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），Ｄ９（ｈ－１），Ｄ１０（ｈ－１）に応じた駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１０（ｈ－１）から平均値ＤＡ１（前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），Ｄ９（ｈ－１），Ｄ１０（ｈ－１）の平均値）に応じた平均電圧に変化する。ソース線ＳＬ５，ＳＬ６の電圧は、それぞれ、前画素値Ｄ５（ｈ－１），Ｄ６（ｈ－１）に応じた駆動電圧ＶＤ５（ｈ－１），ＶＤ６（ｈ－１）から平均値ＤＡ２（前画素値Ｄ５（ｈ－１），Ｄ６（ｈ－１）の平均値）に応じた平均電圧に変化し、ソース線ＳＬ７，ＳＬ８の電圧は、それぞれ、前画素値Ｄ７（ｈ－１），Ｄ８（ｈ－１）に応じた駆動電圧ＶＤ７（ｈ－１），ＶＤ８（ｈ－１）から平均値ＤＡ３（前画素値Ｄ７（ｈ－１），Ｄ８（ｈ－１）の平均値）に応じた平均電圧に変化する。なお、ソース線ＳＬ３，ＳＬ４の電圧は、それぞれ、前画素値Ｄ３（ｈ－１），Ｄ４（ｈ－１）に応じた駆動電圧ＶＤ３（ｈ－１），ＶＤ４（ｈ－１）のまま維持される。 Next, in the charge share period in the h-th horizontal period, the connection switching unit 104 sends the source lines SL1, SL2,..., SL10 to the drive voltage generation unit 101 ( .., 1110). Next, the connection switching unit 104 electrically connects the source lines SL1, SL2, SL9, and SL10 to the short-circuit line STL1 based on the allocation result (FIG. 6) by the charge share control unit 103, and the source lines SL5 and SL6. Are electrically connected to the short-circuit line STL2, and the source lines SL7 and SL8 are electrically connected to the short-circuit line STL3. Connection switching unit 104 does not electrically connect source lines SL3 and SL4 to any of short-circuit lines STL1, STL2, and STL3. As a result, the voltages of the source lines SL1, SL2, SL9, and SL10 correspond to the previous pixel values D1 (h-1) , D2 (h-1) , D9 (h-1) , and D10 (h-1) , respectively. From the drive voltages VD1 (h-1) , VD2 (h-1) , VD9 (h-1) , VD10 (h-1) , the average value DA1 (previous pixel values D1 (h-1) , D2 (h-1) ) , D9 (h-1) , D10 (h-1) average value). The voltages of the source lines SL5 and SL6 are average values DA2 (from the drive voltages VD5 (h-1) and VD6 (h-1) corresponding to the previous pixel values D5 (h-1) and D6 (h-1) , respectively. The average voltages according to the previous pixel values D5 (h-1) and D6 (h-1)) are changed, and the voltages of the source lines SL7 and SL8 are respectively changed to the previous pixel values D7 (h-1) , Drive voltage VD7 (h-1) , VD8 (h-1) corresponding to D8 (h-1) is changed to an average value DA3 (average value of previous pixel values D7 (h-1) , D8 (h-1) ). It changes to the corresponding average voltage. The voltage of the source line SL3, SL4, respectively, before the pixel value D3 (h-1), D4 (h-1) driving voltage corresponding to VD3 (h-1), maintained at VD4 (h-1) Is done.
　次に、第ｈ＋１番目の水平期間のうち駆動期間において、接続切替部１０４は、チャージシェア制御部１０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬ１０を短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３から切り離した後に、ソース線ＳＬ１，ＳＬ２，…，ＳＬ１０を駆動部１１１，１１２，…，１１１０に接続する。また、駆動部１１１，１１２，…，１１１０は、水平同期信号の第ｈ＋１番目の立ち上がりエッジに同期して、現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ１０（ｈ）を駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），…，ＶＤ１０（ｈ）にそれぞれ変換する。これにより、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０の電圧は、それぞれ、平均値ＤＡ１に応じた平均電圧から現画素値Ｄ１（ｈ），Ｄ２（ｈ），Ｄ９（ｈ），Ｄ１０（ｈ）に応じた駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），ＶＤ９（ｈ），ＶＤ１０（ｈ）に変化する。ソース線ＳＬ５，ＳＬ６の電圧は、平均値ＤＡ２に応じた平均電圧から現画素値Ｄ５（ｈ），Ｄ６（ｈ）に応じた駆動電圧ＶＤ５（ｈ），ＶＤ６（ｈ）に変化する。ソース線ＳＬ７，ＳＬ８の電圧は、平均値ＤＡ３に応じた平均電圧から現画素値Ｄ７（ｈ），Ｄ８（ｈ）に応じた駆動電圧ＶＤ７（ｈ），ＶＤ８（ｈ）に変化する。なお、ソース線ＳＬ３，ＳＬ４の電圧は、それぞれ、駆動電圧ＶＤ３（ｈ－１），ＶＤ４（ｈ－１）から現画素値Ｄ３（ｈ），Ｄ４（ｈ）に応じた駆動電圧ＶＤ３（ｈ），ＶＤ４（ｈ）に変化する。 Next, in the driving period in the (h + 1) th horizontal period, the connection switching unit 104 connects the source lines SL1, SL2,..., SL10 to the short-circuit lines STL1, STL2, STL3 in response to the control by the charge share control unit 103. .., SL10 are connected to the driving units 111, 112,. The driving units 111, 112,..., 1110 use the current pixel values D1 (h) , D2 (h) ,..., D10 (h) as driving voltages in synchronization with the (h + 1) th rising edge of the horizontal synchronizing signal. VD1 (h) , VD2 (h) ,..., VD10 (h) are converted. Thereby, the voltages of the source lines SL1, SL2, SL9, and SL10 are changed from the average voltage corresponding to the average value DA1 to the current pixel values D1 (h) , D2 (h) , D9 (h) , and D10 (h) , respectively. The corresponding drive voltages VD1 (h) , VD2 (h) , VD9 (h) , and VD10 (h) are changed. The voltages of the source lines SL5 and SL6 change from the average voltage corresponding to the average value DA2 to the drive voltages VD5 (h) and VD6 (h) corresponding to the current pixel values D5 (h) and D6 (h) . The voltages of the source lines SL7 and SL8 change from the average voltage corresponding to the average value DA3 to the drive voltages VD7 (h) and VD8 (h) corresponding to the current pixel values D7 (h) and D8 (h) . The voltage of the source line SL3, SL4, respectively, the drive voltage VD3 (h-1), VD4 (h-1) from the current pixel value D3 (h), D4 (h ) a drive voltage corresponding to VD3 (h) , VD4 (h) .
　　〔電荷再分配の効率化〕
　画素ベクトルＶＰｉと短絡線ＳＴＬｊに対応付けられた候補ベクトル（複数の第１候補ベクトルおよび複数の第２候補ベクトル）との一致判定に基づいて、ソース線ＳＬｉを短絡線ＳＴＬｊに割り当てるか否かを決定することにより、短絡線ＳＴＬｊに割り当てられたソース線に対応する画素ベクトルの始点値の平均値（すなわち、現画素値の平均値）が短絡線ＳＴＬｊに対応する目標値に近くなる（または、一致する）可能性を高めることができる。また、短絡線ＳＴＬｊに対応する目標値から短絡線ＳＴＬｊに割り当てられたソース線に対応する現画素値までの距離は、短絡線ＳＴＬｊに割り当てられたソース線に対応する前画素値から現画素値までの距離よりも短い。したがって、短絡線ＳＴＬｊに割り当てられたソース線に対応する画素ベクトルの始点値の平均値（すなわち、前画素値の平均値）が短絡線ＳＴＬｊに対応する目標値に近くなる（または、一致する）可能性を高めることにより、短絡線ＳＴＬｊに割り当てられたソース線に対応する短絡ベクトルの絶対値和が短絡線ＳＴＬｊに割り当てられたソース線に対応する画素ベクトルの絶対値和よりも小さくなる可能性を高めることができる。 [Efficiency of charge redistribution]
Whether or not to assign the source line SLi to the short-circuit line STLj based on the coincidence determination between the pixel vector VPi and the candidate vectors (a plurality of first candidate vectors and a plurality of second candidate vectors) associated with the short-circuit line STLj. By determining, the average value of the starting point values of the pixel vectors corresponding to the source lines assigned to the short-circuit line STLj (that is, the average value of the current pixel values) is close to the target value corresponding to the short-circuit line STLj (or Match). The distance from the target value corresponding to the short-circuit line STLj to the current pixel value corresponding to the source line assigned to the short-circuit line STLj is the current pixel value from the previous pixel value corresponding to the source line assigned to the short-circuit line STLj. Shorter than the distance to. Therefore, the average value of the starting point values of the pixel vectors corresponding to the source lines assigned to the short-circuit line STLj (that is, the average value of the previous pixel values) is close to (or matches) the target value corresponding to the short-circuit line STLj. By increasing the possibility, the absolute value sum of the short-circuit vector corresponding to the source line assigned to the short-circuit line STLj may be smaller than the absolute value sum of the pixel vector corresponding to the source line assigned to the short-circuit line STLj. Can be increased.
　例えば、図７において、短絡線ＳＴＬ１に対応付けられた候補ベクトルのいずれか１本に一致する画素ベクトルＶＰ１，ＶＰ２，ＶＰ９，ＶＰ１０に対応するソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に割り当てることにより、短絡線ＳＴＬ１に割り当てられたソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０に対応する前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），Ｄ９（ｈ－１），Ｄ１０（ｈ－１）の平均値ＤＡ１は、短絡線ＳＴＬ１に対応する目標値ＤＴ１に近づく。また、短絡ベクトルＶＳ１，ＶＳ２，ＶＳ９，ＶＳ１０（図７）の絶対値和は、画素ベクトルＶＰ１，ＶＰ２，ＶＰ９，ＶＰ１０（図６）の絶対値和よりも小さくなる。これと同様に、ソース線ＳＬ５，ＳＬ６を短絡線ＳＴＬ２に割り当てることにより、短絡ベクトルＶＳ５，ＶＳ６の絶対値和は、画素ベクトルＶＰ５，ＶＰ６の絶対値和よりも小さくなり、ソース線ＳＬ７，ＳＬ８を短絡線ＳＴＬ３に割り当てることにより、短絡ベクトルＶＳ７，ＶＳ８の絶対値和は、画素ベクトルＶＰ７，ＶＰ８の絶対値和よりも小さくなる。 For example, in FIG. 7, the source lines SL1, SL2, SL9, SL10 corresponding to the pixel vectors VP1, VP2, VP9, VP10 that match any one of the candidate vectors associated with the short circuit line STL1 are used as the short circuit line STL1. By assigning, the previous pixel values D1 (h-1) , D2 (h-1) , D9 (h-1) , D10 (h ) corresponding to the source lines SL1, SL2, SL9, SL10 assigned to the short-circuit line STL1 The average value DA1 of -1) approaches the target value DT1 corresponding to the short-circuit line STL1. Further, the absolute value sum of the short-circuit vectors VS1, VS2, VS9, VS10 (FIG. 7) is smaller than the absolute value sum of the pixel vectors VP1, VP2, VP9, VP10 (FIG. 6). Similarly, by assigning the source lines SL5 and SL6 to the short-circuit line STL2, the absolute value sum of the short-circuit vectors VS5 and VS6 becomes smaller than the absolute value sum of the pixel vectors VP5 and VP6, and the source lines SL7 and SL8 are connected. By assigning to the short-circuit line STL3, the absolute value sum of the short-circuit vectors VS7 and VS8 becomes smaller than the absolute value sum of the pixel vectors VP7 and VP8.
　ここで、短絡ベクトルＶＳ１，ＶＳ２，ＶＳ９，ＶＳ１０の絶対値和は、平均電圧（駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１０（ｈ－１）の平均電圧）から駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），ＶＤ９（ｈ），ＶＤ１０（ｈ）への電圧変動量の総和に相当し、画素ベクトルＶＰ１，ＶＰ２，ＶＰ９，ＶＰ１０の絶対値和は、駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１０（ｈ－１）から駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），ＶＤ９（ｈ），ＶＤ１０（ｈ）への電圧変動量の総和に相当する。すなわち、短絡線ＳＴＬ１に割り当てられたソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に電気的に接続してソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０の間で電荷を再分配することにより、第ｈ＋１番目の水平期間におけるソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０の電圧変動量の総和を削減できる。これと同様に、ソース線ＳＬ５，ＳＬ６を短絡線ＳＴＬ２に電気的に接続し、ソース線ＳＬ７，ＳＬ８を短絡線ＳＴＬ３に電気的に接続することにより、第ｈ＋１番目の水平期間におけるソース線ＳＬ５，ＳＬ６の電圧変動量の総和およびソース線ＳＬ７，ＳＬ８の電圧変動量の総和を削減できる。 Here, the sum of absolute values of the short-circuit vectors VS1, VS2, VS9, and VS10 is obtained by calculating average voltages (drive voltages VD1 (h-1) , VD2 (h-1) , VD9 (h-1) , VD10 (h-1). Equivalent to the sum of the voltage fluctuations from the drive voltage VD1 (h) , VD2 (h) , VD9 (h) , VD10 (h) to the drive voltages VD1 (h) , VD2 (h) , VD10 (h) . Are the drive voltages VD1 (h-1) , VD2 (h-1) , VD9 (h-1) , VD10 (h-1) to the drive voltages VD1 (h) , VD2 (h) , VD9 (h) , VD10. This corresponds to the total amount of voltage fluctuation to (h) . That is, the source lines SL1, SL2, SL9, SL10 assigned to the short-circuit line STL1 are electrically connected to the short-circuit line STL1, and the charge is redistributed among the source lines SL1, SL2, SL9, SL10. It is possible to reduce the total voltage fluctuation amount of the source lines SL1, SL2, SL9, and SL10 in the (h + 1) th horizontal period. Similarly, the source lines SL5 and SL6 are electrically connected to the short-circuit line STL2, and the source lines SL7 and SL8 are electrically connected to the short-circuit line STL3, whereby the source lines SL5 and SL5 in the (h + 1) th horizontal period are connected. It is possible to reduce the sum of the voltage fluctuations of SL6 and the sum of the voltage fluctuations of the source lines SL7 and SL8.
　以上のように、画素ベクトルＶＰ１，ＶＰ２，…，ＶＰｎの分布に基づいてｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの各々をｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのいずれか１本に割り当てて短絡させることにより、従来のチャージシェア技術を適用する場合（ソース線ＳＬ１，ＳＬ２，…，ＳＬｎを全て同時に短絡させる場合）よりも、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動量の総和（すなわち、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎにおける消費電力）を削減できる可能性を高めることができる。このように、駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性（コモン電圧ＶＣＯＭに対する極性）を反転させない場合であってもソース線ＳＬ１，ＳＬ２，…，ＳＬｎの間で電荷再分配を効率良く実行できる。 As described above, each of the n source lines SL1, SL2,..., SLn is any one of k short-circuit lines STL1, STL2,..., STLk based on the distribution of the pixel vectors VP1, VP2,. The voltage fluctuations of the source lines SL1, SL2,..., SLn than when applying the conventional charge sharing technique (when all the source lines SL1, SL2,. The possibility of reducing the total amount (that is, power consumption in the source lines SL1, SL2,..., SLn) can be increased. As described above, even when the polarity of the drive voltages VD1, VD2,..., VDn (the polarity with respect to the common voltage VCOM) is not reversed, charge redistribution can be efficiently performed among the source lines SL1, SL2,. .
　（実施形態１の変形例）
　なお、駆動電圧供給回路１の駆動方式は、図８のようなＰ×Ｑドット反転駆動方式であっても良い。Ｐ×Ｑドット反転駆動方式とは、Ｐ個（Ｐは、１以上の整数であり、図８では、Ｐ＝２）の画素列毎にｎ個の駆動電圧の極性（コモン電圧ＶＣＯＭに対する極性）を反転させ、Ｑ個（Ｑは、２以上の整数であり、図８では、Ｑ＝２）の画素行毎にｎ個の駆動電圧の極性を反転させる駆動方式のことである。ここでは、駆動電圧がコモン電圧ＶＣＯＭよりも高い場合を“正極性”と表現し、駆動電圧がコモン電圧ＶＣＯＭよりも低い場合を“負極性”と表現する。また、駆動電圧が“正極性”である場合には、画素値が大きくなるほど駆動電圧が高くなり、駆動電圧が“負極性”である場合には、画素値が大きくなるほど駆動電圧が低くなる。 (Modification of Embodiment 1)
Note that the driving method of the driving voltage supply circuit 1 may be a P × Q dot inversion driving method as shown in FIG. The P × Q dot inversion driving method is a polarity of n driving voltages (polarity with respect to the common voltage VCOM) for each of P pixels (P is an integer of 1 or more and P = 2 in FIG. 8). , And the polarity of the n drive voltages is inverted for every Q pixel rows (Q is an integer of 2 or more and Q = 2 in FIG. 8). Here, the case where the drive voltage is higher than the common voltage VCOM is expressed as “positive polarity”, and the case where the drive voltage is lower than the common voltage VCOM is expressed as “negative polarity”. When the drive voltage is “positive polarity”, the drive voltage increases as the pixel value increases. When the drive voltage is “negative polarity”, the drive voltage decreases as the pixel value increases.
　Ｐ×Ｑドット反転駆動方式を適用する場合、図９のように、駆動電圧生成部１０１（駆動部１１１，１１２，…，１１ｎ）およびチャージシェア制御部１０３（制御部１３１，１３２，…，１３ｎ）には、Ｑ個の水平期間毎に駆動電圧の極性を反転させるための極性反転信号ＳＰＲが与えられる。 When the P × Q dot inversion driving method is applied, as shown in FIG. 9, the drive voltage generation unit 101 (drive units 111, 112,..., 11n) and the charge share control unit 103 ( control units 131, 132,. ) Is supplied with a polarity inversion signal SPR for inverting the polarity of the drive voltage every Q horizontal periods.
　駆動電圧生成部１０１は、１水平期間においてＰ本のソース線毎にｎ個の駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させるとともに、Ｑ個の水平期間毎にｎ個の駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させる。駆動部１１１，１１２，…，１１ｎの各々は、与えられた画素値を正極性の駆動電圧に変換する正極駆動モードと、与えられた画素値を負極性の駆動電圧に変換する負極駆動モードとを有しており、駆動部１１１，１１２，…，１１ｎの駆動モードは、Ｐ個の駆動部毎に駆動極性が反転するように設定されている。また、駆動部１１１，１１２，…，１１ｎの各々は、極性反転信号ＳＰＲに応答して駆動モードを切り替える。 The drive voltage generator 101 inverts the polarities of n drive voltages VD1, VD2,..., VDn for each P source lines in one horizontal period, and n drive voltages VD1 for each Q horizontal periods. , VD2,..., VDn are inverted in polarity. Each of the driving units 111, 112,..., 11n has a positive drive mode for converting a given pixel value into a positive drive voltage, and a negative drive mode for converting a given pixel value into a negative drive voltage. The drive modes of the drive units 111, 112,..., 11n are set so that the drive polarity is inverted every P drive units. Further, each of the drive units 111, 112,..., 11n switches the drive mode in response to the polarity inversion signal SPR.
　チャージシェア制御部１０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎのうち第ｉ番目のソース線ＳＬｉに供給される第ｉ番目の駆動電圧ＶＤｉ（ｈ）の極性が“正極性”である場合には、第ｉ番目のソース線ＳＬｉに対応する第ｉ番目の画素値Ｄｉ（ｈ）を“正の数”として処理し、駆動電圧ＶＤｉ（ｈ）の極性が“負極性”である場合には、画素値Ｄｉ（ｈ）を“負の数”として処理する。例えば、制御部１３１，１３２，…，１３ｎにおける画素値Ｄ１，Ｄ２，…，Ｄｎの符号は、Ｐ個の制御部毎に画素値の符号が反転するように設定されており、制御部１３１，１３２，…，１３ｎは、極性反転信号ＳＰＲに応答して画素値Ｄ１，Ｄ２，…，Ｄｎの符号をそれぞれ反転させる。 In the charge share control unit 103, the polarity of the i-th drive voltage VDi (h) supplied to the i-th source line SLi among the n source lines SL1, SL2,. In some cases, the i-th pixel value Di (h) corresponding to the i-th source line SLi is processed as a “positive number”, and the polarity of the drive voltage VDi (h) is “negative polarity”. In this case, the pixel value Di (h) is processed as a “negative number”. For example, the signs of the pixel values D1, D2,..., Dn in the control units 131, 132,..., 13n are set so that the sign of the pixel value is inverted every P control units. 132,..., 13n invert the signs of the pixel values D1, D2,.
　　〔動作タイミング〕
　次に、図１０を参照して、図９に示した駆動電圧供給回路１の動作タイミングについて説明する。ここでは、Ｐ＝１であるものとする。 [Operation timing]
Next, the operation timing of the drive voltage supply circuit 1 shown in FIG. 9 will be described with reference to FIG. Here, it is assumed that P = 1.
　まず、第ｈ－１番目の水平期間Ｐ（ｈ－１）のうち駆動期間（水平同期信号の第ｈ－１番目の立ち上がりエッジからゲート線ＧＬ（ｈ－１）の活性化期間の終了までの期間）では、奇数番目の駆動部１１１，１１３，… は、負極駆動モードに設定され、偶数番目の駆動部１１２，１１４，… は、正極駆動モードに設定されている。すなわち、奇数番目の駆動電圧ＶＤ１，ＶＤ３，… の極性は、負極性であり、偶数番目の駆動電圧ＶＤ２，ＶＤ４，… の極性は、正極性である。 First, in the (h−1) th horizontal period P (h−1) , the driving period (from the (h−1) th rising edge of the horizontal synchronization signal to the end of the activation period of the gate line GL (h−1) . In the period), the odd-numbered drive units 111, 113,... Are set in the negative electrode drive mode, and the even-numbered drive units 112, 114,. That is, the polarity of odd-numbered drive voltages VD1, VD3,... Is negative, and the polarity of even-numbered drive voltages VD2, VD4,.
　次に、第ｈ－１番目の水平期間Ｐ（ｈ－１）のうちチャージシェア期間（ゲート線ＧＬ（ｈ－１）の活性化期間の終了から水平同期信号の第ｈ番目の立ち上がりエッジまでの期間）において、奇数番目の駆動部１１１，１１３，… の駆動モードは、負極駆動モードから正極駆動モードに切り替わり、偶数番目の駆動部１１２，１１４，… の駆動モードは、正極駆動モードから負極駆動モードに切り替わる。また、奇数番目の制御部１３１，１３３，… における画素値の符号は、負から正に切り替わり、偶数番目の制御部１３２，１３４，… における画素値の符号は、正から負に切り替わる。 Next, from the end of the activation period of the gate line GL (h−1) to the h-th rising edge of the horizontal synchronization signal in the h−1th horizontal period P (h−1) The drive mode of the odd-numbered drive units 111, 113,... Is switched from the negative electrode drive mode to the positive electrode drive mode, and the drive mode of the even-numbered drive units 112, 114,. Switch to mode. Further, the sign of the pixel value in the odd-numbered control units 131, 133,... Switches from negative to positive, and the sign of the pixel value in the even-numbered control units 132, 134,.
　次に、第ｈ番目の水平期間Ｐ（ｈ）のうち駆動期間において、駆動電圧生成部１０１は、水平同期信号の第ｈ番目の立ち上がりエッジに同期して、画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）を駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），…，ＶＤｎ（ｈ－１）に変換する。ここで、奇数番目の駆動電圧ＶＤ１（ｈ－１），ＶＤ３（ｈ－１），… の極性は、正極性であり、偶数番目の駆動電圧ＶＤ２（ｈ－１），ＶＤ４（ｈ－１），… の極性は、負極性である。また、第ｈ番目の水平期間Ｐ（ｈ）に対応する画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）が駆動電圧供給回路１に供給される。ここで、チャージシェア制御部１０３は、奇数番目の画素値Ｄ１（ｈ），Ｄ３（ｈ），… および画素値格納部１０２に格納された奇数番目の画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），… を“正の数”とし、偶数番目の画素値Ｄ２（ｈ），Ｄ４（ｈ），… および画素値格納部１０２に格納された偶数番目の画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），… を“負の数”として割当処理を実行する。 Next, in the driving period of the h-th horizontal period P (h) , the driving voltage generation unit 101 synchronizes with the h-th rising edge of the horizontal synchronization signal in pixel values D1 (h−1) , D2 (h-1) ,..., Dn (h-1) are converted into drive voltages VD1 (h-1) , VD2 (h-1) , ..., VDn (h-1) . Here, the polarities of the odd-numbered drive voltages VD1 (h-1) , VD3 (h-1) ,... Are positive, and the even-numbered drive voltages VD2 (h-1) , VD4 (h-1) The polarity of, ... is negative. Also, pixel values D1 (h) , D2 (h) ,..., Dn (h) corresponding to the h-th horizontal period P (h) are supplied to the drive voltage supply circuit 1. Here, the charge share control unit 103 outputs the odd-numbered pixel values D1 (h) , D3 (h) ,... And the odd-numbered pixel values D1 (h−1) , D3 ( h-1), ... a "positive number" to the even-numbered pixel value D2 (h), D4 (h ), ... and the pixel value storage portion even-numbered pixel values stored in the 102 D2 (h-1 ) , D4 (h−1) ,... Are set as “negative numbers”, and the allocation process is executed.
　　〔具体例〕
　次に、図１１を参照して、図９に示した駆動電圧供給回路１による動作について具体例を挙げて説明する。ここでは、Ｐ＝１，ｎ＝１０，ｋ＝３であるものとする。また、短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３には、図１１のような第１の始点範囲ＳＲ１ａ，ＳＲ２ａ，ＳＲ３ａ，第１の終点範囲ＥＲ１ａ，ＥＲ２ａ，ＥＲ３ａ，第２の始点範囲ＳＲ１ｂ，ＳＲ２ｂ，ＳＲ３ｂ，および第２の終点範囲ＥＲ１ｂ，ＥＲ２ｂ，ＥＲ３ｂが対応付けられているものとする。さらに、奇数番目の制御部１３１，１３３，…，１３９における画素値の符号は“正”に設定され、偶数番目の制御部１３２，１３４，…，１３１０における画素値の符号は“負”に設定されているものとする。 〔Concrete example〕
Next, the operation of the drive voltage supply circuit 1 shown in FIG. 9 will be described with a specific example with reference to FIG. Here, it is assumed that P = 1, n = 10, and k = 3. Further, the short-circuit lines STL1, STL2, and STL3 include a first start point range SR1a, SR2a, SR3a, a first end point range ER1a, ER2a, ER3a, a second start point range SR1b, SR2b, SR3b, as shown in FIG. The second end point ranges ER1b, ER2b, and ER3b are associated with each other. Further, the sign of the pixel value in the odd-numbered control units 131, 133,..., 139 is set to “positive”, and the sign of the pixel value in the even-numbered control units 132, 134,. It is assumed that
　第ｈ番目の水平期間のうち駆動期間において、チャージシェア制御部１０３は、奇数番目の現画素値Ｄ１（ｈ），Ｄ３（ｈ），… および奇数番目の前画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），… を“正の数”とし、偶数番目の現画素値Ｄ２（ｈ），Ｄ４（ｈ），… および偶数番目の前画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），… を“負の数”として割当処理を実行する。その結果、図１１のような画素値の分布が得られる。そして、チャージシェア制御部１０３は、ソース線ＳＬ１，ＳＬ２，ＳＬ９，ＳＬ１０を短絡線ＳＴＬ１に割り当て、ソース線ＳＬ５，ＳＬ９を短絡線ＳＴＬ２に割り当て、ソース線ＳＬ６，ＳＬ１０を短絡線ＳＴＬ３に割り当てる。なお、チャージシェア制御部１０３は、ソース線ＳＬ７，ＳＬ８を短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３のいずれにも割り当てない。 In the driving period of the h-th horizontal period, the charge share control unit 103 performs odd-numbered current pixel values D1 (h) , D3 (h) ,... And odd-numbered previous pixel values D1 (h−1) ,. D3 (h−1) ,... Are “positive numbers”, and even-numbered current pixel values D2 (h) , D4 (h) ,... And even-numbered previous pixel values D2 (h−1) , D4 (h −1) ,... Are set as “negative numbers” and the allocation process is executed. As a result, a distribution of pixel values as shown in FIG. 11 is obtained. Then, the charge share control unit 103 assigns the source lines SL1, SL2, SL9, and SL10 to the short circuit line STL1, assigns the source lines SL5 and SL9 to the short circuit line STL2, and assigns the source lines SL6 and SL10 to the short circuit line STL3. Note that the charge share control unit 103 does not assign the source lines SL7 and SL8 to any of the short-circuit lines STL1, STL2, and STL3.
　また、第ｈ番目の水平期間において駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させる場合、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧の全ては、コモン電圧ＶＣＯＭを経て駆動電圧ＶＤ１（ｈ－１），ＶＤ２（ｈ－１），…，ＶＤｎ（ｈ－１）に変化することになる。そこで、チャージシェア制御部１０３は、第ｈ－１番目の水平期間中に極性反転信号ＳＰＲが供給された場合（すなわち、第ｈ番目の水平期間において駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させる場合）、第ｈ－１番目の水平期間のうち駆動期間において、画素ベクトルＶＰ１，ＶＰ２，…，ＶＰｎに基づく割当処理を実行せずに、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの全てを短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち予め定められた１本の短絡線（例えば、短絡線ＳＴＬ１）に割り当てても良い。この場合、第ｈ－１番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎを予め定められた短絡線ＳＴＬ１に電気的に接続することになる。 When the polarities of the drive voltages VD1, VD2,..., VDn are inverted in the hth horizontal period, all of the voltages of the source lines SL1, SL2,..., SLn pass through the common voltage VCOM and the drive voltage VD1 (h -1) , VD2 (h-1) , ..., VDn (h-1) . Therefore, when the polarity inversion signal SPR is supplied during the (h−1) th horizontal period (ie, the polarity of the drive voltages VD1, VD2,..., VDn is changed in the hth horizontal period). In the case of inversion), all of the source lines SL1, SL2,..., SLn are not executed in the driving period in the h−1th horizontal period without performing the allocation process based on the pixel vectors VP1, VP2,. The short-circuit lines STL1, STL2,..., STLk may be assigned to one predetermined short-circuit line (for example, the short-circuit line STL1). In this case, in the charge sharing period in the h−1th horizontal period, the connection switching unit 104 electrically connects the source lines SL1, SL2,..., SLn to the predetermined short-circuit line STL1. .
　（実施形態２）
　図１２は、実施形態２による駆動電圧供給回路２の構成例を示す。駆動電圧供給回路２は、図１に示した画素値格納部１０２およびチャージシェア制御部１０３に代えて、画素値格納部２０２およびチャージシェア制御部２０３を備える。その他の構成は、図１と同様である。なお、駆動電圧供給回路２の駆動方式は、Ｐ×Ｑドット反転駆動方式であっても良いし、駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させない駆動方式であっても良い。 (Embodiment 2)
FIG. 12 shows a configuration example of the drive voltage supply circuit 2 according to the second embodiment. The drive voltage supply circuit 2 includes a pixel value storage unit 202 and a charge share control unit 203 instead of the pixel value storage unit 102 and the charge share control unit 103 shown in FIG. Other configurations are the same as those in FIG. The drive method of the drive voltage supply circuit 2 may be a P × Q dot inversion drive method, or may be a drive method that does not invert the polarity of the drive voltages VD1, VD2,.
　画素値格納部２０２は、１水平期間毎に供給されたｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎを格納する。すなわち、画素値格納部２０２は、第ｈ－１番目の水平期間に対応するｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎをｎ個の前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）として格納する。 The pixel value storage unit 202 stores n pixel values D1, D2,..., Dn supplied every horizontal period. That is, the pixel value storage unit 202 converts the n pixel values D1, D2,..., Dn corresponding to the (h−1) th horizontal period into n previous pixel values D1 (h−1) , D2 (h− 1) ,..., Dn (h-1) .
　チャージシェア制御部２０３は、画素値を示した数直線上において画素値格納部２０２に格納されたｎ個の前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）からｎ個の現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）へそれぞれ向かうｎ個の画素ベクトルＶＰ１，ＶＰ２，…，ＶＰｎの分布に基づいて、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの各々について、そのソース線を短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうちどの短絡線に割り当てるのか、または、そのソース線を短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのいずれにも割り当てないのかを決定する。ここでは、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの各々について、その短絡線に割り当てられたソース線に対応する前画素値の平均値からその短絡線に割り当てられたソース線に対応する現画素値に向かう短絡ベクトルの絶対値和が、その短絡線に割り当てられたソース線に対応する前画素値から現画素値に向かう画素ベクトルの絶対値和よりも小さい場合に、その短絡線に割り当てられたソース線がその短絡線に電気的に接続されるように接続切替部１０４を制御する。 The charge share control unit 203 includes n previous pixel values D1 (h−1) , D2 (h−1) ,..., Dn (h ) stored in the pixel value storage unit 202 on a number line indicating pixel values. -1) to n current pixel values D1 (h) , D2 (h) ,..., Dn (h) based on the distribution of n pixel vectors VP1, VP2,. For each of the source lines SL1, SL2,..., SLn, to which of the short-circuit lines STL1, STL2,. Decide whether to assign to any of the above. Here, for each of the k short-circuit lines STL1, STL2,..., STLk, the charge share control unit 203 assigns the short-circuit lines to the short-circuit lines from the average value of the previous pixel values corresponding to the source lines assigned to the short-circuit lines. The sum of the absolute values of the short-circuit vector toward the current pixel value corresponding to the selected source line is smaller than the sum of the absolute values of the pixel vector toward the current pixel value from the previous pixel value corresponding to the source line assigned to the short-circuit line. In this case, the connection switching unit 104 is controlled so that the source line assigned to the short-circuit line is electrically connected to the short-circuit line.
　　〔動作〕
　次に、図１３を参照して、図１２に示した駆動電圧供給回路２によるチャージシェア動作について説明する。 [Operation]
Next, with reference to FIG. 13, the charge sharing operation by the drive voltage supply circuit 2 shown in FIG. 12 will be described.
　　　《ＳＴ２０１》
　まず、チャージシェア制御部２０３は、変数ｉを“１”に設定する。すなわち、チャージシェア制御部２０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎのうち第１番目のソース線ＳＬ１を判定対象として選択する。 << ST201 >>
First, the charge share control unit 203 sets the variable i to “1”. That is, the charge share control unit 203 selects the first source line SL1 among the n source lines SL1, SL2,.
　　　《ＳＴ２０２》
　次に、チャージシェア制御部２０３は、変数ｊを“１”に設定する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち第１番目の短絡線ＳＴＬ１を判定対象として選択する。 << ST202 >>
Next, the charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit line STL1 from among the k short-circuit lines STL1, STL2,.
　　　《ＳＴ２０３》
　次に、チャージシェア制御部２０３は、画素ベクトルＶＰｉが短絡線ＳＴＬｊに対応付けられた候補ベクトルのいずれか１つに一致するか否かを判定する。なお、画素ベクトルＶＰｉとは、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎのうち判定対象として選択された第ｉ番目のソース線（以下、ソース線ＳＬｉと表記）に対応する前画素値Ｄｉ（ｈ－１）から現画素値Ｄｉ（ｈ）へ向かう画素ベクトルのことであり、短絡線ＳＴＬｊとは、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち判定対象として選択された第ｊ番目の短絡線のことである。判定結果が“不一致”を示す場合には、ステップＳＴ２０４へ進み、判定結果が“一致”を示す場合には、ステップＳＴ２０６へ進む。 << ST203 >>
Next, the charge share control unit 203 determines whether or not the pixel vector VPi matches any one of the candidate vectors associated with the short circuit line STLj. The pixel vector VPi is a previous pixel value Di corresponding to the i-th source line (hereinafter referred to as a source line SLi) selected as a determination target among the n source lines SL1, SL2,. This is a pixel vector from (h−1) to the current pixel value Di (h) , and the short circuit line STLj is the jth selected as the determination target among the k short circuit lines STL1, STL2,. It is the second short-circuit line. When the determination result indicates “mismatch”, the process proceeds to step ST204, and when the determination result indicates “match”, the process proceeds to step ST206.
　　　《ＳＴ２０４》
　次に、チャージシェア制御部２０３は、変数ｊが最大値ｊｍａｘ（ここでは、ｊｍａｘ＝ｋ）に到達している否かを判定する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの中に判定対象として選択されていない短絡線が残っているか否かを判定する。変数ｊが最大値ｊｍａｘに到達していない場合には、ステップＳＴ２０５へ進み、変数ｊが最大値ｊｍａｘに到達している場合には、ステップＳＴ２０７へ進む。 << ST204 >>
Next, the charge share control unit 203 determines whether or not the variable j has reached the maximum value jmax (here jmax = k). That is, the charge share control unit 203 determines whether or not a short circuit line not selected as a determination target remains in the k short circuit lines STL1, STL2,..., STLk. When the variable j has not reached the maximum value jmax, the process proceeds to step ST205, and when the variable j has reached the maximum value jmax, the process proceeds to step ST207.
　　　《ＳＴ２０５》
　次に、チャージシェア制御部２０３は、変数ｊに“１”を加算する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち判定対象として選択されていない短絡線を次の判定対象として選択する。次に、ステップＳＴ２０３へ進む。 << ST205 >>
Next, the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects a short-circuit line that is not selected as a determination target among the k short-circuit lines STL1, STL2,. Next, the process proceeds to step ST203.
　　　《ＳＴ２０６》
　一方、ステップＳＴ２０３における判定結果が“一致”を示す場合、チャージシェア制御部２０３は、ソース線ＳＬｉを短絡線ＳＴＬｊに割り当てる。 << ST206 >>
On the other hand, when the determination result in step ST203 indicates “match”, the charge share control unit 203 assigns the source line SLi to the short-circuit line STLj.
　　　《ＳＴ２０７》
　次に、チャージシェア制御部２０３は、変数ｉが最大値ｉｍａｘ（ここでは、ｉｍａｘ
＝ｎ）に到達しているか否かを判定する。すなわち、チャージシェア制御部２０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの中に判定対象として選択されていないソース線が残っているか否かを判定する。変数ｉが最大値ｉｍａｘに到達していない場合には、ステップＳＴ２０８へ進み、変数ｉが最大値ｉｍａｘに到達している場合には、ステップＳＴ２０９へ進む。 << ST207 >>
Next, the charge share control unit 203 determines that the variable i is the maximum value imax (here, imax
= N) is determined. That is, the charge share control unit 203 determines whether or not source lines that are not selected as a determination target remain in the n source lines SL1, SL2,. If the variable i has not reached the maximum value imax, the process proceeds to step ST208. If the variable i has reached the maximum value imax, the process proceeds to step ST209.
　　　《ＳＴ２０８》
　次に、チャージシェア制御部２０３は、変数ｉに“１”を加算する。すなわち、チャージシェア制御部２０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎのうち判定対象として選択されていないソース線を次の判定対象として選択する。次に、ステップＳＴ２０２へ進む。 << ST208 >>
Next, the charge share control unit 203 adds “1” to the variable i. That is, the charge share control unit 203 selects a source line that is not selected as a determination target among the n source lines SL1, SL2,. Next, the process proceeds to step ST202.
　　　《ＳＴ２０９》
　一方、ステップＳＴ２０７において変数ｉが最大値ｉｍａｘに到達していると判定された場合（ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎの中に判定対象として選択されていないソース線が残っていない場合）、チャージシェア制御部２０３は、変数ｊを“１”に設定する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち第１番目の短絡線ＳＴＬ１を判定対象として選択する。 << ST209 >>
On the other hand, when it is determined in step ST207 that the variable i has reached the maximum value imax (no source line not selected as a determination target remains in n source lines SL1, SL2,..., SLn). ), The charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit line STL1 from among the k short-circuit lines STL1, STL2,.
　　　《ＳＴ２１０》
　次に、チャージシェア制御部２０３は、短絡線ＳＴＬｊにソース線が割り当てられているか否かを判定する。短絡線ＳＴＬｊにソース線が割り当てられている場合には、ステップＳＴ２１１ヘ進み、そうでない場合には、ステップＳＴ２１３へ進む。 << ST210 >>
Next, the charge share control unit 203 determines whether or not a source line is assigned to the short-circuit line STLj. If a source line is assigned to the short-circuit line STLj, the process proceeds to step ST211. If not, the process proceeds to step ST213.
　　　《ＳＴ２１１》
　次に、チャージシェア制御部２０３は、短絡線ＳＴＬｊに割り当てられたソース線に対応する前画素値の平均値および短絡線ＳＴＬｊに割り当てられたソース線に対応する現画素値に基づいて短絡ベクトルを算出するとともに、短絡線ＳＴＬｊに割り当てられたソース線に対応する前画素値および現画素値に基づいて画素ベクトルを算出する。そして、チャージシェア制御部２０３は、短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さいか否かを判定する。例えば、短絡線ＳＴＬｊにソース線ＳＬ１，ＳＬ２が割り当てられている場合、チャージシェア制御部２０３は、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１）の平均値から現画素値Ｄ１（ｈ），Ｄ２（ｈ）へそれぞれ向かう短絡ベクトルＶＳ１，ＶＳ２を算出するとともに、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１）から現画素値Ｄ１（ｈ），Ｄ２（ｈ）へそれぞれ向かう画素ベクトルＶＰ１，ＶＰ２を算出し、短絡ベクトルＶＳ１，ＶＳ２の絶対値和が画素ベクトルＶＰ１，ＶＰ２の絶対値和よりも小さいか否かを判定する。短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さい場合には、ステップＳＴ２１２へ進み、そうでない場合には、ステップＳＴ２１３へ進む。 << ST211 >>
Next, the charge share control unit 203 calculates a short-circuit vector based on the average value of the previous pixel values corresponding to the source line assigned to the short-circuit line STLj and the current pixel value corresponding to the source line assigned to the short-circuit line STLj. A pixel vector is calculated based on the previous pixel value and the current pixel value corresponding to the source line assigned to the short-circuit line STLj. Then, the charge share control unit 203 determines whether or not the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors. For example, when the source lines SL1 and SL2 are assigned to the short-circuit line STLj, the charge share control unit 203 calculates the current pixel value D1 ( from the average value of the previous pixel values D1 (h−1) and D2 (h−1). h) and short-circuit vectors VS1 and VS2 going to D2 (h) , respectively, and from the previous pixel values D1 (h-1) and D2 (h-1) to the current pixel values D1 (h) and D2 (h) The respective pixel vectors VP1 and VP2 are calculated, and it is determined whether or not the absolute value sum of the short-circuit vectors VS1 and VS2 is smaller than the absolute value sum of the pixel vectors VP1 and VP2. If the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors, the process proceeds to step ST212, and if not, the process proceeds to step ST213.
　　　《ＳＴ２１２》
　次に、接続切替部１０４は、第ｈ番目の水平期間のうちチャージシェア期間において、チャージシェア制御部２０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎを駆動電圧生成部１０１（駆動部１１１，１１２，…，１１ｎ）から切り離した後に、短絡線ＳＴＬｊに割り当てられたソース線を短絡線ＳＴＬｊに電気的に接続する。次に、ステップＳＴ２１４へ進む。 << ST212 >>
Next, the connection switching unit 104 supplies the source lines SL1, SL2,..., SLn to the drive voltage generation unit 101 (in response to the control by the charge share control unit 203 in the charge share period in the h-th horizontal period. After being disconnected from the drive units 111, 112,..., 11n), the source line assigned to the short circuit line STLj is electrically connected to the short circuit line STLj. Next, the process proceeds to step ST214.
　　　《ＳＴ２１３》
　一方、ステップＳＴ２１０において短絡線ＳＴＬｊにソース線が割り当てられていないと判定された場合、または、ステップＳＴ２１１において短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さくないと判定された場合、接続切替部１０４は、第ｈ番目の水平期間のうちチャージシェア期間において、短絡線ＳＴＬｊにソース線ＳＬ１，ＳＬ２，…，ＳＬｎを電気的に接続しない。次に、ステップＳＴ２１４へ進む。 << ST213 >>
On the other hand, if it is determined in step ST210 that no source line is assigned to the short-circuit line STLj, or if it is determined in step ST211 that the absolute value sum of the short-circuit vectors is not smaller than the absolute value sum of the pixel vectors, The connection switching unit 104 does not electrically connect the source lines SL1, SL2,..., SLn to the short-circuit line STLj in the charge share period in the hth horizontal period. Next, the process proceeds to step ST214.
　　　《ＳＴ２１４》
　次に、チャージシェア制御部２０３は、変数ｊが最大値ｊｍａｘに到達しているか否かを判定する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの中に判定対象として選択されていない短絡線が残っているか否かを判定する。変数ｊが最大値ｊｍａｘに到達していない場合には、ステップＳＴ２１５へ進み、変数ｊが最大値ｊｍａｘに到達している場合には、ステップＳＴ２１６へ進む。 << ST214 >>
Next, the charge share control unit 203 determines whether or not the variable j has reached the maximum value jmax. That is, the charge share control unit 203 determines whether or not a short circuit line not selected as a determination target remains in the k short circuit lines STL1, STL2,..., STLk. If the variable j has not reached the maximum value jmax, the process proceeds to step ST215. If the variable j has reached the maximum value jmax, the process proceeds to step ST216.
　　　《ＳＴ２１５》
　次に、チャージシェア制御部２０３は、変数ｊに“１”を加算する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち判定対象として選択されていない短絡線を次の判定対象として選択する。次に、ステップＳＴ２１０へ進む。 << ST215 >>
Next, the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects a short-circuit line that is not selected as a determination target among the k short-circuit lines STL1, STL2,. Next, the process proceeds to step ST210.
　　　《ＳＴ２１６》
　一方、ステップＳＴ２１４において変数ｊが最大値ｊｍａｘに到達していると判定された場合（ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの中に判定対象として選択されていない短絡線が残っていない場合）、チャージシェア制御部２０３は、動作を終了するか否かを判定する。動作を継続する場合には、ステップＳＴ２０１へ進む。 << ST216 >>
On the other hand, when it is determined in step ST214 that the variable j has reached the maximum value jmax (no short-circuit lines not selected as determination targets remain in k short-circuit lines STL1, STL2,..., STLk). ), The charge share control unit 203 determines whether or not to end the operation. When the operation is continued, the process proceeds to step ST201.
　以上のように、短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋの各々について短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さいか否かを判定することによって、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動量の総和を削減できる。これにより、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの間における電荷再分配の効率を高めることができる。 As described above, by determining whether or not the sum of the absolute values of the short-circuit vectors is smaller than the sum of the absolute values of the pixel vectors for each of the short-circuit lines STL1, STL2,. The total amount of voltage variation of SLn can be reduced. Thereby, the efficiency of charge redistribution among the source lines SL1, SL2,..., SLn can be increased.
　なお、チャージシェア制御部２０３は、ステップＳＴ２１１を省略しても良い。この場合でも、従来のチャージシェア技術を適用する場合（ソース線ＳＬ１，ＳＬ２，…，ＳＬｎを全て同時に短絡させる場合）よりも、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動量の総和（すなわち、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎにおける消費電力）を削減できる可能性を高めることができる。 Note that the charge share control unit 203 may omit step ST211. Even in this case, the sum of the voltage fluctuation amounts of the source lines SL1, SL2,..., SLn (that is, when all the source lines SL1, SL2,. , Power consumption in the source lines SL1, SL2,..., SLn) can be increased.
　（チャージシェア制御部の変形例）
　なお、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋにそれぞれ対応するｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋの各々において、その短絡グループに割り当てられたソース線に対応する前画素値の平均値からその短絡グループに割り当てられたソース線に対応する現画素値へそれぞれ向かう短絡ベクトルの絶対値和が、その短絡グループに割り当てられたソース線に対応する前画素値からその短絡グループに割り当てられたソース線に対応する現画素値へそれぞれ向かう画素ベクトルの絶対値和よりも小さくなるように、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋに割り当てるグループ割当処理を実行しても良い。この場合、接続切替部１０４は、チャージシェア制御部２０３による制御（グループ割当処理の結果）に応答して、短絡グループＳＧＲｊに割り当てられたソース線を短絡グループＳＧＲｊに対応する短絡線ＳＴＬｊに電気的に接続しても良い。 (Modification of charge share control unit)
Note that the charge share control unit 203 uses the source lines assigned to the short-circuit groups in each of the k short-circuit groups SGR1, SGR2,. The sum of the absolute values of the short-circuit vectors respectively going from the average value of the previous pixel values corresponding to the current pixel value corresponding to the source line assigned to the short-circuit group to the previous pixel corresponding to the source line assigned to the short-circuit group N source lines SL1, SL2,..., SLn are short-circuited so as to be smaller than the sum of absolute values of pixel vectors respectively directed from the value to the current pixel value corresponding to the source line assigned to the short-circuit group. Group assignment processing assigned to the groups SGR1, SGR2,..., SGRk may be executed. In this case, in response to control by the charge share control unit 203 (result of group assignment processing), the connection switching unit 104 electrically connects the source line assigned to the short-circuit group SGRj to the short-circuit line STLj corresponding to the short-circuit group SGRj. You may connect to.
　このように構成することにより、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動量の総和を削減できる。これにより、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎの間における電荷再分配の効率を高めることができる。また、駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させない場合であってもソース線ＳＬ１，ＳＬ２，…，ＳＬｎの間で電荷再分配を効率良く実行できる。 With this configuration, the total voltage fluctuation amount of the source lines SL1, SL2,..., SLn can be reduced. Thereby, the efficiency of charge redistribution among the source lines SL1, SL2,..., SLn can be increased. Further, even if the polarity of the drive voltages VD1, VD2,..., VDn is not reversed, charge redistribution can be efficiently performed among the source lines SL1, SL2,.
　（チャージシェア動作の変形例１）
　また、チャージシェア制御部２０３は、ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋのうち少なくとも１つにおいて、その短絡グループに割り当てられたソース線の本数が最大となるように、グループ割当処理を実行しても良い。 (Variation 1 of charge sharing operation)
Further, the charge share control unit 203 performs group assignment processing so that the number of source lines assigned to the short-circuit group is maximized in at least one of the k short-circuit groups SGR1, SGR2,. May be executed.
　次に、図１４，図１５，図１６を参照して、チャージシェア動作の変形例１について説明する。なお、平均計算グループ，候補グループ，および選択対象グループの初期状態は、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎのいずれも割り当てられていない状態であるものとする。 Next, with reference to FIG. 14, FIG. 15, and FIG. 16, a first modification of the charge sharing operation will be described. It is assumed that the initial state of the average calculation group, the candidate group, and the selection target group is a state in which none of the source lines SL1, SL2,.
　　　《ＳＴ３０１》
　まず、チャージシェア制御部２０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋに割り当てる。例えば、チャージシェア制御部２０３は、ｎ個の現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）の各々が属する画素値レベルの範囲に基づいて、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋに割り当てる。 << ST301 >>
First, the charge share control unit 203 assigns n source lines SL1, SL2,..., SLn to k preprocessing groups PGR1, PGR2,. For example, the charge share control unit 203 uses the n source lines SL1 based on the range of pixel value levels to which each of the n current pixel values D1 (h) , D2 (h) ,..., Dn (h) belongs. , SL2,..., SLn are assigned to k preprocessing groups PGR1, PGR2,.
　　　《ＳＴ３０２》
　次に、チャージシェア制御部２０３は、変数ｊを“１”に設定する。すなわち、チャージシェア制御部２０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのうち第１番目の短絡線ＳＴＬ１を判定対象として選択する。 << ST302 >>
Next, the charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit line STL1 from among the k short-circuit lines STL1, STL2,.
　　　《ＳＴ３０３》
　次に、チャージシェア制御部２０３は、前処理グループＰＧＲｊに割り当てられたソース線を平均計算グループに割り当てる。なお、前処理グループＰＧＲｊとは、ｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋのうち判定対象として選択された第ｊ番目の前処理グループのことである。 << ST303 >>
Next, the charge share control unit 203 assigns the source line assigned to the preprocessing group PGRj to the average calculation group. The preprocessing group PGRj is a jth preprocessing group selected as a determination target among the k preprocessing groups PGR1, PGR2,..., PGRk.
　　　《ＳＴ３０４》
　次に、チャージシェア制御部２０３は、平均計算グループに割り当てられたソース線に対応する前画素値の平均値を算出する。 << ST304 >>
Next, the charge share control unit 203 calculates the average value of the previous pixel values corresponding to the source lines assigned to the average calculation group.
　　　《ＳＴ３０５》
　次に、チャージシェア制御部２０３は、変数ｉを“１”に設定する。すなわち、チャージシェア制御部２０３は、前処理グループＰＧＲｊに割り当てられたソース線のうち第１番目のソース線を判定対象として選択する。 << ST305 >>
Next, the charge share control unit 203 sets the variable i to “1”. That is, the charge share control unit 203 selects the first source line among the source lines assigned to the preprocessing group PGRj as a determination target.
　　　《ＳＴ３０６》
　次に、チャージシェア制御部２０３は、ステップＳＴ３０４において算出された平均値と前処理グループＰＧＲｊに割り当てられたソース線ＳＬｉに対応する前画素値および現画素値とに基づいて、短絡ベクトルＶＳｉおよび画素ベクトルＶＰｉを算出する。なお、前処理グループＰＧＲｊに割り当てられたソース線ＳＬｉとは、前処理グループＰＧＲｊに割り当てられたソース線のうち判定対象として選択された第ｉ番目のソース線のことであり、短絡ベクトルＶＳｉとは、ステップＳＴ３０４において算出された平均値からソース線ＳＬｉに対応する現画素値Ｄｉ（ｈ）へ向かうベクトルのことであり、画素ベクトルＶＰｉとは、ソース線ＳＬｉに対応する前画素値Ｄｉ（ｈ－１）から現画素値Ｄｉ（ｈ－１）へ向かうベクトルのことである。次に、チャージシェア制御部２０３は、短絡ベクトルＶＳｉが画素ベクトルＶＰｉよりも短いか否かを判定する。短絡ベクトルＶＳｉが画素ベクトルＶＰｉよりも短い場合には、ステップＳＴ３０７へ進み、そうでない場合には、ステップＳＴ３０８へ進む。 << ST306 >>
Next, based on the average value calculated in step ST304 and the previous pixel value and the current pixel value corresponding to the source line SLi assigned to the preprocessing group PGRj, the charge share control unit 203 uses the short circuit vector VSi and the pixel. A vector VPi is calculated. The source line SLi assigned to the preprocessing group PGRj is the i-th source line selected as a determination target among the source lines assigned to the preprocessing group PGRj, and the short circuit vector VSi is , A vector from the average value calculated in step ST304 toward the current pixel value Di (h) corresponding to the source line SLi, and the pixel vector VPi is the previous pixel value Di (h− ) corresponding to the source line SLi. This is a vector from 1) to the current pixel value Di (h-1) . Next, the charge share control unit 203 determines whether or not the short circuit vector VSi is shorter than the pixel vector VPi. If the short circuit vector VSi is shorter than the pixel vector VPi, the process proceeds to step ST307, and if not, the process proceeds to step ST308.
　　　《ＳＴ３０７》
　次に、チャージシェア制御部２０３は、前処理グループＰＧＲｊに割り当てられたソース線ＳＬｉを選択対象グループに割り当てる。 << ST307 >>
Next, the charge share control unit 203 assigns the source line SLi assigned to the preprocessing group PGRj to the selection target group.
　　　《ＳＴ３０８》
　次に、チャージシェア制御部２０３は、変数ｉが最大値ｉｍａｘ（ここでは、ｉｍａｘは、前処理グループＰＧＲｊに含まれるソース線の本数）に到達しているか否かを判定する。すなわち、チャージシェア制御部２０３は、前処理グループＰＧＲｊに含まれるソース線の中に判定対象として選択されていないソース線が残っているか否かを判定する。変数ｉが最大値ｉｍａｘに到達していない場合には、ステップＳＴ３０９へ進み、変数ｉが最大値ｉｍａｘに到達している場合には、ステップＳＴ３１０へ進む。 << ST308 >>
Next, the charge share control unit 203 determines whether or not the variable i has reached the maximum value imax (here, imax is the number of source lines included in the preprocessing group PGRj). That is, the charge share control unit 203 determines whether there are any source lines that are not selected as a determination target among the source lines included in the preprocessing group PGRj. When the variable i has not reached the maximum value imax, the process proceeds to step ST309, and when the variable i has reached the maximum value imax, the process proceeds to step ST310.
　　　《ＳＴ３０９》
　次に、チャージシェア制御部２０３は、変数ｉに“１”を加算する。すなわち、チャージシェア制御部２０３は、前処理グループＰＧＲｊに含まれるソース線のうち判定対象として選択されていないソース線を次の判定対象として選択する。次に、ステップＳＴ３０６へ進む。 << ST309 >>
Next, the charge share control unit 203 adds “1” to the variable i. That is, the charge share control unit 203 selects a source line that is not selected as a determination target from among the source lines included in the preprocessing group PGRj as the next determination target. Next, the process proceeds to step ST306.
　　　《ＳＴ３１０》
　一方、ステップＳＴ３０８において変数ｉが最大値ｉｍａｘに到達していると判定された場合、チャージシェア制御部２０３は、選択対象グループに割り当てられたソース線の本数が候補グループに割り当てられたソース線の本数よりも多いか否かを判定する。選択対象グループに割り当てられたソース線の本数が候補グループに割り当てられたソース線の本数よりも多くない場合には、ステップＳＴ３１１へ進み、選択対象グループに割り当てられたソース線の本数が候補グループに割り当てられたソース線の本数よりも多い場合には、ステップＳＴ３１２へ進む。 << ST310 >>
On the other hand, when it is determined in step ST308 that the variable i has reached the maximum value imax, the charge share control unit 203 determines that the number of source lines allocated to the selection target group is the number of source lines allocated to the candidate group. It is determined whether the number is greater than the number. If the number of source lines allocated to the selection target group is not greater than the number of source lines allocated to the candidate group, the process proceeds to step ST311 and the number of source lines allocated to the selection target group is determined as the candidate group. If the number is greater than the number of allocated source lines, the process proceeds to step ST312.
　　　《ＳＴ３１１》
　次に、チャージシェア制御部２０３は、候補グループに割り当てられたソース線に対応する前画素値および現画素値に基づいて、短絡ベクトルの絶対値和および画素ベクトルの絶対値和を算出する。そして、チャージシェア制御部２０３は、短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さいか否かを判定する。例えば、候補グループにソース線ＳＬ１，ＳＬ２が割り当てられている場合、チャージシェア制御部２０３は、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１）の平均値から現画素値Ｄ１（ｈ），Ｄ２（ｈ）へそれぞれ向かう短絡ベクトルＶＳ１，ＶＳ２と、前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１）から現画素値Ｄ１（ｈ），Ｄ２（ｈ）へそれぞれ向かう画素ベクトルＶＰ１，ＶＰ２とを算出し、短絡ベクトルＶＰ１，ＶＰ２の絶対値和が画素ベクトルＶＰ１，ＶＰ２の絶対値和よりも小さいか否かを判定する。短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さい場合には、ステップＳＴ３１３へ進み、そうでない場合には、ステップＳＴ３１２へ進む。 << ST311 >>
Next, the charge share control unit 203 calculates the absolute value sum of the short-circuit vector and the absolute value sum of the pixel vector based on the previous pixel value and the current pixel value corresponding to the source line assigned to the candidate group. Then, the charge share control unit 203 determines whether or not the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors. For example, when the source lines SL1 and SL2 are assigned to the candidate group, the charge share control unit 203 calculates the current pixel value D1 (h ) from the average value of the previous pixel values D1 (h-1) and D2 (h-1). ) , D2 (h) , short-circuit vectors VS1, VS2, respectively, and previous pixel values D1 (h-1) , D2 (h-1) to current pixel values D1 (h) , D2 (h) , respectively. VP1 and VP2 are calculated, and it is determined whether or not the absolute value sum of the short-circuit vectors VP1 and VP2 is smaller than the absolute value sum of the pixel vectors VP1 and VP2. If the absolute value sum of the short-circuit vectors is smaller than the absolute value sum of the pixel vectors, the process proceeds to step ST313. Otherwise, the process proceeds to step ST312.
　　　《ＳＴ３１２》
　次に、チャージシェア制御部２０３は、平均計算グループおよび候補グループの各々に割り当てられたソース線を、選択対象グループに割り当てられたソース線に変更する。例えば、選択対象グループにソース線ＳＬ１，ＳＬ２，ＳＬ３が割り当てられている場合、チャージシェア制御部２０３は、平均計算グループおよび候補グループの各々に割り当てられたソース線を削除するとともに平均計算グループおよび候補グループの各々にソース線ＳＬ１，ＳＬ２，ＳＬ３を新たに割り当てる。次に、ステップＳＴ３０４へ進む。 << ST312 >>
Next, the charge share control unit 203 changes the source line assigned to each of the average calculation group and the candidate group to the source line assigned to the selection target group. For example, when the source lines SL1, SL2, and SL3 are assigned to the selection target group, the charge share control unit 203 deletes the source lines assigned to the average calculation group and the candidate group, and calculates the average calculation group and the candidate. Source lines SL1, SL2, and SL3 are newly assigned to each of the groups. Next, the process proceeds to step ST304.
　　　《ＳＴ３１３》
　一方、ステップＳＴ３１１において候補グループに対応する短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さいと判定された場合、チャージシェア制御部２０３は、候補グループに割り当てられたソース線を短絡グループＳＧＲｊに割り当てる。なお、短絡グループＳＧＲｊとは、ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋのうち前処理グループＰＧＲｊに対応する第ｊ番目の短絡グループのことである。 << ST313 >>
On the other hand, when it is determined in step ST311 that the absolute value sum of the short-circuit vectors corresponding to the candidate group is smaller than the absolute value sum of the pixel vectors, the charge share control unit 203 uses the source line assigned to the candidate group as the short-circuit group. Assign to SGRj. The short-circuit group SGRj is the j-th short-circuit group corresponding to the pretreatment group PGRj among the k short-circuit groups SGR1, SGR2,.
　　　《ＳＴ３１４》
　次に、チャージシェア制御部２０３は、変数ｊが最大値ｊｍａｘ（ここでは、ｊｍａｘ＝ｋ）に到達しているか否かを判定する。すなわち、チャージシェア制御部２０３は、ｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋの中に判定対象として選択されていない前処理グループが残っているか否かを判定する。変数ｊが最大値ｊｍａｘに到達していない場合には、ステップＳＴ３１５へ進み、変数ｊが最大値ｊｍａｘに到達している場合には、ステップＳＴ３１６へ進む。なお、ステップＳＴ３１１において候補グループに割り当てられたソース線の本数が“０”または“１”である場合、チャージシェア制御部２０３は、ステップＳＴ３１１の処理（短絡ベクトルの絶対値和が画素ベクトルの絶対値和よりも小さいか否かを判定する処理）およびステップＳＴ３１３の処理を実行せずに、短絡グループＳＧＲｊにソース線を割り当てない処理を実行した後に、ステップＳＴ３１４の処理を実行しても良い。 << ST314 >>
Next, the charge share control unit 203 determines whether or not the variable j has reached the maximum value jmax (here, jmax = k). That is, the charge share control unit 203 determines whether or not a preprocessing group that is not selected as a determination target remains in the k preprocessing groups PGR1, PGR2,. If the variable j has not reached the maximum value jmax, the process proceeds to step ST315. If the variable j has reached the maximum value jmax, the process proceeds to step ST316. When the number of source lines assigned to the candidate group in step ST311 is “0” or “1”, the charge share control unit 203 performs the processing in step ST311 (the absolute value sum of the short-circuit vectors is the absolute value of the pixel vector). The process of step ST314 may be executed after executing the process of allocating the source line to the short-circuit group SGRj without executing the process of determining whether or not the sum is smaller than the value sum) and the process of step ST313.
　　　《ＳＴ３１５》
　次に、チャージシェア制御部２０３は、変数ｊに“１”を加算する。すなわち、チャージシェア制御部２０３は、ｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋのうち判定対象として選択されていない前処理グループを次の判定対象として選択する。また、チャージシェア制御部２０３は、平均計算グループ，候補グループ，および選択対象グループを初期状態（ソース線ＳＬ１，ＳＬ２，…，ＳＬｎのいずれも割り当てられていない状態）に設定する。次に、ステップＳＴ３０３へ進む。 << ST315 >>
Next, the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects, as the next determination target, a preprocessing group that is not selected as a determination target from among the k preprocessing groups PGR1, PGR2,. Further, the charge share control unit 203 sets the average calculation group, the candidate group, and the selection target group to an initial state (a state where none of the source lines SL1, SL2,..., SLn is assigned). Next, the process proceeds to step ST303.
　　　《ＳＴ３１６》
　一方、ステップＳＴ３１６において変数ｊが最大値ｊｍａｘに到達していると判定された場合、チャージシェア制御部２０３は、変数ｊを“１”に設定する。すなわち、チャージシェア制御部２０３は、ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋのうち第１番目の短絡グループＳＧＲ１を判定対象として選択する。 << ST316 >>
On the other hand, when it is determined in step ST316 that the variable j has reached the maximum value jmax, the charge share control unit 203 sets the variable j to “1”. That is, the charge share control unit 203 selects the first short-circuit group SGR1 from among the k short-circuit groups SGR1, SGR2,.
　　　《ＳＴ３１７》
　次に、チャージシェア制御部２０３は、短絡グループＳＧＲｊにソース線が割り当てられているか否かを判定する。短絡グループＳＧＲｊにソース線が割り当てられてる場合には、ステップＳＴ３１８へ進み、そうでない場合には、ステップＳＴ３１９へ進む。 << ST317 >>
Next, the charge share control unit 203 determines whether or not a source line is assigned to the short-circuit group SGRj. If a source line is assigned to the short-circuit group SGRj, the process proceeds to step ST318, and if not, the process proceeds to step ST319.
　　　《ＳＴ３１８》
　次に、第ｈ番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、チャージシェア制御部２０３による制御（グループ割当処理の結果）に応答して、短絡グループＳＧＲｊに割り当てられたソース線を短絡線ＳＴＬｊに電気的に接続する。次に、ステップＳＴ３２０へ進む。 << ST318 >>
Next, in the charge share period in the h-th horizontal period, the connection switching unit 104 responds to the control by the charge share control unit 203 (result of the group assignment process), and the source line assigned to the short-circuit group SGRj. Is electrically connected to the short-circuit line STLj. Next, the process proceeds to step ST320.
　　　《ＳＴ３１９》
　一方、ステップＳＴ３１７において短絡グループＳＧＲｊにソース線が割り当てられていないと判定された場合、接続切替部１０４は、短絡グループＳＧＲｊに対応する短絡線ＳＴＬｊにソース線ＳＬ１，ＳＬ２，…，ＳＬｎを電気的に接続しない。次に、ステップＳＴ３２０へ進む。 << ST319 >>
On the other hand, when it is determined in step ST317 that the source line is not assigned to the short-circuit group SGRj, the connection switching unit 104 electrically connects the source lines SL1, SL2,. Do not connect to. Next, the process proceeds to step ST320.
　　　《ＳＴ３２０》
　次に、チャージシェア制御部２０３は、変数ｊが最大値ｊｍａｘ（ここでは、ｊｍａｘ＝ｋ）に到達しているか否かを判定する。すなわち、チャージシェア制御部２０３は、ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋの中に判定対象として選択されていない短絡グループが残っているか否かを判定する。変数ｊが最大値ｊｍａｘに到達していない場合には、ステップＳＴ３２１へ進み、変数ｊが最大値ｊｍａｘに到達している場合には、ステップＳＴ３２２へ進む。 << ST320 >>
Next, the charge share control unit 203 determines whether or not the variable j has reached the maximum value jmax (here, jmax = k). That is, the charge share control unit 203 determines whether or not a short-circuit group not selected as a determination target remains in the k short-circuit groups SGR1, SGR2,. If the variable j has not reached the maximum value jmax, the process proceeds to step ST321. If the variable j has reached the maximum value jmax, the process proceeds to step ST322.
　　　《ＳＴ３２１》
　次に、チャージシェア制御部２０３は、変数ｊに“１”を加算する。すなわち、チャージシェア制御部２０３は、ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋのうち判定対象として選択されていない短絡グループを次の判定対象として選択する。次に、ステップＳＴ３１７へ進む。 << ST321 >>
Next, the charge share control unit 203 adds “1” to the variable j. That is, the charge share control unit 203 selects a short-circuit group that is not selected as a determination target from among the k short-circuit groups SGR1, SGR2,. Next, the process proceeds to step ST317.
　　　《ＳＴ３２２》
　一方、ステップＳＴ３２０において変数ｊが最大値ｊｍａｘに到達していると判定された場合（ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋの中に判定対象として選択されていない短絡グループが残っていない場合）、チャージシェア制御部２０３は、動作を終了するか否かを判定する。動作を継続する場合には、ステップＳＴ３０１へ進む。 << ST322 >>
On the other hand, when it is determined in step ST320 that the variable j has reached the maximum value jmax (no short-circuit groups not selected as determination targets remain in the k short-circuit groups SGR1, SGR2,..., SGRk). ), The charge share control unit 203 determines whether or not to end the operation. When the operation is continued, the process proceeds to step ST301.
　　〔グループ割当処理〕
　次に、図１７を参照して、グループ割当処理（ＳＴ３０１～ＳＴ３１５）について具体例を挙げて説明する。ここでは、Ｐ＝１，ｎ＝２０，ｋ＝２であるものとする。なお、図中、黒丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する前画素値Ｄ１（ｈ－１），Ｄ２（ｈー１），…，Ｄ２０（ｈ－１）を示し、白丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）を示している。 [Group assignment processing]
Next, with reference to FIG. 17, the group assignment processing (ST301 to ST315) will be described with a specific example. Here, it is assumed that P = 1, n = 20, and k = 2. In the figure, black circles indicate the previous pixel values D1 (h−1) , D2 (h−1) ,..., D20 (h−1) corresponding to the source lines SL1, SL2,. White circles indicate the current pixel values D1 (h) , D2 (h) ,..., D20 (h) corresponding to the source lines SL1, SL2,.
　第ｈ番目の水平期間のうち駆動期間において、図１７のような現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）が駆動電圧供給回路２に供給される。また、画素値格納部２０２は、図１７のような前画素値Ｄ１（ｈ－１），Ｄ２（ｈー１），…，Ｄ２０（ｈ－１）を格納している。 In the driving period in the h-th horizontal period, current pixel values D1 (h) , D2 (h) ,..., D20 (h) as shown in FIG. Further, the pixel value storage unit 202 stores the previous pixel values D1 (h−1) , D2 (h−1) ,..., D20 (h−1) as shown in FIG.
　まず、ステップＳＴ３０１が実行され、奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１９（正極性の駆動電圧が供給されるソース線）が、前処理グループＰＧＲ１に割り当てられ、偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０（負極性の駆動電圧が供給されるソース線）が、前処理グループＰＧＲ２に割り当てられる。 First, step ST301 is executed, and odd-numbered source lines SL1, SL3,..., SL19 (source lines to which a positive drive voltage is supplied) are assigned to the preprocessing group PGR1, and even-numbered source lines SL2, SL4,..., SL20 (source lines to which a negative drive voltage is supplied) are assigned to the preprocessing group PGR2.
　次に、ステップＳＴ３０２～ＳＴ３０４が実行され、前処理グループＰＧＲ１に割り当てられたソース線ＳＬ１，ＳＬ３，…，ＳＬ１９が平均計算グループに割り当てられ、ソース線ＳＬ１，ＳＬ３，…，ＳＬ１９に対応する前画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），…，Ｄ１９（ｈ－１）の平均値ＡＶＥＰ１が算出される。次に、ステップＳＴ３０５～ＳＴ３０９が実行され、ソース線ＳＬ１１，ＳＬ１７，ＳＬ１９を除く奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１５が選択対象グループに割り当てられる。 Next, steps ST302 to ST304 are executed, and the source lines SL1, SL3,..., SL19 assigned to the preprocessing group PGR1 are assigned to the average calculation group, and the previous pixels corresponding to the source lines SL1, SL3,. An average value AVEP1 of the values D1 (h-1) , D3 (h-1) , ..., D19 (h-1) is calculated. Next, steps ST305 to ST309 are executed, and odd-numbered source lines SL1, SL3,..., SL15 excluding the source lines SL11, SL17, and SL19 are assigned to the selection target group.
　次に、ステップＳＴ３１０が実行される。ここでは、選択対象グループに割り当てられたソース線の本数“７”は、候補グループに割り当てられたソース線の本数“０”よりも多いので、ステップＳＴ３１２が実行される。これにより、平均計算グループおよび候補グループの各々に、ソース線ＳＬ１１，ＳＬ１７，ＳＬ１９を除く奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１５（選択対象グループに割り当てられたソース線）が割り当てられる。 Next, step ST310 is executed. Here, since the number “7” of source lines allocated to the selection target group is larger than the number “0” of source lines allocated to the candidate group, step ST312 is executed. Thereby, odd-numbered source lines SL1, SL3,..., SL15 (source lines assigned to the selection target group) excluding the source lines SL11, SL17, SL19 are assigned to the average calculation group and the candidate group.
　次に、ステップＳＴ３０４が実行され、平均計算グループに割り当てられソース線に対応する前画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），Ｄ５（ｈ－１），Ｄ７（ｈ－１），Ｄ９（ｈ－１），Ｄ１３（ｈ－１），Ｄ１５（ｈ－１）の平均値ＡＶＥＰ２が算出される。次に、ステップＳＴ３０５～ＳＴ３０９が実行され、ソース線ＳＬ１１，ＳＬ１７を除く奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１９が選択対象グループに割り当てられる。 Next, step ST304 is executed, and previous pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , D7 (h-1) assigned to the average calculation group and corresponding to the source line are executed. , D9 (h-1) , D13 (h-1) , D15 (h-1) average value AVEP2 is calculated. Next, steps ST305 to ST309 are executed, and the odd-numbered source lines SL1, SL3,..., SL19 excluding the source lines SL11 and SL17 are assigned to the selection target group.
　次に、ステップＳＴ３１０が実行される。ここでは、選択対象グループに割り当てられたソース線の本数“８”は、候補グループに割り当てられたソース線の本数“７”よりも多いので、ステップＳＴ３１２が実行される。これにより、平均計算グループおよび候補グループの各々に、ソース線ＳＬ１，ＳＬ３，ＳＬ５，ＳＬ７，ＳＬ９，ＳＬ１３，ＳＬ１５，ＳＬ１９（選択対象グループに割り当てられたソース線）が割り当てられる。 Next, step ST310 is executed. Here, since the number “8” of source lines allocated to the selection target group is larger than the number “7” of source lines allocated to the candidate group, step ST312 is executed. Accordingly, source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, and SL19 (source lines assigned to the selection target group) are assigned to each of the average calculation group and the candidate group.
　次に、ステップＳＴ３０４が実行され、平均計算グループに割り当てられソース線に対応する前画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），Ｄ５（ｈ－１），Ｄ７（ｈ－１），Ｄ９（ｈ－１），Ｄ１３（ｈ－１），Ｄ１５（ｈ－１），Ｄ１９（ｈ－１）の平均値ＡＶＥＰ３が算出される。次に、ステップＳＴ３０５～ＳＴ３０９が実行され、ソース線ＳＬ１１，ＳＬ１７を除く奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１９が選択対象グループに割り当てられる。 Next, step ST304 is executed, and previous pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , D7 (h-1) assigned to the average calculation group and corresponding to the source line are executed. , D9 (h-1) , D13 (h-1) , D15 (h-1) , D19 (h-1) are averaged AVEP3. Next, steps ST305 to ST309 are executed, and the odd-numbered source lines SL1, SL3,..., SL19 excluding the source lines SL11 and SL17 are assigned to the selection target group.
　次に、ステップＳＴ３１０が実行される。ここでは、選択対象グループに割り当てられたソース線の本数“８”は、候補グループに割り当てられたソース線の本数“８”よりも多くないので、ステップＳＴ３１１が実行される。次に、ソース線ＳＬ１１，ＳＬ１７を除く奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１９（候補グループに割り当てられたソース線）にそれぞれ対応する短絡ベクトルの絶対値和は、画素ベクトルの絶対値和よりも小さいので、ステップＳＴ３１３が実行される。これにより、ソース線ＳＬ１１，ＳＬ１７を除く奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１９（候補グループに割り当てられたソース線）が短絡グループＳＧＲ１に割り当てられる。 Next, step ST310 is executed. Here, since the number “8” of source lines allocated to the selection target group is not greater than the number “8” of source lines allocated to the candidate group, step ST311 is executed. Next, the absolute value sum of the short-circuit vectors respectively corresponding to the odd-numbered source lines SL1, SL3,..., SL19 (source lines assigned to the candidate group) excluding the source lines SL11 and SL17 is the absolute value sum of the pixel vectors. Step ST313 is executed. Thereby, the odd-numbered source lines SL1, SL3,..., SL19 (source lines assigned to the candidate group) excluding the source lines SL11, SL17 are assigned to the short-circuit group SGR1.
　次に、ステップＳＴ３１４，ＳＴ３１５が実行され、前処理グループＰＧＲ２が判定対象として選択される。次に、前処理グループＰＧＲ２についても上述と同様の処理が実行される。すなわち、第１回目の判定処理（ＳＴ３０３～ＳＴ３１２）では、偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０が平均計算グループに割り当てられ、偶数番目の前画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），…，Ｄ２０（ｈ－１）の平均値ＡＶＥＮ１に基づいて、ソース線ＳＬ１２，ＳＬ１８，ＳＬ２０を除く偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ１６が選択対象グループに割り当てられる。次に、第２回目の判定処理（ＳＴ３０４～ＳＴ３１２）では、ソース線ＳＬ１２，ＳＬ１８，ＳＬ２０を除く偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ１６が平均計算グループに割り当てられ、前画素値Ｄ１２（ｈ－１），Ｄ１８（ｈ－１），Ｄ２０（ｈ－１）を除く偶数番目の前画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），…，Ｄ１６（ｈ－１）の平均値ＡＶＥＮ２に基づいて、ソース線ＳＬ１２，ＳＬ１８を除く偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０が選択対象グループに割り当てられる。次に、第３回目の判定処理（ＳＴ３０４～ＳＴ３１１，ＳＴ３１３）では、ソース線ＳＬ１２，ＳＬ１８を除く偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０が平均計算グループに割り当てられ、前画素値Ｄ１２（ｈ－１），Ｄ１８（ｈ－１）を除く偶数番目の前画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），…，Ｄ２０（ｈ－１）の平均値ＡＶＥＮ３に基づいて、ソース線ＳＬ１２，ＳＬ１８を除く偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０が選択対象グループに割り当てられ、ステップＳＴ３１３において、ソース線ＳＬ１２，ＳＬ１８を除く偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０（候補グループに割り当てられたソース線）が短絡グループＳＧＲ２に割り当てられる。 Next, steps ST314 and ST315 are executed, and the preprocessing group PGR2 is selected as a determination target. Next, the same processing as described above is executed for the preprocessing group PGR2. That is, in the first determination process (ST303 to ST312), the even-numbered source lines SL2, SL4,..., SL20 are assigned to the average calculation group, and the even-numbered previous pixel values D2 (h−1) , D4 ( h-1) , ..., D20 Based on the average value AVEN1 of (h-1) , even-numbered source lines SL2, SL4, ..., SL16 excluding the source lines SL12, SL18, SL20 are assigned to the selection target group. Next, in the second determination process (ST304 to ST312), even-numbered source lines SL2, SL4,..., SL16 excluding the source lines SL12, SL18, SL20 are assigned to the average calculation group, and the previous pixel value D12 ( average of even-numbered previous pixel values D2 (h-1) , D4 (h-1) , ..., D16 (h-1) excluding h-1) , D18 (h-1) , D20 (h-1) Based on the value AVEN2, even-numbered source lines SL2, SL4,. Next, in the third determination process (ST304 to ST311, ST313), even-numbered source lines SL2, SL4,..., SL20 excluding the source lines SL12, SL18 are assigned to the average calculation group, and the previous pixel value D12 ( h-1) , D18 (h-1) excluding even-numbered previous pixel values D2 (h-1) , D4 (h-1) , ..., D20 (h-1) based on the average value AVEN3 The even-numbered source lines SL2, SL4,..., SL20 excluding the lines SL12, SL18 are assigned to the selection target group, and in step ST313, the even-numbered source lines SL2, SL4,. The source line assigned to the candidate group) is assigned to the short-circuit group SGR2.
　　〔ソース線の電圧変動〕
　次に、図１８を参照して、短絡処理（ＳＴ３１６～ＳＴ３２１）によるソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動について説明する。ここでは、Ｐ＝１，ｎ＝２０，ｋ＝２であるものする。また、図１８では、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０の電圧変動は、画素値を用いて表現されている。なお、図中、黒丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する前画素値Ｄ１（ｈ－１），Ｄ２（ｈー１），…，Ｄ２０（ｈ－１）を示し、白丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）を示している。 [Voltage fluctuation of source line]
Next, voltage fluctuations of source lines SL1, SL2,..., SLn due to short circuit processing (ST316 to ST321) will be described with reference to FIG. Here, it is assumed that P = 1, n = 20, and k = 2. In FIG. 18, voltage fluctuations of the source lines SL1, SL2,..., SL20 are expressed using pixel values. In the figure, black circles indicate the previous pixel values D1 (h−1) , D2 (h−1) ,..., D20 (h−1) corresponding to the source lines SL1, SL2,. White circles indicate the current pixel values D1 (h) , D2 (h) ,..., D20 (h) corresponding to the source lines SL1, SL2,.
　第ｈ番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、チャージシェア制御部２０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０を駆動電圧生成部１０１（駆動部１１１，１１２，…，１１２０）から切り離した後に、グループ割当処理の結果に基づいて、短絡グループＳＧＲ１に割り当てられたソース線ＳＬ１，ＳＬ３，ＳＬ５，ＳＬ７，ＳＬ９，ＳＬ１３，ＳＬ１５，ＳＬ１９を短絡線ＳＴＬ１に電気的に接続し、短絡グループＳＧＲ２に割り当てられたソース線ＳＬ２，ＳＬ４，ＳＬ６，ＳＬ８，ＳＬ１０，ＳＴ１４，ＳＴ１６，ＳＬ２０を短絡線ＳＴＬ２に電気的に接続する。なお、接続切替部１０４は、ソース線ＳＬ１１，ＳＬ１２，ＳＬ１７，ＳＬ１８を短絡線ＳＴＬ１，ＳＴＬ２のいずれにも電気的に接続しない。これにより、ソース線ＳＬ１，ＳＬ３，ＳＬ５，ＳＬ７，ＳＬ９，ＳＬ１３，ＳＬ１５，ＳＬ１９の電圧は、それぞれ、前画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），Ｄ５（ｈ－１），Ｄ７（ｈ－１），Ｄ９（ｈ－１），Ｄ１３（ｈ－１），Ｄ１５（ｈ－１），Ｄ１９（ｈ－１）に応じた駆動電圧ＶＤ１（ｈ－１），ＶＤ３（ｈ－１），ＶＤ５（ｈ－１），ＶＤ７（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１３（ｈ－１），ＶＤ１５（ｈ－１），ＶＤ１９（ｈ－１）から平均値ＤＡＰ（前画素値Ｄ１（ｈ－１），Ｄ３（ｈ－１），Ｄ５（ｈ－１），Ｄ７（ｈ－１），Ｄ９（ｈ－１），Ｄ１３（ｈ－１），Ｄ１５（ｈ－１），Ｄ１９（ｈ－１）の平均値）に応じた平均電圧に変化する。ソース線ＳＬ２，ＳＬ４，ＳＬ６，ＳＬ８，ＳＬ１０，ＳＴ１４，ＳＴ１６，ＳＬ２０の電圧は、それぞれ、前画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），Ｄ６（ｈ－１），Ｄ８（ｈ－１），Ｄ１０（ｈ－１），Ｄ１４（ｈ－１），Ｄ１６（ｈ－１），Ｄ２０（ｈ－１）に応じた駆動電圧ＶＤ２（ｈ－１），ＶＤ４（ｈ－１），ＶＤ６（ｈ－１），ＶＤ８（ｈ－１），ＶＤ１０（ｈ－１），ＶＤ１４（ｈ－１），ＶＤ１６（ｈ－１），ＶＤ２０（ｈ－１）から平均値ＤＡＮ（前画素値Ｄ２（ｈ－１），Ｄ４（ｈ－１），Ｄ６（ｈ－１），Ｄ８（ｈ－１），Ｄ１０（ｈ－１），Ｄ１４（ｈ－１），Ｄ１６（ｈ－１），Ｄ２０（ｈ－１）の平均値）に応じた平均電圧に変化する。なお、ソース線ＳＬ１１，ＳＬ１２，ＳＬ１７，ＳＬ１８の電圧は、それぞれ、前画素値Ｄ１１（ｈ－１），Ｄ１２（ｈ－１），Ｄ１７（ｈ－１），Ｄ１８（ｈ－１）に応じた駆動電圧ＶＤ１１（ｈ－１），ＶＤ１２（ｈ－１），ＶＤ１７（ｈ－１），ＶＤ１８（ｈ－１）のまま維持される。 In the charge share period in the h-th horizontal period, the connection switching unit 104 sends the source lines SL1, SL2,..., SL20 to the drive voltage generation unit 101 (drive unit 111) in response to the control by the charge share control unit 203. , 112,..., 1120), and then the source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, SL19 assigned to the short-circuit group SGR1 are made short-circuit lines STL1 based on the result of the group assignment process. The source lines SL2, SL4, SL6, SL8, SL10, ST14, ST16, SL20 assigned to the short-circuit group SGR2 are electrically connected to the short-circuit line STL2. Connection switching unit 104 does not electrically connect source lines SL11, SL12, SL17, and SL18 to any of short-circuit lines STL1 and STL2. As a result, the voltages of the source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, and SL19 are changed to the previous pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , Drive voltages VD1 (h-1) , VD3 (h- ) corresponding to D7 (h-1) , D9 (h-1) , D13 (h-1) , D15 (h-1) , D19 (h-1) 1) , VD5 (h-1) , VD7 (h-1) , VD9 (h-1) , VD13 (h-1) , VD15 (h-1) , VD19 (h-1) from the average value DAP (previous Pixel values D1 (h-1) , D3 (h-1) , D5 (h-1) , D7 (h-1) , D9 (h-1) , D13 (h-1) , D15 (h-1) , D19 ( average value of (h-1)) . The voltages of the source lines SL2, SL4, SL6, SL8, SL10, ST14, ST16, SL20 are respectively the previous pixel values D2 (h-1) , D4 (h-1) , D6 (h-1) , D8 (h -1) , D10 (h-1) , D14 (h-1) , D16 (h-1) , D20 (h-1) according to drive voltages VD2 (h-1) , VD4 (h-1) , VD6 (h-1) , VD8 (h-1) , VD10 (h-1) , VD14 (h-1) , VD16 (h-1) , VD20 (h-1) from the average value DAN (previous pixel value D2 (H-1) , D4 (h-1) , D6 (h-1) , D8 (h-1) , D10 (h-1) , D14 (h-1) , D16 (h-1) , D20 ( The average voltage changes according to the average value of h-1) . The voltages of the source lines SL11, SL12, SL17, and SL18 correspond to the previous pixel values D11 (h-1) , D12 (h-1) , D17 (h-1) , and D18 (h-1) , respectively. The drive voltages VD11 (h-1) , VD12 (h-1) , VD17 (h-1) , and VD18 (h-1) are maintained.
　次に、第ｈ＋１番目の水平期間のうち駆動期間において、接続切替部１０４は、チャージシェア制御部２０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０を短絡線ＳＴＬ１，ＳＴＬ２から切り離した後に、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０を駆動電圧生成部１０１（駆動部１１１，１１２，…，１１２０）に接続する。また、駆動部１１１，１１２，…，１１２０は、水平同期信号の第ｈ＋１番目の立ち上がりエッジに同期して、現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）を駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），…，ＶＤ２０（ｈ）にそれぞれ変換する。これにより、ソース線ＳＬ１，ＳＬ３，ＳＬ５，ＳＬ７，ＳＬ９，ＳＬ１３，ＳＬ１５，ＳＬ１９の電圧は、それぞれ、平均値ＤＡＰに応じた平均電圧から現画素値Ｄ１（ｈ），Ｄ３（ｈ），Ｄ５（ｈ），Ｄ７（ｈ），Ｄ９（ｈ），Ｄ１３（ｈ），Ｄ１５（ｈ），Ｄ１９（ｈ）に応じた駆動電圧ＶＤ１（ｈ），ＶＤ３（ｈ），ＶＤ５（ｈ），ＶＤ７（ｈ），ＶＤ９（ｈ），ＶＤ１３（ｈ），ＶＤ１５（ｈ），ＶＤ１９（ｈ）に変化する。ソース線ＳＬ２，ＳＬ４，ＳＬ６，ＳＬ８，ＳＬ１０，ＳＴ１４，ＳＴ１６，ＳＬ２０の電圧は、平均値ＤＡＮに応じた平均電圧から現画素値Ｄ２（ｈ），Ｄ４（ｈ），Ｄ６（ｈ），Ｄ８（ｈ），Ｄ１０（ｈ），Ｄ１４（ｈ），Ｄ１６（ｈ），Ｄ２０（ｈ）に応じた駆動電圧ＶＤ２（ｈ），ＶＤ４（ｈ），ＶＤ６（ｈ），ＶＤ８（ｈ），ＶＤ１０（ｈ），ＶＤ１４（ｈ），ＶＤ１６（ｈ），ＶＤ２０（ｈ）に変化する。なお、ソース線ＳＬ１１，ＳＬ１２，ＳＬ１７，ＳＬ１８の電圧は、それぞれ、駆動電圧ＶＤ１１（ｈ－１），ＶＤ１２（ｈ－１），ＶＤ１７（ｈ－１），ＶＤ１８（ｈ－１））から現画素値Ｄ１１（ｈ），Ｄ１２（ｈ），Ｄ１７（ｈ），Ｄ１８（ｈ）に応じた駆動電圧ＶＤ１１（ｈ），ＶＤ１２（ｈ），ＶＤ１７（ｈ），ＶＤ１８（ｈ）に変化する。 Next, in the driving period in the (h + 1) th horizontal period, the connection switching unit 104 disconnects the source lines SL1, SL2,..., SL20 from the short-circuit lines STL1, STL2 in response to the control by the charge share control unit 203. Then, the source lines SL1, SL2,..., SL20 are connected to the drive voltage generation unit 101 (drive units 111, 112,..., 1120). Further, the driving units 111, 112,..., 1120 drive the current pixel values D1 (h) , D2 (h) ,..., D20 (h) as driving voltages in synchronization with the (h + 1) th rising edge of the horizontal synchronizing signal. VD1 (h) , VD2 (h) , ..., VD20 (h) are converted. As a result, the voltages of the source lines SL1, SL3, SL5, SL7, SL9, SL13, SL15, and SL19 are changed from the average voltage corresponding to the average value DAP to the current pixel values D1 (h) , D3 (h) , and D5 ( h) , D7 (h) , D9 (h) , D13 (h) , D15 (h) , D19 (h) corresponding to drive voltages VD1 (h) , VD3 (h) , VD5 (h) , VD7 (h ) ) , VD9 (h) , VD13 (h) , VD15 (h) , VD19 (h) . The voltages of the source lines SL2, SL4, SL6, SL8, SL10, ST14, ST16, SL20 are determined from the average voltage corresponding to the average value DAN to the current pixel values D2 (h) , D4 (h) , D6 (h) , D8 ( h) , D10 (h) , D14 (h) , D16 (h) , D20 (h) corresponding to drive voltages VD2 (h) , VD4 (h) , VD6 (h) , VD8 (h) , VD10 (h ) ) , VD14 (h) , VD16 (h) , VD20 (h) . Note that the voltages of the source lines SL11, SL12, SL17, and SL18 are changed from the driving voltages VD11 (h−1) , VD12 (h−1) , VD17 (h−1) , VD18 (h−1)) to the current pixel, respectively. The drive voltages VD11 (h) , VD12 (h) , VD17 (h) , and VD18 (h) change according to the values D11 (h) , D12 (h) , D17 (h) , and D18 (h) .
　（チャージシェア動作の変形例２）
　また、チャージシェア制御部２０３は、ｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋのうち少なくとも１つにおいて、その短絡グループに対応付けられたソース線に対応する前画素値からその短絡グループに対応する目標値へ向かう目標ベクトルの和が“０”に近づくように、グループ割当処理を実行しても良い。 (Variation 2 of charge sharing operation)
The charge share control unit 203 corresponds to the short-circuit group from the previous pixel value corresponding to the source line associated with the short-circuit group in at least one of the k short-circuit groups SGR1, SGR2,. The group assignment process may be executed so that the sum of the target vectors toward the target value to be approximated to “0”.
　次に、図１９，図２０を参照して、チャージシェア動作の変形例２について説明する。ここでは、チャージシェア制御部２０３は、図１４に示したステップＳＴ３０１に代えて、ステップＳＴ４０１～ＳＴ４１５を実行する。なお、加減計算グループの初期状態は、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎのいずれも割り当てられていない状態であるものとする。 Next, a second modification of the charge sharing operation will be described with reference to FIGS. Here, charge share control section 203 executes steps ST401 to ST415 instead of step ST301 shown in FIG. It is assumed that the initial state of the addition / subtraction calculation group is a state where none of the source lines SL1, SL2,.
　　　《ＳＴ４０１》
　まず、チャージシェア制御部２０３は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｙ個（ｙは、２以上の整数であり、ここでは、ｙ＝ｋ／２）の重み付けグループＷＧＲ１，ＷＧＲ２，…，ＷＧＲｙに割り当てる。例えば、チャージシェア制御部２０３は、ｎ個の現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄｎ（ｈ）の各々が属する画素値レベルの範囲に基づいて、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｙ個の重み付けグループＷＧＲ１，ＷＧＲ２，…，ＷＧＲｙに割り当てる。 << ST401 >>
First, the charge share control unit 203 uses y source lines SL1, SL2,..., SLn (y is an integer greater than or equal to 2, where y = k / 2) weighting groups WGR1, WGR2. , ..., assigned to WGRy. For example, the charge share control unit 203 uses the n source lines SL1 based on the range of pixel value levels to which each of the n current pixel values D1 (h) , D2 (h) ,..., Dn (h) belongs. , SL2,..., SLn are assigned to y weighting groups WGR1, WGR2,.
　　　《ＳＴ４０２》
　次に、チャージシェア制御部２０３は、変数ｚを“１”に設定する。すなわち、チャージシェア制御部２０３は、ｙ個の重み付けグループＷＧＲ１，ＷＧＲ２，…，ＷＧＲｙのうち第１番目の重み付けグループを判定対象として選択する。 << ST402 >>
Next, the charge share control unit 203 sets the variable z to “1”. That is, the charge share control unit 203 selects the first weighting group among the y weighting groups WGR1, WGR2,..., WGRy as a determination target.
　　　《ＳＴ４０３》
　次に、チャージシェア制御部２０３は、重み付けグループＷＧＲｚに割り当てられたソース線に重み値を付加する。なお、重み付けグループＷＧＲｚとは、ｙ個の重み付けグループＷＧＲ１，ＷＧＲ２，…，ＷＧＲｙのうち判定対象として選択された第ｚ番目の重み付けグループのことである。また、重み値は、重み付けグループＷＧＲｚに割り当てられたソース線に対応する前画素値の位置（画素値を示した数直線上における位置），現画素値の位置，および重み付けグループＷＧＲｚに対応する目標値などに基づいて決定しても良い。例えば、図２１，図２２のように、前画素値から目標値への移動量が多いほど、重み値の絶対値が大きくなり、重み値の符号は、前画素値が現画素値よりも小さい場合には“正”となり、前画素値が現画素値よりも大きい場合には“負”となる。なお、図２１，図２２では、目標値を跨がずに前画素値から現画素値へ移動する場合に対応する重み値は“０”であり、前画素値から目標値への移動量が互いに同一である２個の重み値のうち前画素値から現画素値への移動量が小さいほうには“（Ｌ）”が付加され、前画素値から現画素値への移動量が大きいほうには“（Ｈ）”が付加されている。 << ST403 >>
Next, the charge share control unit 203 adds a weight value to the source line assigned to the weighting group WGRz. Note that the weighting group WGRz is the z-th weighting group selected as the determination target among the y weighting groups WGR1, WGR2,..., WGRy. Further, the weight value is the position of the previous pixel value corresponding to the source line assigned to the weighting group WGRz (the position on the number line indicating the pixel value), the position of the current pixel value, and the target corresponding to the weighting group WGRz. You may determine based on a value etc. For example, as shown in FIGS. 21 and 22, as the amount of movement from the previous pixel value to the target value increases, the absolute value of the weight value increases, and the sign of the weight value indicates that the previous pixel value is smaller than the current pixel value. In this case, it is “positive”, and it is “negative” when the previous pixel value is larger than the current pixel value. In FIGS. 21 and 22, the weight value corresponding to the case of moving from the previous pixel value to the current pixel value without straddling the target value is “0”, and the amount of movement from the previous pixel value to the target value is Of the two weight values that are the same, “(L)” is added to the smaller moving amount from the previous pixel value to the current pixel value, and the moving amount from the previous pixel value to the current pixel value is larger. Is appended with “(H)”.
　　　《ＳＴ４０４》
　次に、チャージシェア制御部２０３は、重み付けグループＷＧＲｚに割り当てられたソース線のうち重み値＋２（Ｈ），＋２（Ｌ），－２（Ｈ），－２（Ｌ）が付加されたソース線を加減計算グループに割り当てる。 << ST404 >>
Next, the charge share control unit 203 adds source values to which weight values +2 (H), +2 (L), −2 (H), and −2 (L) are added among the source lines assigned to the weighting group WGRz. Is assigned to an addition / subtraction calculation group.
　　　《ＳＴ４０５》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”であるか否かを判定する。重み値の総和が“０”ではない場合には、ステップＳＴ４０６へ進み、重み値の総和が“０”である場合には、ステップＳＴ４１３へ進む。 << ST405 >>
Next, the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. When the sum of the weight values is not “0”, the process proceeds to step ST406, and when the sum of the weight values is “0”, the process proceeds to step ST413.
　　　《ＳＴ４０６》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”に近づくように、重み付けグループＷＧＲｚに割り当てられたソース線のうち重み値＋１（Ｌ）または－１（Ｌ）が付加されたソース線を加減計算グループに割り当てる。 << ST406 >>
Next, the charge share control unit 203 increases the weight value + 1 of the source lines assigned to the weighting group WGRz so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”. A source line to which (L) or -1 (L) is added is assigned to an addition / subtraction calculation group.
　　　《ＳＴ４０７》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”であるか否かを判定する。重み値の総和が“０”ではない場合には、ステップＳＴ４０８へ進み、重み値の総和が“０”である場合には、ステップＳＴ４１３へ進む。 << ST407 >>
Next, the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. If the sum of the weight values is not “0”, the process proceeds to step ST408, and if the sum of the weight values is “0”, the process proceeds to step ST413.
　　　《ＳＴ４０８》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”に近づくように、重み付けグループＷＧＲｚに割り当てられたソース線のうち重み値＋１（Ｈ）または－１（Ｈ）が付加されたソース線を加減計算グループに割り当てる。 << ST408 >>
Next, the charge share control unit 203 increases the weight value + 1 of the source lines assigned to the weighting group WGRz so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”. A source line to which (H) or -1 (H) is added is assigned to an addition / subtraction calculation group.
　　　《ＳＴ４０９》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”であるか否かを判定する。重み値の総和が“０”ではない場合には、ステップＳＴ４１０へ進み、重み値の総和が“０”である場合には、ステップＳＴ４１３へ進む。 << ST409 >>
Next, the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. If the sum of the weight values is not “0”, the process proceeds to step ST410, and if the sum of the weight values is “0”, the process proceeds to step ST413.
　　　《ＳＴ４１０》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”に近づくように、重み値＋２（Ｌ）または－２（Ｌ）が付加されたソース線を加減計算グループから削除する。 << ST410 >>
Next, the charge share control unit 203 adds the weight value +2 (L) or −2 (L) so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”. Delete the selected source line from the addition / subtraction calculation group.
　　　《ＳＴ４１１》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”であるか否かを判定する。重み値の総和が“０”ではない場合には、ステップＳＴ４１２へ進み、重み値の総和が“０”である場合には、ステップＳＴ４１３へ進む。 << ST411 >>
Next, the charge share control unit 203 determines whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. If the sum of the weight values is not “0”, the process proceeds to step ST412. If the sum of the weight values is “0”, the process proceeds to step ST413.
　　　《ＳＴ４１２》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”に近づくように、重み値＋２（Ｈ）または－２（Ｈ）が付加されたソース線を加減計算グループから削除する。 << ST412 >>
Next, the charge share control unit 203 adds the weight value +2 (H) or −2 (H) so that the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group approaches “0”. Delete the selected source line from the addition / subtraction calculation group.
　　　《ＳＴ４１３》
　次に、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線を、ｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋのうちいずれか１つの前処理グループ（ソース線が割り当てられていない前処理グループ）に割り当てる。 << ST413 >>
Next, the charge share control unit 203 selects one of the k preprocessing groups PGR1, PGR2,..., PGRk as the source line allocated to the addition / subtraction calculation group (the source line is allocated). Assign to no preprocessing group).
　　　《ＳＴ４１４》
　次に、チャージシェア制御部２０３は、重み付けグループＷＧＲｚに割り当てられたソース線のうち加減計算グループに割り当てられていないソース線を、ｋ個の前処理グループＰＧＲ１，ＰＧＲ２，…，ＰＧＲｋのうち別の前処理グループ（ソース線が割り当てられていない前処理グループ）に割り当てる。 << ST414 >>
Next, the charge share control unit 203 assigns source lines not assigned to the addition / subtraction calculation group among the source lines assigned to the weighting group WGRz to another of the k preprocessing groups PGR1, PGR2,. Assign to a preprocessing group (a preprocessing group to which no source line is assigned).
　　　《ＳＴ４１５》
　次に、チャージシェア制御部２０３は、変数ｚが最大値ｚｍａｘ（ここでは、ｚｍａｘ＝ｙ）に到達しているか否かを判定する。すなわち、チャージシェア制御部２０３は、ｙ個の重み付けグループＷＧＲ１，ＷＧＲ２，…，ＷＧＲｙの中に判定対象として選択されていない重み付けグループが残っているか否かを判定する。変数ｚが最大値ｚｍａｘに到達していない場合には、ステップＳＴ４１６へ進み、変数ｚがｚｍａｘに到達している場合には、処理を終了する。 << ST415 >>
Next, the charge share control unit 203 determines whether or not the variable z has reached the maximum value zmax (here, zmax = y). That is, the charge share control unit 203 determines whether or not weighting groups not selected as a determination target remain in the y weighting groups WGR1, WGR2,..., WGRy. If the variable z has not reached the maximum value zmax, the process proceeds to step ST416. If the variable z has reached zmax, the process ends.
　　　《ＳＴ４１６》
　次に、チャージシェア制御部２０３は、変数ｚに“１”を加算する。すなわち、チャージシェア制御部２０３は、ｙ個の重み付けグループＷＧＲ１，ＷＧＲ２，…，ＷＧＲｙのうち判定対象として選択されていない重み付けグループを次の判定対象として選択する。また、チャージシェア制御部２０３は、加減計算グループを初期状態（ソース線ＳＬ１，ＳＬ２，…，ＳＬｎのいずれも割り当てられていない状態）に設定する。次に、ステップＳＴ４０３へ進む。 << ST416 >>
Next, the charge share control unit 203 adds “1” to the variable z. That is, the charge share control unit 203 selects a weighting group that is not selected as a determination target among the y weighting groups WGR1, WGR2,..., WGRy as the next determination target. In addition, the charge share control unit 203 sets the addition / subtraction calculation group to an initial state (a state in which none of the source lines SL1, SL2,..., SLn is assigned). Next, the process proceeds to step ST403.
　なお、ステップＳＴ４０５，ＳＴ４０７，ＳＴ４０９，ＳＴ４１１において、チャージシェア制御部２０３は、加減計算グループに割り当てられたソース線に付加された重み値の総和が“０”であるか否かを判定する代わりに、加減計算グループに割り当てられたソース線に付加された重み値の総和が所定の許容範囲（“０”を含む許容範囲）内であるか否かを判定しても良い。 In steps ST405, ST407, ST409, and ST411, the charge share control unit 203 instead of determining whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is “0”. It may be determined whether or not the sum of the weight values added to the source lines assigned to the addition / subtraction calculation group is within a predetermined allowable range (allowable range including “0”).
　　〔グループ割当処理〕
　次に、図２３を参照して、グループ割当処理（ＳＴ４０１～ＳＴ４１６）について具体例を挙げて説明する。ここでは、Ｐ＝１，ｎ＝２０，ｋ＝４，ｙ＝２であるものとする。なお、図中、黒丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する前画素値Ｄ１（ｈ－１），Ｄ２（ｈー１），…，Ｄ２０（ｈ－１）を示し、白丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）を示している。 [Group assignment processing]
Next, with reference to FIG. 23, the group assignment processing (ST401 to ST416) will be described with a specific example. Here, it is assumed that P = 1, n = 20, k = 4, and y = 2. In the figure, black circles indicate the previous pixel values D1 (h−1) , D2 (h−1) ,..., D20 (h−1) corresponding to the source lines SL1, SL2,. White circles indicate the current pixel values D1 (h) , D2 (h) ,..., D20 (h) corresponding to the source lines SL1, SL2,.
　第ｈ番目の水平期間のうち駆動期間において、図２３のような現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）が駆動電圧供給回路２に供給される。また、画素値格納部２０２は、図２３のような前画素値Ｄ１（ｈ－１），Ｄ２（ｈー１），…，Ｄ２０（ｈ－１）を格納している。 In the driving period of the h-th horizontal period, the current pixel value D1 as shown in FIG. 23 (h), D2 (h ), ..., D20 (h) is supplied to the drive voltage supply circuit 2. Further, the pixel value storage unit 202 stores the previous pixel values D1 (h−1) , D2 (h−1) ,..., D20 (h−1) as shown in FIG.
　まず、ステップＳＴ４０１が実行され、奇数番目のソース線ＳＬ１，ＳＬ３，…，ＳＬ１９（正極性の駆動電圧が供給されるソース線）が、重み付けグループＷＧＲ１に割り当てられ、偶数番目のソース線ＳＬ２，ＳＬ４，…，ＳＬ２０（負極性の駆動電圧が供給されるソース線）が、重み付けグループＷＧＲ２に割り当てられる。 First, step ST401 is executed, and odd-numbered source lines SL1, SL3,..., SL19 (source lines to which positive drive voltage is supplied) are assigned to the weighting group WGR1 and even-numbered source lines SL2, SL4. ,..., SL20 (source line to which a negative drive voltage is supplied) is assigned to the weighting group WGR2.
　次に、ステップＳＴ４０２，ＳＴ４０３が実行され、図２１に示した前画素値および現画素値の位置と重み値との対応関係に基づいて、図２３のように、重み付けグループＷＧＲ１に割り当てられたソース線ＳＬ１，ＳＬ３，…，ＳＬ１９の各々に重み値が付加される。次に、ステップＳＴ４０４～ＳＴ４１３が実行され、加減計算グループに割り当てられたソース線ＳＬ３，ＳＬ５，ＳＬ９，ＳＬ１１，ＳＬ１３，ＳＬ１７，ＳＬ１９が前処理グループＰＧＲ１に割り当てられ、ソース線ＳＬ１，ＳＬ７，ＳＬ１５が前処理グループＰＧＲ２に割り当てられる。 Next, steps ST402 and ST403 are executed, and the sources assigned to the weighting group WGR1 as shown in FIG. 23 based on the correspondence relationship between the position of the previous pixel value and the current pixel value and the weight value shown in FIG. A weight value is added to each of the lines SL1, SL3,. Next, steps ST404 to ST413 are executed, and the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 assigned to the addition / subtraction calculation group are assigned to the preprocessing group PGR1, and the source lines SL1, SL7, and SL15 are assigned. Assigned to the preprocessing group PGR2.
　次に、ステップＳＴ４１５，ＳＴ４１６が実行され、重み付けグループＷＧＲ２が判定対象として選択される。次に、ステップＳＴ４０２，ＳＴ４０３が実行され、図２２に示した前画素値および現画素値の位置と重み値との対応関係に基づいて、図２３のように重み付けグループＷＧＲ２に割り当てられたソース線ＳＬ２，ＳＬ４，…，ＳＬ２０の各々に重み値が付加される。次に、ステップＳＴ４０４～ＳＴ４１３が実行され、加減計算グループに割り当てられたソース線ＳＬ８，ＳＬ１０，ＳＬ１４，ＳＬ１８，ＳＬ２０が前処理グループＰＧＲ３に割り当てられ、ソース線ＳＬ２，ＳＬ４，ＳＬ６，ＳＬ１２，ＳＬ１６が前処理グループＰＧＲ４に割り当てられる。 Next, Steps ST415 and ST416 are executed, and the weighting group WGR2 is selected as a determination target. Next, steps ST402 and ST403 are executed, and the source lines assigned to the weighting group WGR2 as shown in FIG. 23 based on the correspondence relationship between the positions of the previous pixel value and the current pixel value and the weight values shown in FIG. A weight value is added to each of SL2, SL4,. Next, steps ST404 to ST413 are executed, and the source lines SL8, SL10, SL14, SL18, SL20 assigned to the addition / subtraction calculation group are assigned to the preprocessing group PGR3, and the source lines SL2, SL4, SL6, SL12, SL16 are assigned. Assigned to the preprocessing group PGR4.
　次に、前処理グループＰＧＲ１，ＰＧＲ２，ＰＧＲ３，ＰＧＲ４の各々に対してステップＳＴ３０２～ＳＴ３１５が実行される。これにより、短絡グループＳＧＲ１に、ソース線ＳＬ３，ＳＬ５，ＳＬ９，ＳＬ１１，ＳＬ１３，ＳＬ１７，ＳＬ１９が割り当てられ、短絡グループＳＧＲ２に、ソース線ＳＬ１，ＳＬ７，ＳＬ１５が割り当てられ、短絡グループＳＧＲ３に、ソース線ＳＬ８，ＳＬ１０，ＳＬ１４，ＳＬ１８，ＳＬ２０が割り当てられ、短絡グループＳＧＲ４に、ソース線ＳＬ４，ＳＬ６，ＳＬ１６が割り当てられる。なお、ソース線ＳＬ２，ＳＬ１２は、短絡グループＳＧＲ１，ＳＧＲ２，ＳＧＲ３，ＳＧＲ４のいずれにも割り当てられない。 Next, steps ST302 to ST315 are executed for each of the preprocessing groups PGR1, PGR2, PGR3, and PGR4. Thereby, the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 are assigned to the short-circuit group SGR1, the source lines SL1, SL7, and SL15 are assigned to the short-circuit group SGR2, and the source line is connected to the short-circuit group SGR3. SL8, SL10, SL14, SL18, and SL20 are assigned, and source lines SL4, SL6, and SL16 are assigned to the short-circuit group SGR4. The source lines SL2 and SL12 are not assigned to any of the short-circuit groups SGR1, SGR2, SGR3, and SGR4.
　　〔ソース線の電圧変動〕
　次に、図２４を参照して、チャージシェア動作の変形例２によるソース線ＳＬ１，ＳＬ２，…，ＳＬｎの電圧変動について説明する。ここでは、Ｐ＝１，ｎ＝２０，ｋ＝４，ｙ＝２であるものする。また、図２４では、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０の電圧変動は、画素値を用いて表現されている。なお、図中、黒丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する前画素値Ｄ１（ｈ－１），Ｄ２（ｈー１），…，Ｄ２０（ｈ－１）を示し、白丸印は、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０にそれぞれ対応する現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）を示している。 [Voltage fluctuation of source line]
Next, with reference to FIG. 24, the voltage variation of the source lines SL1, SL2,. Here, P = 1, n = 20, k = 4, and y = 2. In FIG. 24, voltage fluctuations of the source lines SL1, SL2,..., SL20 are expressed using pixel values. In the figure, black circles indicate the previous pixel values D1 (h−1) , D2 (h−1) ,..., D20 (h−1) corresponding to the source lines SL1, SL2,. White circles indicate the current pixel values D1 (h) , D2 (h) ,..., D20 (h) corresponding to the source lines SL1, SL2,.
　第ｈ番目の水平期間のうちチャージシェア期間において、接続切替部１０４は、チャージシェア制御部２０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０を駆動電圧生成部１０１（駆動部１１１，１１２，…，１１２０）から切り離した後、短絡グループＳＧＲ１に割り当てられたソース線ＳＬ３，ＳＬ５，ＳＬ９，ＳＬ１１，ＳＬ１３，ＳＬ１７，ＳＬ１９を短絡線ＳＴＬ１に電気的に接続し、短絡グループＳＧＲ２に割り当てられたソース線ＳＬ１，ＳＬ７，ＳＬ１５を短絡線ＳＴＬ２に電気的に接続し、短絡グループＳＧＲ３に割り当てられたソース線ＳＬ８，ＳＬ１０，ＳＬ１４，ＳＬ１８，ＳＬ２０を短絡線ＳＴＬ３に電気的に接続し、短絡グループＳＧＲ４に割り当てられたソース線ＳＬ４，ＳＬ６，ＳＬ１６を短絡線ＳＴＬ４に電気的に接続する。なお、接続切替部１０４は、ソース線ＳＬ２，ＳＬ１２を短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３，ＳＴＬ４のいずれにも電気的に接続しない。これにより、ソース線ＳＬ３，ＳＬ５，ＳＬ９，ＳＬ１１，ＳＬ１３，ＳＬ１７，ＳＬ１９の電圧は、それぞれ、前画素値Ｄ３（ｈ－１），Ｄ５（ｈ－１），Ｄ９（ｈ－１），Ｄ１１（ｈ－１），Ｄ１３（ｈ－１），Ｄ１７（ｈ－１），Ｄ１９（ｈ－１）に応じた駆動電圧ＶＤ３（ｈ－１），ＶＤ５（ｈ－１），ＶＤ９（ｈ－１），ＶＤ１１（ｈ－１），ＶＤ１３（ｈ－１），ＶＤ１７（ｈ－１），ＶＤ１９（ｈ－１）から平均値ＤＡＰ１（前画素値Ｄ３（ｈ－１），Ｄ５（ｈ－１），Ｄ９（ｈ－１），Ｄ１１（ｈ－１），Ｄ１３（ｈ－１），Ｄ１７（ｈ－１），Ｄ１９（ｈ－１）の平均値）に応じた平均電圧に変化する。ソース線ＳＬ１，ＳＬ７，ＳＬ１５の電圧は、それぞれ、前画素値Ｄ１（ｈ－１），Ｄ７（ｈ－１），Ｄ１５（ｈ－１）に応じた駆動電圧ＶＤ１（ｈ－１），ＶＤ７（ｈ－１），ＶＤ１５（ｈ－１）から平均値ＤＡＰ２（前画素値Ｄ１（ｈ－１），Ｄ７（ｈ－１），Ｄ１５（ｈ－１）の平均値）に応じた平均電圧に変化する。ソース線ＳＬ８，ＳＬ１０，ＳＬ１４，ＳＬ１８，ＳＬ２０の電圧は、それぞれ、前画素値Ｄ８（ｈ－１），Ｄ１０（ｈ－１），Ｄ１４（ｈ－１），Ｄ１８（ｈ－１），Ｄ２０（ｈ－１）に応じた駆動電圧ＶＤ８（ｈ－１），ＶＤ１０（ｈ－１），ＶＤ１４（ｈ－１），ＶＤ１８（ｈ－１），ＶＤ２０（ｈ－１）から平均値ＤＡＮ１（前画素値Ｄ８（ｈ－１），Ｄ１０（ｈ－１），Ｄ１４（ｈ－１），Ｄ１８（ｈ－１），Ｄ２０（ｈ－１）の平均値）に応じた平均電圧に変化する。ソース線ＳＬ４，ＳＬ６，ＳＬ１６の電圧は、それぞれ、前画素値Ｄ４（ｈ－１），Ｄ６（ｈ－１），Ｄ１６（ｈ－１）に応じた駆動電圧ＶＤ４（ｈ－１），ＶＤ６（ｈ－１），ＶＤ１６（ｈ－１）から平均値ＤＡＮ２（前画素値Ｄ４（ｈ－１），Ｄ６（ｈ－１），Ｄ１６（ｈ－１）の平均値）に応じた平均電圧に変化する。なお、ソース線ＳＬ２，ＳＬ１２の電圧は、それぞれ、前画素値Ｄ２（ｈ－１），Ｄ１２（ｈ－１）に応じた駆動電圧ＶＤ２（ｈ－１），ＶＤ１２（ｈ－１）のまま維持される。 In the charge share period in the h-th horizontal period, the connection switching unit 104 sends the source lines SL1, SL2,..., SL20 to the drive voltage generation unit 101 (drive unit 111) in response to the control by the charge share control unit 203. , 112,..., 1120), the source lines SL3, SL5, SL9, SL11, SL13, SL17, SL19 assigned to the short-circuit group SGR1 are electrically connected to the short-circuit line STL1 and assigned to the short-circuit group SGR2. The connected source lines SL1, SL7, SL15 are electrically connected to the short-circuit line STL2, and the source lines SL8, SL10, SL14, SL18, SL20 assigned to the short-circuit group SGR3 are electrically connected to the short-circuit line STL3. Source lines SL4, SL6, SL1 assigned to group SGR4 Electrically connected to the short-circuit line STL4 a. Connection switching unit 104 does not electrically connect source lines SL2 and SL12 to any of short-circuit lines STL1, STL2, STL3, and STL4. As a result, the voltages of the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 are changed to the previous pixel values D3 (h-1) , D5 (h-1) , D9 (h-1) , and D11 ( h-1) , D13 (h-1) , D17 (h-1) , D19 (h-1) according to drive voltages VD3 (h-1) , VD5 (h-1) , VD9 (h-1) , VD11 (h-1) , VD13 (h-1) , VD17 (h-1) , VD19 (h-1) to the average value DAP1 (previous pixel values D3 (h-1) , D5 (h-1) , D9 (h-1) , D11 (h-1) , D13 (h-1) , D17 (h-1) , D19 (h-1) average value). Source lines SL1, SL7, SL15 voltage, respectively, before the pixel value D1 (h-1), D7 (h-1), D15 (h-1) driving voltage corresponding to VD1 (h-1), VD7 ( h-1) and VD15 (h-1) to an average voltage corresponding to the average value DAP2 (average value of previous pixel values D1 (h-1) , D7 (h-1) and D15 (h-1)) To do. The voltages of the source lines SL8, SL10, SL14, SL18, SL20 are respectively the previous pixel values D8 (h-1) , D10 (h-1) , D14 (h-1) , D18 (h-1) , D20 ( h-1) according to the drive voltage VD8 (h-1) , VD10 (h-1) , VD14 (h-1) , VD18 (h-1) , VD20 (h-1) from the average value DAN1 (previous pixel) The average voltage changes according to the values D8 (h-1) , D10 (h-1) , D14 (h-1) , D18 (h-1) , D20 (h-1)) . The voltages of the source lines SL4, SL6, and SL16 are respectively driven by driving voltages VD4 (h-1) and VD6 ( in accordance with the previous pixel values D4 (h-1) , D6 (h-1) and D16 (h-1). h-1) , VD16 (h-1) to an average voltage DAN2 (average value of previous pixel values D4 (h-1) , D6 (h-1) , D16 (h-1)) To do. The voltage of the source line SL2, SL12, respectively, before the pixel value D2 (h-1), D12 (h-1) driving voltage corresponding to the VD2 (h-1), maintained at VD12 (h-1) Is done.
　次に、第ｈ＋１番目の水平期間のうち駆動期間において、接続切替部１０４は、チャージシェア制御部２０３による制御に応答して、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０を短絡線ＳＴＬ１，ＳＴＬ２，ＳＴＬ３，ＳＴＬ４から切り離した後に、ソース線ＳＬ１，ＳＬ２，…，ＳＬ２０を駆動電圧生成部１０１（駆動部１１１，１１２，…，１１２０）に接続する。また、駆動部１１１，１１２，…，１１２０は、水平同期信号の第ｈ＋１番目の立ち上がりエッジに同期して、現画素値Ｄ１（ｈ），Ｄ２（ｈ），…，Ｄ２０（ｈ）を駆動電圧ＶＤ１（ｈ），ＶＤ２（ｈ），…，ＶＤ２０（ｈ）にそれぞれ変換する。これにより、ソース線ＳＬ３，ＳＬ５，ＳＬ９，ＳＬ１１，ＳＬ１３，ＳＬ１７，ＳＬ１９の電圧は、それぞれ、平均値ＤＡＰ１に応じた平均電圧から現画素値Ｄ３（ｈ），Ｄ５（ｈ），Ｄ９（ｈ），Ｄ１１（ｈ），Ｄ１３（ｈ），Ｄ１７（ｈ），Ｄ１９（ｈ）に応じた駆動電圧ＶＤ３（ｈ），ＶＤ５（ｈ），ＶＤ９（ｈ），ＶＤ１１（ｈ），ＶＤ１３（ｈ），ＶＤ１７（ｈ），ＶＤ１９（ｈ）に変化する。ソース線ＳＬ１，ＳＬ７，ＳＬ１５の電圧は、それぞれ、平均値ＤＡＰ２に応じた平均電圧から現画素値Ｄ１（ｈ），Ｄ７（ｈ），Ｄ１５（ｈ）に応じた駆動電圧ＶＤ１（ｈ），ＶＤ７（ｈ），ＶＤ１５（ｈ）に変化する。ソース線ＳＬ８，ＳＬ１０，ＳＬ１４，ＳＬ１８，ＳＬ２０の電圧は、それぞれ、平均値ＤＡＮ１に応じた平均電圧から現画素値Ｄ８（ｈ），Ｄ１０（ｈ），Ｄ１４（ｈ），Ｄ１８（ｈ），Ｄ２０（ｈ）に応じた駆動電圧ＶＤ８（ｈ），ＶＤ１０（ｈ），ＶＤ１４（ｈ），ＶＤ１８（ｈ），ＶＤ２０（ｈ）に変化する。ソース線ＳＬ４，ＳＬ６，ＳＬ１６の電圧は、それぞれ、平均値ＤＡＮ２に応じた平均電圧から現画素値Ｄ４（ｈ），Ｄ６（ｈ），Ｄ１６（ｈ）に応じた駆動電圧ＶＤ４（ｈ），ＶＤ６（ｈ），ＶＤ１６（ｈ）に変化する。なお、ソース線ＳＬ２，ＳＬ１２の電圧は、それぞれ、駆動電圧ＶＤ２（ｈ－１），ＶＤ１２（ｈ－１）から現画素値Ｄ２（ｈ），Ｄ１２（ｈ）に応じた駆動電圧ＶＤ２（ｈ），ＶＤ１２（ｈ）に変化する。 Next, in the driving period in the (h + 1) th horizontal period, the connection switching unit 104 connects the source lines SL1, SL2,..., SL20 to the short-circuit lines STL1, STL2, STL3 in response to the control by the charge share control unit 203. , STL4, the source lines SL1, SL2,..., SL20 are connected to the drive voltage generation unit 101 (drive units 111, 112,..., 1120). Further, the driving units 111, 112,..., 1120 drive the current pixel values D1 (h) , D2 (h) ,..., D20 (h) as driving voltages in synchronization with the (h + 1) th rising edge of the horizontal synchronizing signal. VD1 (h) , VD2 (h) , ..., VD20 (h) are converted. As a result, the voltages of the source lines SL3, SL5, SL9, SL11, SL13, SL17, and SL19 are changed from the average voltage corresponding to the average value DAP1 to the current pixel values D3 (h) , D5 (h) , and D9 (h), respectively. , D11 (h) , D13 (h) , D17 (h) , D19 (h) according to drive voltages VD3 (h) , VD5 (h) , VD9 (h) , VD11 (h) , VD13 (h) , It changes to VD17 (h) , VD19 (h) . Source lines SL1, SL7, SL15 voltage, respectively, the mean value the current pixel value from the average voltage corresponding to DAP2 D1 (h), D7 ( h), D15 (h) drive voltage VD1 (h) in response to, VD7 (H) , VD15 (h) . The voltages of the source lines SL8, SL10, SL14, SL18, and SL20 are the current pixel values D8 (h) , D10 (h) , D14 (h) , D18 (h) , D20 from the average voltage corresponding to the average value DAN1, respectively. The drive voltages VD8 (h) , VD10 (h) , VD14 (h) , VD18 (h) , VD20 (h) corresponding to (h) are changed. Source line SL4, SL6, SL16 voltage, respectively, the mean value the current pixel value from the average voltage corresponding to DAN2 D4 (h), D6 ( h), D16 drive voltage VD4 corresponding to (h) (h), VD6 (H) and VD16 (h) . The voltage of the source line SL2, SL12, respectively, the drive voltage VD2 (h-1), VD12 (h-1) from the current pixel value D2 (h), D12 (h ) a drive voltage corresponding to the VD2 (h) , VD12 (h) .
　（実施形態３）
　図２５は、実施形態３による駆動電圧供給回路３の構成例を示す。駆動電圧供給回路３は、図１に示した駆動電圧供給回路１の構成に加えて、画素値格納部３０２と、割当制御部３０３と、制御切替部３０４とを備える。なお、駆動電圧供給回路３の駆動方式は、駆動電圧ＶＤ１，ＶＤ２，…，ＶＤｎの極性を反転させない駆動方式であっても良いし、Ｐ×Ｑドット反転駆動方式であっても良い。 (Embodiment 3)
FIG. 25 shows a configuration example of the drive voltage supply circuit 3 according to the third embodiment. The drive voltage supply circuit 3 includes a pixel value storage unit 302, an assignment control unit 303, and a control switching unit 304 in addition to the configuration of the drive voltage supply circuit 1 shown in FIG. The drive system of the drive voltage supply circuit 3 may be a drive system that does not invert the polarity of the drive voltages VD1, VD2,..., VDn, or may be a P × Q dot inversion drive system.
　　〔画素値格納部〕
　画素値格納部３０２は、１水平期間毎に供給されたｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎを格納する。すなわち、画素値格納部２０２は、第ｈ－１番目の水平期間に対応するｎ個の画素値Ｄ１，Ｄ２，…，Ｄｎをｎ個の前画素値Ｄ１（ｈ－１），Ｄ２（ｈ－１），…，Ｄｎ（ｈ－１）として格納する。 (Pixel value storage)
The pixel value storage unit 302 stores n pixel values D1, D2,..., Dn supplied every horizontal period. That is, the pixel value storage unit 202 converts the n pixel values D1, D2,..., Dn corresponding to the (h−1) th horizontal period into n previous pixel values D1 (h−1) , D2 (h− 1) ,..., Dn (h-1) .
　　〔割当制御部〕
　割当制御部３０３は、ｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋにそれぞれ対応するｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋの各々において、その短絡グループに割り当てられたソース線に対応する前画素値の平均値からその短絡グループに割り当てられたソース線に対応する現画素値へそれぞれ向かう短絡ベクトルの絶対値和が、その短絡グループに割り当てられたソース線に対応する前画素値からその短絡グループに割り当てられたソース線に対応する現画素値へそれぞれ向かう画素ベクトルの絶対値和よりも小さくなるように、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎをｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋに割り当てるグループ割当処理を実行する。なお、割当制御部３０３は、チャージシェア制御部２０３の動作（図１３，図１４～図１６，図１９，図２０など）と同様の動作を実行するものであっても良い。 [Allocation control section]
The assignment control unit 303 corresponds to the source line assigned to the short-circuit group in each of the k short-circuit groups SGR1, SGR2,. The absolute value sum of the short-circuit vectors respectively going from the average value of the previous pixel values to the current pixel value corresponding to the source line assigned to the short-circuit group is calculated from the previous pixel value corresponding to the source line assigned to the short-circuit group. The n source lines SL1, SL2,..., SLn are divided into k short-circuit groups SGR1, so as to be smaller than the absolute value sum of the pixel vectors respectively directed to the current pixel values corresponding to the source lines assigned to the short-circuit groups. A group assignment process to assign to SGR2,..., SGRk is executed. Note that the allocation control unit 303 may execute the same operation as the operation of the charge share control unit 203 (FIGS. 13, 14 to 16, FIG. 19, FIG. 20, etc.).
　　〔制御切替部〕
　割当制御部３０３によってグループ割当処理が実行された場合、制御切替部３０４は、割当制御部３０３によってｋ個の短絡グループＳＧＲ１，ＳＧＲ２，…，ＳＧＲｋに割り当てられたソース線がｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋにそれぞれ電気的に接続されるように接続切替部１０４を制御する。一方、割当制御部３０３によってグループ割当処理が実行されない場合、制御切替部３０４は、ｎ個の制御部１３１，１３２，…，１３ｎによってｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋに割り当てられたソース線がｋ本の短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋにそれぞれ電気的に接続されるように接続切替部１０４を制御する。 (Control switching part)
When the group assignment process is executed by the assignment control unit 303, the control switching unit 304 includes k short-circuit lines STL1 having k source lines assigned to the k short-circuit groups SGR1, SGR2,. , STL2,..., STLk are controlled so as to be electrically connected to each other. On the other hand, when the group assignment process is not executed by the assignment control unit 303, the control switching unit 304 is assigned to the k short-circuit lines STL1, STL2,..., STLk by the n control units 131, 132,. The connection switching unit 104 is controlled so that the source line is electrically connected to the k short-circuit lines STL1, STL2,.
　ここでは、制御切替部３０４は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎにそれぞれ対応するｎ個の切替部３１１，３１２，…，３１ｎを含む。割当制御部３０３によってグループ割当処理が実行された場合、切替部３１１，３１２，…，３１のうち第ｉ番目の切替部（以下、切替部３１ｉと表記）は、割当制御部３０３による制御に応答して、接続切替部１０４（供給スイッチＳＷｉおよびｋ個の短絡スイッチＳＷｉ１，ＳＷｉ２，…，ＳＷｉｋ）を制御する。一方、割当制御部３０３によってグループ割当処理が実行されない場合、切替部３１ｉは、制御部１３ｉによる制御に応答して、接続切替部１０４（供給スイッチＳＷｉおよびｋ個の短絡スイッチＳＷｉ１，ＳＷｉ２，…，ＳＷｉｋ）を制御する。なお、供給スイッチＳＷｉとは、ｎ個の供給スイッチＳＷ１，ＳＷ２，…，ＳＷｎのうち第ｉ番目のソース線ＳＬｉに対応する供給スイッチのことであり、短絡スイッチＳＷｉ１，ＳＷｉ２，…，ＳＷｉｋとは、ｎ×ｋ個の短絡スイッチＳＷ１１，ＳＷ１２，…，ＳＷｎｋのうち第ｉ番目のソース線ＳＬｉに対応するｋ個の短絡スイッチのことである。 Here, the control switching unit 304 includes n switching units 311, 312,..., 31 n respectively corresponding to n source lines SL 1, SL 2,. When the group control process is executed by the allocation control unit 303, the i-th switching unit (hereinafter referred to as a switching unit 31i) among the switching units 311, 312, ..., 31 responds to the control by the allocation control unit 303. Then, the connection switching unit 104 (the supply switch SWi and the k short-circuit switches SWi1, SWi2,..., SWik) is controlled. On the other hand, when the group assignment process is not executed by the assignment control unit 303, the switching unit 31i responds to the control by the control unit 13i, and the connection switching unit 104 (the supply switch SWi and the k short-circuit switches SWi1, SWi2,. SWik) is controlled. The supply switch SWi is a supply switch corresponding to the i-th source line SLi among the n supply switches SW1, SW2,..., SWn, and the short-circuit switches SWi1, SWi2,. , N × k short-circuit switches SW11, SW12,..., SWnk are k short-circuit switches corresponding to the i-th source line SLi.
　なお、駆動電圧生成部１０１，画素値格納部１０２，チャージシェア制御部１０３，接続切替部１０４，および制御切替部３０４を半導体チップに搭載し、画素値格納部３０２および割当制御部３０３を外部制御装置（例えば、画像エンジンなど）に搭載しても良い。このように、半導体チップの外部に設けられた外部制御装置に演算処理（グループ割当処理など）を実行させることにより、半導体チップの構成を簡略化でき、製造コストを低減できる。 The drive voltage generation unit 101, the pixel value storage unit 102, the charge share control unit 103, the connection switching unit 104, and the control switching unit 304 are mounted on a semiconductor chip, and the pixel value storage unit 302 and the allocation control unit 303 are externally controlled. You may mount in an apparatus (for example, image engine etc.). As described above, by causing the external control device provided outside the semiconductor chip to perform arithmetic processing (group allocation processing or the like), the configuration of the semiconductor chip can be simplified and the manufacturing cost can be reduced.
　（調整部）
　図２６のように、駆動電圧供給回路１は、ｎ本のソース線ＳＬ１，ＳＬ２，…，ＳＬｎにそれぞれ対応するｎ個の調整部４１１，４１２，…，４１ｎをさらに備えていても良い。調整部４１１，４１２，…，４１ｎのうち第ｉ番目の調整部（以下、調整部４１ｉと表記）は、制御部１３ｉがソース線ＳＬｉを短絡線ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋのいずれか１つに割り当てた場合には、予め定められたセトリング期間中にソース線ＳＬｉの電圧が駆動電圧ＶＤｉになるように、ソース線ＳＬｉが割り当てられた短絡線に対応する目標値と現画素値Ｄｉ（ｈ）との差に応じて駆動部１１ｉの出力電流量を調整する。例えば、調整部４１ｉは、ソース線ＳＬｉが割り当てられた短絡線に対応する目標値と現画素値Ｄｉ（ｈ）との差が大きいほど、駆動部１１ｉの出力電流量を多くする。 (Adjustment part)
As shown in FIG. 26, the drive voltage supply circuit 1 may further include n adjustment units 411, 412,..., 41n corresponding to the n source lines SL1, SL2,. Among the adjustment units 411, 412,..., 41n, the control unit 13i uses the source line SLi as one of the short-circuit lines STL1, STL2,. Is assigned to the target value corresponding to the short-circuit line to which the source line SLi is assigned and the current pixel value Di (h ) so that the voltage of the source line SLi becomes the drive voltage VDi during a predetermined settling period. ) To adjust the output current amount of the drive unit 11i. For example, the adjustment unit 41i increases the output current amount of the drive unit 11i as the difference between the target value corresponding to the short-circuit line to which the source line SLi is assigned and the current pixel value Di (h) is larger.
　以上のように、駆動電圧生成部１０１のピーク電流量を抑えることができるので、ソース線ＳＬ１，ＳＬ２，…，ＳＬｎに発生するノイズを低減できる。なお、調整部４１１，４１２，…，４１ｎは、図９，図１２，図２５に示した駆動電圧供給回路にも適用可能である。 As described above, since the peak current amount of the drive voltage generation unit 101 can be suppressed, noise generated in the source lines SL1, SL2,..., SLn can be reduced. Note that the adjustment units 411, 412,..., 41n are also applicable to the drive voltage supply circuits shown in FIGS.
　以上説明したように、上述の駆動電圧供給回路は、ｎ個の駆動電圧の極性を反転させない場合であってもｎ本のソース線の間で電荷再分配を効率良く実行できるので、表示装置などに有用である。 As described above, the drive voltage supply circuit described above can efficiently perform charge redistribution among n source lines even when the polarity of n drive voltages is not reversed. Useful for.
　１，２，３　　駆動電圧供給回路
　１０　　表示パネル
　２０　　ゲートドライバ
　１０１　　ソースドライバ
　１０２　　画素値格納部
　１０３　　チャージシェア制御部
　１０４　　接続切替部
　ＳＴＬ１，ＳＴＬ２，…，ＳＴＬｋ　　短絡線
　ＳＬ１，ＳＬ２，…，ＳＬｎ　　ソース線
　ＧＬ１，ＧＬ２，…，ＧＬｍ　　ゲート線
　１００　　画素部
　１１１，１１２，…，１１ｎ　　駆動部
　１２１，１２２，…，１２ｎ　　格納部
　１３１，１３２，…，１３ｎ　　制御部
　ＳＷ１，ＳＷ２，…，ＳＷｎ　　供給スイッチ
　ＳＷ１１，ＳＷ１２，…，ＳＷｎｋ　　短絡スイッチ
　３０２　　画素値格納部
　３０３　　割当制御部
　３０４　　制御切替部
　３１１，３１２，…，３１ｎ　　切替部
　４１１，４１２，…，４１ｎ　　調整部 1, 2 and 3 Drive voltage supply circuit 10 Display panel 20 Gate driver 101 Source driver 102 Pixel value storage unit 103 Charge share control unit 104 Connection switching unit STL1, STL2, ..., STLk Short-circuit line SL1, SL2, ..., SLn Source line GL1, GL2,..., GLm gate line 100 pixel unit 111, 112,..., 11n drive unit 121, 122,..., 12n storage unit 131, 132,. SWnk short-circuit switch 302 pixel value storage unit 303 assignment control unit 304 control switching unit 311, 312, ..., 31n switching unit 411, 412, ..., 41n adjustment unit

Claims (13)

  1. 　１水平期間毎に、ｎ本（ｎは、２以上の整数）のソース線にそれぞれ対応するｎ個の現画素値が与えられ、当該ｎ個の現画素値に応じたｎ個の駆動電圧を前記ｎ本のソース線にそれぞれ供給する回路であって、
    　第ｈ番目の水平期間に対応するｎ個の現画素値を前記ｎ個の駆動電圧に変換する駆動電圧生成部と、
    　第ｈ－１番目の水平期間に対応するｎ個の現画素値をｎ個の前画素値として格納する画素値格納部と、
    　複数の短絡線と、
    　画素値を示した数直線上において前記画素値格納部に格納されたｎ個の前画素値から前記第ｈ番目の水平期間に対応するｎ個の現画素値へそれぞれ向かうｎ個の画素ベクトルの分布に基づいて、前記ｎ本のソース線の各々について、当該ソース線を前記複数の短絡線のうちどの短絡線に割り当てるのか、または、当該ソース線を前記複数の短絡線のいずれにも割り当てないのかを決定するチャージシェア制御部と、
    　前記チャージシェア制御部によって前記複数の短絡線の各々に割り当てられたソース線を当該短絡線に電気的に接続する接続切替部とを備える
    ことを特徴とする駆動電圧供給回路。     For each horizontal period, n current pixel values respectively corresponding to n (n is an integer of 2 or more) source lines are given, and n drive voltages corresponding to the n current pixel values are given. A circuit for supplying each of the n source lines,
    A driving voltage generation unit that converts n current pixel values corresponding to the h-th horizontal period into the n driving voltages;
    A pixel value storage unit that stores n current pixel values corresponding to the (h-1) th horizontal period as n previous pixel values;
    Multiple short-circuit wires,
    N pixel vectors respectively directed from the n previous pixel values stored in the pixel value storage unit to the n current pixel values corresponding to the h-th horizontal period on a number line indicating pixel values. Based on the distribution, for each of the n source lines, the source line is assigned to which of the plurality of short-circuit lines, or the source line is not assigned to any of the plurality of short-circuit lines. A charge share control unit that determines whether or not
    A drive voltage supply circuit comprising: a connection switching unit that electrically connects a source line assigned to each of the plurality of short-circuit lines by the charge share control unit to the short-circuit line.
  2. 　請求項１において、
    　前記複数の短絡線の各々には、前記数直線上において当該短絡線に対応する目標値からそれぞれの終点値までの距離がそれぞれの始点値から終点値までの距離よりも短い複数の第１候補ベクトルおよび複数の第２候補ベクトルが対応付けられており、
    　前記複数の短絡線の各々に対応付けられた複数の第２候補ベクトルの始点値は、当該短絡線に対応する目標値を軸として当該短絡線に対応付けられた複数の第１候補ベクトルの始点値に対してそれぞれ対称的な位置に配置され、
    　前記チャージシェア制御部は、前記ｎ本のソース線の各々について、当該ソース線に対応する前画素値から現画素値へ向かう画素ベクトルが前記複数の短絡線のいずれか１つに対応付けられた複数の第１候補ベクトルおよび複数の第２候補ベクトルのいずれか１つに一致する場合に、当該ソース線を当該短絡線に割り当てる
    ことを特徴とする駆動電圧供給回路。     In claim 1,
    Each of the plurality of short-circuit lines includes a plurality of first candidates in which the distance from the target value corresponding to the short-circuit line to each end point value is shorter than the distance from each start point value to the end point value on the number line A vector and a plurality of second candidate vectors are associated,
    The starting point values of the plurality of second candidate vectors associated with each of the plurality of shorting lines are the starting points of the plurality of first candidate vectors associated with the shorting line with the target value corresponding to the shorting line as an axis. Are placed symmetrically with respect to each value,
    In the charge share control unit, for each of the n source lines, a pixel vector from the previous pixel value corresponding to the source line to the current pixel value is associated with any one of the plurality of short-circuit lines. A drive voltage supply circuit, wherein the source line is assigned to the short-circuit line when it matches any one of the plurality of first candidate vectors and the plurality of second candidate vectors.
  3. 　請求項２において、
    　前記画素値格納部は、前記ｎ本のソース線にそれぞれ対応するｎ個の格納部を含み、
    　前記チャージシェア制御部は、前記ｎ本のソース線にそれぞれ対応するｎ個の制御部を含み、
    　前記ｎ個の格納部の各々は、前記第ｈ－１番目の水平期間に対応するｎ個の現画素値のうち当該格納部に対応する現画素値を前画素値として格納し、
    　前記ｎ個の制御部の各々は、前記数直線上において前記ｎ個の格納部のうち当該制御部に対応する格納部に格納された前画素値から前記第ｈ番目の水平期間に対応するｎ個の現画素値のうち当該制御部に対応する現画素値に向かう画素ベクトルが前記複数の短絡線のいずれか１つに対応付けられた複数の第１の候補ベクトルおよび複数の第２の候補ベクトルのいずれか１つに一致する場合に、当該制御部に対応するソース線を当該短絡線に割り当てる
    ことを特徴とする駆動電圧供給回路。     In claim 2,
    The pixel value storage unit includes n storage units respectively corresponding to the n source lines,
    The charge share control unit includes n control units respectively corresponding to the n source lines,
    Each of the n storage units stores a current pixel value corresponding to the storage unit as a previous pixel value among n current pixel values corresponding to the h−1th horizontal period,
    Each of the n control units includes n corresponding to the h-th horizontal period from the previous pixel value stored in the storage unit corresponding to the control unit among the n storage units on the number line. Among the current pixel values, a plurality of first candidate vectors and a plurality of second candidates in which a pixel vector toward the current pixel value corresponding to the control unit is associated with any one of the plurality of short-circuit lines A drive voltage supply circuit, wherein a source line corresponding to the control unit is assigned to the short-circuit line when it matches any one of the vectors.
  4. 　請求項３において、
    　割当制御部と、
    　制御切替部とをさらに備え、
    　前記割当制御部は、前記複数の短絡線にそれぞれ対応する複数の短絡グループの各々において、当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値の平均値から当該複数のソース線に対応する複数の現画素値へそれぞれ向かう複数の短絡ベクトルの絶対値和が、当該複数のソース線に対応する複数の前画素値から当該ソース線に対応する複数の現画素値へそれぞれ向かう複数の画素ベクトルの絶対値和よりも小さくなるように、前記ｎ本のソース線の各々について、当該ソース線を前記複数の短絡グループのうちどの短絡グループに割り当てるのか、または、当該ソース線を前記複数の短絡グループのいずれにも割り当てないのかを決定するグループ割当処理を実行し、
    　前記制御切替部は、前記グループ割当処理が実行された場合には、前記割当制御部によって前記複数の短絡グループの各々に割り当てられたソース線が当該短絡グループに対応する短絡線に電気的に接続されるように前記接続切替部を制御し、前記グループ割当処理が実行されない場合には、前記ｎ個の制御部によって前記複数の短絡線の各々に割り当てられたソース線が当該短絡線に電気的に接続されるように前記接続切替部を制御する
    ことを特徴とする駆動電圧供給回路。     In claim 3,
    An allocation control unit;
    A control switching unit,
    The allocation control unit includes, in each of the plurality of short-circuit groups corresponding to the plurality of short-circuit lines, the plurality of sources based on an average value of a plurality of previous pixel values corresponding to the plurality of source lines allocated to the short-circuit group. The sum of absolute values of a plurality of short-circuit vectors respectively directed to a plurality of current pixel values corresponding to the line is directed from a plurality of previous pixel values corresponding to the plurality of source lines to a plurality of current pixel values corresponding to the source line. For each of the n source lines, the source line is assigned to the short-circuit group among the plurality of short-circuit groups, or the source line is assigned to the source line so as to be smaller than the absolute value sum of a plurality of pixel vectors. Execute group assignment processing to determine whether to assign to any of multiple short-circuit groups,
    When the group assignment process is executed, the control switching unit electrically connects a source line assigned to each of the plurality of short-circuit groups by the assignment control unit to a short-circuit line corresponding to the short-circuit group. In the case where the connection switching unit is controlled and the group assignment process is not executed, the source line assigned to each of the plurality of short-circuit lines by the n control units is electrically connected to the short-circuit line. A drive voltage supply circuit that controls the connection switching unit to be connected to the drive voltage.
  5. 　請求項４において、
    　前記割当制御部は、前記複数の短絡グループのうち少なくとも１つにおいて当該短絡グループに割り当てられたソース線の本数が最大になるように、前記グループ割当処理を実行する
    ことを特徴とする駆動電圧供給回路。     In claim 4,
    The allocation control unit performs the group allocation process so that the number of source lines allocated to the short-circuit group in at least one of the plurality of short-circuit groups is maximized. circuit.
  6. 　請求項４において、
    　前記割当制御部は、前記複数の短絡グループのうち少なくとも１つにおいて当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値から当該短絡グループに対応する目標値へそれぞれ向かう複数の目標ベクトルの和が最小になるように、前記グループ割当処理を実行する
    ことを特徴とする駆動電圧供給回路。     In claim 4,
    The assignment control unit includes a plurality of previous pixel values corresponding to a plurality of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups, and a plurality of headings corresponding to a target value corresponding to the short-circuit group. The drive voltage supply circuit, wherein the group assignment process is executed so that a sum of target vectors is minimized.
  7. 　請求項３において、
    　前記ｎ本のソース線にそれぞれ対応するｎ個の調整部をさらに備え、
    　前記駆動電圧生成部は、前記ｎ本のソース線にそれぞれ対応するｎ個の駆動部を含み、
    　前記ｎ個の駆動部の各々は、前記第ｈ番目の水平期間に対応するｎ個の現画素値のうち当該駆動部に対応する現画素値を前記駆動電圧に変換し、
    　前記ｎ個の調整部の各々は、前記ｎ個の制御部のうち当該調整部に対応する制御部が当該調整部に対応するソース線を前記複数の短絡線のいずれか１つに割り当てた場合に、前記第ｈ番目の水平期間に対応するｎ個の現画素値のうち当該調整部に対応する現画素値と当該短絡線に対応する目標値との差に応じて、前記ｎ個の駆動部のうち当該調整部に対応する駆動部の出力電流量を調整する
    ことを特徴とする駆動電圧供給回路。     In claim 3,
    N adjustment units respectively corresponding to the n source lines;
    The drive voltage generation unit includes n drive units respectively corresponding to the n source lines,
    Each of the n driving units converts a current pixel value corresponding to the driving unit among n current pixel values corresponding to the h-th horizontal period into the driving voltage,
    In each of the n adjustment units, a control unit corresponding to the adjustment unit among the n control units assigns a source line corresponding to the adjustment unit to any one of the plurality of short-circuit lines. In addition, among the n current pixel values corresponding to the h-th horizontal period, the n driving is performed according to a difference between a current pixel value corresponding to the adjustment unit and a target value corresponding to the short-circuit line. A drive voltage supply circuit that adjusts an output current amount of a drive unit corresponding to the adjustment unit among the units.
  8. 　請求項２において、
    　前記チャージシェア制御部は、前記複数の短絡線の各々について、当該短絡線に割り当てられた複数のソース線に対応する複数の前画素値の平均値から当該複数のソース線に対応する複数の現画素値にそれぞれ向かう複数の短絡ベクトルの絶対値和が、当該複数のソース線に対応する複数の前画素値から当該複数のソース線に対応する複数の現画素値にそれぞれ向かう複数の画素ベクトルの絶対値和よりも小さい場合に、当該短絡線に割り当てられた複数のソース線が当該短絡線に電気的に接続されるように前記接続切替部を制御する
    ことを特徴とする駆動電圧供給回路。     In claim 2,
    The charge share control unit, for each of the plurality of short-circuit lines, a plurality of current values corresponding to the plurality of source lines from an average value of a plurality of previous pixel values corresponding to the plurality of source lines allocated to the short-circuit line. A sum of absolute values of a plurality of short-circuit vectors respectively directed to the pixel values is obtained by calculating a plurality of pixel vectors respectively directed from a plurality of previous pixel values corresponding to the plurality of source lines to a plurality of current pixel values corresponding to the plurality of source lines. A drive voltage supply circuit that controls the connection switching unit so that a plurality of source lines assigned to the short-circuit line are electrically connected to the short-circuit line when the sum is smaller than an absolute value sum.
  9. 　請求項２において、
    　前記チャージシェア制御部は、前記複数の短絡線にそれぞれ対応する複数の短絡グループの各々において、当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値の平均値から当該複数のソース線に対応する複数の現画素値へそれぞれ向かう複数の短絡ベクトルの絶対値和が、当該複数のソース線に対応する複数の前画素値から当該ソース線に対応する複数の現画素値へそれぞれ向かう複数の画素ベクトルの絶対値和よりも小さくなるように、前記ｎ本のソース線の各々について、当該ソース線を前記複数の短絡グループのうちどの短絡グループに割り当てるのか、または、当該ソース線を前記複数の短絡グループのいずれにも割り当てないのかを決定するグループ割当処理を実行する
    ことを特徴とする駆動電圧供給回路。     In claim 2,
    In each of the plurality of short-circuit groups corresponding to the plurality of short-circuit lines, the charge share control unit, based on an average value of a plurality of previous pixel values corresponding to the plurality of source lines assigned to the short-circuit group, An absolute value sum of a plurality of short-circuit vectors respectively directed to a plurality of current pixel values corresponding to the source line is changed from a plurality of previous pixel values corresponding to the plurality of source lines to a plurality of current pixel values corresponding to the source line, respectively. For each of the n source lines, the source line is assigned to which short-circuit group among the plurality of short-circuit groups, or the source line is A drive voltage supply circuit for executing a group assignment process for determining whether to assign to any of the plurality of short-circuit groups. .
  10. 　請求項９において、
    　前記チャージシェア制御部は、前記複数の短絡グループのうち少なくとも１つにおいて当該短絡グループに割り当てられたソース線の本数が最大になるように、前記グループ割当処理を実行する
    ことを特徴とする駆動電圧供給回路。     In claim 9,
    The charge share control unit executes the group assignment process so that the number of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups is maximized. Supply circuit.
  11. 　請求項９において、
    　前記チャージシェア制御部は、前記複数の短絡グループのうち少なくとも１つにおいて当該短絡グループに割り当てられた複数のソース線に対応する複数の前画素値から当該短絡グループに対応する目標値へそれぞれ向かう複数の目標ベクトルの和が最小になるように、前記グループ割当処理を実行する
    ことを特徴とする駆動電圧供給回路。     In claim 9,
    The charge share control unit includes a plurality of front pixel values corresponding to a plurality of source lines assigned to the short-circuit group in at least one of the plurality of short-circuit groups, respectively, toward a target value corresponding to the short-circuit group. The drive voltage supply circuit is characterized in that the group assignment process is executed so that the sum of the target vectors is minimized.
  12. 　請求項１～１１のいずれか１項において、
    　前記駆動電圧生成部は、１水平期間においてＰ本（Ｐは、１以上の整数）のソース線毎に前記ｎ個の駆動電圧の極性を反転させるとともに、Ｑ個（Ｑは、２以上の整数）の水平期間毎に前記ｎ個の駆動電圧の極性を反転させる
    ことを特徴とする駆動電圧供給回路。     In any one of claims 1 to 11,
    The drive voltage generation unit inverts the polarity of the n drive voltages for each of P (P is an integer of 1 or more) source lines in one horizontal period, and Q (Q is an integer of 2 or more). ), The polarity of the n drive voltages is inverted every horizontal period.
  13. 　請求項１～１２のいずれか１項に記載の駆動電圧供給回路と、
    　前記ｎ本のソース線と、ｍ本（ｍは、２以上の整数）のゲート線と、それぞれが前記
    ｎ本のソース線のいずれか１本に接続されるとともに前記ｍ本のゲート線のいずれか１本に接続されたｎ×ｍ個の画素部とを含む表示パネルと、
    　１水平期間毎に前記ｍ個のゲート線のいずれか１本を活性化させるゲートドライバとを備える
    ことを特徴とする表示装置。     A drive voltage supply circuit according to any one of claims 1 to 12,
    The n source lines, m (m is an integer of 2 or more) gate lines, each of which is connected to any one of the n source lines and any of the m gate lines. Or a display panel including n × m pixel units connected to one,
    And a gate driver that activates any one of the m gate lines every horizontal period.
PCT/JP2011/001042 2010-03-08 2011-02-23 Drive voltage supply circuit, display device WO2011111322A1 (en)

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