WO2011108045A1 - Circuit pattern inspection device and inspection method for same - Google Patents

Circuit pattern inspection device and inspection method for same Download PDF

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Publication number
WO2011108045A1
WO2011108045A1 PCT/JP2010/006579 JP2010006579W WO2011108045A1 WO 2011108045 A1 WO2011108045 A1 WO 2011108045A1 JP 2010006579 W JP2010006579 W JP 2010006579W WO 2011108045 A1 WO2011108045 A1 WO 2011108045A1
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Prior art keywords
stage
image
circuit pattern
pattern inspection
inspection apparatus
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PCT/JP2010/006579
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French (fr)
Japanese (ja)
Inventor
広井　高志
祐介 大南
百代 圓山
津野　夏規
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株式会社 日立ハイテクノロジーズ
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Publication of WO2011108045A1 publication Critical patent/WO2011108045A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/26—Electron or ion microscopes; Electron or ion diffraction tubes
    • H01J37/28—Electron or ion microscopes; Electron or ion diffraction tubes with scanning beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/26—Electron or ion microscopes; Electron or ion diffraction tubes
    • H01J37/261—Details
    • H01J37/265—Controlling the tube; circuit arrangements adapted to a particular application not otherwise provided, e.g. bright-field-dark-field illumination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/22—Treatment of data
    • H01J2237/221—Image processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/245—Detection characterised by the variable being measured
    • H01J2237/24592—Inspection and quality control of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/26—Electron or ion microscopes
    • H01J2237/28—Scanning microscopes
    • H01J2237/2813—Scanning microscopes characterised by the application
    • H01J2237/2817—Pattern inspection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a charged particle beam apparatus and an inspection method for inspecting a substrate on which a circuit pattern is formed, such as a semiconductor substrate of a semiconductor device or a deflection array substrate of a liquid crystal display, using a charged particle beam as an inspection sample.
  • a substrate on which a circuit pattern is formed such as a semiconductor substrate of a semiconductor device or a deflection array substrate of a liquid crystal display
  • a charged particle beam as an inspection sample.
  • the description is limited to the inspection of a semiconductor wafer, but it goes without saying that the present invention can be similarly applied to a substrate on which another circuit pattern is formed, such as a semiconductor device or a liquid crystal substrate.
  • the electron beam inspection system irradiates the wafer to be inspected with an electron beam, detects the secondary electrons generated, and scans the electron beam in synchronization with the stage movement, thereby secondary electrons of the circuit pattern on the wafer. An image is obtained, and the detected image is compared with an eyelid reference image having the same pattern, and a place having a large difference is determined as a defect.
  • Non-Patent Document 1 As a technique for devising image processing, for example, as described in Non-Patent Document 1, focusing on the point that the image detection speed is determined by the S / N of the image, and improving the apparent S / N, high speed There is a technique to realize a simple inspection.
  • Patent Document 2 discloses that a plurality of beams formed by dividing an electron beam emitted from a single electron gun into a plurality of beams and individually focusing them by lenses arranged in an array form a single beam.
  • a multi-beam type electron beam inspection apparatus that irradiates and scans a sample using an optical element is disclosed.
  • Non-Patent Document 2 describes that necessary defect distribution information is acquired at a low sampling rate by sampling stage movement coordinates.
  • an object of the present invention is to realize an appearance inspection method that is faster and more efficient than the conventional art.
  • the pre-irradiation area 103 Prior to image acquisition of the scanning area A 102a and the scanning area B 102b, the pre-irradiation area 103 is irradiated with an electron beam. This enables the image acquisition swath width 104W multiplied by 101a ⁇ 101d the number of channels and the channel width W c of.
  • an image having an image acquisition width 106 (L line) is acquired and inspected with respect to the inspection pitch 105 (P line) in the stage scanning direction.
  • this image acquisition method it is possible to expect a high speed of (P / L) ⁇ (W / W c ) ⁇ N.
  • P / L is the inspection sampling rate in the stage moving direction
  • W / W c is the parallelism improvement rate by multi-beams
  • N is the S / N improvement rate by addition averaging (an image according to the rate of improvement of S / N)
  • the detection clock can be speeded up).
  • the selection of the L dimension in the P dimension may be simple sampling at a constant pitch, or an ROI region having a high defect generation rate may be selected.
  • the inspection sampling rate is 10
  • the parallelism is 10
  • the addition average is 2
  • the defect distribution can be obtained at a speed 200 times faster.
  • stage movement coordinate sampling about 10 described in “Problems to be Solved by the Invention”, it is possible to expect further high-speed defect distribution acquisition.
  • the present invention it is possible to provide an inspection apparatus and an inspection method for efficiently monitoring the defect occurrence frequency and characteristic likelihood in the ROI region with high sensitivity.
  • region explaining the means for solving a problem. 1 is an overall configuration diagram of a first embodiment according to the present invention. Explanatory drawing of the multi-beam arrangement
  • FIG. 2 shows the entire configuration of the circuit pattern inspection apparatus according to the first embodiment.
  • the electron gun 201 includes a cathode 202 made of a material having a low work function, an anode 203 having a high potential with respect to the cathode 202, and an electromagnetic lens 204 for superimposing a magnetic field on an acceleration electric field formed between the cathode and the anode.
  • a Schottky cathode that can easily obtain a large current and has stable electron emission is used.
  • a collimator lens 206 In the downstream direction in which the primary electron beam 205 is extracted from the electron gun 201, as shown in FIG. 2, a collimator lens 206, an aperture array 207 having a plurality of openings arranged on the same substrate, and a lens array 208 having a plurality of openings.
  • the current limiting aperture, the primary beam center axis (optical axis) adjustment aligner, an aberration corrector, and the like are added to the electron optical system (not shown).
  • the stage 212 moves with the wafer 214 placed thereon.
  • a negative potential (hereinafter referred to as a retarding potential) is applied to the wafer 214.
  • a wafer holder is interposed between the wafer 214 and the stage 212 in a conductive state with the wafer, and a retarding power source 215 is connected to the wafer holder and the wafer holder and the wafer 214 are connected to a desired one. The voltage is applied.
  • a surface electric field control electrode 216 is provided on the electron gun direction side from the wafer 214.
  • a scanning signal generator 217 is connected to the deflector 211 for scanning deflection, and a surface electric field control power source 218 is connected to the surface electric field control electrode 216.
  • An optical system control circuit 219 is connected to each part of the electron gun 201, the collimator lens 206, the lens array 208, the beam separator 209, the objective lens 210, the retarding power supply 215, and the surface electric field control power supply 218, and further controls the optical system.
  • a system control unit 220 is connected to the circuit 219.
  • a stage controller 221 is connected to the stage 212, and secondary electron detectors 213 a to 213 d and a scanning deflection deflector 211 are similarly connected to the system controller 220.
  • the system control unit 220 includes a storage device 222, a calculation unit 223, and a defect determination unit 224, and a console device 225 is connected to the system control unit 220.
  • components other than the control system and circuit system are arranged in a vacuum vessel and are operated by evacuation. Further, a mechanism for handling a cassette or a hoop for transporting a plurality of wafers 214 and a wafer transport system for placing the wafers on the stage from outside the vacuum are provided.
  • a reference mark 226 used for adjusting the electro-optical condition and measuring the adjustment state is provided.
  • the primary beam 205 emitted from the electron source 202 is accelerated in the direction of the anode 205 while receiving the focusing action by the electromagnetic lens 204 to form a first electron source image 227 (a point at which the beam diameter is minimized).
  • a diaphragm is arranged in the electron gun 201 as often seen in a general electron gun so that an electron beam in a desired current range passes through the diaphragm. If the operating conditions of the anode 203 and the electromagnetic lens 204 are changed, the current amount of the primary beam passing through the stop can be adjusted to a desired current amount.
  • an aligner for correcting the optical axis of the primary electron beam is arranged between the electron gun 202 and the collimator lens 206, and the center axis of the electron beam is deviated from the diaphragm or the electron optical system.
  • the configuration can be corrected.
  • the collimator lens 206 arranges the primary beam substantially in parallel.
  • the collimator lens 206 is an electromagnetic lens.
  • the aperture array 207 has twelve apertures, and the primary beam is divided into twelve.
  • the divided primary beams are individually focused by the lens array 208, and a plurality of second electron source images 228a, 228b, and 228c are formed.
  • the lens array 208 is composed of three electrodes each having a plurality of apertures, and acts as an Einzel lens for the primary beam passing through the apertures by applying a voltage to the central electrode among them. .
  • the primary beams 205 individually focused by the lens array 208 pass through the beam separator 209.
  • the beam separator 209 is used for the purpose of separating the primary beam 205 and the secondary beam 229, and in this embodiment, generates a magnetic field and an electric field orthogonal to each other in a plane substantially perpendicular to the incident direction of the primary beam.
  • the Wien filter is used to give the deflection angle corresponding to the energy of the passing electrons.
  • the strength of the magnetic field and electric field is set so that the primary beam goes straight, and the strength of the electromagnetic field is deflected to a desired angle with respect to the secondary electron beam incident from the opposite direction. Adjust and control.
  • the position of the beam separator 209 is arranged according to the height of the second electron source images 228a, 228b, and 228c of the primary beam in order to reduce the influence in consideration of the influence of the aberration on the primary beam.
  • the objective lens 210 is an electromagnetic lens and projects the second electron source images 228a, 228b, and 228c in a reduced scale.
  • the deflector 211 for scanning deflection is constructed and installed in an electrostatic 8-pole type in the objective lens.
  • the 12 primary beams passing therethrough are deflected in substantially the same direction and at substantially the same angle, and the sample wafer 214 is raster scanned.
  • the primary beam 205 is arranged on the wafer 214 so as to scan each part of the channel width W c 101a to the channel width W c 101d of the scanning area A 102a, the scanning area B 102b, and the pre-irradiation area 103 already shown in FIG. It has become.
  • a negative potential is applied to the wafer 214 by the retarding power source 215, and an electric field for decelerating the primary beam is formed.
  • the retarding power source 215 and the surface electric field control power source 218 are connected to the other optical elements, that is, the electron gun 201, the collimator lens 206, the lens array 208, the beam separator 209, and the objective lens 210 via the optical system control circuit 219.
  • the system controller 220 controls the system uniformly.
  • the stage 212 is controlled by the stage controller 221.
  • the scanning signal generator 217 and the stage controller 221 are uniformly controlled so that the system controller 220 inspects a predetermined area on the wafer 214 for each stripe arranged in the stage moving direction.
  • the stage is continuously moved at the time of execution of the inspection, and the primary beam is controlled to sequentially scan the band-like region by a combination of deflection by scanning and stage movement.
  • This band-like area is obtained by dividing a predetermined inspection area, and the entire predetermined inspection area is scanned by scanning a plurality of band-like areas.
  • the 12 primary beams that have reached the surface of the wafer 214 interact with substances near the sample surface.
  • secondary electrons such as reflected electrons, secondary electrons, and Auger electrons are generated from the sample and become twelve secondary beams 229a, 229b, and 229c. In the figure, only three lines are indicated by broken lines.
  • the surface electric field control electrode 216 is an electrode for adjusting the electric field strength near the surface of the wafer 214 and controlling the trajectory of the secondary beam 229. It is installed facing the wafer 214, and a positive potential, a negative potential, or the same potential is applied to the wafer 214 by the surface electric field control power source 218.
  • the voltage applied to the surface electric field control electrode 216 by the surface electric field control power source 218 is adjusted to a value suitable for the type of the wafer 214 and the observation target. For example, when the generated secondary beams 229a, 229b, and 229c are to be actively returned to the surface of the wafer 214, a negative voltage is applied to the surface electric field control power source 218. Conversely, a positive voltage can be applied to the surface electric field control power source 218 so that the secondary beams 229a, 229b, and 229c do not return to the surface of the wafer 214.
  • the secondary beams 229a, 229b and 229c are subjected to the focusing action of the objective lens 210, and further, the secondary beam is deflected by the beam separator 209 having a deflection action. Separated and detected.
  • the beam separator 209 having a deflection action. Separated and detected.
  • four of the twelve primary beams are used for pre-irradiation for controlling the charged state of the sample, so that only the secondary beams 229a and 229b from the scanning region A 102a and the scanning region B 102b are used as eight detectors. Detect with.
  • the arithmetic operation unit 223 performs an image addition averaging operation
  • the defect determination unit 234 extracts an image difference, and determines the presence / absence of a defect based on the defect determination condition.
  • the determination result is displayed on the console device 225, and the result is stored in the system control unit 220.
  • FIG. 3A is an explanatory diagram in which relevant portions of the electron optical system are extracted.
  • FIG. 3B shows an inspection area on the wafer 214 (an arrow indicates beam scanning, a black circle indicates a scanning area, and a white circle indicates a pre-irradiation area.
  • 3 (c) shows the aperture array 207
  • FIG. 3 (d) shows the arrangement of the secondary electron detector 213 (in the figure, the black circle indicates the secondary beam position, and the square indicates the external electron detector 213 dimensions). ing.
  • a plurality of second cathode images 228 are formed by the lens array 208 constituted by the corresponding electrostatic lenses in the aperture array 207 and projected onto the wafer 214 by the objective lens 210.
  • a plurality of secondary beams 229 generated from the wafer 214 are imaged at the second cathode image position by the objective lens 210 and detected by the corresponding secondary electron detector 213. Therefore, the scanning area A 102 a and the scanning area B 102 b are similar to the area on the aperture array 207, the lens array 208, the secondary electron detector 213, and the wafer 214.
  • the scanning area A 102 a, the scanning area B 102 b, and the pre-irradiation area 103 are similar to the aperture array 207, the lens array 208, and the area on the wafer 214.
  • the inspection pitch 105 is set by the function of adjusting the magnification of the objective lens 210 in accordance with the region settings of the scanning region A 102a, the scanning region B 102b, and the pre-irradiation region 103.
  • the channel width W c and swath width W are automatically determined according to the set inspection pitch 105.
  • FIG. 4 is an explanatory diagram of stage movement and beam deflection at the time of image acquisition, comparing the case of acquiring with a general method and the case of acquiring an image with the high-speed method of this embodiment.
  • the stage 212 is driven at a constant speed V 0 (speed at which the stage 212 moves by the size of one line in the time required to acquire an image of one line) (401a), and an image is displayed at the center position of the visual field dimension M.
  • V 0 speed at which the stage 212 moves by the size of one line in the time required to acquire an image of one line
  • the deflector 211 is scanned when the end of the acquisition width L enters, and the deflector 211 is scanned when the position where the next line is to be detected.
  • the image acquisition width 106L in the inspection pitch 105P is scanned. Get only minutes of images. Even at the end of the image acquisition width 106L, an image is acquired at the center of the visual field (401b).
  • V the speed of the image acquisition width 106L
  • the beam is scanned (402a), and when one image acquisition is completed, an image of the next line is acquired.
  • the image acquisition width 106L is acquired.
  • An image is acquired.
  • an image is acquired at a position (402b) different from the start point.
  • the L dimension is 0.1 times the P dimension, an image can be acquired 10 times faster than a general method.
  • FIG. 5 is a diagram showing the scanning area A 102 a, the scanning area B 102 b, and the pre-irradiation area 103 with the time t on the horizontal axis and the X coordinate on the vertical axis. Focusing on a specific coordinate X 0 , a beam is irradiated in the order of the pre-irradiation region 103, the scanning region A 102a, and the scanning region B 102b, and secondary beams 229b and 229c generated from the scanning region A 102a and the scanning region B 102b are respectively secondary electrons.
  • Detectors 213a and 213c (and secondary channels are detected by secondary electron detectors 213b and 213d).
  • the time for the secondary electron detectors 213a and 213c to detect the same coordinate has a fixed delay time 501.
  • interpolation and interpolation is performed by linear, spline, lanczos function, etc., and the dimension below the pixel is corrected and averaged. .
  • Defect determination is an actual pattern comparison method that compares images that should be the same, and an addition average image is generated from one image using repeatability, and the detected image is compared with the addition average image RIA (Reference
  • the actual pattern comparison method uses the same die image to compare adjacent die images, and uses the same memory cell pattern to compare adjacent cell patterns. Since it is well known that there is a cell comparison method, the description is omitted.
  • the wafer 214 has a memory mat 601. Depending on which area of the memory mat 601, the area A (602) where there is repetition in the XY direction, the place B (603) where there is repetition only in the X direction, only in the Y direction There is a place C (604) where there is repetition, and there is a place D where there is no repeatability other than these, and by adding and averaging the repetition patterns in the XY directions, one high SN image is generated, and the high SN images are arranged.
  • XY-RIA 606 for creating a reference image, which is a high SN image of only the normal part, adds and averages the repeated patterns in the Y direction to generate one row of high SN images, and arranges the high SN images to arrange the high SN image.
  • Select the X-RIA608 to create a reference image is Minodaka SN image, it generates a reference image in any way, to compare the generated reference image and detected image. The GP comparison method will be described with reference to FIG.
  • the GP comparison can be applied to the defect determination of the region 605 having no repeatability such as the corner (D) of the memory mat 601 shown in FIG.
  • a plurality of (in this case, four) images 701a to 701d acquired in advance are aligned and averaged to create a GP image 702.
  • the detected image 703 is aligned with the GP image, a difference is detected, and a difference image is obtained. 704 is calculated, and it is determined that the difference is a certain area or more.
  • extremely high-speed image acquisition / inspection can be realized by a synergistic effect of acquiring images in parallel using a plurality of beams and acquiring images by thinning out in the stage moving direction.
  • the entire surface of the memory mat portion can be determined using the RIA method or the GP comparison method, the SN of the reference image is very good. Judgment performance can be obtained, and high-speed inspection is possible.
  • the inspection can be performed immediately after the pre-irradiation region is irradiated with the electron beam, and stable charging can be realized immediately after the inspection start end or the region having a large gap between the inspection regions. .
  • the inspection pitch can be controlled by controlling the magnification of the objective lens, and thinning out in the stage scanning direction can be efficiently realized.
  • FIG. Figure 8 is a diagram for explaining the inspection area of the first variant, with the stage movement, the channel width W c only one channel 101a, the scan area A 102, scans the scanning area B102b multibeam, the image in parallel
  • the images acquired in the scanning area A 102a and the scanning area B 102b are averaged.
  • the pre-irradiation area 103 Prior to image acquisition of the scanning area A 102a and the scanning area B 102b, the pre-irradiation area 103 is irradiated with an electron beam. This enables image acquisition is equal to the channel width W c of 101a swath width 104W.
  • the inspection pitch P105 can be arbitrarily changed, and conditions can be easily set.
  • FIG. 9A is an explanatory diagram in which relevant portions of the electron optical system are extracted
  • FIG. 9B shows an inspection area on the wafer 214 (beam scanning with an arrow, scanning area with a black circle, and pre-irradiation area with a white circle).
  • 9 (c) shows the aperture array 207
  • FIG. 9 (d) shows the arrangement of the secondary electron detector 213 (in the figure, the black circle indicates the secondary beam position, and the square indicates the secondary electron detector 213 external dimensions).
  • the pre-irradiation area 103 needs to be in front of the image acquisition area.
  • stage movement direction is only one direction, it may be on one side, but in order to move the stage in both directions, a beam mask 901 is added, and the arrangement of the pre-irradiation region 213 is switched according to the stage movement direction.
  • the position of the pre-irradiation region 213 may be switched by an arbitrary method such as addition of a beam deflector.
  • the stage moving direction is the UP direction or the DOWN direction, it is possible to acquire and inspect images under the same conditions only by switching the pre-irradiation area.
  • FIGS. Figure 10 is a diagram for explaining the inspection area of the present embodiment, as the stage movement, by sharing the channel width W c of the channel 101a ⁇ 101d, scanning the scanning area A102a multibeam acquires an image in parallel .
  • the pre-irradiation area 103 Prior to the image acquisition of the scanning area A 102a, the pre-irradiation area 103 is irradiated with an electron beam. This enables the image acquisition swath width 104W multiplied by 101a ⁇ 101d the number of channels and the channel width W c of. Further, an image having an image acquisition width 106 (L line) is acquired and inspected with respect to the inspection pitch 105 (P line) in the stage scanning direction.
  • FIG. 11 shows the overall configuration of the circuit pattern inspection apparatus. Only differences from the first embodiment will be described.
  • magnification adjustment of the objective lens 210 according to the change of the inspection pitch P105 in the stage moving direction becomes unnecessary, and only the adjustment of the position of the pre-irradiation region 103 by applying a voltage to the pre-irradiation position adjustment electrode 901 is sufficient.
  • the difference effect between the present embodiment and the first embodiment is characterized in that the inspection pitch P105 can be arbitrarily changed because conditions are not added and averaged at the same position, and conditions can be easily set.
  • FIG. 12 shows an overall configuration diagram of this embodiment.
  • an aperture array switcher 1201 for switching between the aperture array 207 and the lens array 208 is added to form a secondary electron detector array 1202 incorporating a detector and an amplifier.
  • the aperture array switcher 1201 switches the aperture array 207 and the lens array 208 to those having different dimensions. Since the secondary beam position on the sensor changes, the secondary electron detector used for image acquisition is also switched.
  • the mechanical aperture array switcher 1201 has been described, any means capable of changing the position and number of the second cathode image equivalently by changing the applied voltage, such as an electrostatic shifter, has the same effect.
  • the optimum setting can be made for each of the different types of inspection target wafers 214. is there.
  • the present invention it is possible to provide an inspection apparatus and an inspection method for efficiently monitoring the defect occurrence frequency and characteristic likelihood in the ROI region with high sensitivity.

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  • Analytical Chemistry (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

Disclosed is a circuit pattern inspection device which provides efficient and highly sensitive monitoring of the frequency and characteristic likelihood of flaws in regions of interest (ROI). The device simultaneously moves a stage continuously and irradiates circuit patterns which are widely spaced in the direction of movement of the stage with a plurality of electron beams disposed in a matrix formation; emitted secondary electrons and the like are acquired; averages images acquired from the same region to acquire a rapid yet high signal-to-noise image; and determines if there are flaws in the circuit pattern from the acquired image. The acquisition of images in a direction vertical to the direction of movement of the stage during movement with spaces between them, instead of adjacent regions, allows efficient monitoring of the frequency and characteristic likelihood of flaws in the ROI only or in the entire circuit pattern.

Description

回路パターン検査装置およびその検査方法Circuit pattern inspection apparatus and inspection method thereof
　本発明は半導体デバイスの半導体基板や液晶ディスプレイの偏向アレイ基板など、回路パターンが形成された基板を検査試料として、当該基板を荷電粒子線を利用して検査する荷電粒子線装置およびその検査方法に関する。本明細書では、半導体ウェーハの検査に限定して説明するが、半導体装置，液晶基板など他の回路パターンが形成された基板にも同様に適用できることは言うまでもない。 The present invention relates to a charged particle beam apparatus and an inspection method for inspecting a substrate on which a circuit pattern is formed, such as a semiconductor substrate of a semiconductor device or a deflection array substrate of a liquid crystal display, using a charged particle beam as an inspection sample. . In this specification, the description is limited to the inspection of a semiconductor wafer, but it goes without saying that the present invention can be similarly applied to a substrate on which another circuit pattern is formed, such as a semiconductor device or a liquid crystal substrate.
　従来の電子線式パターン検査装置の一例は特開平５－２５８７０３号公報に記述されている。電子線式検査装置は検査対象のウェーハに電子線を照射し、発生する二次電子を検出し、ステージ移動に同期して、電子線をスキャンすることで、ウェーハ上の回路パターンの二次電子画像を得、検出した画像を同一のパターンである筈の参照画像と比較し、差が大きい場所を欠陥として判定する。検出した欠陥のウェーハ上の分布を統計的に解析する、又は検出した欠陥の形状，特性を詳細に解析することにより、その欠陥が発生したウェーハの製造時の問題点を分析するものである。 An example of a conventional electron beam type pattern inspection apparatus is described in Japanese Patent Laid-Open No. 5-258703. The electron beam inspection system irradiates the wafer to be inspected with an electron beam, detects the secondary electrons generated, and scans the electron beam in synchronization with the stage movement, thereby secondary electrons of the circuit pattern on the wafer. An image is obtained, and the detected image is compared with an eyelid reference image having the same pattern, and a place having a large difference is determined as a defect. By analyzing the distribution of detected defects on the wafer statistically or by analyzing the shape and characteristics of the detected defects in detail, problems at the time of manufacturing the wafer in which the defect has occurred are analyzed.
　このような電子線式パターン検査装置において、試料を処理する速度、即ち検査速度の向上、及び欠陥検出感度の向上は共に重要な課題であるが、検査の高速化と高感度化は一般的には相反する課題である。これらの課題を克服するため、複数の手法が提案されている。例えば、画像処理を工夫する手法，画像検出の並列度を上げる手法，ウェーハ上のサンプリング方法を工夫する方法である。 In such an electron beam pattern inspection apparatus, speed of processing a sample, that is, improvement of inspection speed and improvement of defect detection sensitivity are both important issues. Is a conflicting issue. Several approaches have been proposed to overcome these challenges. For example, there are a method for devising image processing, a method for increasing the parallelism of image detection, and a method for devising a sampling method on a wafer.
　画像処理を工夫する手法としては、例えば非特許文献１に記載のように、画像検出速度が画像のＳ／Ｎで決定される点に着目し、見かけ上のＳ／Ｎを向上させることで高速な検査を実現する手法がある。 As a technique for devising image processing, for example, as described in Non-Patent Document 1, focusing on the point that the image detection speed is determined by the S / N of the image, and improving the apparent S / N, high speed There is a technique to realize a simple inspection.
　また並列度を上げる手法としては、ビームの本数を複数にしたマルチビーム型の荷電粒子線応用装置が提案されている。例えば特許文献２には、単一の電子銃から放出される電子線を複数のビームに分割し、アレイ状に並べられたレンズにより個々に集束させることによって形成した複数のビームを、単一の光学素子を用いて試料上に照射，走査するマルチビーム型の電子線検査装置が開示されている。 Also, as a method for increasing the degree of parallelism, a multi-beam type charged particle beam application device with a plurality of beams has been proposed. For example, Patent Document 2 discloses that a plurality of beams formed by dividing an electron beam emitted from a single electron gun into a plurality of beams and individually focusing them by lenses arranged in an array form a single beam. A multi-beam type electron beam inspection apparatus that irradiates and scans a sample using an optical element is disclosed.
　ウェーハ上のサンプリングを工夫する手法としては、非特許文献２には、ステージ移動座標をサンプリングすることにより、必要な欠陥分布の情報を低いサンプリング率で取得することが記載されている。 As a technique for devising sampling on a wafer, Non-Patent Document 2 describes that necessary defect distribution information is acquired at a low sampling rate by sampling stage movement coordinates.
特開平５－２５８７０３号公報JP-A-5-258703 特開２００７－３１７４６７号公報JP 2007-317467 A
　しかし、上記従来技術よりも高感度で、しかもＲＯＩ（Region of Interest）の欠陥発生頻度や回路パターンの特性尤度といった、従来よりも効率的な欠陥モニタリングの実現が求められている。ここで、ＲＯＩとは、ユーザが興味のある検査領域のみの検査を行う概念であり、検査速度を高速化するための手法の一つである。そこで本発明は、従来よりも高速でかつ効率的な外観検査手法を実現することを目的とする。なお、上記複数の課題のうち、高感度な検査のみ，高速な検査のみ，ＲＯＩの検査のみ，効率的モニタリングのみ、又はこれらのうち複数の項目の複合的な解決であっても意義を失うことは無い。 However, it is required to realize defect monitoring that is more sensitive than the above-described conventional technique and that is more efficient than conventional techniques, such as the defect occurrence frequency of ROI (Region Interest) and the characteristic likelihood of circuit patterns. Here, the ROI is a concept for inspecting only the inspection region in which the user is interested, and is one of techniques for increasing the inspection speed. Therefore, an object of the present invention is to realize an appearance inspection method that is faster and more efficient than the conventional art. Of the above-mentioned problems, only high-sensitivity inspection, only high-speed inspection, only ROI inspection, only efficient monitoring, or multiple solutions of these items lose significance. There is no.
　本発明の上記課題を解決する手段を図１を用いて説明する。図１は検査領域を説明した図で、ステージ移動に伴い、チャンネル１０１ａ～１０１ｄのチャンネル幅Ｗcを分担して、走査領域Ａ１０２ａと走査領域Ｂ１０２ｂのＮ（Ｎ＝２）箇所をマルチビームで走査し、並列で画像を取得する。走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂの画像取得に先立ち、事前照射領域１０３に電子線を照射する。これにより、１０１ａ～１０１ｄのチャンネル幅Ｗcとチャンネル数を乗じたスワス幅１０４Ｗの画像取得ができる。また、ステージ走査方向の検査ピッチ１０５（Ｐライン）に対して、画像取得幅１０６（Ｌライン）の画像を取得，検査をする。Ｐ寸法ステージが進んだときには１０２ａで画像取得した同一の領域を１０２ｂで画像取得するので、これ等Ｎ枚（Ｎ＝２）の画像を加算平均する。１本のビームで全面を走査する従来方法と比べると、本画像取得方法によれば、（Ｐ／Ｌ）×（Ｗ／Ｗc）×Ｎの高速化を見込むことができる。高速に取得した画像を処理することで、欠陥を検出、欠陥分布を得ることができる。ここで、Ｐ／Ｌはステージ移動方向の検査サンプリング率、Ｗ／Ｗcはマルチビームによる並列度向上率、Ｎは加算平均によるＳ／Ｎ向上率（Ｓ／Ｎが向上した割合に応じて画像検出クロックを高速化できる）である。Ｐ寸法中のＬ寸法の選択は単純な一定ピッチのサンプリングにすることもできる、又は欠陥発生割合の高いＲＯＩ領域を選択することでもできる。 Means for solving the above problems of the present invention will be described with reference to FIG. Figure 1 is a diagram for explaining the inspection area, with the stage movement, by sharing the channel width W c of the channel 101a ~ 101d, scanning N (N = 2) area between the scanning area A102a scanning area B102b multibeam And acquire images in parallel. Prior to image acquisition of the scanning area A 102a and the scanning area B 102b, the pre-irradiation area 103 is irradiated with an electron beam. This enables the image acquisition swath width 104W multiplied by 101a ~ 101d the number of channels and the channel width W c of. Further, an image having an image acquisition width 106 (L line) is acquired and inspected with respect to the inspection pitch 105 (P line) in the stage scanning direction. When the P dimension stage has advanced, the same area acquired in 102a is acquired in 102b, so these N images (N = 2) are added and averaged. Compared with the conventional method of scanning the entire surface with one beam, according to this image acquisition method, it is possible to expect a high speed of (P / L) × (W / W c ) × N. By processing an image acquired at high speed, defects can be detected and a defect distribution can be obtained. Here, P / L is the inspection sampling rate in the stage moving direction, W / W c is the parallelism improvement rate by multi-beams, N is the S / N improvement rate by addition averaging (an image according to the rate of improvement of S / N) The detection clock can be speeded up). The selection of the L dimension in the P dimension may be simple sampling at a constant pitch, or an ROI region having a high defect generation rate may be selected.
　検査サンプリング率を１０、並列度を１０、加算平均を２とすれば、２００倍高速な速度で欠陥分布を得ることができる。 If the inspection sampling rate is 10, the parallelism is 10, and the addition average is 2, the defect distribution can be obtained at a speed 200 times faster.
　また、検査対象により効果は一定ではないが、検査に先立ち電子線を照射することで回路パターンを帯電させ、欠陥検出を高感度化できる。 In addition, although the effect is not constant depending on the inspection object, it is possible to charge the circuit pattern by irradiating the electron beam prior to the inspection and to increase the sensitivity of defect detection.
　また、「発明が解決しようとする課題」で説明したステージ移動座標サンプリング（１０程度）と組み合わせることで更なる高速な欠陥分布取得が期待できる。 Further, by combining with stage movement coordinate sampling (about 10) described in “Problems to be Solved by the Invention”, it is possible to expect further high-speed defect distribution acquisition.
　また、「発明が解決しようとする課題」で説明した画像処理によるＳ／Ｎ向上手法と組み合わせることで２倍の高速化が期待できる。 In addition, by combining with the S / N improvement technique based on image processing described in “Problems to be Solved by the Invention”, a double speed can be expected.
　また、ここで述べた解決手段の部分的な項目の適用であっても、十分に効果があり、本発明の趣旨を逸脱するものではない。 Moreover, even application of partial items of the solution means described here is sufficiently effective and does not depart from the spirit of the present invention.
　これらにより、飛躍的に高速に高感度にＲＯＩ領域の欠陥発生頻度や特性尤度の効率的なモニタリングを実現することができる。 Thus, efficient monitoring of the defect occurrence frequency and characteristic likelihood in the ROI region can be realized at high speed and high sensitivity.
　本発明によれば、高感度にＲＯＩ領域の欠陥発生頻度や特性尤度の効率的なモニタリングをする検査装置およびその検査方法を提供できる。 According to the present invention, it is possible to provide an inspection apparatus and an inspection method for efficiently monitoring the defect occurrence frequency and characteristic likelihood in the ROI region with high sensitivity.
課題を解決するための手段を説明する検査領域の説明図。Explanatory drawing of the test | inspection area | region explaining the means for solving a problem. 本発明に係る第１の実施例の全体構成図。1 is an overall configuration diagram of a first embodiment according to the present invention. 本発明に係る第１の実施例のマルチビーム配置の説明図。Explanatory drawing of the multi-beam arrangement | positioning of 1st Example which concerns on this invention. 本発明に係る第１の実施例の間引き検査方法の説明図。Explanatory drawing of the thinning-out test | inspection method of 1st Example which concerns on this invention. 本発明に係る第１の実施例の加算平均の説明図。Explanatory drawing of the addition average of 1st Example which concerns on this invention. 本発明に係る第１の実施例のＲＩＡによる欠陥判定方法の説明図。Explanatory drawing of the defect determination method by RIA of 1st Example which concerns on this invention. 本発明に係る第１の実施例のＧＰ比較法による欠陥判定方法の説明図。Explanatory drawing of the defect determination method by the GP comparison method of 1st Example which concerns on this invention. 本発明に係る第２の実施例の検査領域の説明図。Explanatory drawing of the test | inspection area | region of the 2nd Example which concerns on this invention. 本発明に係る第３の実施例のマルチビーム配置の説明図。Explanatory drawing of the multi-beam arrangement | positioning of 3rd Example based on this invention. 本発明に係る第４の実施例の検査領域の説明図。Explanatory drawing of the test | inspection area | region of the 4th Example which concerns on this invention. 本発明に係る第４の実施例の全体構成図。The whole block diagram of the 4th Example concerning the present invention. 本発明に係る第５の実施例の全体構成図。The whole block diagram of the 5th Example which concerns on this invention. 本発明に係る第５の実施例のマルチビーム配置の説明図。Explanatory drawing of the multi-beam arrangement | positioning of 5th Example based on this invention.
（実施例１）
　以下、本発明による検査方法、及び検査装置の第１の実施例について、図面を参照しながら詳細に説明する。第１の実施例に係わる回路パターン検査装置の全体構成を図２に示す。即ち、電子銃２０１は、仕事関数の低い物質よりなる陰極２０２，陰極２０２に対して高い電位を持つ陽極２０３，陰極と陽極の間に形成される加速電界に磁場を重畳する電磁レンズ２０４からなる。本実施例では、大きな電流が得やすく電子放出も安定したショットキー型の陰極を用いた。電子銃２０１から一次電子ビーム２０５が引出される下流方向には、図２に示すように、コリメーターレンズ２０６，同一基板に複数の開口を配列したアパーチャアレイ２０７，複数の開口を有するレンズアレイ２０８，ビームセパレーター２０９，対物レンズ２１０，走査偏向用偏向器２１１，ステージ２１２，二次電子検出器２１３ａ～２１３ｄ等を配置して構成している。さらに、電子光学系には、電流制限用絞り、一次ビームの中心軸（光軸）調整用アライナー，収差補正器等も付加されている（図示せず）。ステージ２１２は上にウェーハ２１４を載置して移動する。 Example 1
Hereinafter, a first embodiment of an inspection method and an inspection apparatus according to the present invention will be described in detail with reference to the drawings. FIG. 2 shows the entire configuration of the circuit pattern inspection apparatus according to the first embodiment. That is, the electron gun 201 includes a cathode 202 made of a material having a low work function, an anode 203 having a high potential with respect to the cathode 202, and an electromagnetic lens 204 for superimposing a magnetic field on an acceleration electric field formed between the cathode and the anode. . In this embodiment, a Schottky cathode that can easily obtain a large current and has stable electron emission is used. In the downstream direction in which the primary electron beam 205 is extracted from the electron gun 201, as shown in FIG. 2, a collimator lens 206, an aperture array 207 having a plurality of openings arranged on the same substrate, and a lens array 208 having a plurality of openings. , A beam separator 209, an objective lens 210, a scanning deflection deflector 211, a stage 212, secondary electron detectors 213a to 213d, and the like. Further, the current limiting aperture, the primary beam center axis (optical axis) adjustment aligner, an aberration corrector, and the like are added to the electron optical system (not shown). The stage 212 moves with the wafer 214 placed thereon.
　ウェーハ２１４には後述するように負の電位（以下、リターディング電位と称する）を印加する。図示していないが、ウェーハ２１４とステージ２１２の間にはウェーハと導通の取れた状態でウェーハホルダが介在し、このウェーハホルダにリターディング電源２１５を接続してウェーハホルダ、およびウェーハ２１４に所望の電圧を印加する構成としている。 As described later, a negative potential (hereinafter referred to as a retarding potential) is applied to the wafer 214. Although not shown, a wafer holder is interposed between the wafer 214 and the stage 212 in a conductive state with the wafer, and a retarding power source 215 is connected to the wafer holder and the wafer holder and the wafer 214 are connected to a desired one. The voltage is applied.
　ウェーハ２１４から電子銃方向側には、表面電界制御電極２１６を設置している。走査偏向用偏向器２１１には走査信号発生装置２１７，表面電界制御電極２１６には表面電界制御電源２１８を接続している。電子銃２０１，コリメーターレンズ２０６，レンズアレイ２０８，ビームセパレーター２０９，対物レンズ２１０，リターディング電源２１５、及び表面電界制御電源２１８の各部には、光学系制御回路２１９が接続し、さらに光学系制御回路２１９にはシステム制御部２２０を接続している。ステージ２１２にはステージ制御装置２２１が接続し、さらに、二次電子検出器２１３ａ～２１３ｄ，走査偏向用偏向器２１１も同様にシステム制御部２２０に接続している。システム制御部２２０には記憶装置２２２，演算部２２３，欠陥判定部２２４が配置され、コンソール装置２２５が接続されている。また、図示していないが、制御系，回路系以外の構成要素は真空容器内に配置しており、真空排気して動作させている。また、複数枚のウェーハ２１４を搬送するカセット又はフープをハンドリングする機構、及び真空外からウェーハをステージ上に配置するウェーハ搬送系が具備されている。ステージ上には電子光学条件の調整や調整状態の測定に用いる基準マーク２２６を備えている。 A surface electric field control electrode 216 is provided on the electron gun direction side from the wafer 214. A scanning signal generator 217 is connected to the deflector 211 for scanning deflection, and a surface electric field control power source 218 is connected to the surface electric field control electrode 216. An optical system control circuit 219 is connected to each part of the electron gun 201, the collimator lens 206, the lens array 208, the beam separator 209, the objective lens 210, the retarding power supply 215, and the surface electric field control power supply 218, and further controls the optical system. A system control unit 220 is connected to the circuit 219. A stage controller 221 is connected to the stage 212, and secondary electron detectors 213 a to 213 d and a scanning deflection deflector 211 are similarly connected to the system controller 220. The system control unit 220 includes a storage device 222, a calculation unit 223, and a defect determination unit 224, and a console device 225 is connected to the system control unit 220. Although not shown, components other than the control system and circuit system are arranged in a vacuum vessel and are operated by evacuation. Further, a mechanism for handling a cassette or a hoop for transporting a plurality of wafers 214 and a wafer transport system for placing the wafers on the stage from outside the vacuum are provided. On the stage, a reference mark 226 used for adjusting the electro-optical condition and measuring the adjustment state is provided.
　次に、装置を使用したウェーハパターン検査について説明する。 Next, wafer pattern inspection using the apparatus will be described.
　電子源２０２から放出された一次ビーム２０５は、電磁レンズ２０４による集束作用を受けながら陽極２０５の方向に加速され、第一の電子源像２２７（ビーム径が極小になる点）を形成する。図示しないが、一般的な電子銃によく見られるように電子銃２０１には絞りを配置しており、所望の電流範囲の電子ビームが絞りを通過するように構成している。陽極２０３，電磁レンズ２０４の動作条件を変えれば、絞りを通過する一次ビームの電流量を所望の電流量に調節することが可能となっている。また、図示しないが電子銃２０２とコリメーターレンズ２０６の間には一次電子ビームの光軸を補正するアライナーが配置され、電子ビームの中心軸が絞りや電子光学系に対してずれている場合に補正できる構成となっている。第一の電子源像２２７を光源としてコリメーターレンズ２０６は一次ビームを略平行に整える。本実施形態においてコリメーターレンズ２０６は電磁レンズである。本実施例においてアパーチャアレイ２０７は１２個の開口を有し、一次ビームは１２本に分割される。 The primary beam 205 emitted from the electron source 202 is accelerated in the direction of the anode 205 while receiving the focusing action by the electromagnetic lens 204 to form a first electron source image 227 (a point at which the beam diameter is minimized). Although not shown, a diaphragm is arranged in the electron gun 201 as often seen in a general electron gun so that an electron beam in a desired current range passes through the diaphragm. If the operating conditions of the anode 203 and the electromagnetic lens 204 are changed, the current amount of the primary beam passing through the stop can be adjusted to a desired current amount. Although not shown, an aligner for correcting the optical axis of the primary electron beam is arranged between the electron gun 202 and the collimator lens 206, and the center axis of the electron beam is deviated from the diaphragm or the electron optical system. The configuration can be corrected. Using the first electron source image 227 as a light source, the collimator lens 206 arranges the primary beam substantially in parallel. In this embodiment, the collimator lens 206 is an electromagnetic lens. In this embodiment, the aperture array 207 has twelve apertures, and the primary beam is divided into twelve.
　図２においては、このうち３本のビームが図示されている。分割された一次ビームはレンズアレイ２０８によって個別に集束され、複数の第二の電子源像２２８ａ，２２８ｂ，２２８ｃが形成される。レンズアレイ２０８は、それぞれ複数の開口を有する３枚の電極からなり、このうち中央の電極に電圧を印加することにより、開口部を通過する一次ビームに対してアインツェルレンズとして作用するものである。 In FIG. 2, three of these beams are shown. The divided primary beams are individually focused by the lens array 208, and a plurality of second electron source images 228a, 228b, and 228c are formed. The lens array 208 is composed of three electrodes each having a plurality of apertures, and acts as an Einzel lens for the primary beam passing through the apertures by applying a voltage to the central electrode among them. .
　レンズアレイ２０８により個別に集束された一次ビーム２０５はビームセパレーター２０９内を通過する。ビームセパレーター２０９は、一次ビーム２０５と二次ビーム２２９を分離する目的で使用され、本実施形態においては、一次ビームの入射方向に対して概略垂直な面内に互いに直交する磁場と電場を発生させ、通過する電子に対してそのエネルギーに対応した偏向角度を与えるウィーンフィルターを採用した。本実施形態においては、一次ビームが直進するように磁場と電場の強さを設定し、さらに、反対方向から入射する二次電子ビームに対しては所望の角度に偏向するように電磁場の強さを調節・制御する。また、ビームセパレーター２０９の位置については、一次ビームに対する収差の影響を考慮して、影響を低減するために一次ビームの第二の電子源像２２８ａ，２２８ｂ，２２８ｃの高さに合わせて配置している。対物レンズ２１０は電磁レンズであり、第二の電子源像２２８ａ，２２８ｂ，２２８ｃを縮小投影する。 The primary beams 205 individually focused by the lens array 208 pass through the beam separator 209. The beam separator 209 is used for the purpose of separating the primary beam 205 and the secondary beam 229, and in this embodiment, generates a magnetic field and an electric field orthogonal to each other in a plane substantially perpendicular to the incident direction of the primary beam. The Wien filter is used to give the deflection angle corresponding to the energy of the passing electrons. In this embodiment, the strength of the magnetic field and electric field is set so that the primary beam goes straight, and the strength of the electromagnetic field is deflected to a desired angle with respect to the secondary electron beam incident from the opposite direction. Adjust and control. Further, the position of the beam separator 209 is arranged according to the height of the second electron source images 228a, 228b, and 228c of the primary beam in order to reduce the influence in consideration of the influence of the aberration on the primary beam. Yes. The objective lens 210 is an electromagnetic lens and projects the second electron source images 228a, 228b, and 228c in a reduced scale.
　走査偏向用の偏向器２１１は、対物レンズ中に静電８極型で構成，設置されている。走査信号発生装置２１７により偏向器２１１に信号が入力されると、中を通過する１２本の一次ビームは、略同一方向に且つ略同一角度だけ偏向作用を受け、試料であるウェーハ２１４をラスタ走査する。このとき、一次ビーム２０５のウェーハ２１４上での配置は既に図１で示した走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂ，事前照射領域１０３のチャンネル幅Ｗc１０１ａ～チャンネル幅Ｗc１０１ｄの各部を走査するようになっている。 The deflector 211 for scanning deflection is constructed and installed in an electrostatic 8-pole type in the objective lens. When a signal is input to the deflector 211 by the scanning signal generator 217, the 12 primary beams passing therethrough are deflected in substantially the same direction and at substantially the same angle, and the sample wafer 214 is raster scanned. To do. At this time, the primary beam 205 is arranged on the wafer 214 so as to scan each part of the channel width W c 101a to the channel width W c 101d of the scanning area A 102a, the scanning area B 102b, and the pre-irradiation area 103 already shown in FIG. It has become.
　ウェーハ２１４にはリターディング電源２１５により負の電位が印加されており、一次ビームを減速させる電界が形成される。リターディング電源２１５、および表面電界制御電源２１８は他の光学素子、即ち、電子銃２０１，コリメーターレンズ２０６，レンズアレイ２０８，ビームセパレーター２０９，対物レンズ２１０と同様に、光学系制御回路２１９を介してシステム制御部２２０により統一的に制御される。ステージ２１２はステージ制御装置２２１により制御される。システム制御部２２０はウェーハ２１４上の所定の領域を、ステージ進行方向に並んだ１ストライプずつ検査すべく、走査信号発生装置２１７およびステージ制御装置２２１は統一的に制御される。なお、本実施例の検査装置では、検査実行時にはステージが連続に移動していて、走査による偏向とステージ移動の組み合わせにより、一次ビームが帯状の領域を順次走査するように制御される。この帯状領域は所定の検査領域を分割したものであり、複数の帯状領域を走査することによって所定の検査領域全体が走査される。 A negative potential is applied to the wafer 214 by the retarding power source 215, and an electric field for decelerating the primary beam is formed. The retarding power source 215 and the surface electric field control power source 218 are connected to the other optical elements, that is, the electron gun 201, the collimator lens 206, the lens array 208, the beam separator 209, and the objective lens 210 via the optical system control circuit 219. The system controller 220 controls the system uniformly. The stage 212 is controlled by the stage controller 221. The scanning signal generator 217 and the stage controller 221 are uniformly controlled so that the system controller 220 inspects a predetermined area on the wafer 214 for each stripe arranged in the stage moving direction. In the inspection apparatus of the present embodiment, the stage is continuously moved at the time of execution of the inspection, and the primary beam is controlled to sequentially scan the band-like region by a combination of deflection by scanning and stage movement. This band-like area is obtained by dividing a predetermined inspection area, and the entire predetermined inspection area is scanned by scanning a plurality of band-like areas.
　ウェーハ２１４の表面に到達した１２本の一次ビームは、試料表面付近の物質と相互に作用する。これにより、反射電子，二次電子，オージェ電子等の二次的な電子が試料から発生し、１２個の二次ビーム２２９ａ，２２９ｂ，２２９ｃとなる。図では３本分のみを破線で示している。 The 12 primary beams that have reached the surface of the wafer 214 interact with substances near the sample surface. As a result, secondary electrons such as reflected electrons, secondary electrons, and Auger electrons are generated from the sample and become twelve secondary beams 229a, 229b, and 229c. In the figure, only three lines are indicated by broken lines.
　表面電界制御電極２１６は、ウェーハ２１４の表面付近の電界強度を調整し、二次ビーム２２９の軌道を制御するための電極である。ウェーハ２１４に対向して設置され、ウェーハ２１４に対して正電位または負電位または同電位が表面電界制御電源２１８により印加される。表面電界制御電源２１８により表面電界制御電極２１６に印加される電圧は、ウェーハ２１４の種類や観察対象に応じて適した値に調整する。例えば、発生した二次ビーム２２９ａ，２２９ｂ，２２９ｃを積極的にウェーハ２１４の表面に戻したい場合には、表面電界制御電源２１８には負電圧を印加する。逆に、二次ビーム２２９ａ，２２９ｂ，２２９ｃがウェーハ２１４の表面に戻らないよう、表面電界制御電源２１８には正電圧を印加することもできる。 The surface electric field control electrode 216 is an electrode for adjusting the electric field strength near the surface of the wafer 214 and controlling the trajectory of the secondary beam 229. It is installed facing the wafer 214, and a positive potential, a negative potential, or the same potential is applied to the wafer 214 by the surface electric field control power source 218. The voltage applied to the surface electric field control electrode 216 by the surface electric field control power source 218 is adjusted to a value suitable for the type of the wafer 214 and the observation target. For example, when the generated secondary beams 229a, 229b, and 229c are to be actively returned to the surface of the wafer 214, a negative voltage is applied to the surface electric field control power source 218. Conversely, a positive voltage can be applied to the surface electric field control power source 218 so that the secondary beams 229a, 229b, and 229c do not return to the surface of the wafer 214.
　表面電界制御電極２１６の通過後、二次ビーム２２９ａ，２２９ｂ，２２９ｃは、対物レンズ２１０の集束作用を受け、さらに二次ビームに対しては偏向作用を持つビームセパレーター２０９により、一次ビームの軌道と分離されて検出される。本実施例では１２本の一次ビームのうち４本は試料の帯電状態を制御する事前照射に使われるため、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂからの二次ビーム２２９ａ，２２９ｂのみを８個の検出器で検出する。図では走査領域Ａ１０２ａよりの二次ビーム２２９ａに対応する４個の検出器のうち２個の検出器２１３ａ，２１３ｂ、及び走査領域Ｂ１０２ｂよりの二次ビーム２２９ｂに対応する４個の検出器のうち２個の検出器２１３ｃ，２１３ｄのみを図示している。検出器２１３ａ，２１３ｂ，２１３ｃ，２１３ｄで検出された信号は夫々増幅回路２３０ａ，２３０ｂ，２３０ｃ，２３０ｄにより増幅され、Ａ／Ｄ変換器２３１によりデジタル化され、システム制御部２２０内の記憶装置２２２に画像データとして一旦格納される。その後、演算部２２３で画像加算平均動作を行い、欠陥判定部２３４で画像の差分を抽出、欠陥判定条件に基づき欠陥の有無を判定する。判定結果はコンソール装置２２５に表示され、システム制御部２２０内に結果を保存する。以上の手順で、ウェーハ２１４内の検査すべき領域を端から順にパターン検査できる。 After passing through the surface electric field control electrode 216, the secondary beams 229a, 229b and 229c are subjected to the focusing action of the objective lens 210, and further, the secondary beam is deflected by the beam separator 209 having a deflection action. Separated and detected. In this embodiment, four of the twelve primary beams are used for pre-irradiation for controlling the charged state of the sample, so that only the secondary beams 229a and 229b from the scanning region A 102a and the scanning region B 102b are used as eight detectors. Detect with. In the figure, among the four detectors corresponding to the secondary beam 229a from the scanning region A102a, two detectors 213a and 213b, and among the four detectors corresponding to the secondary beam 229b from the scanning region B102b. Only two detectors 213c and 213d are shown. Signals detected by the detectors 213a, 213b, 213c, and 213d are amplified by the amplification circuits 230a, 230b, 230c, and 230d, digitized by the A / D converter 231, and stored in the storage device 222 in the system control unit 220. Once stored as image data. Thereafter, the arithmetic operation unit 223 performs an image addition averaging operation, the defect determination unit 234 extracts an image difference, and determines the presence / absence of a defect based on the defect determination condition. The determination result is displayed on the console device 225, and the result is stored in the system control unit 220. With the above procedure, it is possible to inspect the pattern of the region to be inspected in the wafer 214 in order from the end.
　次に、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂ、及び事前照射領域１０３の設定について図３を用いて説明する。図３（ａ）は電子光学系の関連部分を抜き出した説明図、図３（ｂ）はウェーハ２１４上の検査領域（矢印でビーム走査、黒丸で走査領域、白丸で事前照射領域を示している）、図３（ｃ）はアパーチャアレイ２０７、図３（ｄ）は二次電子検出器２１３の配置（図では黒丸で二次ビーム位置、四角で二次電子検出器２１３の外形寸法）を示している。電子光学系はアパーチャアレイ２０７を対応する静電レンズで構成されたレンズアレイ２０８で複数の第二の陰極像２２８を形成し、対物レンズ２１０でウェーハ２１４上に投影する。ウェーハ２１４から発生する複数の二次ビーム２２９を対物レンズ２１０で第二の陰極像位置に結像させ、対応する二次電子検出器２１３で検出する。従って、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂはアパーチャアレイ２０７とレンズアレイ２０８，二次電子検出器２１３、及びウェーハ２１４上の領域と相似関係にある。また、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂ、及び事前照射領域１０３はアパーチャアレイ２０７とレンズアレイ２０８、及びウェーハ２１４上の領域と相似関係にある。走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂ、及び事前照射領域１０３の領域設定に応じて対物レンズ２１０の倍率を調整する機能により、検査ピッチ１０５を設定する。設定した検査ピッチ１０５に応じて、チャンネル幅Ｗc、及びスワス幅Ｗは自動的に決定される。 Next, setting of the scanning region A 102a, the scanning region B 102b, and the pre-irradiation region 103 will be described with reference to FIG. FIG. 3A is an explanatory diagram in which relevant portions of the electron optical system are extracted. FIG. 3B shows an inspection area on the wafer 214 (an arrow indicates beam scanning, a black circle indicates a scanning area, and a white circle indicates a pre-irradiation area. 3 (c) shows the aperture array 207, and FIG. 3 (d) shows the arrangement of the secondary electron detector 213 (in the figure, the black circle indicates the secondary beam position, and the square indicates the external electron detector 213 dimensions). ing. In the electron optical system, a plurality of second cathode images 228 are formed by the lens array 208 constituted by the corresponding electrostatic lenses in the aperture array 207 and projected onto the wafer 214 by the objective lens 210. A plurality of secondary beams 229 generated from the wafer 214 are imaged at the second cathode image position by the objective lens 210 and detected by the corresponding secondary electron detector 213. Therefore, the scanning area A 102 a and the scanning area B 102 b are similar to the area on the aperture array 207, the lens array 208, the secondary electron detector 213, and the wafer 214. The scanning area A 102 a, the scanning area B 102 b, and the pre-irradiation area 103 are similar to the aperture array 207, the lens array 208, and the area on the wafer 214. The inspection pitch 105 is set by the function of adjusting the magnification of the objective lens 210 in accordance with the region settings of the scanning region A 102a, the scanning region B 102b, and the pre-irradiation region 103. The channel width W c and swath width W are automatically determined according to the set inspection pitch 105.
　次に、画像取得動作について図４を用いて説明する。図４は画像取得時のステージ移動とビーム偏向の説明図で、一般的な手法で取得する場合と、本実施例の高速な手法で画像を取得する場合を対比して説明している。一般的な手法は、ステージ２１２を一定速度Ｖ0（１ラインの画像取得に要する時間でステージ２１２が１ラインの寸法分移動する速度）で駆動し（４０１ａ）、視野寸法Ｍの中心位置に画像取得幅Ｌの端が入った時点で偏向器２１１を走査し、次のラインを検出すべき位置が来た時点で偏向器２１１を走査する以下同様にして、検査ピッチ１０５Ｐ中の画像取得幅１０６Ｌ分のみの画像を取得する。画像取得幅１０６Ｌの終端であっても視野中心（４０１ｂ）で画像を取得することになる。これに対し、高速な手法はステージを一定速度Ｖ（＝Ｖ0×Ｐ／Ｌ倍）で駆動する。視野の端に画像取得幅１０６Ｌの始点が入った時点でビームを走査（４０２ａ）して１本の画像取得が完了すると次のラインの画像を取得し、これを繰り返すことで画像取得幅１０６Ｌの画像を取得するものである。画像取得幅１０６Ｌの終端では始点とは異なる位置（４０２ｂ）で画像を取得することになる。Ｌ寸法がＰ寸法の０.１倍の場合には一般的な手法に比べて１０倍高速に画像取得できる。 Next, the image acquisition operation will be described with reference to FIG. FIG. 4 is an explanatory diagram of stage movement and beam deflection at the time of image acquisition, comparing the case of acquiring with a general method and the case of acquiring an image with the high-speed method of this embodiment. In a general method, the stage 212 is driven at a constant speed V 0 (speed at which the stage 212 moves by the size of one line in the time required to acquire an image of one line) (401a), and an image is displayed at the center position of the visual field dimension M. The deflector 211 is scanned when the end of the acquisition width L enters, and the deflector 211 is scanned when the position where the next line is to be detected. Similarly, the image acquisition width 106L in the inspection pitch 105P is scanned. Get only minutes of images. Even at the end of the image acquisition width 106L, an image is acquired at the center of the visual field (401b). On the other hand, the high-speed method drives the stage at a constant speed V (= V 0 × P / L times). When the start point of the image acquisition width 106L enters the edge of the field of view, the beam is scanned (402a), and when one image acquisition is completed, an image of the next line is acquired. By repeating this, the image acquisition width 106L is acquired. An image is acquired. At the end of the image acquisition width 106L, an image is acquired at a position (402b) different from the start point. When the L dimension is 0.1 times the P dimension, an image can be acquired 10 times faster than a general method.
　次に、演算部２２３の動作について図５を用いて説明する。図５は横軸に時間ｔ、縦軸にＸ座標をとって、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂ、及び事前照射領域１０３を示した図である。特定の座標Ｘ0に着目すると、事前照射領域１０３，走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂの順でビームを照射し、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂより発生する二次ビーム２２９ｂ，２２９ｃを夫々二次電子検出器２１３ａ，２１３ｃ、（及び別のチャンネルは二次電子検出器２１３ｂ，２１３ｄ）で検出している。二次電子検出器２１３ａ，２１３ｃが同一座標を検出する時間は一定の遅延時間５０１を持っている。また、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂの距離は必ずしも画素寸法の整数倍にはなっていないので、線形，スプライン，ｌanczos関数などで内挿補間して、画素以下の寸法を補正して加算平均する。 Next, the operation of the calculation unit 223 will be described with reference to FIG. FIG. 5 is a diagram showing the scanning area A 102 a, the scanning area B 102 b, and the pre-irradiation area 103 with the time t on the horizontal axis and the X coordinate on the vertical axis. Focusing on a specific coordinate X 0 , a beam is irradiated in the order of the pre-irradiation region 103, the scanning region A 102a, and the scanning region B 102b, and secondary beams 229b and 229c generated from the scanning region A 102a and the scanning region B 102b are respectively secondary electrons. Detectors 213a and 213c (and secondary channels are detected by secondary electron detectors 213b and 213d). The time for the secondary electron detectors 213a and 213c to detect the same coordinate has a fixed delay time 501. In addition, since the distance between the scanning area A 102a and the scanning area B 102b is not necessarily an integer multiple of the pixel size, interpolation and interpolation is performed by linear, spline, lanczos function, etc., and the dimension below the pixel is corrected and averaged. .
　次に、欠陥判定部２２４の動作について説明する。欠陥判定は同一であるはずの画像同士を比較する実パターン比較法、繰り返し性を利用して１枚の画像から加算平均画像を生成し、検出画像と加算平均画像を比較するＲＩＡ（Reference Image Averaging）法，予め取得した複数枚の画像からＧＰ（Golden Pattern）を演算，取得画像とＧＰを比較するＧＰ比較法を用いる。実パターン比較法にはダイの画像が同一であることを利用して隣接ダイの画像同士を比較するダイ比較法，メモリセルのパターンが同一であることを利用して隣接セルのパターン同士を比較するセル比較法があるのが良く知られているので説明を省略する。 Next, the operation of the defect determination unit 224 will be described. Defect determination is an actual pattern comparison method that compares images that should be the same, and an addition average image is generated from one image using repeatability, and the detected image is compared with the addition average image RIA (Reference | Image | Averaging ) Method, GP (Golden Pattern) is calculated from a plurality of images acquired in advance, and a GP comparison method is used to compare the acquired image with the GP. The actual pattern comparison method uses the same die image to compare adjacent die images, and uses the same memory cell pattern to compare adjacent cell patterns. Since it is well known that there is a cell comparison method, the description is omitted.
　次に、図６を用いてＲＩＡ法を説明する。ウェーハ２１４にはメモリマット６０１があり、メモリマット６０１のどの領域であるかに応じてＸＹ方向に繰り返しがある場所Ａ（６０２），Ｘ方向のみに繰り返しがある場所Ｂ（６０３），Ｙ方向のみに繰り返しがある場所Ｃ（６０４）、これら以外の繰り返し性のない場所Ｄがあり、夫々ＸＹ方向の繰り返しパターンを加算平均して１個の高ＳＮ画像を生成し、高ＳＮ画像を並べることで正常部のみの高ＳＮ画像である参照画像を作成するＸＹ－ＲＩＡ６０６，Ｙ方向の繰り返しパターンを加算平均して１列の高ＳＮ画像を生成し、高ＳＮ画像を並べることで正常部のみの高ＳＮ画像である参照画像を作成するＹ－ＲＩＡ６０７，Ｘ方向の繰り返しパターンを加算平均して１列の高ＳＮ画像を生成し、高ＳＮ画像を並べることで正常部のみの高ＳＮ画像である参照画像を作成するＸ－ＲＩＡ６０８を選択、いずれかの方法で参照画像を生成，検出画像と生成参照画像を比較する。ＧＰ比較法を図７を用いて説明する。ＧＰ比較は図６に示したメモリマット６０１の角部（Ｄ）のような繰り返し性のない領域６０５の欠陥判定に適用可能である。予め取得した複数枚（ここでは４枚）の画像７０１ａ～７０１ｄを位置合わせして加算平均してＧＰ画像７０２を作成しておく、検出画像７０３をＧＰ画像と位置合わせ、差分検出し、差画像７０４を演算，差分が一定以上の領域と判定するものである。 Next, the RIA method will be described with reference to FIG. The wafer 214 has a memory mat 601. Depending on which area of the memory mat 601, the area A (602) where there is repetition in the XY direction, the place B (603) where there is repetition only in the X direction, only in the Y direction There is a place C (604) where there is repetition, and there is a place D where there is no repeatability other than these, and by adding and averaging the repetition patterns in the XY directions, one high SN image is generated, and the high SN images are arranged. XY-RIA 606 for creating a reference image, which is a high SN image of only the normal part, adds and averages the repeated patterns in the Y direction to generate one row of high SN images, and arranges the high SN images to arrange the high SN image. Y-RIA 607 for creating a reference image that is an SN image, an average of repeating patterns in the X direction to generate one row of a high SN image, and arranging the high SN images in a normal part Select the X-RIA608 to create a reference image is Minodaka SN image, it generates a reference image in any way, to compare the generated reference image and detected image. The GP comparison method will be described with reference to FIG. The GP comparison can be applied to the defect determination of the region 605 having no repeatability such as the corner (D) of the memory mat 601 shown in FIG. A plurality of (in this case, four) images 701a to 701d acquired in advance are aligned and averaged to create a GP image 702. The detected image 703 is aligned with the GP image, a difference is detected, and a difference image is obtained. 704 is calculated, and it is determined that the difference is a certain area or more.
　本実施例によれば、複数のビームを用いて並列に画像を取得し、ステージ移動方向に間引いて画像取得することの相乗効果できわめて高速な画像取得・検査が実現できる。 According to the present embodiment, extremely high-speed image acquisition / inspection can be realized by a synergistic effect of acquiring images in parallel using a plurality of beams and acquiring images by thinning out in the stage moving direction.
　また、本実施例によれば、ステージ走査方向と直行する方向に複数のビームを配置しているのでステージ移動方向に間引いて画像を取得する場合の領域設定が効率的である。 Further, according to the present embodiment, since a plurality of beams are arranged in a direction orthogonal to the stage scanning direction, it is efficient to set an area when thinning out the image in the stage moving direction.
　また、本実施例によれば、メモリマット部の全面を、ＲＩＡ法、又はＧＰ比較法を用いて欠陥判定できるので、参照画像のＳＮが非常に良いので画像検出クロックを高速にしても高い欠陥判定性能を得ることができ、高速な検査が可能である。 In addition, according to this embodiment, since the entire surface of the memory mat portion can be determined using the RIA method or the GP comparison method, the SN of the reference image is very good. Judgment performance can be obtained, and high-speed inspection is possible.
　また、本実施例によれば、事前照射領域に電子線を照射した直後に検査を行うことができ、検査開始端、又は検査領域間の隙間の大きい領域の直後での安定な帯電が実現できる。 Further, according to the present embodiment, the inspection can be performed immediately after the pre-irradiation region is irradiated with the electron beam, and stable charging can be realized immediately after the inspection start end or the region having a large gap between the inspection regions. .
　また、本実施例によれば、対物レンズの倍率を制御することで検査ピッチを制御でき、ステージ走査方向の間引きを効率良く実現できる。 Further, according to the present embodiment, the inspection pitch can be controlled by controlling the magnification of the objective lens, and thinning out in the stage scanning direction can be efficiently realized.
　次に、本発明の第２の実施例について図８を用いて説明する。図８は第１の変形の検査領域を説明した図で、ステージ移動に伴い、１チャンネル１０１ａのみでチャンネル幅Ｗcを、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂをマルチビームで走査し、並列で画像を取得し、走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂで取得した画像を加算平均する。走査領域Ａ１０２ａと走査領域Ｂ１０２ｂの画像取得に先立ち、事前照射領域１０３に電子線を照射する。これにより、１０１ａのチャンネル幅Ｗcと等しいスワス幅１０４Ｗの画像取得ができる。また、ステージ走査方向には全面の画像を取得，検査をする。１本のビームで全面を走査する従来方法に比べて、本画像取得方法によれば、Ｎ（Ｎ＝２）倍の高速化を見込むことができる。また、ステージ移動方向の検査ピッチＰ１０５の設定が不要となる。 Next, a second embodiment of the present invention will be described with reference to FIG. Figure 8 is a diagram for explaining the inspection area of the first variant, with the stage movement, the channel width W c only one channel 101a, the scan area A 102, scans the scanning area B102b multibeam, the image in parallel The images acquired in the scanning area A 102a and the scanning area B 102b are averaged. Prior to image acquisition of the scanning area A 102a and the scanning area B 102b, the pre-irradiation area 103 is irradiated with an electron beam. This enables image acquisition is equal to the channel width W c of 101a swath width 104W. In addition, the entire surface image is acquired and inspected in the stage scanning direction. Compared with the conventional method of scanning the entire surface with one beam, according to the present image acquisition method, it is possible to expect N (N = 2) times faster. Further, it is not necessary to set the inspection pitch P105 in the stage moving direction.
　本実施例によれば、任意に検査ピッチＰ１０５を変更することができ、容易に条件設定ができる。 According to the present embodiment, the inspection pitch P105 can be arbitrarily changed, and conditions can be easily set.
　次に、第３の実施例について図９を用いて説明する。図９（ａ）は電子光学系の関連部分を抜き出した説明図、図９（ｂ）はウェーハ２１４上の検査領域（矢印でビーム走査、黒丸で走査領域、白丸で事前照射領域を示している）、図９（ｃ）はアパーチャアレイ２０７、図９（ｄ）は二次電子検出器２１３の配置（図では黒丸で二次ビーム位置、四角で二次電子検出器２１３の外形寸法）を示している。事前照射領域１０３は画像取得領域の前である必要がある。ステージ移動方向が一方向のみの場合には片側にあればよいが、ステージを両方向に移動させるために、ビームマスク９０１を追加し、ステージ移動方向に応じて事前照射領域２１３の配置を切り替える。勿論、事前照射領域２１３の位置の切り替えはビーム偏向器の追加など任意の手法で切り替えてもかまわない。 Next, a third embodiment will be described with reference to FIG. FIG. 9A is an explanatory diagram in which relevant portions of the electron optical system are extracted, and FIG. 9B shows an inspection area on the wafer 214 (beam scanning with an arrow, scanning area with a black circle, and pre-irradiation area with a white circle). 9 (c) shows the aperture array 207, and FIG. 9 (d) shows the arrangement of the secondary electron detector 213 (in the figure, the black circle indicates the secondary beam position, and the square indicates the secondary electron detector 213 external dimensions). ing. The pre-irradiation area 103 needs to be in front of the image acquisition area. If the stage movement direction is only one direction, it may be on one side, but in order to move the stage in both directions, a beam mask 901 is added, and the arrangement of the pre-irradiation region 213 is switched according to the stage movement direction. Of course, the position of the pre-irradiation region 213 may be switched by an arbitrary method such as addition of a beam deflector.
　本実施例によれば、ステージ移動方向がＵＰ方向であっても、ＤＯＷＮ方向であっても事前照射領域を切り替えるのみで同一条件にて画像取得・検査することができる。 According to the present embodiment, even if the stage moving direction is the UP direction or the DOWN direction, it is possible to acquire and inspect images under the same conditions only by switching the pre-irradiation area.
　次に、第４の実施例について図１０，図１１を用いて説明する。図１０は本実施例の検査領域を説明した図で、ステージ移動に伴い、チャンネル１０１ａ～１０１ｄのチャンネル幅Ｗcを分担して、走査領域Ａ１０２ａをマルチビームで走査し、並列で画像を取得する。走査領域Ａ１０２ａの画像取得に先立ち、事前照射領域１０３に電子線を照射する。これにより、１０１ａ～１０１ｄのチャンネル幅Ｗcとチャンネル数を乗じたスワス幅１０４Ｗの画像取得ができる。また、ステージ走査方向の検査ピッチ１０５（Ｐライン）に対して、画像取得幅１０６（Ｌライン）の画像を取得，検査をする。１本のビームで全面を走査する従来方法に比べて、本画像取得方法によれば、（Ｐ／Ｌ）×（Ｗ／Ｗc）の高速化を見込むことができる。高速に取得した画像を処理することで、欠陥を検出，欠陥分布を得ることができる。ここで、Ｐ／Ｌはステージ移動方向の検査サンプリング率、Ｗ／Ｗcはマルチビームによる並列度向上率である。Ｐ寸法中のＬ寸法の選択は単純な一定ピッチのサンプリングにすることもでき、又は欠陥発生割合の高いＲＯＩ領域を選択することでもできる。図１１は回路パターン検査装置の全体構成である。第１の実施例との差分のみを説明する。図１で示した走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂのうち走査領域Ｂ１０２ｂが不要となるので、対応するアパーチャアレイ２０７とレンズアレイ２０８，二次電子検出器２１３ｃ，二次電子検出器２１３ｄ，増幅回路２３０ｃ，増幅回路２３０ｄが無く、事前照射領域１０３に対応する第二の陰極像２２８ｂの位置を偏向する事前照射位置調整電極１１０１を追加している。これに伴い、画像加算に関する動作が不要となる。また、事前照射位置調整電極１１０１に電圧を印加することで事前照射領域１０３の位置を調整することができる。これにより、ステージ移動方向の検査ピッチＰ１０５変更に伴う対物レンズ２１０の倍率調整は不要となり、事前照射位置調整電極９０１に電圧を印加することによる事前照射領域１０３の位置の調整のみでよい。 Next, a fourth embodiment will be described with reference to FIGS. Figure 10 is a diagram for explaining the inspection area of the present embodiment, as the stage movement, by sharing the channel width W c of the channel 101a ~ 101d, scanning the scanning area A102a multibeam acquires an image in parallel . Prior to the image acquisition of the scanning area A 102a, the pre-irradiation area 103 is irradiated with an electron beam. This enables the image acquisition swath width 104W multiplied by 101a ~ 101d the number of channels and the channel width W c of. Further, an image having an image acquisition width 106 (L line) is acquired and inspected with respect to the inspection pitch 105 (P line) in the stage scanning direction. Compared with the conventional method of scanning the entire surface with one beam, according to this image acquisition method, it is possible to expect a high speed of (P / L) × (W / W c ). By processing images acquired at high speed, defects can be detected and defect distribution can be obtained. Here, P / L is the inspection sampling rate in the stage moving direction, and W / W c is the parallelism improvement rate by the multi-beam. The selection of the L dimension in the P dimension can be a simple sampling with a constant pitch, or an ROI region with a high defect occurrence rate can be selected. FIG. 11 shows the overall configuration of the circuit pattern inspection apparatus. Only differences from the first embodiment will be described. Since the scanning area B102b of the scanning area A102a and the scanning area B102b shown in FIG. 1 is not necessary, the corresponding aperture array 207 and lens array 208, secondary electron detector 213c, secondary electron detector 213d, and amplifier circuit 230c. , An amplifying circuit 230d is not provided, and a pre-irradiation position adjusting electrode 1101 for deflecting the position of the second cathode image 228b corresponding to the pre-irradiation region 103 is added. Along with this, an operation related to image addition becomes unnecessary. Further, the position of the pre-irradiation region 103 can be adjusted by applying a voltage to the pre-irradiation position adjusting electrode 1101. Thereby, the magnification adjustment of the objective lens 210 according to the change of the inspection pitch P105 in the stage moving direction becomes unnecessary, and only the adjustment of the position of the pre-irradiation region 103 by applying a voltage to the pre-irradiation position adjustment electrode 901 is sufficient.
　本実施例と第１の実施例との差分効果は、同一位置の画像の加算平均をしないので任意に検査ピッチＰ１０５を変更することができ、容易に条件設定ができる特徴がある。 The difference effect between the present embodiment and the first embodiment is characterized in that the inspection pitch P105 can be arbitrarily changed because conditions are not added and averaged at the same position, and conditions can be easily set.
　次に、第５の実施例について、図１２、及び図１３を用いて説明する。図１２は本実施例の全体構成図を示したものである。第１の実施例との差分は、アパーチャアレイ２０７とレンズアレイ２０８を切り替えるアパーチャアレイ切替器１２０１を追加し、検出器と増幅器を内蔵した二次電子検出器アレイ１２０２としている点である。走査領域Ａ１０２ａ，走査領域Ｂ１０２ｂ，事前照射領域１０３の位置を調整する場合、アパーチャアレイ切替器１２０１でアパーチャアレイ２０７とレンズアレイ２０８を異なる寸法のものに切り替える。センサ上での二次ビーム位置が変わるので、画像取得に用いる二次電子検出器も切り替える。尚、機械的なアパーチャアレイ切替器１２０１で説明したが、静電シフタなどの印加電圧の変更で等価的に第二の陰極像の位置，数を変更できる手段であれば同様の効果を持つ。 Next, a fifth embodiment will be described with reference to FIGS. FIG. 12 shows an overall configuration diagram of this embodiment. The difference from the first embodiment is that an aperture array switcher 1201 for switching between the aperture array 207 and the lens array 208 is added to form a secondary electron detector array 1202 incorporating a detector and an amplifier. When adjusting the positions of the scanning region A 102a, the scanning region B 102b, and the pre-irradiation region 103, the aperture array switcher 1201 switches the aperture array 207 and the lens array 208 to those having different dimensions. Since the secondary beam position on the sensor changes, the secondary electron detector used for image acquisition is also switched. Although the mechanical aperture array switcher 1201 has been described, any means capable of changing the position and number of the second cathode image equivalently by changing the applied voltage, such as an electrostatic shifter, has the same effect.
　本実施例によると、走査領域Ａ，走査領域Ｂ，事前照射領域の数，位置を自由に変更できるので、異なる種類の検査対象ウェーハ２１４に対して夫々に最適な設定をすることができる特徴がある。 According to the present embodiment, since the number and position of the scanning area A, the scanning area B, and the pre-irradiation area can be freely changed, the optimum setting can be made for each of the different types of inspection target wafers 214. is there.
　以上、本発明により、高感度にＲＯＩ領域の欠陥発生頻度や特性尤度の効率的なモニタリングをする検査装置およびその検査方法を提供することが可能となる。 As described above, according to the present invention, it is possible to provide an inspection apparatus and an inspection method for efficiently monitoring the defect occurrence frequency and characteristic likelihood in the ROI region with high sensitivity.
１０１ａ，１０１ｂ，１０１ｃ，１０１ｄ　チャンネル幅Ｗc
１０２ａ　走査領域Ａ
１０２ｂ　走査領域Ｂ
１０３　事前照射領域
１０４　スワス幅Ｗ
１０５　検査ピッチ（Ｐライン）
１０６　画像取得幅（Ｌライン）
２０１　電子銃
２０２　陰極
２０３　陽極
２０４　電子銃レンズ
２０５　一次ビーム
２０６　コリメーターレンズ
２０７　アパーチャアレイ
２０８　レンズアレイ
２０９　ビームセパレーター
２１０　対物レンズ
２１１　偏向器
２１２　ステージ
２１３ａ，２１３ｂ，２１３ｃ，２１３ｄ　二次電子検出器
２１４　ウェーハ
２１５　リターディング電源
２１６　表面電界制御電極
２１７　走査信号発生装置
２１８　表面電界制御電源
２１９　光学系制御回路
２２０　システム制御部
２２１　ステージ制御装置
２２２　記憶装置
２２３　演算部
２２４　欠陥判定部
２２５　コンソール装置
２２６　基準マーク
２２７　第一の陰極像
２２８ａ，２２８ｂ，２２８ｃ　第二の陰極像
２２９　二次ビーム
２３０ａ，２３０ｂ，２３０ｃ，２３０ｄ　増幅回路
２３１　Ａ／Ｄ変換器
４０１ａ　一般方式での始点画像取得位置
４０１ｂ　一般方式での終点画像取得位置
４０２ａ　高速な手法での始点画像取得位置
４０２ｂ　高速な手法での終点画像取得位置
５０１　遅延時間
６０１　メモリマット部
６０２　ＸＹ方向繰り返し領域
６０３　Ｙ方向繰り返し領域
６０４　Ｘ方向繰り返し領域
６０５　繰り返しのない領域
６０６　ＸＹ－ＲＩＡ
６０７　Ｙ－ＲＩＡ
６０８　Ｘ－ＲＩＡ
７０１ａ～７０１ｄ　複数枚の画像
７０２　ＧＰ画像
７０３　検出画像
７０４　差画像
９０１　ビームマスク
１１０１　事前照射位置調整電極
１２０１　アパーチャアレイ切替器
１２０２　二次電子検出器アレイ 101a, 101b, 101c, 101d Channel width W c
102a Scanning area A
102b Scanning area B
103 Pre-irradiation area 104 Swath width W
105 Inspection pitch (P line)
106 Image acquisition width (L line)
201 electron gun 202 cathode 203 anode 204 electron gun lens 205 primary beam 206 collimator lens 207 aperture array 208 lens array 209 beam separator 210 objective lens 211 deflector 212 stage 213a, 213b, 213c, 213d secondary electron detector 214 wafer 215 Retarding power source 216 Surface electric field control electrode 217 Scanning signal generator 218 Surface electric field control power source 219 Optical system control circuit 220 System control unit 221 Stage control unit 222 Storage unit 223 Calculation unit 224 Defect determination unit 225 Console device 226 Reference mark 227 First Cathode image 228a, 228b, 228c Second cathode image 229 Secondary beam 230a, 230b, 230c, 230d Amplifier circuit 231 A / D converter 401a General Start point image acquisition position 401b General point end point image acquisition position 402a High speed method start point image acquisition position 402b High speed method end point image acquisition position 501 Delay time 601 Memory mat unit 602 XY direction repeat area 603 Y direction Repeat area 604 X-direction repeat area 605 Non-repeated area 606 XY-RIA
607 Y-RIA
608 X-RIA
701a to 701d Multiple images 702 GP image 703 Detection image 704 Difference image 901 Beam mask 1101 Pre-irradiation position adjustment electrode 1201 Aperture array switcher 1202 Secondary electron detector array

Claims (11)

  1. 　複数本の電子線を電子回路に照射する電子線照射系、及び連続移動ステージとその位置をモニタするステージ位置計測手段、及び照射位置を照射すべき位置と計測したステージ位置に基づき制御する偏向系、及びビーム照射により発生する複数箇所の二次電子を分離・並列に検出・ＡＤ変換して移動に沿った複数の部分領域の二次元画像を検出する画像検出系、及び取得した部分領域の二次元部分領域画像の中の設定された領域の画像の欠陥を判定する欠陥判定部、及び判定した欠陥を表示するコンソール画面で構成された回路パターン検査装置。 An electron beam irradiation system for irradiating an electronic circuit with a plurality of electron beams, a stage position measuring means for monitoring the continuously moving stage and its position, and a deflection system for controlling the irradiation position based on the position to be irradiated and the measured stage position And an image detection system for detecting a two-dimensional image of a plurality of partial regions along the movement by separating, detecting and AD converting a plurality of secondary electrons generated by beam irradiation, and two of the acquired partial regions A circuit pattern inspection apparatus including a defect determination unit that determines an image defect in a set region in a three-dimensional partial region image, and a console screen that displays the determined defect.
  2. 　少なくとも同一位置に対して２回以上の異なる電子線を照射する配置とした複数本の電子線を電子回路に照射する電子線照射系、及び連続移動ステージとその位置をモニタするステージ位置計測手段、及び照射位置を照射すべき位置と計測したステージ位置に基づき制御する偏向系、及びビーム照射により発生する複数箇所の二次電子を分離・並列に検出・ＡＤ変換して二次元画像を検出する画像検出系、及び取得した部分領域の二次元部分領域画像の中の設定された領域の画像の欠陥を判定する欠陥判定部、及び判定した欠陥を表示するコンソール画面で構成された回路パターン検査装置。 An electron beam irradiation system for irradiating an electronic circuit with a plurality of electron beams arranged to irradiate at least the same position with two or more different electron beams, and a stage position measuring means for monitoring the continuously moving stage and its position; And a deflection system that controls the irradiation position based on the position to be irradiated and the measured stage position, and an image that detects a two-dimensional image by separating, parallel detecting, and AD-converting multiple secondary electrons generated by beam irradiation A circuit pattern inspection apparatus including a detection system, a defect determination unit that determines a defect in an image of a set region in a two-dimensional partial region image of an acquired partial region, and a console screen that displays the determined defect.
  3. 　請求項１または請求項２に記載の回路パターン検査装置において、
    　前記複数本の電子線照射はステージ移動方向の同一位置に複数配置され、
    　同一位置の画像同士を加算平均することを特徴とする回路パターン検査装置。     In the circuit pattern inspection apparatus according to claim 1 or 2,
    The plurality of electron beam irradiations are arranged at the same position in the stage moving direction,
    A circuit pattern inspection apparatus characterized in that images at the same position are added and averaged.
  4. 　請求項３に記載の加算平均は画素以下のずれ量を補正した上で加算平均することを特徴とする回路パターン検査装置。 4. The circuit pattern inspection apparatus according to claim 3, wherein the addition average is performed after correcting the shift amount below the pixel.
  5. 　請求項３に記載の回路パターン検査装置において、
    　ステージ移動方向に同一位置の画像のうちの選択した画像のみを用いて前記加算平均処理を実行することを特徴とする回路パターン検査装置。     The circuit pattern inspection apparatus according to claim 3,
    A circuit pattern inspection apparatus that performs the averaging process using only selected images among images at the same position in a stage moving direction.
  6. 　請求項３に記載の回路パターン検査装置において、
    　前記複数本の電子線照射をステージ移動方向に応じて切り替えることを特徴とする回路パターン検査装置。     The circuit pattern inspection apparatus according to claim 3,
    A circuit pattern inspection apparatus, wherein the plurality of electron beam irradiations are switched according to a stage moving direction.
  7. 　請求項１または請求項２に記載の回路パターン検査装置において、
    　前記複数本の電子線照射位置がステージ移動方向に垂直な線上に配置されたことを特徴とする回路パターン検査装置。     In the circuit pattern inspection apparatus according to claim 1 or 2,
    A circuit pattern inspection apparatus, wherein the plurality of electron beam irradiation positions are arranged on a line perpendicular to a stage moving direction.
  8. 　位置計測をしながらステージを連続移動させ、ステージ位置と画像検出すべき座標に基づきビームの偏向を制御して複数本の電子線を電子回路に照射し、ビーム照射により発生する複数箇所の二次電子を分離・並列に検出・ＡＤ変換して移動に沿った複数の部分領域の二次元画像を検出し、取得した部分領域の二次元部分領域画像の中の設定された領域の画像の欠陥を判定し、判定した欠陥を表示、又はネットワーク経由で結果をサーバに送信することを特徴とする回路パターン検査方法。 The stage is continuously moved while measuring the position, and the deflection of the beam is controlled based on the stage position and the coordinates to be detected to irradiate the electronic circuit with multiple electron beams. Detecting two-dimensional images of multiple partial areas along the movement by separating and detecting electrons in parallel, AD conversion, and detecting image defects in the set areas in the acquired two-dimensional partial area images A circuit pattern inspection method comprising: determining and displaying the determined defect or transmitting a result to a server via a network.
  9. 　位置計測をしながらステージを連続移動させ、ステージ位置と画像検出すべき座標に基づきビームの偏向を制御して少なくとも同一位置に対して２回以上の異なる電子線を照射する複数本の電子線を電子回路に照射し、ビーム照射により発生する複数箇所の二次電子を分離・並列に検出・ＡＤ変換して同一箇所の画像同士を加算平均することで二次元画像を検出し、取得した部分領域の二次元部分領域画像の中の設定された領域の画像の欠陥を判定し、判定した欠陥を表示、又はネットワーク経由で結果をサーバに送信することを特徴とする回路パターン検査方法。 A plurality of electron beams that irradiate at least the same position at least two different electron beams by continuously moving the stage while measuring the position and controlling the deflection of the beam based on the stage position and the coordinates to be detected. A partial area obtained by detecting a two-dimensional image by irradiating an electronic circuit, separating multiple secondary electrons generated by beam irradiation, detecting and AD converting in parallel, and averaging the images at the same location. A circuit pattern inspection method comprising: determining a defect of an image in a set region in the two-dimensional partial region image of the first and displaying the determined defect or transmitting a result to a server via a network.
  10. 　請求項９に記載の複数の部分領域の面積の合計はステージを移動する領域の５０％以下に間引くことを特徴とする回路パターン検査方法。 10. The circuit pattern inspection method according to claim 9, wherein the total area of the plurality of partial regions is thinned out to 50% or less of the region moving the stage.
  11. 　請求項９、又は請求項１０に記載のステージ連続移動により画像を取得検査をする領域はステージ移動に垂直な方向に隙間を持たせることを特徴とする回路パターン検査方法。 11. A circuit pattern inspection method according to claim 9, wherein a region in which an image is acquired and inspected by continuous stage movement is provided with a gap in a direction perpendicular to the stage movement.
PCT/JP2010/006579 2010-03-05 2010-11-10 Circuit pattern inspection device and inspection method for same WO2011108045A1 (en)

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