WO2011047370A1 - Functional oxide nanostructures - Google Patents

Functional oxide nanostructures Download PDF

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Publication number
WO2011047370A1
WO2011047370A1 PCT/US2010/052997 US2010052997W WO2011047370A1 WO 2011047370 A1 WO2011047370 A1 WO 2011047370A1 US 2010052997 W US2010052997 W US 2010052997W WO 2011047370 A1 WO2011047370 A1 WO 2011047370A1
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nano
substrate
nanostructure
functional oxide
thin film
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PCT/US2010/052997
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French (fr)
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Shriram Ramanathan
Dmitry Ruzmetov
Venkatesh Narayanamurti
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President And Fellows Of Harvard College
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/122—Single quantum well structures
    • H01L29/127—Quantum box structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/22—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds

Definitions

  • Nanostructures refer to structures having at least one lateral dimension between approximately the size of an atom and about 100 nm.
  • the fabrication of nanostructures, also referred to as nanolithography, is an active area of research.
  • Fig. 1 illustrates a schematic flow chart of a method of fabricating V0 2 nanoring structures on semiconductor substrates, in accordance with an embodiment of the present disclosure.
  • Fig. 2 is a plot of the electrical resistance of a V0 2 film, deposited on an A1 2 0 3 substrate in accordance with one embodiment of the present disclosure, that exhibits a metal-insulator transition at about 71 °C.
  • Fig. 3 is an SEM image of an array of V0 2 nanoring structures on a semiconductor substrate.
  • the present disclosure describes methods and systems relating to the fabrication of functional oxide nanostructures on a substrate. Illustrative embodiments are discussed in this disclosure. Other embodiments may be used in addition or instead.
  • Fig. 1 illustrates a schematic flow chart of a method 100 of fabricating nanoring structures on a substrate, in accordance with some embodiments of the present disclosure.
  • thin films of vanadium dioxide (V0 2 ) are synthesized by reactive sputtering on n-doped conductive silicon (Si) and A1 2 0 3 substrates.
  • the sputtering conditions are chosen so that the synthesized films exhibit an extremely sharp MIT (metal-insulator transition).
  • the MIT causes a drop in electrical resistance of about four orders of magnitude at about 71 degrees Celsius.
  • the V0 2 films are covered with platinum (Pt) nano-rings produced by electron beam lithography, Pt and Ti sputtering, and lift-off.
  • the resulting films with nano-ring masks are treated with reactive ion etching, to etch away V0 2 from the areas unprotected by the Pt nano-ring masks.
  • the resulting structures can be analyzed, for example with scanning electron microscopy
  • the method 100 includes an act 110 of synthesizing a thin film of the functional oxide on the substrate by reactive sputtering, and an act 120 of selectively depositing nano-rings on the thin film so that some portions of the thin film are covered with the nano-rings while other portions of the thin film remain uncovered by the nano-rings.
  • the method 100 further includes an act 130 of etching away the functional oxide from the uncovered portions of the thin film.
  • the functional oxide is vanadium dioxide (V0 2 ).
  • V0 2 vanadium dioxide
  • Other functional oxides that can be used to fabricate nanoring structures include, without limitation, multi-ferroic oxides and ferroelectric oxides.
  • the substrate is a semiconductor substrate.
  • semiconductor substrates include without limitation n-doped Si (silicon) substrates.
  • the nano-rings are made of a metallic material, for example platinum (Pt).
  • the functional oxide may be etched away from the uncovered portions by performing reactive ion etching on the nano-ring deposited thin film, in some embodiments of the present disclosure.
  • the reactive ion etching is performed in a CF 2 and Ar environment, with a CF 2 flow rate of about 15 seem, and an Ar flow rate of about 10 seem. In other embodiments, different flow rates of CF 2 and Ar may be used.
  • the time period of the reactive ion etching is chosen to etch away substantially all of the functional oxide from the uncovered portions.
  • the nano-rings are produced using electron beam lithography, platinum (Pt) and titanium (Ti) sputtering, and lift-off. A titanium adhesion layer is sputtered underneath the platinum.
  • Lithography refers to micro fabrication techniques used for semiconductor and other devices, such as integrated circuits and microelectromechanical systems. Lithographic processes typically involve selectively removing parts of a thin film.
  • electron-beam lithography In the case of ultra-small device sizes, for example below about few hundred nanometers, electron-beam lithography is widely used. In electron beam lithography, a beam of electrons is scanned in a patterned fashion across a surface covered with a film of resist. The exposed or non-exposed regions of the resist are then selectively removed.
  • Lithography including without limitation electron beam lithography, is well known in the art and described in a number of textbooks and publications including "Lithography, Introduction to Microelectronic Fabrication,” (by Jaeger, Richard C, 2002), which is incorporated herein by reference in its entirety.
  • the act 1 10 of synthesizing a thin film of the functional oxide on the substrate by reactive sputtering may be performed using the methods and systems disclosed and claimed in the '988 PCT application.
  • the act 110 of synthesizing the thin film of vanadium dioxide may include: heating a substrate to a predetermined temperature, and maintaining the substrate inside a sputtering chamber at the predetermined temperature during a time period; placing a target material in a sputtering gun at a distance from the substrate; and causing an inert gas to flow into the sputtering chamber at a first predetermined flow rate, and a reactive gas to flow into the sputtering chamber.
  • the act 110 may further include applying a voltage within the sputtering chamber so as to cause at least a portion of the inert gas to become a plasma.
  • the act 110 may further include activating the sputtering gun so as to cause the target material to react with the reactive gas and so as to cause a layer to be deposited on the substrate, wherein the layer including a compound of the reactive gas and the target material.
  • the target material is either vanadium dioxide, vanadium oxide, or vanadium.
  • the substrate is either a Si/Si0 2 substrate, or an A1 2 0 3 substrate.
  • Ar is chosen as the inert gas, and 0 2 is chosen as the reactive gas.
  • the sputtering conditions further include: a flow rate of about 92.2 seem for Ar; a flow rate of about 7.8 seem for 0 2 ; a predetermined temperature of about 550 °C; and a time period of about 20 minutes.
  • Fig. 2 is a plot of the electrical resistance of a V0 2 thin film, deposited on an A1 2 0 3 substrate, that exhibits a sharp metal-insulator transition at about 71°C.
  • the V0 2 thin films are synthesized by reactive sputtering on n-doped conductive Si (001) and A1 2 0 3 substrates, in some embodiments of the present disclosure.
  • the synthesis steps include admitting Ar and 0 2 gases into the sputtering chamber, and precisely controlling the flow rates of these gases by mass flow controllers.
  • the substrate temperature during the deposition is around 550°C.
  • a vanadium target is sputtered with a DC gun in an oxygen environment, to create V0 2 on the substrate.
  • the synthesized films of V0 2 exhibit about 4 orders of magnitude drop in electrical resistance, due to a metal-insulator transition (MIT) at approximately 71°C.
  • MIT metal-insulator transition
  • Fig. 3 illustrates an SEM image 300 of V0 2 nanoring structures 310 on a semiconductor substrate 390, in accordance with an embodiment of the present disclosure.
  • the SEM image shows a regular array of nano-ring structures 310 on an n-doped Si substrate 390.
  • the absence of V0 2 granular structure in between the nano-ring structures 310 indicates that VO was completely etched from the uncovered areas in the film. Amorphous debris may result from the etch.
  • Each nano-ring structure 310 in the array shown in Fig. 3 includes a thin film of V0 2 deposited on the semiconductor substrate 390, and a Pt nano-ring that covers the thin film of V0 2 .
  • the Pt nano-ring is produced using electron beam lithography, Pt and Ti sputtering, and lift off, as explained above.
  • the layer of V0 2 has a substantially annular configuration, as a result of etching off of the functional oxide from areas on the thin film uncovered by the Pt nano-ring.
  • the V0 2 thin film exhibits a sharp drop in electrical resistance, of about four orders of magnitude, due to a metal-insulator transition at approximately 71 °C.
  • the V0 2 thin film is synthesized by reactive sputtering, and the sputtering conditions are chosen so as to cause the V0 2 thin film to exhibit such a metal-insulator transition.
  • the high contrast of the nano-ring structures 310 indicates that the tops of the nano-ring structures are still covered with Pt. This allows electrical contacts to be readily made on the tops of the nano-rings.
  • the electrical contacts to the tops of the nano-rings may be made with a conducting AFM (atomic force microscope) tip.
  • remnants of V0 2 granular structure inside the nano-rings indicate that there is V0 2 material under the Pt tops and that the V0 2 is not completely patterned into the rings but forms a type of nano-dot pedestal.
  • the diameter of the nano-ring structures is about 400 nm with about 70 nm wide rims.
  • the V0 2 height is about 100 nm, equal to the initial film thickness.
  • the nano-ring structures can have different dimensions.
  • the conductive substrate provides a bottom contact to the nanoring structures for the purpose of electron transport measurements.
  • the material used to make the nanoring is a functional oxide, including without limitation V0 2 , multi-ferroic oxides, and ferroelectric oxides.
  • a number of oxide semiconductors can be used to make the above-described nano-rings for electronic, magnetic, optical and electro-optic devices.
  • the functional oxide nanostructures described above can be used to fabricate electronic, magnetic, optical and electro-optic devices requiring smart gates for three dimensional devices and also for controlling current flow in nanowire devices.

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Abstract

Functional oxide nanostructures include a thin film of a functional oxide, such as VO2, deposited on a semiconductor substrate, and metallic nanorings that cover the functional oxide thin films. The functional oxide exhibits a metal-insulator transition that causes a drop in resistance of about four orders of magnitude at a predetermined temperature. A method of creating such nanostructures include: synthesizing a thin film of the functional oxide on the substrate by reactive sputtering; selectively depositing nano-rings on the thin film, so that some portions of the thin film are covered with the nano-rings and other portions of the thin film remain uncovered by the nano-rings; and etching away the functional oxide from the uncovered portions of the thin film.

Description

FUNCTIONAL OXIDE NANOSTRUCTURES
[001] CROSS-REFERENCE TO RELATED APPLICATIONS
[002] This application is based upon, and claims the benefit of priority under 35 U.S.C. § 119(e), from U.S. Provisional Patent Application Serial No. 61/252,160 (the "Ί60 provisional application"), filed October 16, 2009, entitled "Vanadium Oxide Thin Films." The contents of the Ί60 provisional application is incorporated herein by reference in its entirety as though fully set forth.
[003] STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH
[004] This invention was made with government support under grant PHI-0601184 awarded by the National Science Foundation. The government has certain rights in the invention.
[005] BACKGROUND
[006] Nanostructures, or nanometer-scale structures, refer to structures having at least one lateral dimension between approximately the size of an atom and about 100 nm. The fabrication of nanostructures, also referred to as nanolithography, is an active area of research.
[007] Recently, thin films of functional oxides (such as vanadium dioxide) have been studied that have very strong phase transition properties. Nanoscale fabrication of such functional oxides has numerous potential applications.
[008] BRIEF DESCRIPTION OF THE DRAWINGS
[009] The drawings disclose illustrative embodiments. They do not set forth all
embodiments. Other embodiments may be used in addition or instead.
[010] Fig. 1 illustrates a schematic flow chart of a method of fabricating V02 nanoring structures on semiconductor substrates, in accordance with an embodiment of the present disclosure.
[011] Fig. 2 is a plot of the electrical resistance of a V02 film, deposited on an A1203 substrate in accordance with one embodiment of the present disclosure, that exhibits a metal-insulator transition at about 71 °C.
[012] Fig. 3 is an SEM image of an array of V02 nanoring structures on a semiconductor substrate.
[013] DESCRIPTION
[014] The present disclosure describes methods and systems relating to the fabrication of functional oxide nanostructures on a substrate. Illustrative embodiments are discussed in this disclosure. Other embodiments may be used in addition or instead.
[015] Fig. 1 illustrates a schematic flow chart of a method 100 of fabricating nanoring structures on a substrate, in accordance with some embodiments of the present disclosure. In overview, thin films of vanadium dioxide (V02) are synthesized by reactive sputtering on n-doped conductive silicon (Si) and A1203 substrates. The sputtering conditions are chosen so that the synthesized films exhibit an extremely sharp MIT (metal-insulator transition). The MIT causes a drop in electrical resistance of about four orders of magnitude at about 71 degrees Celsius. The V02 films are covered with platinum (Pt) nano-rings produced by electron beam lithography, Pt and Ti sputtering, and lift-off. The resulting films with nano-ring masks are treated with reactive ion etching, to etch away V02 from the areas unprotected by the Pt nano-ring masks. The resulting structures can be analyzed, for example with scanning electron microscopy.
[016] The method 100 includes an act 110 of synthesizing a thin film of the functional oxide on the substrate by reactive sputtering, and an act 120 of selectively depositing nano-rings on the thin film so that some portions of the thin film are covered with the nano-rings while other portions of the thin film remain uncovered by the nano-rings. The method 100 further includes an act 130 of etching away the functional oxide from the uncovered portions of the thin film.
[017] In some embodiments of the present disclosure, the functional oxide is vanadium dioxide (V02). Other functional oxides that can be used to fabricate nanoring structures include, without limitation, multi-ferroic oxides and ferroelectric oxides.
[018] In some embodiments of the present disclosure, the substrate is a semiconductor substrate. Examples of semiconductor substrates include without limitation n-doped Si (silicon) substrates.
[019] In some embodiments, the nano-rings are made of a metallic material, for example platinum (Pt).
[020] The functional oxide may be etched away from the uncovered portions by performing reactive ion etching on the nano-ring deposited thin film, in some embodiments of the present disclosure.
[021] In some embodiments, the reactive ion etching is performed in a CF2 and Ar environment, with a CF2 flow rate of about 15 seem, and an Ar flow rate of about 10 seem. In other embodiments, different flow rates of CF2 and Ar may be used. The time period of the reactive ion etching is chosen to etch away substantially all of the functional oxide from the uncovered portions.
[022] In some embodiments, the nano-rings are produced using electron beam lithography, platinum (Pt) and titanium (Ti) sputtering, and lift-off. A titanium adhesion layer is sputtered underneath the platinum.
[023] Lithography refers to micro fabrication techniques used for semiconductor and other devices, such as integrated circuits and microelectromechanical systems. Lithographic processes typically involve selectively removing parts of a thin film.
[024] In the case of ultra-small device sizes, for example below about few hundred nanometers, electron-beam lithography is widely used. In electron beam lithography, a beam of electrons is scanned in a patterned fashion across a surface covered with a film of resist. The exposed or non-exposed regions of the resist are then selectively removed.
[025] Lithography, including without limitation electron beam lithography, is well known in the art and described in a number of textbooks and publications including "Lithography, Introduction to Microelectronic Fabrication," (by Jaeger, Richard C, 2002), which is incorporated herein by reference in its entirety.
[026] The fabrication of vanadium oxide thin films having exceptional MIT (metal insulator transition) properties is described in a PCT application filed on April 28, 2009, PCT/US09/41988 (the "'988 PCT application"). This reference is incorporated by reference in its entirety.
[027] In some embodiments, the act 1 10 of synthesizing a thin film of the functional oxide on the substrate by reactive sputtering may be performed using the methods and systems disclosed and claimed in the '988 PCT application.
[028] In these embodiments, the act 110 of synthesizing the thin film of vanadium dioxide may include: heating a substrate to a predetermined temperature, and maintaining the substrate inside a sputtering chamber at the predetermined temperature during a time period; placing a target material in a sputtering gun at a distance from the substrate; and causing an inert gas to flow into the sputtering chamber at a first predetermined flow rate, and a reactive gas to flow into the sputtering chamber. The act 110 may further include applying a voltage within the sputtering chamber so as to cause at least a portion of the inert gas to become a plasma. The act 110 may further include activating the sputtering gun so as to cause the target material to react with the reactive gas and so as to cause a layer to be deposited on the substrate, wherein the layer including a compound of the reactive gas and the target material.
[029] In some embodiments, the target material is either vanadium dioxide, vanadium oxide, or vanadium. The substrate is either a Si/Si02 substrate, or an A1203 substrate.
[030] In some embodiments, Ar is chosen as the inert gas, and 02 is chosen as the reactive gas. The sputtering conditions further include: a flow rate of about 92.2 seem for Ar; a flow rate of about 7.8 seem for 02; a predetermined temperature of about 550 °C; and a time period of about 20 minutes.
[031] Fig. 2 is a plot of the electrical resistance of a V02 thin film, deposited on an A1203 substrate, that exhibits a sharp metal-insulator transition at about 71°C. As described previously, the V02 thin films are synthesized by reactive sputtering on n-doped conductive Si (001) and A1203 substrates, in some embodiments of the present disclosure. The synthesis steps include admitting Ar and 02 gases into the sputtering chamber, and precisely controlling the flow rates of these gases by mass flow controllers. In these embodiments, the substrate temperature during the deposition is around 550°C. A vanadium target is sputtered with a DC gun in an oxygen environment, to create V02 on the substrate.
[032] Further details of the fabrication of vanadium oxide thin films having exceptional MIT (metal insulator transition) properties is described in the '988 PCT application.
[033] As seen in Fig. 2, the synthesized films of V02 exhibit about 4 orders of magnitude drop in electrical resistance, due to a metal-insulator transition (MIT) at approximately 71°C.
[034] Fig. 3 illustrates an SEM image 300 of V02 nanoring structures 310 on a semiconductor substrate 390, in accordance with an embodiment of the present disclosure. In particular, the SEM image shows a regular array of nano-ring structures 310 on an n-doped Si substrate 390. The absence of V02 granular structure in between the nano-ring structures 310 indicates that VO was completely etched from the uncovered areas in the film. Amorphous debris may result from the etch.
[035] Each nano-ring structure 310 in the array shown in Fig. 3 includes a thin film of V02 deposited on the semiconductor substrate 390, and a Pt nano-ring that covers the thin film of V02. In some embodiments, the Pt nano-ring is produced using electron beam lithography, Pt and Ti sputtering, and lift off, as explained above. As shown in Fig. 3, the layer of V02 has a substantially annular configuration, as a result of etching off of the functional oxide from areas on the thin film uncovered by the Pt nano-ring.
[036] The V02 thin film exhibits a sharp drop in electrical resistance, of about four orders of magnitude, due to a metal-insulator transition at approximately 71 °C. In some embodiments, the V02 thin film is synthesized by reactive sputtering, and the sputtering conditions are chosen so as to cause the V02 thin film to exhibit such a metal-insulator transition.
[037] The high contrast of the nano-ring structures 310 indicates that the tops of the nano-ring structures are still covered with Pt. This allows electrical contacts to be readily made on the tops of the nano-rings. In some embodiments, the electrical contacts to the tops of the nano-rings may be made with a conducting AFM (atomic force microscope) tip.
[038] In the illustrated embodiment, remnants of V02 granular structure inside the nano-rings indicate that there is V02 material under the Pt tops and that the V02 is not completely patterned into the rings but forms a type of nano-dot pedestal.
[039] In the illustrated embodiment, the diameter of the nano-ring structures is about 400 nm with about 70 nm wide rims. The V02 height is about 100 nm, equal to the initial film thickness. In other embodiments of the present disclosure, the nano-ring structures can have different dimensions.
[040] In some embodiments of the present disclosure, the conductive substrate provides a bottom contact to the nanoring structures for the purpose of electron transport measurements.
[041] In some embodiments, the material used to make the nanoring is a functional oxide, including without limitation V02, multi-ferroic oxides, and ferroelectric oxides. A number of oxide semiconductors can be used to make the above-described nano-rings for electronic, magnetic, optical and electro-optic devices.
[042] The functional oxide nanostructures described above can be used to fabricate electronic, magnetic, optical and electro-optic devices requiring smart gates for three dimensional devices and also for controlling current flow in nanowire devices.
[043] In sum, functional oxide nanostructures have been described, in which ultra-fast phase transitions are utilized for solid state devices and circuits, including electronic, magnetic, optical and electro-optic devices. Many other related embodiments are possible.
[044] The components, steps, features, objects, benefits and advantages that have been discussed are merely illustrative. None of them, nor the discussions relating to them, are intended to limit the scope of protection in any way. Numerous other embodiments are also contemplated, including embodiments that have fewer, additional, and/or different components, steps, features, objects, benefits and advantages. The components and steps may also be arranged and ordered differently.
[045] Nothing that has been stated or illustrated is intended to cause a dedication of any component, step, feature, object, benefit, advantage, or equivalent to the public. While the specification describes particular embodiments of the present disclosure, those of ordinary skill can devise variations of the present disclosure without departing from the inventive concepts disclosed in the disclosure. [046] While certain embodiments have been described of systems and methods relating to phase transition devices and smart capacitor devices, it is to be understood that the concepts implicit in these embodiments may be used in other embodiments as well. In the present disclosure, reference to an element in the singular is not intended to mean "one and only one" unless specifically so stated, but rather "one or more." All structural and functional equivalents to the elements of the various embodiments described throughout this disclosure, known or later come to be known to those of ordinary skill in the art, are expressly incorporated herein by reference.

Claims

What is claimed is:
1. A nanostructure, comprising: a layer of a functional oxide deposited on a semiconductor substrate and having a substantially annular configuration, the functional oxide having a metal -insulator transition property that causes a drop in resistance of about four or more orders of magnitude at a predetermined temperature; and a nano-ring covering the layer of the functional oxide, the nano-ring comprising a metallic material.
2. The nanostructure of claim 1 , wherein the functional oxide comprises one of:
vanadium dioxide; a multi-ferroic oxide; and a ferroelectric oxide.
3. The nanostructure of claim 1 , wherein the metallic material comprises platinum.
4. The nanostructure of claim 3, further comprising a titanium adhesion layer sputtered underneath the platinum.
5. The nanostructure of claim 3, wherein the nano-ring is produced using electron beam lithography, sputtering, and lift-off.
6. The nanostructure of claim 1, wherein the predetermined temperature is about 71 °C.
7. The nanostructure of claim 1 , wherein the layer of the functional oxide has a thickness of about 100 nm, and wherein the nano-ring has a diameter of about 400 nm.
8. The nanostructure of claim 1, further comprising an electrical contact disposed on a surface of the nano-ring.
9. The nanostructure of claim 1, wherein the electrical contact comprises a conducting AFM (atomic force microscope) tip.
10. The nanostructure of claim 1, wherein the layer of the functional oxide is synthesized by reactive sputtering; and wherein the sputtering conditions are chosen so as to cause the layer of the functional oxide to exhibit an MIT transition of about four orders of magnitude at about 71 °C.
11. A method of creating one or more nanostructures of a functional oxide on a substrate, the method comprising: synthesizing a thin film of the functional oxide on the substrate by reactive sputtering; selectively depositing nano-rings on the thin film, so that some portions of the thin film are covered with the nano-rings and other portions of the thin film remain uncovered by the nano-rings; and
etching away the functional oxide from the uncovered portions of the thin film.
12. The method of claim 11, wherein the functional oxide is vanadium dioxide.
13. The method of claim 11 , wherein the act of etching away the functional oxide from the uncovered portions comprises performing reactive ion etching on the nano-ring deposited thin film.
14. The method of claim 11, wherein at least some of the nano-rings comprise a metallic material.
15. The method of claim 11, wherein the metallic material comprises platinum (Pt), and wherein the substrate is a semiconductor substrate.
16. The method of claim 11 , wherein the environment for the reactive ion etching comprises CF2 and Ar, and wherein the time period during which the reactive ion etching is performed is sufficient to etch away substantially all of the functional oxide from the uncovered portions.
17. The method of claim 11, wherein the flow rate of CF2 is about 15 seem, and the flow rate of Ar is about 10 seem.
18. The method of claim 11 , further comprising producing the nano-rings; and wherein the act of producing the nano-rings comprises performing at least one of: electron beam lithography; sputtering of platinum (Pt) and titanium (Ti); and lift-off.
19. The method of claim 11, wherein the act of selectively depositing nano-rings on the thin film comprises:
sputtering a titanium adhesion layer underneath a platinum layer.
20. The method of claim 11 , wherein the act of synthesizing the thin film of vanadium dioxide comprises:
heating a substrate to a predetermined temperature, and maintaining the substrate inside a sputtering chamber at the predetermined temperature during a time period;
placing a target material in a sputtering gun at a distance from the substrate;
causing an inert gas to flow into the sputtering chamber at a first predetermined flow rate, and a reactive gas to flow into the sputtering chamber, the inert gas flowing into the sputtering chamber at a first predetermined flow rate, and the reactive gas flowing into the sputtering chamber at a second predetermined flow rate;
applying a voltage within the sputtering chamber so as to cause at least a portion of the inert gas to become a plasma; and
activating the sputtering gun so as to cause the target material to react with the reactive gas, and so as to cause a layer to be deposited on the substrate, the layer including a compound of the reactive gas and the target material.
21. The method of claim 11 , wherein the target material is one of vanadium dioxide and vanadium; and wherein the substrate comprises one of: a Si/Si02 substrate; and an A1203 substrate.
22. The method of claim 11 , wherein the inert gas is Ar, the reactive gas is 02, the flow rate of Ar is about 92.2 seem, the flow rate of 02 is about 7.8 seem, the predetermined temperature is about 550 °C, and the time period is about 20 minutes.
23. A nanostructure system, comprising:
a semiconductor substrate; and
an array of nanostructures on the substrate, each nanostructure having a substantially annular configuration;
wherein each nanostructure comprises:
a layer of a functional oxide deposited on the substrate , the layer of the functional oxide having a substantially annular configuration; and a nano-ring covering the layer of the functional oxide, the nano-ring comprising a metallic material.
24. The nanostructure system of claim 23, wherein the functional oxide is one of:
vanadium dioxide; a multi-ferroic oxide, and a ferroelectric oxide.
25. The nanostructure system of claim 23, wherein the metallic material comprises platinum.
26. The nanostructure system of claim 23, wherein the layer of the functional oxide has a thickness of about 100 nm; and wherein the nano-ring has a diameter of about 400 nm.
PCT/US2010/052997 2009-10-16 2010-10-18 Functional oxide nanostructures WO2011047370A1 (en)

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* Cited by examiner, † Cited by third party
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US9182526B2 (en) 2011-08-10 2015-11-10 University Of Central Florida Tunable optical diffraction grating apparatus and related methods
US9696488B2 (en) 2014-11-19 2017-07-04 International Business Machines Corporation Semiconductor structure
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CN108646793A (en) * 2018-04-04 2018-10-12 山西大学 A kind of device and method of two-dimensional material three dimensional stress pattern control
CN108646793B (en) * 2018-04-04 2020-12-25 山西大学 Device and method for controlling three-dimensional shape of two-dimensional material

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