WO2011043311A1 - Battery voltage measurement device - Google Patents

Battery voltage measurement device Download PDF

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Publication number
WO2011043311A1
WO2011043311A1 PCT/JP2010/067396 JP2010067396W WO2011043311A1 WO 2011043311 A1 WO2011043311 A1 WO 2011043311A1 JP 2010067396 W JP2010067396 W JP 2010067396W WO 2011043311 A1 WO2011043311 A1 WO 2011043311A1
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Prior art keywords
digital
battery
voltage value
pass filter
microcomputer
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PCT/JP2010/067396
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French (fr)
Japanese (ja)
Inventor
泰道 大貫
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本田技研工業株式会社
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Priority to JP2011535388A priority Critical patent/JPWO2011043311A1/en
Publication of WO2011043311A1 publication Critical patent/WO2011043311A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H01M10/482Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte for several batteries or cells simultaneously or sequentially
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2506Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
    • G01R19/2509Details concerning sampling, digitizing or waveform capturing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/396Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

Definitions

  • the present invention relates to a battery voltage detection device that monitors the voltage of a battery cell in a battery module.
  • a battery cell cell controller includes an integrated circuit (IC: Integrated Circuit) that performs voltage monitoring and capacity equalization for a battery module to which a plurality of lithium ion battery cells are connected.
  • IC integrated circuit
  • the CPU Central Processing Unit
  • the transfer rate is 100 kbps
  • the battery cell is 100 cells
  • the data per battery cell is composed of 10 bits
  • Data length per packet 100 cells
  • x 10 bits 1000 bits
  • the sampling frequency for voltage measurement is 100 Hz.
  • noise in a relatively high frequency band ranging from several kHz to several MHz generated by switching of an inverter is applied to both electrodes of an in-vehicle assembled battery.
  • the motor of the hybrid electric vehicle has an electrical angular frequency of 600 Hz when, for example, a six-pole motor is rotated at 6000 rpm.
  • ripple noise in a relatively low frequency band synchronized with the rotation of the motor is applied from the inverter to both electrodes of the in-vehicle assembled battery.
  • ripple noise of 100 to 120 Hz generated when full-wave rectification of a commercial power source from an external charger is similarly applied.
  • JP 2003-70179 A see FIG. 1, paragraphs 0031, 0032, and 0033
  • JP 2005-318750 A see FIG. 1, paragraphs 0069 and 0070
  • Japanese Patent Laying-Open No. 2005-318751 see FIG. 1, paragraphs 0029 and 0030
  • the filter circuit is generally an RC primary filter composed of a resistor and a capacitor. Therefore, for example, if the gain at 50 Hz is set to 1/100, the RC time constant is 318 msec, which can be constituted by a resistor of 100 k ⁇ and a capacitor of 3.18 ⁇ F.
  • This invention solves the above-mentioned conventional subject, and makes it a subject to provide a battery voltage detection apparatus provided with the low-pass filter which can be highly accurate and cost-reduced by simple structure.
  • the present invention provides a battery voltage detection device for detecting a voltage of the battery cell in an assembled battery in which battery modules made of battery cells are connected in series, the battery voltage value of the battery cell.
  • a / D conversion means for detecting A / D and converting the digital voltage value into a digital voltage value
  • a communication means for transmitting the digital voltage value
  • a first microcomputer for obtaining the digital voltage value via the communication means
  • An analog low-pass filter circuit inserted between the battery cell and the A / D converter, and a digital low-pass filter circuit inserted between the A / D converter and the communication unit
  • the analog low-pass filter circuit has a frequency of 1 ⁇ 2 or more of a first sampling frequency for A / D converting the battery voltage value.
  • the digital low-pass filter circuit has a characteristic that cuts off noise signals, and the digital low-pass filter circuit cuts off noise signals having a frequency equal to or higher than 1 ⁇ 2 of the second sampling frequency obtained by the first microcomputer.
  • the first sampling frequency is higher than the second sampling frequency.
  • the numbers in parentheses are examples.
  • the configuration of the filter is such that the analog low-pass filter circuit in the front stage and the digital low-pass filter circuit in the rear stage can reduce the component constant of the analog low-pass filter circuit. It is possible to provide a battery voltage detection device that realizes cost reduction.
  • the first sampling frequency higher than the second sampling frequency, the inherent noise generated by the electric vehicle is eliminated by an analog low-pass filter circuit, and communication for measuring the voltage of the series battery of the vehicle Frequency components resulting from line speed restrictions can be eliminated by the digital low-pass filter circuit, and each filter circuit can be installed efficiently.
  • the present invention includes a multiplexer between the analog low-pass filter circuit corresponding to each battery cell and one A / D conversion means, and the multiplexer serially inputs battery voltage values input in parallel.
  • the A / D conversion means sequentially outputs the battery voltage value of each battery cell input from the multiplexer to a digital voltage value, and the converted digital voltage value is converted into a plurality of digital low-pass filter circuits. It is characterized by being input to.
  • the present invention by using a multiplexer, the number of expensive A / D converters can be reduced, and the A / D converters can be used efficiently and effectively.
  • the present invention is characterized in that the digital low-pass filter circuit is a second microcomputer that executes a program having the function of the digital low-pass filter circuit.
  • the sampling frequency and the cut-off frequency can be easily changed by changing the program.
  • the communication means is sequentially connected to another adjacent communication means to sequentially transmit the digital voltage value
  • the first microcomputer is connected to a terminal to receive the digital voltage value. It is characterized by doing.
  • the digital voltage value is sequentially transmitted by sequentially connecting to another adjacent communication means, the potential difference between the battery modules to be transmitted can be kept low.
  • the present invention is characterized in that a plurality of the communication means are connected to the first microcomputer, respectively, and the first microcomputer receives the digital voltage value from the plurality of the communication means. .
  • the microcomputer can communicate with each communication interface and obtain the digital voltage value of each battery module at an arbitrary timing.
  • the present invention is also characterized in that a plurality of the communication means and the first microcomputer are connected by a communication bus, and the first microcomputer receives the digital voltage value from the plurality of the communication means.
  • the microcomputer when each battery module transmits a digital voltage value to the communication bus, the microcomputer obtains the digital voltage value of any battery module necessary for itself among the digital voltage values that pass over the communication bus. It becomes possible to do.
  • a battery voltage detection device including a low-pass filter that can be reduced in accuracy and cost with a simple configuration.
  • FIG. 1 is a diagram illustrating a battery voltage detection device according to the first embodiment.
  • the assembled battery 200 is configured by connecting battery modules VM1 to VM4 connected to a plurality of battery cells BC (see FIG. 5) in series.
  • the battery voltage detection apparatus 100 includes an analog LPF (Low Pass Filter) (analog low-pass filter circuit) 10, an A / D converter (A / D converter) 20, a digital LPF (digital low-pass filter circuit) 30, A communication interface (communication means) 40 and a microcomputer 50 (first microcomputer) are provided.
  • LPF Low Pass Filter
  • a / D converter A / D converter
  • a communication interface communication means
  • microcomputer 50 first microcomputer
  • the analog LPF 10 is installed between each battery cell BC in the battery modules VM1 to VM4 and the A / D converter 20, and cuts off a predetermined frequency with respect to the sampling frequency Fs1 of voltage measurement by the A / D converter 20. (See FIG. 2).
  • the A / D converter 20 individually detects the voltage of the battery cell BC in each of the battery modules VM1 to VM4, and converts the detected voltage into a digital voltage value.
  • the digital LPF 30 is installed between the A / D converter 20 and the communication interface 40, and is realized by a dedicated digital circuit.
  • the digital LPF 30 outputs the sampling frequency Fs2 determined from the communication interval of the communication interface 40 from the digital LPF 30.
  • the predetermined frequency in the set voltage value is cut off (see FIG. 2).
  • the communication interface 40 transmits the digital voltage value of each battery cell BC to the microcomputer 50.
  • the communication interface 40 is provided so as to correspond to the battery modules VM1 to VM4. Since the communication interface 40 is sequentially connected to another adjacent communication interface 40 and sequentially transmits the digital voltage value to the microcomputer 50, the potential difference between the battery modules VM1 to VM4 to be transmitted can be kept low.
  • the microcomputer 50 acquires the digital voltage value of each battery cell BC via the communication interface 40.
  • FIG. 2 is a diagram illustrating the concept of filter circuit setting in the first embodiment.
  • the filter circuit is composed of two stages of an analog LPF 10 and a digital LPF 30, and each shares a frequency for blocking a signal.
  • noise signals in a relatively high frequency band such as inverter switching noise generated in an electric vehicle are eliminated by the analog LPF 10 and generated when ripple noise generated due to motor rotation or commercial power supply is full-wave rectified.
  • each filter circuit can be installed efficiently.
  • the analog LPF 10 installed between the battery cell BC and the A / D converter 20 is 1 / of the sampling frequency Fs1 (first sampling frequency) of the A / D converter 20.
  • Block noise signals with two or more frequencies that is, the analog LPF 10 has a characteristic of sufficiently attenuating a signal having a frequency that is 1 ⁇ 2 of the sampling frequency Fs1.
  • the digital LPF 30 added between the A / D converter 20 and the communication interface 40 is a noise signal having a frequency equal to or higher than 1 ⁇ 2 of the sampling frequency Fs2 (second sampling frequency) determined from the communication interval in the communication interface 40.
  • the digital LPF 30 has a characteristic of sufficiently attenuating a signal having a frequency 1 ⁇ 2 of the sampling frequency Fs2 with respect to the sampling frequency Fs2 of the digital voltage value acquired by the microcomputer 50 (see FIG. 1).
  • the frequency Fs1 is higher than the frequency Fs2.
  • the upper limit of the sampling frequency Fs2 is determined by the restriction on the speed of the communication line in measuring the voltage of the series battery of the automobile.
  • the filter By configuring the filter as the analog LPF 10 at the front stage and the digital LPF 30 at the rear stage, the component constant of the analog LPF 10 can be reduced, so that it is possible to provide the battery voltage detection device 100 that realizes high accuracy and low cost. Further, by making the sampling frequency Fs1 higher than the sampling frequency Fs2, the analog low-pass filter circuit eliminates relatively high-frequency band noise generated by the electric vehicle, and the digital low-pass filter removes relatively low-frequency noise. Each filter circuit can be efficiently installed.
  • FIG. 3 is a diagram illustrating a specific example of the filter circuit setting in the first embodiment.
  • the sampling frequency Fs1 of the A / D converter 20 is set to 10 kHz
  • the analog LPF 10 having a gain of 1/100 at 5 kHz which is 1 ⁇ 2 of the sampling frequency Fs1 is, for example, a resistor of 10 k ⁇ and a capacitor of 0.318 ⁇ F.
  • the data is composed of 10 bits per battery cell.
  • the current output value y n is calculated from the current input value x n and the previous output value y n ⁇ 1. It can obtain
  • coefficients c and d are expressed as 16 bits as follows. Note that h in c and d represents hexadecimal (hexadecimal).
  • the y n obtained may be delivered to the communication interface 40 at a frequency of once 100 times.
  • FIG. 4 is a diagram illustrating a detailed operation example of the digital LPF in the first embodiment.
  • a white part shows an integer part and a gray part shows a part below the decimal point.
  • the input value xn is 10 bits wide, and the previous value yn -1 is 26 bits (integer part 10 bits + 16 bits after the decimal point).
  • c and d are each composed of 16 bits after the decimal point.
  • the product x n ⁇ c of x n and c becomes 26Bit.
  • the product y n-1 ⁇ d and y n-1 and d is comprised in 42bit integer portion 10bit and decimal 32bit, lower 16bit truncation, the same 26bit the product x n ⁇ c. If a rounding error is generated by rounding down the lower 16 bits, it may be rounded off without being rounded down.
  • the sum of the determined x n ⁇ c and y n ⁇ 1 ⁇ d is obtained and stored as a new y n in a 26-bit width, and used as the previous value y n ⁇ 1 in the next calculation.
  • y n consists 26bit is, since as the output of the filter need only integer part, a digital LPF30 sends to the communication interface only the upper 10bit of y n as the output. If a rounding error occurs by rounding down the decimal point, it may be rounded off without being rounded down.
  • FIG. 5 is a diagram illustrating an example of use of the A / D converter in the first embodiment.
  • a multiplexer 90 is installed between the analog LPFs 11 to 14 and the A / D converter 20, and a demultiplexer 91 is installed between the A / D converter 20 and the digital LPFs 31 to LPF 34.
  • the multiplexer 90 has four input terminals corresponding to the digital LPFs 31 to 34, and has one output terminal.
  • the demultiplexer 91 has one input terminal and four output terminals.
  • FIG. 6 is a diagram showing a usage mode of an A / D converter when a multiplexer / demultiplexer is used (see FIG. 5 as appropriate).
  • the voltage detection signals of the battery cells BC1 to BC4 are input in parallel to the input terminals CH1 to CH4 of the multiplexer 90 in parallel at the same timing via the analog LPFs 11 to LPF14.
  • the multiplexer 90 converts the voltage detection signals input to the input terminals CH1 to CH4 in series and sequentially inputs them to the A / D converter 20 at predetermined time intervals.
  • the voltage detection signals corresponding to all the input terminals CH1 to CH4 are sequentially input to the A / D converter 20 within the range of the sampling frequency Fs1 of the voltage detection signal by the A / D converter 20. Are output in the order of input.
  • the digital voltage values sequentially converted by the A / D converter 20 are sequentially input to the input terminal of the demultiplexer 91.
  • the demultiplexer 91 converts the digital voltage values sequentially input in series into parallel, outputs them to the output terminals DCH1 to DCH4, and inputs them to the digital LPF31 to LPF34 at the same timing.
  • a digital voltage value in which a predetermined frequency range is cut off in the digital LPF 31 to LPF 34 is input to the communication interface 40 at a predetermined timing.
  • the voltage detection signals at the input terminals CH1 to CH4 in the multiplexer 90 are sequentially input to the A / D converter 20 within the range of the sampling frequency Fs1, converted into a digital voltage value, and output, thereby each battery cell BC1.
  • the same effect as installing the A / D converter 20 for each BC4 can be obtained, and the expensive A / D converter 20 can be used efficiently.
  • FIG. 7 is a diagram showing the configuration of a data stream in the communication interface (see FIG. 5 as appropriate).
  • the detection timing for a stepped battery cell voltage change that occurs at the time of abnormality or the like is delayed as compared with the case where there is no analog LPF by the time constant. That is, a time delay occurs until an abnormality is detected.
  • each battery cell BC1 to BC4 (represented as CH1 to CH4 in FIG. 7) is provided.
  • the input values (without filter) and output values (with filter) of the digital LPF 31 to LPF 34 are sent together to the communication interface 40, and for each battery cell, a voltage value without filter is monitored and a predetermined value indicating an abnormality determination threshold value As shown in FIG. 8, battery abnormality can be detected at an early stage.
  • the digital LPF as shown in FIG. 7B, it can be used as a method of detecting the upper limit voltage and the lower limit voltage of the battery cells BC1 to BC4 in the battery module VM1 as abnormal.
  • the abnormality determination threshold is indicated by sending the maximum value Max (no filter) and the minimum value Min (no filter) of the battery cells BC1 to BC4 in the same battery module VM1 to the communication interface 40 as representative values. Since the magnitude relationship with the predetermined value can be detected, battery abnormality can be detected at an early stage.
  • the digital LPF as shown in FIG. 7C, only the flag indicating the magnitude relationship with the predetermined value indicating the abnormality determination threshold value of the battery cells BC1 to BC4 is transmitted, so that FIG. ) And the increase in data stream length as shown in FIG. 7B can be reduced. That is, for example, the flag is set to 1 if abnormal, and the flag is set to 0 if normal.
  • the filter circuit has a two-stage configuration of the analog LPF 10 and the digital LPF 30, the component constant of the analog LPF 10 can be reduced. It becomes possible.
  • the digital LPF 30 can be easily integrated, the digital LPF 30 can be configured as an integral part of the A / D converter 20 and the communication interface 40, and the cost can be reduced.
  • FIG. 8 is a diagram illustrating a battery voltage detection device according to the second embodiment. The description of the same configuration or function as in the first embodiment will be omitted.
  • the difference between the battery voltage detection device 110 shown in FIG. 8 and the battery voltage detection device 100 in the first embodiment is that the digital LPF 30 in the first embodiment is different from the digital LPF 30 in the second embodiment (second It is a point replaced with a microcomputer 60.
  • the digital LPF 30 in the first embodiment is expressed by arithmetic expressions (Expression 1 and Expression 2), which is realized by a dedicated digital circuit. Therefore, processing by the microcomputer 60 becomes possible by programming this arithmetic expression.
  • the microcomputer 60 includes an MPU (Micro Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory), and the like for executing the program. As described above, since the arithmetic expression can be set as a program and executed by the microcomputer 60, the sampling frequency, the cutoff frequency, and the like can be easily changed.
  • FIG. 9 is a diagram illustrating a battery voltage detection device according to the third embodiment. The description of the same components or functions as those in the first or second embodiment will be omitted.
  • the difference between the battery voltage detection device 120 shown in FIG. 9 and the battery voltage detection device 100 in the second embodiment is that each communication interface 70 corresponding to each of the battery modules VM1 to VM4 is connected to the microcomputer 51. It is a point.
  • Each communication interface 70 has a bidirectional communication line with the microcomputer 51. Therefore, the microcomputer 51 can communicate with the respective communication interfaces 70 and obtain the digital voltage values of the respective battery modules VM1 to VM4 at an arbitrary timing. Since a plurality of communication lines are provided in parallel, it is effectively equivalent to improving the communication speed, and the sampling frequency at which the microcomputer 51 acquires the voltage of each cell can be increased. However, since the number of communication lines in a microcomputer is generally limited, when the number of battery modules to be communicated increases, a circuit for switching communication lines is required, and the actual communication speed is reduced. With the configuration in which the analog LPF and the digital LPF shown in the first or second embodiment are combined, aliasing noise can be suppressed even if the communication speed of the communication interface 70 is reduced.
  • FIG. 10 is a diagram illustrating a battery voltage detection device according to the fourth embodiment. The description of the same configuration or function as in the first, second, or third embodiment will be omitted.
  • the difference between the battery voltage detection device 130 shown in FIG. 10 and the battery voltage detection device 120 in the third embodiment is that each communication interface 80 is connected to a communication BUS such as a CAN (Controller Area Network). Is a point.
  • a communication BUS such as a CAN (Controller Area Network). Is a point.
  • a plurality of communication interfaces 80 are connected to CANBUS, which is a dedicated communication line as a main communication path.
  • CANBUS is a dedicated communication line as a main communication path.
  • the microcomputer 52 selects one of the digital voltage values of the battery modules VM1 to VM4 necessary for itself among the digital voltage values that pass over the CAN bus. It becomes possible to get the value.
  • the data update cycle must be delayed. With the configuration combining the analog LPF and the digital LPF shown in the first or second embodiment, aliasing noise can be suppressed even if the data update period of the communication interface 80 is delayed.
  • Analog LPF analog low-pass filter circuit
  • a / D converter A / D conversion means
  • Digital LPF digital low-pass filter circuit
  • 70, 80 Communication interface Communication means 50, 51, 52
  • Microcomputer first microcomputer
  • 60 microcomputer second microcomputer
  • Multiplexer 91 Demultiplexer 100, 110, 120, 130 Battery voltage detector 200

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Abstract

Disclosed is a battery voltage measurement device provided with: an A/D converter (20) that measures the voltage of a battery cell and converts the voltage value to a digital voltage value; a communication means (40) that transmits the digital voltage value; a microcomputer (50) that obtains the digital voltage value; an analog low-pass filter (10) inserted between battery modules and the A/D converter (20); and a digital low-pass filter (30) inserted between the A/D converter (20) and the communication means (40). The digital low-pass filter (30) cuts off frequencies greater than or equal to half the sampling frequency of the digital voltage value obtained by the microcomputer (50) and sets the sampling frequency of the A/D-converted digital voltage value higher than the sampling frequency of the digital voltage value obtained by the microcomputer (50). The analog low-pass filter (10) cuts off frequencies greater than or equal to half the sampling frequency of the battery voltage that is A/D converted.

Description

電池電圧検出装置Battery voltage detector
 本発明は、電池モジュールにおけるバッテリセルの電圧監視を行う電池電圧検出装置に関する。 The present invention relates to a battery voltage detection device that monitors the voltage of a battery cell in a battery module.
 バッテリセルのセルコントローラ(電池電圧検出装置)は、リチウムイオンバッテリセルが複数接続された電池モジュールに対して、電圧監視および容量均等化を行う集積回路(IC:Integrated Circuit)を備えている。複数の電池モジュールから構成されるバッテリパックに対しては、デイジーチェーン方式でIC同士を通信させ、絶縁素子の削減によりコストを下げる技術が紹介されている(例えば、特許文献1~3参照)。この場合、各ICにて計測したバッテリセルの電圧データを、シリアル通信でCPU(Central Processing Unit)に転送するため、バッテリセルの数が多数におよぶと、1パケット当りのデータストリームが長くなり、CPUにおける電圧計測のインターバルが長くなる。 A battery cell cell controller (battery voltage detection device) includes an integrated circuit (IC: Integrated Circuit) that performs voltage monitoring and capacity equalization for a battery module to which a plurality of lithium ion battery cells are connected. For a battery pack composed of a plurality of battery modules, a technology has been introduced in which ICs communicate with each other by a daisy chain method to reduce costs by reducing the number of insulating elements (see, for example, Patent Documents 1 to 3). In this case, since the voltage data of the battery cell measured by each IC is transferred to the CPU (Central Processing Unit) by serial communication, if the number of battery cells reaches a large number, the data stream per packet becomes long, The voltage measurement interval in the CPU becomes longer.
 例えば、転送速度を100kbps、バッテリセルが100セル、1バッテリセル当りのデータが10bitから構成されるデータを計測するとした場合、
 1パケット当りのデータ長: 100セル×10bit=1000bit
 1秒当りに転送できるパケット数: 100kbps÷1000bit=100パケット/sec
 となり、電圧計測のサンプリング周波数は100Hzとなる。
For example, when it is assumed that the transfer rate is 100 kbps, the battery cell is 100 cells, and the data per battery cell is composed of 10 bits,
Data length per packet: 100 cells x 10 bits = 1000 bits
Number of packets that can be transferred per second: 100 kbps / 1000 bits = 100 packets / sec
Thus, the sampling frequency for voltage measurement is 100 Hz.
 ハイブリッド電気自動車においては、例えばインバータのスイッチングに伴って発生する数kHzから数MHzに及ぶ比較的高周波帯域のノイズが車載組電池の両極に印加される。
 一方、ハイブリッド電気自動車のモータは、例えば、6極対のモータを6000rpmで回転させた場合、電気角周波数は600Hzである。これにより、モータの回転に同期した比較的低周波帯域のリップルノイズがインバータより車載組電池の両極に印加される。また、電気自動車においては外部充電器から商用電源を全波整流した場合に生じる100~120Hzのリップルノイズが同様に印加される。
In a hybrid electric vehicle, for example, noise in a relatively high frequency band ranging from several kHz to several MHz generated by switching of an inverter is applied to both electrodes of an in-vehicle assembled battery.
On the other hand, the motor of the hybrid electric vehicle has an electrical angular frequency of 600 Hz when, for example, a six-pole motor is rotated at 6000 rpm. Thereby, ripple noise in a relatively low frequency band synchronized with the rotation of the motor is applied from the inverter to both electrodes of the in-vehicle assembled battery. Further, in an electric vehicle, ripple noise of 100 to 120 Hz generated when full-wave rectification of a commercial power source from an external charger is similarly applied.
 これらの事象を考慮すると、比較的高周波帯域のノイズを十分に除去するとともに、エイリアシング防止のためにはサンプリング周波数に対し、十分に低い遮断周波数特性を有したフィルタ回路をICの入力部に設ける必要がある。例えば、サンプリング周波数を100Hzとするならば、50Hz以上の成分を遮断できる特性を有するフィルタを設ける。 Considering these events, it is necessary to sufficiently remove noise in a relatively high frequency band and to provide a filter circuit having a sufficiently low cutoff frequency with respect to the sampling frequency at the input portion of the IC in order to prevent aliasing. There is. For example, if the sampling frequency is 100 Hz, a filter having a characteristic capable of blocking components of 50 Hz or higher is provided.
特開2003-70179号公報(図1、段落0031、0032、0033参照)JP 2003-70179 A (see FIG. 1, paragraphs 0031, 0032, and 0033) 特開2005-318750号公報(図1、段落0069、0070参照)JP 2005-318750 A (see FIG. 1, paragraphs 0069 and 0070) 特開2005-318751号公報(図1、段落0029、0030参照)Japanese Patent Laying-Open No. 2005-318751 (see FIG. 1, paragraphs 0029 and 0030)
 ところで、フィルタ回路は、抵抗およびコンデンサよりなるRCの1次フィルタが一般的である。そこで、例えば、50Hzでのゲインを1/100と設定すると、RCの時定数は318msecになり、100kΩの抵抗と3.18μFのコンデンサで構成できる。 Incidentally, the filter circuit is generally an RC primary filter composed of a resistor and a capacitor. Therefore, for example, if the gain at 50 Hz is set to 1/100, the RC time constant is 318 msec, which can be constituted by a resistor of 100 kΩ and a capacitor of 3.18 μF.
 しかしながら、このような部品定数で構成すると、抵抗値が大きくなり、A/D(Analogue/Digital)変換器側から見たときの回路インピーダンスが大きくなるため、A/D変換精度に悪影響を生じさせる。また、コンデンサの容量が大きいことにより、電解コンデンサを用いれば精度が悪化し、セラミックコンデンサを用いれば部品単価が高くなる。
 また、特許文献1~3に記載の技術では、サンプリング周波数を高くするため、通信速度を上げる手法が考えられるが、CAN(Controller Area Network)を用いれば通信速度を1Mbps程度に上げられるが、通信インターフェース回路が増えコスト高になる。
However, when configured with such component constants, the resistance value becomes large, and the circuit impedance when viewed from the A / D (Analogue / Digital) converter side becomes large, which adversely affects A / D conversion accuracy. . In addition, due to the large capacity of the capacitor, the accuracy deteriorates if an electrolytic capacitor is used, and the unit cost increases if a ceramic capacitor is used.
In the techniques described in Patent Documents 1 to 3, a method of increasing the communication speed in order to increase the sampling frequency can be considered. However, if CAN (Controller Area Network) is used, the communication speed can be increased to about 1 Mbps. The interface circuit increases and the cost increases.
 本発明は、前記した従来の課題を解決するものであり、簡易な構成で、高精度かつ低コスト化が可能な低域濾波器を備える電池電圧検出装置を提供することを課題とする。 This invention solves the above-mentioned conventional subject, and makes it a subject to provide a battery voltage detection apparatus provided with the low-pass filter which can be highly accurate and cost-reduced by simple structure.
 前記課題を解決するために、本発明は、バッテリセルからなる電池モジュールが直列に接続された組電池における前記バッテリセルの電圧を検出する電池電圧検出装置であって、前記バッテリセルの電池電圧値を検出し、ディジタル電圧値にA/D変換するA/D変換手段と、前記ディジタル電圧値を伝送する通信手段と、前記通信手段を経由して前記ディジタル電圧値を取得する第1のマイクロコンピュータと、前記バッテリセルと前記A/D変換手段との間に挿入されるアナログ低域濾波フィルタ回路と、前記A/D変換手段と前記通信手段との間に挿入されるディジタル低域濾波フィルタ回路と、を備え、前記アナログ低域濾波フィルタ回路は、前記電池電圧値を前記A/D変換する第1のサンプリング周波数の1/2以上の周波数のノイズ信号を遮断する特性を有し、前記ディジタル低域濾波フィルタ回路は、前記ディジタル電圧値を前記第1のマイクロコンピュータが取得する第2のサンプリング周波数の1/2以上の周波数のノイズ信号を遮断する特性を有し、前記第1のサンプリング周波数は前記第2のサンプリング周波数より高いことを特徴とする。
 但し、括弧内の数字は、例示である。
In order to solve the above-mentioned problems, the present invention provides a battery voltage detection device for detecting a voltage of the battery cell in an assembled battery in which battery modules made of battery cells are connected in series, the battery voltage value of the battery cell. A / D conversion means for detecting A / D and converting the digital voltage value into a digital voltage value, a communication means for transmitting the digital voltage value, and a first microcomputer for obtaining the digital voltage value via the communication means An analog low-pass filter circuit inserted between the battery cell and the A / D converter, and a digital low-pass filter circuit inserted between the A / D converter and the communication unit And the analog low-pass filter circuit has a frequency of ½ or more of a first sampling frequency for A / D converting the battery voltage value. The digital low-pass filter circuit has a characteristic that cuts off noise signals, and the digital low-pass filter circuit cuts off noise signals having a frequency equal to or higher than ½ of the second sampling frequency obtained by the first microcomputer. The first sampling frequency is higher than the second sampling frequency.
However, the numbers in parentheses are examples.
 本発明によれば、フィルタの構成を、前段をアナログ低域濾波フィルタ回路、後段をディジタル低域濾波フィルタ回路とすることにより、アナログ低域濾波フィルタ回路の部品定数を小さくできるので高精度かつ低コスト化を実現する電池電圧検出装置を提供することができる。また、第1のサンプリング周波数を第2のサンプリング周波数より高くすることで、電気自動車が発生する固有のノイズをアナログ低域濾波フィルタ回路で排除し、自動車の直列電池の電圧を測る上での通信回線の速度の制約から生じる周波数成分をディジタル低域濾波フィルタ回路で排除することができ、それぞれのフィルタ回路を効率よく設置することができる。 According to the present invention, the configuration of the filter is such that the analog low-pass filter circuit in the front stage and the digital low-pass filter circuit in the rear stage can reduce the component constant of the analog low-pass filter circuit. It is possible to provide a battery voltage detection device that realizes cost reduction. In addition, by making the first sampling frequency higher than the second sampling frequency, the inherent noise generated by the electric vehicle is eliminated by an analog low-pass filter circuit, and communication for measuring the voltage of the series battery of the vehicle Frequency components resulting from line speed restrictions can be eliminated by the digital low-pass filter circuit, and each filter circuit can be installed efficiently.
 また、本発明は、各バッテリセルに対応した前記アナログ低域濾波フィルタ回路と1つの前記A/D変換手段との間にマルチプレクサを備え、マルチプレクサは、並列に入力された電池電圧値を直列に順次出力し、前記A/D変換手段が、前記マルチプレクサから入力された各バッテリセルの電池電圧値を順次ディジタル電圧値に変換し、変換されたディジタル電圧値が、複数のディジタル低域濾波フィルタ回路に入力されることを特徴とする。 Further, the present invention includes a multiplexer between the analog low-pass filter circuit corresponding to each battery cell and one A / D conversion means, and the multiplexer serially inputs battery voltage values input in parallel. The A / D conversion means sequentially outputs the battery voltage value of each battery cell input from the multiplexer to a digital voltage value, and the converted digital voltage value is converted into a plurality of digital low-pass filter circuits. It is characterized by being input to.
 本発明によれば、マルチプレクサを用いることにより、高価なA/D変換器の数を減らすことができA/D変換器を効率よく効果的に用いることができる。 According to the present invention, by using a multiplexer, the number of expensive A / D converters can be reduced, and the A / D converters can be used efficiently and effectively.
 また、本発明は、前記ディジタル低域濾波フィルタ回路が、前記ディジタル低域濾波フィルタ回路の機能を有するプログラムを実行する第2マイクロコンピュータであることを特徴とする。 Further, the present invention is characterized in that the digital low-pass filter circuit is a second microcomputer that executes a program having the function of the digital low-pass filter circuit.
 本発明によれば、ディジタル低域濾波フィルタ回路の機能をプログラム化してマイクロコンピュータに実行させることができるため、プログラムを変更することで、サンプリング周波数や遮断周波数の変更を容易に行うことができる。 According to the present invention, since the function of the digital low-pass filter circuit can be programmed and executed by the microcomputer, the sampling frequency and the cut-off frequency can be easily changed by changing the program.
 また、本発明は、前記通信手段が、隣接する別の前記通信手段と順次接続されて前記ディジタル電圧値を順次伝送し、前記第1のマイクロコンピュータが端末に接続されて前記ディジタル電圧値を受信することを特徴とする。 According to the present invention, the communication means is sequentially connected to another adjacent communication means to sequentially transmit the digital voltage value, and the first microcomputer is connected to a terminal to receive the digital voltage value. It is characterized by doing.
 本発明によれば、隣接する別の通信手段と順次接続されてディジタル電圧値を順次伝送するので、伝送する電池モジュール同士の電位差を低く抑えることができる。 According to the present invention, since the digital voltage value is sequentially transmitted by sequentially connecting to another adjacent communication means, the potential difference between the battery modules to be transmitted can be kept low.
 また、本発明は、複数の前記通信手段が、前記第1のマイクロコンピュータとそれぞれ接続されて、前記第1のマイクロコンピュータが複数の前記通信手段から前記ディジタル電圧値を受信することを特徴とする。 Further, the present invention is characterized in that a plurality of the communication means are connected to the first microcomputer, respectively, and the first microcomputer receives the digital voltage value from the plurality of the communication means. .
 本発明によれば、マイクロコンピュータは、各々の通信インターフェースと通信し、任意のタイミングで各々の電池モジュールのディジタル電圧値を入手することが可能になる。 According to the present invention, the microcomputer can communicate with each communication interface and obtain the digital voltage value of each battery module at an arbitrary timing.
 また、本発明は、複数の前記通信手段と前記第1のマイクロコンピュータとが通信バスにより接続されて、前記第1のマイクロコンピュータが複数の前記通信手段から前記ディジタル電圧値を受信することを特徴とする。 The present invention is also characterized in that a plurality of the communication means and the first microcomputer are connected by a communication bus, and the first microcomputer receives the digital voltage value from the plurality of the communication means. And
 本発明によれば、各々の電池モジュールが通信バスにディジタル電圧値を送信すると、マイクロコンピュータは、通信バス上を行き交うディジタル電圧値のうち自己に必要な電池モジュールのいずれかのディジタル電圧値を取得することが可能になる。 According to the present invention, when each battery module transmits a digital voltage value to the communication bus, the microcomputer obtains the digital voltage value of any battery module necessary for itself among the digital voltage values that pass over the communication bus. It becomes possible to do.
 本発明によれば、簡易な構成で、高精度かつ低コスト化が可能な低域濾波器を備える電池電圧検出装置を提供することが可能になる。 According to the present invention, it is possible to provide a battery voltage detection device including a low-pass filter that can be reduced in accuracy and cost with a simple configuration.
第1の実施形態に係る電池電圧検出装置を示す図である。It is a figure which shows the battery voltage detection apparatus which concerns on 1st Embodiment. 第1の実施形態におけるフィルタ回路設定の概念を示す図である。It is a figure which shows the concept of the filter circuit setting in 1st Embodiment. 第1の実施形態におけるフィルタ回路設定の具体例を示す図である。It is a figure which shows the specific example of the filter circuit setting in 1st Embodiment. 第1の実施形態におけるディジタルLPFの詳細動作例を示す図である。It is a figure which shows the detailed operation example of digital LPF in 1st Embodiment. 第1の実施形態におけるA/D変換器の使用例を説明する図である。It is a figure explaining the usage example of the A / D converter in 1st Embodiment. マルチプレクサ/デマルチプレクサを用いた場合のA/D変換器の使用態様を示す図である。It is a figure which shows the usage condition of an A / D converter at the time of using a multiplexer / demultiplexer. 通信インターフェースにおけるデータストリームの構成を示す図である。It is a figure which shows the structure of the data stream in a communication interface. フィルタの有無による電圧の異常判定閾値の検出タイミングの差を説明する図である。It is a figure explaining the difference in the detection timing of the voltage abnormality determination threshold value by the presence or absence of a filter. 第2の実施形態における電池電圧検出装置を示す図である。It is a figure which shows the battery voltage detection apparatus in 2nd Embodiment. 第3の実施形態における電池電圧検出装置を示す図である。It is a figure which shows the battery voltage detection apparatus in 3rd Embodiment. 第4の実施形態における電池電圧検出装置を示す図である。It is a figure which shows the battery voltage detection apparatus in 4th Embodiment.
 以下に、本発明の実施形態に係る電池電圧検出装置について図を参照しながら詳細に説明する。 Hereinafter, a battery voltage detection device according to an embodiment of the present invention will be described in detail with reference to the drawings.
(第1の実施形態)
 図1は、第1の実施形態に係る電池電圧検出装置を示す図である。
(First embodiment)
FIG. 1 is a diagram illustrating a battery voltage detection device according to the first embodiment.
 組電池200は、複数のバッテリセルBC(図5参照)が接続された電池モジュールVM1~VM4を直列に接続して構成される。
 電池電圧検出装置100は、アナログLPF(Low Pass Filter)(アナログ低域濾波フィルタ回路)10、A/D変換器(A/D変換手段)20、ディジタルLPF(ディジタル低域濾波フィルタ回路)30、通信インターフェース(通信手段)40及びマイクロコンピュータ50(第1のマイクロコンピュータ)を備える。
The assembled battery 200 is configured by connecting battery modules VM1 to VM4 connected to a plurality of battery cells BC (see FIG. 5) in series.
The battery voltage detection apparatus 100 includes an analog LPF (Low Pass Filter) (analog low-pass filter circuit) 10, an A / D converter (A / D converter) 20, a digital LPF (digital low-pass filter circuit) 30, A communication interface (communication means) 40 and a microcomputer 50 (first microcomputer) are provided.
アナログLPF10は、電池モジュールVM1~VM4における各バッテリセルBCとA/D変換器20との間に設置され、A/D変換器20による電圧計測のサンプリング周波数Fs1に対して所定の周波数を遮断する(図2参照)。
 A/D変換器20は、各電池モジュールVM1~VM4におけるバッテリセルBCの電圧を個別に検出し、検出した電圧をディジタル電圧値へ変換する。
The analog LPF 10 is installed between each battery cell BC in the battery modules VM1 to VM4 and the A / D converter 20, and cuts off a predetermined frequency with respect to the sampling frequency Fs1 of voltage measurement by the A / D converter 20. (See FIG. 2).
The A / D converter 20 individually detects the voltage of the battery cell BC in each of the battery modules VM1 to VM4, and converts the detected voltage into a digital voltage value.
 ディジタルLPF30は、A/D変換器20と通信インターフェース40との間に設置され、専用のディジタル回路で実現したものであり、通信インターフェース40の通信インターバルから定まるサンプリング周波数Fs2に対してディジタルLPF30から出力された電圧値における所定の周波数を遮断する(図2参照)。
 通信インターフェース40は、各バッテリセルBCのディジタル電圧値をマイクロコンピュータ50へ伝送する。通信インターフェース40は、電池モジュールVM1~VM4に対応するように設けられている。通信インターフェース40は、隣接する別の通信インターフェース40と順次接続されてディジタル電圧値をマイクロコンピュータ50へ順次伝送するので、伝送する電池モジュールVM1~VM4同士の電位差を低く抑えることができる。マイクロコンピュータ50は、通信インターフェース40を経由して各バッテリセルBCのディジタル電圧値を取得する。
The digital LPF 30 is installed between the A / D converter 20 and the communication interface 40, and is realized by a dedicated digital circuit. The digital LPF 30 outputs the sampling frequency Fs2 determined from the communication interval of the communication interface 40 from the digital LPF 30. The predetermined frequency in the set voltage value is cut off (see FIG. 2).
The communication interface 40 transmits the digital voltage value of each battery cell BC to the microcomputer 50. The communication interface 40 is provided so as to correspond to the battery modules VM1 to VM4. Since the communication interface 40 is sequentially connected to another adjacent communication interface 40 and sequentially transmits the digital voltage value to the microcomputer 50, the potential difference between the battery modules VM1 to VM4 to be transmitted can be kept low. The microcomputer 50 acquires the digital voltage value of each battery cell BC via the communication interface 40.
 図2は、第1の実施形態におけるフィルタ回路設定の概念を示す図である。
 本実施形態では、フィルタ回路をアナログLPF10とディジタルLPF30との2段で構成し、信号を遮断する周波数を各々分担する。つまり、電気自動車にて発生するインバータのスイッチングノイズなどの比較的高周波帯域のノイズ信号をアナログLPF10で排除し、モータの回転に伴い発生するリップルノイズや、商用電源を全波整流した場合に発生するリップルノイズ等の比較的低周波帯域のノイズ信号をディジタルLPF30で排除することにより、それぞれのフィルタ回路を効率よく設置することができる。
FIG. 2 is a diagram illustrating the concept of filter circuit setting in the first embodiment.
In the present embodiment, the filter circuit is composed of two stages of an analog LPF 10 and a digital LPF 30, and each shares a frequency for blocking a signal. In other words, noise signals in a relatively high frequency band such as inverter switching noise generated in an electric vehicle are eliminated by the analog LPF 10 and generated when ripple noise generated due to motor rotation or commercial power supply is full-wave rectified. By eliminating noise signals in a relatively low frequency band such as ripple noise with the digital LPF 30, each filter circuit can be installed efficiently.
 つまり、図2に示すように、バッテリセルBCとA/D変換器20との間に設置されるアナログLPF10は、A/D変換器20のサンプリング周波数Fs1(第1のサンプリング周波数)の1/2以上の周波数のノイズ信号を遮断する。即ち、アナログLPF10は、サンプリング周波数Fs1の1/2の周波数の信号を十分に減衰させる特性を有する。 That is, as shown in FIG. 2, the analog LPF 10 installed between the battery cell BC and the A / D converter 20 is 1 / of the sampling frequency Fs1 (first sampling frequency) of the A / D converter 20. Block noise signals with two or more frequencies. That is, the analog LPF 10 has a characteristic of sufficiently attenuating a signal having a frequency that is ½ of the sampling frequency Fs1.
 さらに、A/D変換器20と通信インターフェース40との間に追加したディジタルLPF30は、通信インターフェース40における通信インターバルから定まるサンプリング周波数Fs2(第2のサンプリング周波数)の1/2以上の周波数のノイズ信号を遮断する。即ち、マイクロコンピュータ50(図1参照)が取得するディジタル電圧値のサンプリング周波数Fs2に対し、ディジタルLPF30は、サンプリング周波数Fs2の1/2の周波数の信号を十分に減衰させる特性を有する。ここで周波数Fs1は周波数Fs2よりも高い周波数である。また、サンプリング周波数Fs2は、自動車の直列電池の電圧を測る上での通信回線の速度の制約により上限が定まる。 Furthermore, the digital LPF 30 added between the A / D converter 20 and the communication interface 40 is a noise signal having a frequency equal to or higher than ½ of the sampling frequency Fs2 (second sampling frequency) determined from the communication interval in the communication interface 40. Shut off. That is, the digital LPF 30 has a characteristic of sufficiently attenuating a signal having a frequency ½ of the sampling frequency Fs2 with respect to the sampling frequency Fs2 of the digital voltage value acquired by the microcomputer 50 (see FIG. 1). Here, the frequency Fs1 is higher than the frequency Fs2. The upper limit of the sampling frequency Fs2 is determined by the restriction on the speed of the communication line in measuring the voltage of the series battery of the automobile.
 フィルタの構成を、前段をアナログLPF10、後段をディジタルLPF30とすることにより、アナログLPF10の部品定数を小さくできるので高精度かつ低コスト化を実現する電池電圧検出装置100を提供することができる。また、サンプリング周波数Fs1をサンプリング周波数Fs2より高くすることで、電気自動車が発生する比較的高周波帯域のノイズをアナログ低域濾波フィルタ回路で排除し、比較的低周波帯域のノイズをディジタル低域濾波フィルタ回路で排除することができ、それぞれのフィルタ回路を効率よく設置することができる。 By configuring the filter as the analog LPF 10 at the front stage and the digital LPF 30 at the rear stage, the component constant of the analog LPF 10 can be reduced, so that it is possible to provide the battery voltage detection device 100 that realizes high accuracy and low cost. Further, by making the sampling frequency Fs1 higher than the sampling frequency Fs2, the analog low-pass filter circuit eliminates relatively high-frequency band noise generated by the electric vehicle, and the digital low-pass filter removes relatively low-frequency noise. Each filter circuit can be efficiently installed.
 図3は、第1の実施形態におけるフィルタ回路設定の具体例を示す図である。
 A/D変換器20のサンプリング周波数Fs1を10kHzに設定すると、サンプリング周波数Fs1の1/2となる5kHzにおけるゲインを1/100とするアナログLPF10は、例えば、10kΩの抵抗と0.318μFのコンデンサで構成することができる。なお、データは1バッテリセルあたり10bitで構成される。
FIG. 3 is a diagram illustrating a specific example of the filter circuit setting in the first embodiment.
When the sampling frequency Fs1 of the A / D converter 20 is set to 10 kHz, the analog LPF 10 having a gain of 1/100 at 5 kHz which is ½ of the sampling frequency Fs1 is, for example, a resistor of 10 kΩ and a capacitor of 0.318 μF. Can be configured. The data is composed of 10 bits per battery cell.
 通信インターフェース40のサンプリング周波数Fs2を100Hzとして、サンプリング周波数Fs2の1/2となる50Hzにおけるゲインを1/100とする時定数は318msecであるから、ディジタルLPF30の遮断周波数Fcを1/0.318=3.14Hzとする。 Since the time constant when the sampling frequency Fs2 of the communication interface 40 is 100 Hz and the gain at 50 Hz that is 1/2 of the sampling frequency Fs2 is 1/100 is 318 msec, the cutoff frequency Fc of the digital LPF 30 is 1 / 0.318 = 3. Set to 14 Hz.
 適用するディジタルLPF30の形式を、簡易な1次のIIR(Infinite Inpulse Response)型フィルタとすると、今回の入力値xnと前回の出力値yn-1とから、今回の出力値ynは以下の式1で求めることができる。 If the format of the applied digital LPF 30 is a simple first-order IIR (Infinite Impulse Response) filter, the current output value y n is calculated from the current input value x n and the previous output value y n−1. It can obtain | require by the formula 1.
Figure JPOXMLDOC01-appb-M000001
 さらに、係数c、dを16bitで表現すると以下のようになる。なお、c、dにおけるhはhexadecimal(ヘキサデシマル:16進数)を示すものである。
Figure JPOXMLDOC01-appb-M000001
Furthermore, the coefficients c and d are expressed as 16 bits as follows. Note that h in c and d represents hexadecimal (hexadecimal).
Figure JPOXMLDOC01-appb-M000002
 このようにして求めたynを、100回に1回の頻度で通信インターフェース40に送出すればよい。
Figure JPOXMLDOC01-appb-M000002
In this way, the y n obtained may be delivered to the communication interface 40 at a frequency of once 100 times.
 図4は、第1の実施形態におけるディジタルLPFの詳細動作例を示す図である。
 図4において、白色部位は整数部を示し、灰色部位は少数点以下の部分を示す。入力値xnを10bit幅とし、前回値yn-1を26bit(整数部10bit+小数点以下16bit)とする。ここで、前記したようにcとdはそれぞれ小数点以下の16bitからなるものとする。図4に示すように、xnとcとの積xn×cは26bitとなる。
FIG. 4 is a diagram illustrating a detailed operation example of the digital LPF in the first embodiment.
In FIG. 4, a white part shows an integer part and a gray part shows a part below the decimal point. The input value xn is 10 bits wide, and the previous value yn -1 is 26 bits (integer part 10 bits + 16 bits after the decimal point). Here, as described above, it is assumed that c and d are each composed of 16 bits after the decimal point. As shown in FIG. 4, the product x n × c of x n and c becomes 26Bit.
 一方、yn-1とdとの積yn-1×dは、整数部10bitおよび小数点以下32bitの42bitになるが、下位16bitは切り捨て、積xn×cと同じ26bitとする。なお、下位16bitを切り捨てることにより丸め誤差が出る場合は、切り捨てずに四捨五入してもよい。求めたxn×cとyn-1×dとの和を求めて新規のynとして26bit幅で保管し、次回の計算において前回値yn-1として使用する。ynは26bitから構成されるが、フィルタの出力としては整数部だけでよいから、ディジタルLPF30は、ynの上位10bitのみを出力として通信インターフェースに送出する。なお、小数点以下を切り捨てることにより丸め誤差が出る場合は、切り捨てずに四捨五入してもよい。 On the other hand, the product y n-1 × d and y n-1 and d is comprised in 42bit integer portion 10bit and decimal 32bit, lower 16bit truncation, the same 26bit the product x n × c. If a rounding error is generated by rounding down the lower 16 bits, it may be rounded off without being rounded down. The sum of the determined x n × c and y n−1 × d is obtained and stored as a new y n in a 26-bit width, and used as the previous value y n−1 in the next calculation. y n consists 26bit is, since as the output of the filter need only integer part, a digital LPF30 sends to the communication interface only the upper 10bit of y n as the output. If a rounding error occurs by rounding down the decimal point, it may be rounded off without being rounded down.
 図5は、第1の実施形態におけるA/D変換器の使用例を説明する図である。図5に示すように、アナログLPF11~LPF14とA/D変換器20との間にマルチプレクサ90を設置し、A/D変換器20とディジタルLPF31~LPF34との間にデマルチプレクサ91を設置する。本実施形態では、マルチプレクサ90は、ディジタルLPF31~34に対応して4個の入力端子を有し、1個の出力端子を有する。デマルチプレクサ91は、1個の入力端子を有し、4個の出力端子を有する。A/D変換器20の前にマルチプレクサ90を、後ろにデマルチプレクサ91を設置することにより、使用するA/D変換器20の数を4個から1個へ減じることができる。これにより、高価なA/D変換器の数を減らすことができA/D変換器を効率よく効果的に用いることができる。なお、マルチプレクサ90の入力端子(チャネル:CH)数は任意の数を設定できる。 FIG. 5 is a diagram illustrating an example of use of the A / D converter in the first embodiment. As shown in FIG. 5, a multiplexer 90 is installed between the analog LPFs 11 to 14 and the A / D converter 20, and a demultiplexer 91 is installed between the A / D converter 20 and the digital LPFs 31 to LPF 34. In the present embodiment, the multiplexer 90 has four input terminals corresponding to the digital LPFs 31 to 34, and has one output terminal. The demultiplexer 91 has one input terminal and four output terminals. By installing the multiplexer 90 in front of the A / D converter 20 and the demultiplexer 91 behind, the number of A / D converters 20 to be used can be reduced from four to one. Thereby, the number of expensive A / D converters can be reduced and the A / D converters can be used efficiently and effectively. The number of input terminals (channel: CH) of the multiplexer 90 can be set to an arbitrary number.
 図6は、マルチプレクサ/デマルチプレクサを用いた場合のA/D変換器の使用態様を示す図である(適宜図5参照)。各バッテリセルBC1~BC4の電圧検出信号は、アナログLPF11~LPF14を介して、それぞれマルチプレクサ90の各入力端子CH1~CH4に同じタイミングで並列に入力される。マルチプレクサ90は、各入力端子CH1~CH4へ入力された電圧検出信号を直列に変換し、所定の時間間隔でA/D変換器20に順次入力する。 FIG. 6 is a diagram showing a usage mode of an A / D converter when a multiplexer / demultiplexer is used (see FIG. 5 as appropriate). The voltage detection signals of the battery cells BC1 to BC4 are input in parallel to the input terminals CH1 to CH4 of the multiplexer 90 in parallel at the same timing via the analog LPFs 11 to LPF14. The multiplexer 90 converts the voltage detection signals input to the input terminals CH1 to CH4 in series and sequentially inputs them to the A / D converter 20 at predetermined time intervals.
 図6に示すように、A/D変換器20による電圧検出信号のサンプリング周波数Fs1の範囲内で、全ての入力端子CH1~CH4に対応する電圧検出信号がA/D変換器20に順次入力され、入力順に出力される。そして、順次A/D変換器20においてディジタル変換されたディジタル電圧値は、デマルチプレクサ91の入力端子に順次入力される。デマルチプレクサ91は、直列に順次入力されたディジタル電圧値を並列に変換して出力端子DCH1~DCH4に出力し、同じタイミングでディジタルLPF31~LPF34へ入力する。ディジタルLPF31~LPF34において所定の周波数域が遮断されたディジタル電圧値は、所定のタイミングで通信インターフェース40へ入力される。 As shown in FIG. 6, the voltage detection signals corresponding to all the input terminals CH1 to CH4 are sequentially input to the A / D converter 20 within the range of the sampling frequency Fs1 of the voltage detection signal by the A / D converter 20. Are output in the order of input. Then, the digital voltage values sequentially converted by the A / D converter 20 are sequentially input to the input terminal of the demultiplexer 91. The demultiplexer 91 converts the digital voltage values sequentially input in series into parallel, outputs them to the output terminals DCH1 to DCH4, and inputs them to the digital LPF31 to LPF34 at the same timing. A digital voltage value in which a predetermined frequency range is cut off in the digital LPF 31 to LPF 34 is input to the communication interface 40 at a predetermined timing.
 このようにサンプリング周波数Fs1の範囲内でマルチプレクサ90における入力端子CH1~CH4の電圧検出信号をA/D変換器20へ順次入力してディジタル電圧値に変換して出力することで、各バッテリセルBC1~BC4ごとにA/D変換器20を設置したのと同等の効果を得られるようになり、高価なA/D変換器20を効率的に使用することが可能になる。 As described above, the voltage detection signals at the input terminals CH1 to CH4 in the multiplexer 90 are sequentially input to the A / D converter 20 within the range of the sampling frequency Fs1, converted into a digital voltage value, and output, thereby each battery cell BC1. The same effect as installing the A / D converter 20 for each BC4 can be obtained, and the expensive A / D converter 20 can be used efficiently.
 図7は、通信インターフェースにおけるデータストリームの構成を示す図である(適宜図5参照)。
 一般的な時定数の大きいアナログLPFのみを用いた場合は、異常時などに発生するステップ的なバッテリセルの電圧変化に対する検出タイミングは、時定数分だけアナログLPFが無い場合に比べて遅くなる。つまり、異常を検出するまでに時間遅れが発生する。
FIG. 7 is a diagram showing the configuration of a data stream in the communication interface (see FIG. 5 as appropriate).
When only a general analog LPF having a large time constant is used, the detection timing for a stepped battery cell voltage change that occurs at the time of abnormality or the like is delayed as compared with the case where there is no analog LPF by the time constant. That is, a time delay occurs until an abnormality is detected.
 これに対して、本実施形態のように、ディジタルLPFを用いた場合は、図7(a)に示すように、各バッテリセルBC1~BC4(図7ではCH1~CH4と表している)ごとにディジタルLPF31~LPF34の入力値(フィルタ無)と出力値(フィルタ有)とを併せて通信インターフェース40へ送出し、各バッテリセル毎に、フィルタ無の電圧値を監視し異常判定閾値を示す所定値との大小関係を検出することで、図8に示すように、早期に電池の異常を検出できる。 On the other hand, when the digital LPF is used as in this embodiment, as shown in FIG. 7A, each battery cell BC1 to BC4 (represented as CH1 to CH4 in FIG. 7) is provided. The input values (without filter) and output values (with filter) of the digital LPF 31 to LPF 34 are sent together to the communication interface 40, and for each battery cell, a voltage value without filter is monitored and a predetermined value indicating an abnormality determination threshold value As shown in FIG. 8, battery abnormality can be detected at an early stage.
 また、ディジタルLPFを用いることにより、図7(b)に示すように、電池モジュールVM1におけるバッテリセルBC1~BC4の上限電圧と下限電圧を異常として検出する方法として用いることも可能になる。この場合は、同一電池モジュールVM1におけるバッテリセルBC1~BC4の電圧の最大値Max(フィルタ無)と最小値Min(フィルタ無)を代表値として通信インターフェース40へ送出することで、異常判定閾値を示す所定値との大小関係を検出することができるため早期に電池の異常を検出できる。 Further, by using the digital LPF, as shown in FIG. 7B, it can be used as a method of detecting the upper limit voltage and the lower limit voltage of the battery cells BC1 to BC4 in the battery module VM1 as abnormal. In this case, the abnormality determination threshold is indicated by sending the maximum value Max (no filter) and the minimum value Min (no filter) of the battery cells BC1 to BC4 in the same battery module VM1 to the communication interface 40 as representative values. Since the magnitude relationship with the predetermined value can be detected, battery abnormality can be detected at an early stage.
 また、ディジタルLPFを用いることにより、図7(c)に示すように、バッテリセルBC1~BC4の異常判定閾値を示す所定値との大小関係を示すフラグのみを送信することで、図7(a)や図7(b)に示すようなデータストリーム長の増大を少なくできる。つまり、例えば、異常であればフラグを1とし、正常であればフラグを0とする。 Further, by using the digital LPF, as shown in FIG. 7C, only the flag indicating the magnitude relationship with the predetermined value indicating the abnormality determination threshold value of the battery cells BC1 to BC4 is transmitted, so that FIG. ) And the increase in data stream length as shown in FIG. 7B can be reduced. That is, for example, the flag is set to 1 if abnormal, and the flag is set to 0 if normal.
 以上、本実施形態によれば、フィルタ回路を、アナログLPF10とディジタルLPF30との2段構成にすることにより、アナログLPF10の部品定数を小さくできるので、使用する部品の高精度化かつ低コスト化が可能になる。また、ディジタルLPF30は高集積化が容易であるので、ディジタルLPF30を、A/D変換器20や通信インターフェース40と一体の部品として構成することができ、低コスト化が可能になる。 As described above, according to this embodiment, since the filter circuit has a two-stage configuration of the analog LPF 10 and the digital LPF 30, the component constant of the analog LPF 10 can be reduced. It becomes possible. In addition, since the digital LPF 30 can be easily integrated, the digital LPF 30 can be configured as an integral part of the A / D converter 20 and the communication interface 40, and the cost can be reduced.
(第2の実施形態)
 図8は、第2の実施形態における電池電圧検出装置を示す図である。第1の実施形態と同様な構成又は機能を示す部位については、その説明の重複を省略する。
 図8に示す電池電圧検出装置110と、第1の実施形態における電池電圧検出装置100との相違点は、第1の実施形態におけるディジタルLPF30を、第2の実施形態ではマイクロコンピュータ(第2のマイクロコンピュータ)60に置き換えた点である。
(Second Embodiment)
FIG. 8 is a diagram illustrating a battery voltage detection device according to the second embodiment. The description of the same configuration or function as in the first embodiment will be omitted.
The difference between the battery voltage detection device 110 shown in FIG. 8 and the battery voltage detection device 100 in the first embodiment is that the digital LPF 30 in the first embodiment is different from the digital LPF 30 in the second embodiment (second It is a point replaced with a microcomputer 60.
 前記したように、第1の実施形態におけるディジタルLPF30は、演算式(式1、式2)で表され、これを専用のディジタル回路で実現したものである。したがって、この演算式をプログラム化することでマイクロコンピュータ60による処理も可能になる。ここで、マイクロコンピュータ60は、前記プログラムを実行するためのMPU(Micro Processing Unit)、RAM(Random Access Memory)、ROM(Read Only Memory)等を備える。このように演算式をプログラムにしてマイクロコンピュータ60で実行させることができるので、サンプリング周波数や遮断周波数等の変更が容易になる。 As described above, the digital LPF 30 in the first embodiment is expressed by arithmetic expressions (Expression 1 and Expression 2), which is realized by a dedicated digital circuit. Therefore, processing by the microcomputer 60 becomes possible by programming this arithmetic expression. The microcomputer 60 includes an MPU (Micro Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory), and the like for executing the program. As described above, since the arithmetic expression can be set as a program and executed by the microcomputer 60, the sampling frequency, the cutoff frequency, and the like can be easily changed.
(第3の実施形態)
 図9は、第3の実施形態における電池電圧検出装置を示す図である。第1または第2の実施形態と同様な構成又は機能を示す部位については、その説明の重複を省略する。
 図9に示す電池電圧検出装置120と、第2の実施形態における電池電圧検出装置100との相違点は、各々の電池モジュールVM1~VM4に対応する各々の通信インターフェース70がマイクロコンピュータ51に接続されている点である。
(Third embodiment)
FIG. 9 is a diagram illustrating a battery voltage detection device according to the third embodiment. The description of the same components or functions as those in the first or second embodiment will be omitted.
The difference between the battery voltage detection device 120 shown in FIG. 9 and the battery voltage detection device 100 in the second embodiment is that each communication interface 70 corresponding to each of the battery modules VM1 to VM4 is connected to the microcomputer 51. It is a point.
 各々の通信インターフェース70は、マイクロコンピュータ51との間で双方向の通信回線を有している。このため、マイクロコンピュータ51は、各々の通信インターフェース70と通信し、任意のタイミングで各々の電池モジュールVM1~VM4のディジタル電圧値を入手することが可能になる。
 通信回線が複数並列で設けられるため、実効的には通信速度を向上させたことと等価であり、マイクロコンピュータ51が各セルの電圧を取得するサンプリング周波数を高くすることができる。
 しかしながら、一般的にマイクロコンピュータでの通信回線数には限りがあるため、通信する電池モジュールの数が多くなると、通信回線を切り替えるなどの回路が必要となり、実際の通信速度は低下してしまう。
 第1または第2の実施形態で示したアナログLPFとディジタルLPFとを組み合わせた構成により、通信インターフェース70の通信速度を下げてもエイリアシングノイズを抑制できる。
Each communication interface 70 has a bidirectional communication line with the microcomputer 51. Therefore, the microcomputer 51 can communicate with the respective communication interfaces 70 and obtain the digital voltage values of the respective battery modules VM1 to VM4 at an arbitrary timing.
Since a plurality of communication lines are provided in parallel, it is effectively equivalent to improving the communication speed, and the sampling frequency at which the microcomputer 51 acquires the voltage of each cell can be increased.
However, since the number of communication lines in a microcomputer is generally limited, when the number of battery modules to be communicated increases, a circuit for switching communication lines is required, and the actual communication speed is reduced.
With the configuration in which the analog LPF and the digital LPF shown in the first or second embodiment are combined, aliasing noise can be suppressed even if the communication speed of the communication interface 70 is reduced.
(第4の実施形態)
 図10は、第4の実施形態における電池電圧検出装置を示す図である。第1、第2または第3の実施形態と同様な構成又は機能を示す部位については、その説明の重複を省略する。
 図10に示す電池電圧検出装置130と、第3の実施形態における電池電圧検出装置120との相違点は、各々の通信インターフェース80が、CAN(Controller Area Network)等の通信BUSに接続されている点である。
(Fourth embodiment)
FIG. 10 is a diagram illustrating a battery voltage detection device according to the fourth embodiment. The description of the same configuration or function as in the first, second, or third embodiment will be omitted.
The difference between the battery voltage detection device 130 shown in FIG. 10 and the battery voltage detection device 120 in the third embodiment is that each communication interface 80 is connected to a communication BUS such as a CAN (Controller Area Network). Is a point.
 例えば、主通信路としての専用通信線であるCANBUSに通信インターフェース80を複数接続する。そして、各々の電池モジュールVM1~VM4がCANバスにディジタル電圧値を送信すると、マイクロコンピュータ52は、CANバス上を行き交うディジタル電圧値のうち自己に必要な電池モジュールVM1~VM4のいずれかのディジタル電圧値を取得することが可能になる。
 しかしながら、通信する電池モジュールの数が多くなるとCANバス上の通信トラフィックが増大し通信の安定性が損なわれるため、データの更新周期を遅くしなければならない。
 第1または第2の実施形態で示したアナログLPFとディジタルLPFとを組み合わせた構成により、通信インターフェース80のデータ更新周期を遅くしてもエイリアシングノイズを抑制できる。
For example, a plurality of communication interfaces 80 are connected to CANBUS, which is a dedicated communication line as a main communication path. When each of the battery modules VM1 to VM4 transmits a digital voltage value to the CAN bus, the microcomputer 52 selects one of the digital voltage values of the battery modules VM1 to VM4 necessary for itself among the digital voltage values that pass over the CAN bus. It becomes possible to get the value.
However, if the number of battery modules to be communicated increases, communication traffic on the CAN bus increases and communication stability is impaired. Therefore, the data update cycle must be delayed.
With the configuration combining the analog LPF and the digital LPF shown in the first or second embodiment, aliasing noise can be suppressed even if the data update period of the communication interface 80 is delayed.
10、11、12、13、14   アナログLPF(アナログ低域濾波フィルタ回路)
20   A/D変換器(A/D変換手段)
30、31、32、33、34   ディジタルLPF(ディジタル低域濾波フィルタ回路)
40、70、80   通信インターフェース(通信手段)
50、51、52   マイクロコンピュータ(第1のマイクロコンピュータ)
60   マイクロコンピュータ(第2のマイクロコンピュータ)
90   マルチプレクサ
91   デマルチプレクサ
100、110、120、130   電池電圧検出装置
200   組電池
BC、BC1、BC2、BC3、BC4   バッテリセル
VM1、VM2、VM3、VM4   電池モジュール
10, 11, 12, 13, 14 Analog LPF (analog low-pass filter circuit)
20 A / D converter (A / D conversion means)
30, 31, 32, 33, 34 Digital LPF (digital low-pass filter circuit)
40, 70, 80 Communication interface (communication means)
50, 51, 52 Microcomputer (first microcomputer)
60 microcomputer (second microcomputer)
90 Multiplexer 91 Demultiplexer 100, 110, 120, 130 Battery voltage detector 200 Battery pack BC, BC1, BC2, BC3, BC4 Battery cell VM1, VM2, VM3, VM4 Battery module

Claims (7)

  1.  バッテリセルからなる電池モジュールが直列に接続された組電池における前記バッテリセルの電池電圧値を検出する電池電圧検出装置であって、
     前記バッテリセルの電池電圧値を検出し、ディジタル電圧値にA/D変換するA/D変換手段と、
     前記ディジタル電圧値を伝送する通信手段と、
     前記通信手段を経由して前記ディジタル電圧値を取得する第1のマイクロコンピュータと、
     前記バッテリセルと前記A/D変換手段との間に挿入されるアナログ低域濾波フィルタ回路と、
     前記A/D変換手段と前記通信手段との間に挿入されるディジタル低域濾波フィルタ回路と、を備え、
     前記アナログ低域濾波フィルタ回路は、前記電池電圧値を前記A/D変換する第1のサンプリング周波数の1/2以上の周波数のノイズ信号を遮断する特性を有し、
     前記ディジタル低域濾波フィルタ回路は、前記ディジタル電圧値を前記第1のマイクロコンピュータが取得する第2のサンプリング周波数の1/2以上の周波数のノイズ信号を遮断する特性を有し、
     前記第1のサンプリング周波数は前記第2のサンプリング周波数よりも高いこと
    を特徴とする電池電圧検出装置。
    A battery voltage detection device for detecting a battery voltage value of the battery cell in an assembled battery in which battery modules including battery cells are connected in series,
    A / D conversion means for detecting a battery voltage value of the battery cell and A / D converting it into a digital voltage value;
    Communication means for transmitting the digital voltage value;
    A first microcomputer for obtaining the digital voltage value via the communication means;
    An analog low-pass filter circuit inserted between the battery cell and the A / D converter;
    A digital low-pass filter circuit inserted between the A / D conversion means and the communication means,
    The analog low-pass filter circuit has a characteristic of blocking a noise signal having a frequency equal to or higher than ½ of a first sampling frequency for A / D converting the battery voltage value,
    The digital low-pass filter circuit has a characteristic of blocking a noise signal having a frequency equal to or higher than ½ of a second sampling frequency acquired by the first microcomputer from the digital voltage value,
    The battery voltage detection device, wherein the first sampling frequency is higher than the second sampling frequency.
  2.  各バッテリセルに対応した前記アナログ低域濾波フィルタ回路と1つの前記A/D変換手段との間にマルチプレクサを備え、
     前記マルチプレクサは、並列に入力された電池電圧値を直列に順次出力し、
     前記A/D変換手段は、前記マルチプレクサから入力された各バッテリセルの電池電圧値を順次ディジタル電圧値に変換し、
     変換されたディジタル電圧値は、複数のディジタル低域濾波フィルタ回路に入力されること
    を特徴とする請求の範囲第1項に記載の電池電圧検出装置。
    A multiplexer is provided between the analog low-pass filter circuit corresponding to each battery cell and one A / D converter;
    The multiplexer sequentially outputs battery voltage values input in parallel in series,
    The A / D conversion means sequentially converts the battery voltage value of each battery cell input from the multiplexer into a digital voltage value,
    The battery voltage detection device according to claim 1, wherein the converted digital voltage value is input to a plurality of digital low-pass filter circuits.
  3.  前記ディジタル低域濾波フィルタ回路は、前記ディジタル低域濾波フィルタ回路の機能を有するプログラムを実行する第2のマイクロコンピュータであること
    を特徴とする請求の範囲第1項に記載の電池電圧検出装置。
    The battery voltage detection device according to claim 1, wherein the digital low-pass filter circuit is a second microcomputer that executes a program having a function of the digital low-pass filter circuit.
  4.  前記ディジタル低域濾波フィルタ回路は、前記ディジタル低域濾波フィルタ回路の機能を有するプログラムを実行する第2のマイクロコンピュータであること
    を特徴とする請求の範囲第2項に記載の電池電圧検出装置。
    3. The battery voltage detection device according to claim 2, wherein the digital low-pass filter circuit is a second microcomputer that executes a program having a function of the digital low-pass filter circuit.
  5.  前記通信手段は、隣接する別の前記通信手段と順次接続されて前記ディジタル電圧値を順次伝送し、前記第1のマイクロコンピュータが端末に接続されて前記ディジタル電圧値を受信すること
    を特徴とする請求の範囲第1項乃至第4項のいずれか1項に記載の電池電圧検出装置。
    The communication means is sequentially connected to another adjacent communication means to sequentially transmit the digital voltage value, and the first microcomputer is connected to a terminal to receive the digital voltage value. The battery voltage detection device according to any one of claims 1 to 4.
  6.  複数の前記通信手段は、前記第1のマイクロコンピュータとそれぞれ接続されて、前記第1のマイクロコンピュータが複数の前記通信手段から前記ディジタル電圧値を受信すること
    を特徴とする請求の範囲第1項乃至第4項のいずれか1項に記載の電池電圧検出装置。
    The plurality of communication means are connected to the first microcomputer, respectively, and the first microcomputer receives the digital voltage value from the plurality of communication means. The battery voltage detection apparatus of any one of thru | or 4th term | claim.
  7.  複数の前記通信手段と前記第1のマイクロコンピュータとが通信バスにより接続されて、前記第1のマイクロコンピュータが複数の前記通信手段から前記ディジタル電圧値を受信すること
    を特徴とする請求の範囲第1項乃至第4項のいずれか1項に記載の電池電圧検出装置。
    The plurality of communication means and the first microcomputer are connected by a communication bus, and the first microcomputer receives the digital voltage value from the plurality of communication means. Item 5. The battery voltage detection device according to any one of Items 1 to 4.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015029283A1 (en) * 2013-08-29 2015-03-05 パナソニックIpマネジメント株式会社 Battery pack control apparatus
JP2016171470A (en) * 2015-03-13 2016-09-23 パナソニックIpマネジメント株式会社 Communication device, reception device and communication system
CN110350257A (en) * 2018-04-03 2019-10-18 大众汽车有限公司 Battery system and motor vehicle for motor vehicle
WO2020200558A1 (en) * 2019-03-29 2020-10-08 Daimler Ag Method for determining an electrical cell voltage of a battery cell of a traction battery of a vehicle and device
CN115528391A (en) * 2022-09-23 2022-12-27 欣旺达惠州动力新能源有限公司 Electric core group and voltage acquisition method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03212116A (en) * 1990-01-16 1991-09-17 Hitachi Ltd Digital signal-processing method and apparatus therefor
JP2003070179A (en) * 2001-08-29 2003-03-07 Hitachi Ltd Power storage device and its control method
JP2005345124A (en) * 2004-05-31 2005-12-15 Sanyo Electric Co Ltd Data collector

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03212116A (en) * 1990-01-16 1991-09-17 Hitachi Ltd Digital signal-processing method and apparatus therefor
JP2003070179A (en) * 2001-08-29 2003-03-07 Hitachi Ltd Power storage device and its control method
JP2005345124A (en) * 2004-05-31 2005-12-15 Sanyo Electric Co Ltd Data collector

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015029283A1 (en) * 2013-08-29 2015-03-05 パナソニックIpマネジメント株式会社 Battery pack control apparatus
US10581124B2 (en) 2013-08-29 2020-03-03 Panasonic Intellectual Property Management Co., Ltd. Battery assembly controller which monitors voltages of secondary batteries and semiconductor integrated circuit used for the battery assembly controller
US10193194B2 (en) 2013-08-29 2019-01-29 Panasonic Intellectual Property Management Co., Ltd. Battery assembly controller which monitors voltages of secondary batteries
US9712897B2 (en) 2015-03-13 2017-07-18 Panasonic Intellectual Property Management Co., Ltd. Communication device, receiving device, and communication system for transmitting information in daisy chain network
EP3076684A1 (en) 2015-03-13 2016-10-05 Panasonic Intellectual Property Management Co., Ltd. Communicaton device, receiving device, and communication system for transmitting information in daisy chain network
JP2016171470A (en) * 2015-03-13 2016-09-23 パナソニックIpマネジメント株式会社 Communication device, reception device and communication system
CN110350257A (en) * 2018-04-03 2019-10-18 大众汽车有限公司 Battery system and motor vehicle for motor vehicle
CN110350257B (en) * 2018-04-03 2022-07-26 大众汽车有限公司 Battery system for a motor vehicle and motor vehicle
WO2020200558A1 (en) * 2019-03-29 2020-10-08 Daimler Ag Method for determining an electrical cell voltage of a battery cell of a traction battery of a vehicle and device
CN113614551A (en) * 2019-03-29 2021-11-05 戴姆勒股份公司 Method and device for determining the cell voltage of a battery cell of a power battery of a vehicle
US11970077B2 (en) 2019-03-29 2024-04-30 Daimler Ag Method for determining an electrical cell voltage of a battery cell of a traction battery of a vehicle, and device
CN115528391A (en) * 2022-09-23 2022-12-27 欣旺达惠州动力新能源有限公司 Electric core group and voltage acquisition method
CN115528391B (en) * 2022-09-23 2024-06-04 欣旺达惠州动力新能源有限公司 Battery cell set and voltage acquisition method

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