JPWO2011043311A1 - Battery voltage detector - Google Patents

Abstract

An A / D converter (20) for detecting the voltage value of the battery cell and converting it into a digital voltage value, a communication means (40) for transmitting the digital voltage value, and a microcomputer (50) for acquiring the digital voltage value An analog LPF (10) inserted between the battery module and the A / D converter (20), and a digital LPF (inserted between the A / D converter (20) and the communication means (40) ( 30), and the digital LPF (30) blocks half or more of the sampling frequency of the digital voltage value acquired by the microcomputer (50), and samples the digital voltage value acquired by the microcomputer (50). The sampling frequency of the digital voltage value to be A / D converted is set higher than the frequency, and the analog LPF (10) is A / D converted. Blocking more than half of the sampling frequency of the battery voltage.

Description

  The present invention relates to a battery voltage detection device that monitors the voltage of a battery cell in a battery module.

  A battery cell cell controller (battery voltage detection device) includes an integrated circuit (IC) that performs voltage monitoring and capacity equalization on a battery module to which a plurality of lithium ion battery cells are connected. For a battery pack composed of a plurality of battery modules, a technology has been introduced in which ICs communicate with each other by a daisy chain method to reduce the cost by reducing the number of insulating elements (for example, see Patent Documents 1 to 3). In this case, since the voltage data of the battery cell measured by each IC is transferred to the CPU (Central Processing Unit) by serial communication, if the number of battery cells reaches a large number, the data stream per packet becomes long, The voltage measurement interval in the CPU becomes longer.

For example, when it is assumed that the transfer rate is 100 kbps, the battery cell is 100 cells, and the data per battery cell is composed of 10 bits,
Data length per packet: 100 cells x 10 bits = 1000 bits
Number of packets that can be transferred per second: 100 kbps / 1000 bits = 100 packets / sec
Thus, the sampling frequency for voltage measurement is 100 Hz.

In a hybrid electric vehicle, for example, noise in a relatively high frequency band ranging from several kHz to several MHz generated by switching of an inverter is applied to both electrodes of an in-vehicle assembled battery.
On the other hand, the motor of the hybrid electric vehicle has an electrical angular frequency of 600 Hz when, for example, a six-pole motor is rotated at 6000 rpm. Thereby, ripple noise in a relatively low frequency band synchronized with the rotation of the motor is applied from the inverter to both electrodes of the in-vehicle assembled battery. Further, in an electric vehicle, ripple noise of 100 to 120 Hz generated when a commercial power source is full-wave rectified from an external charger is similarly applied.

  Considering these events, it is necessary to sufficiently remove noise in a relatively high frequency band and to provide a filter circuit having a sufficiently low cutoff frequency with respect to the sampling frequency at the input portion of the IC in order to prevent aliasing. There is. For example, if the sampling frequency is 100 Hz, a filter having a characteristic capable of blocking components of 50 Hz or higher is provided.

Japanese Patent Laying-Open No. 2003-70179 (see FIG. 1, paragraphs 0031, 0032, and 0033) Japanese Patent Laying-Open No. 2005-318750 (see FIG. 1, paragraphs 0069 and 0070) Japanese Patent Laying-Open No. 2005-318751 (see FIG. 1, paragraphs 0029 and 0030)

  By the way, the filter circuit is generally an RC primary filter composed of a resistor and a capacitor. Therefore, for example, if the gain at 50 Hz is set to 1/100, the RC time constant is 318 msec, which can be constituted by a resistor of 100 kΩ and a capacitor of 3.18 μF.

However, when configured with such component constants, the resistance value increases, and the circuit impedance when viewed from the A / D (Analogue / Digital) converter side increases, which adversely affects A / D conversion accuracy. . In addition, due to the large capacity of the capacitor, the accuracy deteriorates if an electrolytic capacitor is used, and the unit cost increases if a ceramic capacitor is used.
In addition, in the techniques described in Patent Documents 1 to 3, a method of increasing the communication speed in order to increase the sampling frequency can be considered. However, if CAN (Controller Area Network) is used, the communication speed can be increased to about 1 Mbps. The interface circuit increases and the cost increases.

  This invention solves the above-mentioned conventional subject, and makes it a subject to provide a battery voltage detection apparatus provided with the low-pass filter which can be highly accurate and cost-reduced with a simple structure.

In order to solve the above-mentioned problems, the present invention provides a battery voltage detection device for detecting a voltage of the battery cell in an assembled battery in which battery modules made of battery cells are connected in series, the battery voltage value of the battery cell. A / D conversion means for detecting A / D and converting the digital voltage value into a digital voltage value, a communication means for transmitting the digital voltage value, and a first microcomputer for obtaining the digital voltage value via the communication means An analog low-pass filter circuit inserted between the battery cell and the A / D converter, and a digital low-pass filter circuit inserted between the A / D converter and the communication unit And the analog low-pass filter circuit has a frequency of ½ or more of a first sampling frequency for A / D converting the battery voltage value. The digital low-pass filter circuit has a characteristic that cuts off noise signals, and the digital low-pass filter circuit cuts off noise signals having a frequency equal to or higher than ½ of the second sampling frequency obtained by the first microcomputer. The first sampling frequency is higher than the second sampling frequency.
However, the numbers in parentheses are examples.

  According to the present invention, the configuration of the filter is such that the analog low-pass filter circuit in the front stage and the digital low-pass filter circuit in the rear stage can reduce the component constant of the analog low-pass filter circuit. It is possible to provide a battery voltage detection device that realizes cost reduction. In addition, by making the first sampling frequency higher than the second sampling frequency, the inherent noise generated by the electric vehicle is eliminated by an analog low-pass filter circuit, and communication for measuring the voltage of the series battery of the vehicle Frequency components resulting from line speed restrictions can be eliminated by the digital low-pass filter circuit, and each filter circuit can be installed efficiently.

  Further, the present invention includes a multiplexer between the analog low-pass filter circuit corresponding to each battery cell and one A / D conversion means, and the multiplexer serially inputs battery voltage values input in parallel. The A / D conversion means sequentially outputs the battery voltage value of each battery cell input from the multiplexer to a digital voltage value, and the converted digital voltage value is converted into a plurality of digital low-pass filter circuits. It is characterized by being input to.

  According to the present invention, by using a multiplexer, the number of expensive A / D converters can be reduced, and the A / D converters can be used efficiently and effectively.

  The present invention is characterized in that the digital low-pass filter circuit is a second microcomputer that executes a program having the function of the digital low-pass filter circuit.

  According to the present invention, since the function of the digital low-pass filter circuit can be programmed and executed by the microcomputer, the sampling frequency and the cutoff frequency can be easily changed by changing the program.

  According to the present invention, the communication means is sequentially connected to another adjacent communication means to sequentially transmit the digital voltage value, and the first microcomputer is connected to a terminal to receive the digital voltage value. It is characterized by doing.

  According to the present invention, since the digital voltage value is sequentially transmitted by being sequentially connected to another adjacent communication means, the potential difference between the battery modules to be transmitted can be kept low.

  Further, the present invention is characterized in that a plurality of the communication means are connected to the first microcomputer, respectively, and the first microcomputer receives the digital voltage value from the plurality of the communication means. .

  According to the present invention, the microcomputer can communicate with each communication interface and obtain the digital voltage value of each battery module at an arbitrary timing.

  The present invention is also characterized in that a plurality of the communication means and the first microcomputer are connected by a communication bus, and the first microcomputer receives the digital voltage value from the plurality of the communication means. And

  According to the present invention, when each battery module transmits a digital voltage value to the communication bus, the microcomputer obtains the digital voltage value of any battery module necessary for itself among the digital voltage values that pass over the communication bus. It becomes possible to do.

  According to the present invention, it is possible to provide a battery voltage detection device including a low-pass filter capable of achieving high accuracy and low cost with a simple configuration.

It is a figure which shows the battery voltage detection apparatus which concerns on 1st Embodiment. It is a figure which shows the concept of the filter circuit setting in 1st Embodiment. It is a figure which shows the specific example of the filter circuit setting in 1st Embodiment. It is a figure which shows the detailed operation example of digital LPF in 1st Embodiment. It is a figure explaining the usage example of the A / D converter in 1st Embodiment. It is a figure which shows the usage condition of an A / D converter at the time of using a multiplexer / demultiplexer. It is a figure which shows the structure of the data stream in a communication interface. It is a figure explaining the difference in the detection timing of the voltage abnormality determination threshold value by the presence or absence of a filter. It is a figure which shows the battery voltage detection apparatus in 2nd Embodiment. It is a figure which shows the battery voltage detection apparatus in 3rd Embodiment. It is a figure which shows the battery voltage detection apparatus in 4th Embodiment.

  Hereinafter, a battery voltage detection device according to an embodiment of the present invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 1 is a diagram illustrating a battery voltage detection device according to the first embodiment.

The assembled battery 200 is configured by connecting in series battery modules VM1 to VM4 to which a plurality of battery cells BC (see FIG. 5) are connected.
The battery voltage detection apparatus 100 includes an analog LPF (Low Pass Filter) (analog low-pass filter circuit) 10, an A / D converter (A / D converter) 20, a digital LPF (digital low-pass filter circuit) 30, A communication interface (communication means) 40 and a microcomputer 50 (first microcomputer) are provided.

The analog LPF 10 is installed between each battery cell BC in the battery modules VM1 to VM4 and the A / D converter 20, and cuts off a predetermined frequency with respect to the sampling frequency Fs1 of voltage measurement by the A / D converter 20. (See FIG. 2).
The A / D converter 20 individually detects the voltage of the battery cell BC in each of the battery modules VM1 to VM4, and converts the detected voltage into a digital voltage value.

The digital LPF 30 is installed between the A / D converter 20 and the communication interface 40, and is realized by a dedicated digital circuit. The digital LPF 30 outputs the sampling frequency Fs2 determined from the communication interval of the communication interface 40 from the digital LPF 30. The predetermined frequency in the set voltage value is cut off (see FIG. 2).
The communication interface 40 transmits the digital voltage value of each battery cell BC to the microcomputer 50. The communication interface 40 is provided so as to correspond to the battery modules VM1 to VM4. Since the communication interface 40 is sequentially connected to another adjacent communication interface 40 and sequentially transmits the digital voltage value to the microcomputer 50, the potential difference between the battery modules VM1 to VM4 to be transmitted can be kept low. The microcomputer 50 acquires the digital voltage value of each battery cell BC via the communication interface 40.

FIG. 2 is a diagram illustrating the concept of filter circuit setting in the first embodiment.
In the present embodiment, the filter circuit is composed of two stages of an analog LPF 10 and a digital LPF 30, and each shares a frequency for blocking a signal. In other words, noise signals in a relatively high frequency band such as inverter switching noise generated in an electric vehicle are eliminated by the analog LPF 10 and generated when ripple noise generated due to motor rotation or commercial power supply is full-wave rectified. By eliminating noise signals in a relatively low frequency band such as ripple noise with the digital LPF 30, each filter circuit can be installed efficiently.

  That is, as shown in FIG. 2, the analog LPF 10 installed between the battery cell BC and the A / D converter 20 is 1 / of the sampling frequency Fs1 (first sampling frequency) of the A / D converter 20. Block noise signals with two or more frequencies. That is, the analog LPF 10 has a characteristic of sufficiently attenuating a signal having a frequency that is ½ of the sampling frequency Fs1.

  Furthermore, the digital LPF 30 added between the A / D converter 20 and the communication interface 40 is a noise signal having a frequency equal to or higher than ½ of the sampling frequency Fs2 (second sampling frequency) determined from the communication interval in the communication interface 40. Shut off. That is, the digital LPF 30 has a characteristic of sufficiently attenuating a signal having a frequency ½ of the sampling frequency Fs2 with respect to the sampling frequency Fs2 of the digital voltage value acquired by the microcomputer 50 (see FIG. 1). Here, the frequency Fs1 is higher than the frequency Fs2. The upper limit of the sampling frequency Fs2 is determined by the restriction on the speed of the communication line in measuring the voltage of the series battery of the automobile.

  By configuring the filter with the analog LPF 10 in the front stage and the digital LPF 30 in the rear stage, the component constant of the analog LPF 10 can be reduced, so that it is possible to provide the battery voltage detection device 100 that realizes high accuracy and low cost. Further, by making the sampling frequency Fs1 higher than the sampling frequency Fs2, the analog low-pass filter circuit eliminates relatively high-frequency band noise generated by the electric vehicle, and the digital low-pass filter removes relatively low-frequency noise. Each filter circuit can be efficiently installed.

FIG. 3 is a diagram illustrating a specific example of the filter circuit setting in the first embodiment.
When the sampling frequency Fs1 of the A / D converter 20 is set to 10 kHz, the analog LPF 10 having a gain of 1/100 at 5 kHz which is ½ of the sampling frequency Fs1 is, for example, a resistor of 10 kΩ and a capacitor of 0.318 μF. Can be configured. The data is composed of 10 bits per battery cell.

  Since the time constant when the sampling frequency Fs2 of the communication interface 40 is 100 Hz and the gain at 50 Hz that is 1/2 of the sampling frequency Fs2 is 1/100 is 318 msec, the cutoff frequency Fc of the digital LPF 30 is 1 / 0.318 = 3. Set to 14 Hz.

If the format of the applied digital LPF 30 is a simple first-order IIR (Infinite Impulse Response) filter, the current output value y _n is calculated from the current input value x _n and the previous output value y _n−1. It can obtain | require by the formula 1.

さらに、係数ｃ、ｄを１６bitで表現すると以下のようになる。なお、ｃ、ｄにおけるhはhexadecimal（ヘキサデシマル：１６進数）を示すものである。

Furthermore, the coefficients c and d are expressed as 16 bits as follows. Note that h in c and d represents hexadecimal (hexadecimal).

このようにして求めたｙ_nを、１００回に１回の頻度で通信インターフェース４０に送出すればよい。

In this way, the y _n obtained may be delivered to the communication interface 40 at a frequency of once 100 times.

FIG. 4 is a diagram illustrating a detailed operation example of the digital LPF in the first embodiment.
In FIG. 4, a white part shows an integer part and a gray part shows a part below the decimal point. The input value _xn is 10 bits wide, and the previous value yn _-1 is 26 bits (integer part 10 bits + 16 bits after the decimal point). Here, as described above, it is assumed that c and d are each composed of 16 bits after the decimal point. As shown in FIG. 4, the product x _n × c of x _n and c becomes 26Bit.

On the other hand, the product y _n-1 × d and y _n-1 and d is comprised in 42bit integer portion 10bit and decimal 32bit, lower 16bit truncation, the same 26bit the product x _n × c. If a rounding error is generated by rounding down the lower 16 bits, it may be rounded off without being rounded down. The sum of the determined x _n × c and y _n−1 × d is obtained and stored as a new y _n in a 26-bit width, and used as the previous value y _n−1 in the next calculation. y _n consists 26bit is, since as the output of the filter need only integer part, a digital LPF30 sends to the communication interface only the upper 10bit of y _n as the output. If a rounding error occurs by rounding down the decimal point, it may be rounded off without being rounded down.

  FIG. 5 is a diagram for explaining an example of use of the A / D converter in the first embodiment. As shown in FIG. 5, a multiplexer 90 is installed between the analog LPFs 11 to 14 and the A / D converter 20, and a demultiplexer 91 is installed between the A / D converter 20 and the digital LPFs 31 to LPF 34. In the present embodiment, the multiplexer 90 has four input terminals corresponding to the digital LPFs 31 to 34, and has one output terminal. The demultiplexer 91 has one input terminal and four output terminals. By installing the multiplexer 90 in front of the A / D converter 20 and the demultiplexer 91 behind, the number of A / D converters 20 to be used can be reduced from four to one. Thereby, the number of expensive A / D converters can be reduced and the A / D converters can be used efficiently and effectively. The number of input terminals (channel: CH) of the multiplexer 90 can be set to an arbitrary number.

  FIG. 6 is a diagram showing how the A / D converter is used when a multiplexer / demultiplexer is used (see FIG. 5 as appropriate). The voltage detection signals of the battery cells BC1 to BC4 are input in parallel to the input terminals CH1 to CH4 of the multiplexer 90 in parallel through the analog LPFs 11 to LPF14, respectively. The multiplexer 90 converts the voltage detection signals input to the input terminals CH1 to CH4 in series and sequentially inputs them to the A / D converter 20 at predetermined time intervals.

  As shown in FIG. 6, the voltage detection signals corresponding to all the input terminals CH1 to CH4 are sequentially input to the A / D converter 20 within the range of the sampling frequency Fs1 of the voltage detection signal by the A / D converter 20. Are output in the order of input. Then, the digital voltage values sequentially converted by the A / D converter 20 are sequentially input to the input terminal of the demultiplexer 91. The demultiplexer 91 converts the digital voltage values sequentially input in series into parallel, outputs them to the output terminals DCH1 to DCH4, and inputs them to the digital LPF31 to LPF34 at the same timing. A digital voltage value in which a predetermined frequency range is cut off in the digital LPF 31 to LPF 34 is input to the communication interface 40 at a predetermined timing.

  As described above, the voltage detection signals of the input terminals CH1 to CH4 in the multiplexer 90 are sequentially input to the A / D converter 20 within the range of the sampling frequency Fs1, converted into a digital voltage value, and output, thereby each battery cell BC1. The effect equivalent to installing the A / D converter 20 for each BC4 can be obtained, and the expensive A / D converter 20 can be used efficiently.

FIG. 7 is a diagram showing the configuration of a data stream in the communication interface (see FIG. 5 as appropriate).
When only a general analog LPF having a large time constant is used, the detection timing for a stepped battery cell voltage change that occurs at the time of abnormality or the like is delayed as compared with the case where there is no analog LPF by the time constant. That is, a time delay occurs until an abnormality is detected.

  On the other hand, when the digital LPF is used as in this embodiment, as shown in FIG. 7A, each battery cell BC1 to BC4 (represented as CH1 to CH4 in FIG. 7). The input values (without filter) and output values (with filter) of the digital LPF 31 to LPF 34 are sent together to the communication interface 40, and for each battery cell, a voltage value without filter is monitored and a predetermined value indicating an abnormality determination threshold value. As shown in FIG. 8, battery abnormality can be detected at an early stage.

  Further, by using the digital LPF, as shown in FIG. 7B, it can be used as a method of detecting the upper limit voltage and the lower limit voltage of the battery cells BC1 to BC4 in the battery module VM1 as abnormal. In this case, the abnormality determination threshold is indicated by sending the maximum value Max (no filter) and the minimum value Min (no filter) of the voltages of the battery cells BC1 to BC4 in the same battery module VM1 to the communication interface 40 as representative values. Since the magnitude relationship with the predetermined value can be detected, battery abnormality can be detected at an early stage.

  Further, by using the digital LPF, as shown in FIG. 7C, only the flag indicating the magnitude relationship with the predetermined value indicating the abnormality determination threshold value of the battery cells BC1 to BC4 is transmitted, so that FIG. ) And the increase in data stream length as shown in FIG. 7B can be reduced. That is, for example, the flag is set to 1 if abnormal, and the flag is set to 0 if normal.

  As described above, according to this embodiment, since the filter circuit has a two-stage configuration of the analog LPF 10 and the digital LPF 30, the component constant of the analog LPF 10 can be reduced. It becomes possible. In addition, since the digital LPF 30 can be easily integrated, the digital LPF 30 can be configured as an integral part of the A / D converter 20 and the communication interface 40, and the cost can be reduced.

(Second Embodiment)
FIG. 8 is a diagram illustrating a battery voltage detection device according to the second embodiment. The description of the same configuration or function as in the first embodiment will be omitted.
The difference between the battery voltage detection device 110 shown in FIG. 8 and the battery voltage detection device 100 in the first embodiment is that the digital LPF 30 in the first embodiment is different from the digital LPF 30 in the second embodiment (second It is a point replaced with a microcomputer 60.

  As described above, the digital LPF 30 in the first embodiment is represented by the arithmetic expressions (Expression 1 and Expression 2), and is realized by a dedicated digital circuit. Therefore, processing by the microcomputer 60 becomes possible by programming this arithmetic expression. Here, the microcomputer 60 includes an MPU (Micro Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory) and the like for executing the program. As described above, since the arithmetic expression can be set as a program and executed by the microcomputer 60, the sampling frequency, the cutoff frequency, and the like can be easily changed.

(Third embodiment)
FIG. 9 is a diagram illustrating a battery voltage detection device according to the third embodiment. The description of the same components or functions as those in the first or second embodiment will be omitted.
The difference between the battery voltage detection device 120 shown in FIG. 9 and the battery voltage detection device 100 in the second embodiment is that each communication interface 70 corresponding to each of the battery modules VM1 to VM4 is connected to the microcomputer 51. It is a point.

Each communication interface 70 has a bidirectional communication line with the microcomputer 51. For this reason, the microcomputer 51 can communicate with each of the communication interfaces 70 and obtain the digital voltage values of the respective battery modules VM1 to VM4 at an arbitrary timing.
Since a plurality of communication lines are provided in parallel, it is effectively equivalent to improving the communication speed, and the sampling frequency at which the microcomputer 51 acquires the voltage of each cell can be increased.
However, since the number of communication lines in a microcomputer is generally limited, when the number of battery modules to be communicated increases, a circuit for switching communication lines is required, and the actual communication speed is reduced.
With the configuration in which the analog LPF and the digital LPF shown in the first or second embodiment are combined, aliasing noise can be suppressed even if the communication speed of the communication interface 70 is reduced.

(Fourth embodiment)
FIG. 10 is a diagram illustrating a battery voltage detection device according to the fourth embodiment. The description of the same configuration or function as in the first, second, or third embodiment will be omitted.
The difference between the battery voltage detection device 130 shown in FIG. 10 and the battery voltage detection device 120 in the third embodiment is that each communication interface 80 is connected to a communication BUS such as a CAN (Controller Area Network). Is a point.

For example, a plurality of communication interfaces 80 are connected to CANBUS, which is a dedicated communication line as a main communication path. Then, when each of the battery modules VM1 to VM4 transmits a digital voltage value to the CAN bus, the microcomputer 52 selects any one of the digital voltage values of the battery modules VM1 to VM4 necessary for itself among the digital voltage values passing over the CAN bus. It becomes possible to get the value.
However, if the number of battery modules to be communicated increases, communication traffic on the CAN bus increases and communication stability is impaired. Therefore, the data update cycle must be delayed.
With the configuration combining the analog LPF and the digital LPF shown in the first or second embodiment, aliasing noise can be suppressed even if the data update period of the communication interface 80 is delayed.

10, 11, 12, 13, 14 Analog LPF (analog low-pass filter circuit)
20 A / D converter (A / D conversion means)
30, 31, 32, 33, 34 Digital LPF (digital low-pass filter circuit)
40, 70, 80 Communication interface (communication means)
50, 51, 52 Microcomputer (first microcomputer)
60 microcomputer (second microcomputer)
90 Multiplexer 91 Demultiplexer 100, 110, 120, 130 Battery voltage detector 200 Battery pack BC, BC1, BC2, BC3, BC4 Battery cell VM1, VM2, VM3, VM4 Battery module

Claims (7)

A battery voltage detection device for detecting a battery voltage value of the battery cell in an assembled battery in which battery modules including battery cells are connected in series,
A / D conversion means for detecting a battery voltage value of the battery cell and A / D converting it into a digital voltage value;
Communication means for transmitting the digital voltage value;
A first microcomputer for obtaining the digital voltage value via the communication means;
An analog low-pass filter circuit inserted between the battery cell and the A / D converter;
A digital low-pass filter circuit inserted between the A / D conversion means and the communication means,
The analog low-pass filter circuit has a characteristic of blocking a noise signal having a frequency equal to or higher than ½ of a first sampling frequency for A / D converting the battery voltage value,
The digital low-pass filter circuit has a characteristic of blocking a noise signal having a frequency equal to or higher than ½ of a second sampling frequency acquired by the first microcomputer from the digital voltage value,
The battery voltage detection device, wherein the first sampling frequency is higher than the second sampling frequency. A multiplexer is provided between the analog low-pass filter circuit corresponding to each battery cell and one A / D converter;
The multiplexer sequentially outputs battery voltage values input in parallel in series,
The A / D conversion means sequentially converts the battery voltage value of each battery cell input from the multiplexer into a digital voltage value,
The battery voltage detection device according to claim 1, wherein the converted digital voltage value is input to a plurality of digital low-pass filter circuits. The battery voltage detection device according to claim 1, wherein the digital low-pass filter circuit is a second microcomputer that executes a program having a function of the digital low-pass filter circuit. 3. The battery voltage detection device according to claim 2, wherein the digital low-pass filter circuit is a second microcomputer that executes a program having a function of the digital low-pass filter circuit. The communication means is sequentially connected to another adjacent communication means to sequentially transmit the digital voltage value, and the first microcomputer is connected to a terminal to receive the digital voltage value. The battery voltage detection device according to any one of claims 1 to 4. The plurality of communication means are connected to the first microcomputer, respectively, and the first microcomputer receives the digital voltage value from the plurality of communication means. The battery voltage detection apparatus of any one of thru | or 4th term | claim. The plurality of communication means and the first microcomputer are connected by a communication bus, and the first microcomputer receives the digital voltage value from the plurality of communication means. Item 5. The battery voltage detection device according to any one of Items 1 to 4.

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