WO2011040950A3 - Gestion d'interruption de puissance - Google Patents

Gestion d'interruption de puissance Download PDF

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Publication number
WO2011040950A3
WO2011040950A3 PCT/US2010/002557 US2010002557W WO2011040950A3 WO 2011040950 A3 WO2011040950 A3 WO 2011040950A3 US 2010002557 W US2010002557 W US 2010002557W WO 2011040950 A3 WO2011040950 A3 WO 2011040950A3
Authority
WO
WIPO (PCT)
Prior art keywords
transaction log
interrupt management
power interrupt
updating
information
Prior art date
Application number
PCT/US2010/002557
Other languages
English (en)
Other versions
WO2011040950A2 (fr
Inventor
Joseph M. Jeddeloh
Original Assignee
Micron Technology, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology, Inc. filed Critical Micron Technology, Inc.
Priority to KR1020127010707A priority Critical patent/KR101447786B1/ko
Priority to JP2012532063A priority patent/JP5585919B2/ja
Priority to EP10820934.7A priority patent/EP2483782B1/fr
Priority to CN201080043757.9A priority patent/CN102576332B/zh
Publication of WO2011040950A2 publication Critical patent/WO2011040950A2/fr
Publication of WO2011040950A3 publication Critical patent/WO2011040950A3/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1441—Resetting or repowering
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21—Employing a record carrier using a specific recording technology
    • G06F2212/214—Solid state disk
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7207—Details relating to flash memory management management of metadata or control data
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7209—Validity control, e.g. using flags, time stamps or sequence numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7211—Wear leveling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

L'invention concerne des procédés destinés à faire fonctionner un système de mémoire, et des systèmes de mémoire. L'un de ces procédés consiste à mettre à jour des informations de journal de transactions dans un journal de transactions au moyen d'informations d'anticipation d'écriture; et à mettre à jour un tableau d'adresse logique (LA) au moyen du journal de transactions.
PCT/US2010/002557 2009-10-01 2010-09-20 Gestion d'interruption de puissance WO2011040950A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020127010707A KR101447786B1 (ko) 2009-10-01 2010-09-20 파워 인터럽트 관리
JP2012532063A JP5585919B2 (ja) 2009-10-01 2010-09-20 電源遮断管理
EP10820934.7A EP2483782B1 (fr) 2009-10-01 2010-09-20 Gestion d'interruption de puissance
CN201080043757.9A CN102576332B (zh) 2009-10-01 2010-09-20 用于电力中断管理的方法和包含电力中断管理的存储器系统

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/572,083 US8990476B2 (en) 2009-10-01 2009-10-01 Power interrupt management
US12/572,083 2009-10-01

Publications (2)

Publication Number Publication Date
WO2011040950A2 WO2011040950A2 (fr) 2011-04-07
WO2011040950A3 true WO2011040950A3 (fr) 2011-08-18

Family

ID=43824049

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2010/002557 WO2011040950A2 (fr) 2009-10-01 2010-09-20 Gestion d'interruption de puissance

Country Status (7)

Country Link
US (3) US8990476B2 (fr)
EP (1) EP2483782B1 (fr)
JP (1) JP5585919B2 (fr)
KR (1) KR101447786B1 (fr)
CN (1) CN102576332B (fr)
TW (1) TWI459399B (fr)
WO (1) WO2011040950A2 (fr)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8990476B2 (en) * 2009-10-01 2015-03-24 Micron Technology, Inc. Power interrupt management
US9514838B2 (en) 2011-05-31 2016-12-06 Micron Technology, Inc. Apparatus including memory system controllers and related methods for memory management using block tables
US8543758B2 (en) * 2011-05-31 2013-09-24 Micron Technology, Inc. Apparatus including memory channel control circuit and related methods for relaying commands to logical units
US20130067289A1 (en) * 2011-09-14 2013-03-14 Ariel Maislos Efficient non-volatile read cache for storage system
US9104614B2 (en) * 2011-09-16 2015-08-11 Apple Inc. Handling unclean shutdowns for a system having non-volatile memory
US9075758B2 (en) 2012-03-19 2015-07-07 Samsung Electronics Co., Ltd. Removable storage device with transactional operation support and system including same
WO2013147894A1 (fr) * 2012-03-30 2013-10-03 Intel Corporation Gestion de disque à circuits intégrés dans la reprise sur perte d'alimentation
US9037820B2 (en) * 2012-06-29 2015-05-19 Intel Corporation Optimized context drop for a solid state drive (SSD)
US9015404B2 (en) * 2012-09-28 2015-04-21 Intel Corporation Persistent log operations for non-volatile memory
US9875054B2 (en) 2013-03-06 2018-01-23 Ab Initio Technology Llc Managing operations on stored data units
US10133500B2 (en) 2013-03-06 2018-11-20 Ab Initio Technology Llc Managing operations on stored data units
US9959070B2 (en) * 2013-03-06 2018-05-01 Ab Initio Technology Llc Managing operations on stored data units
US9218279B2 (en) * 2013-03-15 2015-12-22 Western Digital Technologies, Inc. Atomic write command support in a solid state drive
TWI498902B (zh) * 2013-11-28 2015-09-01 Phison Electronics Corp 資料管理方法、記憶體儲存裝置及記憶體控制電路單元
US10359937B2 (en) * 2013-12-20 2019-07-23 Sandisk Technologies Llc System and method of implementing a table storage support scheme
KR102625637B1 (ko) * 2016-02-01 2024-01-17 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
GB2559119B (en) * 2017-01-20 2020-12-30 Advanced Risc Mach Ltd Apparatus and methods to prolong lifetime of memories
US11314635B1 (en) * 2017-12-12 2022-04-26 Amazon Technologies, Inc. Tracking persistent memory usage
US11599403B2 (en) * 2018-10-03 2023-03-07 SK Hynix Inc. Logging mechanism for memory system
US11436153B2 (en) * 2020-05-26 2022-09-06 Western Digital Technologies, Inc. Moving change log tables to align to zones
US11709612B2 (en) 2020-07-02 2023-07-25 Silicon Motion, Inc. Storage and method to rearrange data of logical addresses belonging to a sub-region selected based on read counts
CN113885778B (zh) * 2020-07-02 2024-03-08 慧荣科技股份有限公司 数据处理方法及对应的数据储存装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0295424A2 (fr) * 1987-06-08 1988-12-21 International Business Machines Corporation Méthode pour gérer la commande de simultanéité de sous-pages et le repositionnement partiel de transactions dans un système transactionnel du type d'enregistrement à écriture anticipée
US20030163635A1 (en) * 2002-02-27 2003-08-28 Aasheim Jered Donald Transactional file system for flash memory
US20040003327A1 (en) * 2002-06-27 2004-01-01 Joshi Aniruddha P. Method and system to implement a system event log for system manageability

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US7003620B2 (en) * 2002-11-26 2006-02-21 M-Systems Flash Disk Pioneers Ltd. Appliance, including a flash memory, that is robust under power failure
US7885921B2 (en) 2004-11-18 2011-02-08 International Business Machines Corporation Managing atomic updates on metadata tracks in a storage system
JP4248510B2 (ja) 2005-03-24 2009-04-02 株式会社東芝 計算機システム、ディスク装置およびデータ更新制御方法
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US8990476B2 (en) * 2009-10-01 2015-03-24 Micron Technology, Inc. Power interrupt management
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Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0295424A2 (fr) * 1987-06-08 1988-12-21 International Business Machines Corporation Méthode pour gérer la commande de simultanéité de sous-pages et le repositionnement partiel de transactions dans un système transactionnel du type d'enregistrement à écriture anticipée
US20030163635A1 (en) * 2002-02-27 2003-08-28 Aasheim Jered Donald Transactional file system for flash memory
US20040003327A1 (en) * 2002-06-27 2004-01-01 Joshi Aniruddha P. Method and system to implement a system event log for system manageability

Also Published As

Publication number Publication date
US20110082963A1 (en) 2011-04-07
TW201120904A (en) 2011-06-16
US8990476B2 (en) 2015-03-24
EP2483782A2 (fr) 2012-08-08
CN102576332A (zh) 2012-07-11
US10564690B2 (en) 2020-02-18
JP2013506903A (ja) 2013-02-28
JP5585919B2 (ja) 2014-09-10
EP2483782A4 (fr) 2014-06-04
TWI459399B (zh) 2014-11-01
EP2483782B1 (fr) 2015-11-25
KR101447786B1 (ko) 2014-10-06
US20180101209A1 (en) 2018-04-12
KR20120060236A (ko) 2012-06-11
US9874918B2 (en) 2018-01-23
US20150185798A1 (en) 2015-07-02
WO2011040950A2 (fr) 2011-04-07
CN102576332B (zh) 2015-04-29

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