WO2011021981A1 - Procédé de découpage d’une tranche en dés - Google Patents

Procédé de découpage d’une tranche en dés Download PDF

Info

Publication number
WO2011021981A1
WO2011021981A1 PCT/SG2009/000284 SG2009000284W WO2011021981A1 WO 2011021981 A1 WO2011021981 A1 WO 2011021981A1 SG 2009000284 W SG2009000284 W SG 2009000284W WO 2011021981 A1 WO2011021981 A1 WO 2011021981A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
dicing
dry
cleaning
dies
Prior art date
Application number
PCT/SG2009/000284
Other languages
English (en)
Inventor
Ling Xie
Chirayharikathu Veedu Sankarapillai Premachandran
Ei Pa Pa Myo
Navas Khan Oratti Kalandar
Vaidyanathan Kripesh
Pavel Neuzil
Hon-Shing John Lau
Original Assignee
Agency For Science, Technology And Research
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency For Science, Technology And Research filed Critical Agency For Science, Technology And Research
Priority to PCT/SG2009/000284 priority Critical patent/WO2011021981A1/fr
Publication of WO2011021981A1 publication Critical patent/WO2011021981A1/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Definitions

  • Embodiments relate generally to a method of dicing a wafer, in particular, to a method of dicing a wafer comprising MEMS (microelectromechanical systems) .
  • MEMS microelectromechanical systems
  • MEMS are integrated micro devices or systems combining electrical and mechanical components, and are fabricated in a similar manner as conventional integrated circuits.
  • MEMS packaging is generally known to be more challenging compared to conventional integrated- circuits packaging.
  • the main challenges in the packaging of MEMS sensors are due to the presence of 3D micro-structures, such as membrane diaphragm, mirrors and even moving elements. These sensitive structure of MEMS need to be protected during the packaging process .
  • the packaging process starts with a dicing process, i.e. the singulation of a wafer into individual chips or dies. A conventional mechanical sawing is used to dice the wafer.
  • a high pressure jet of water is used to clean the debris generated during the mechanical sawing, and at the same time to reduce the heat generated during the mechanical cutting of the wafer and to cool the dicing saw blade.
  • the jet of water exerts pressure on the surface of the wafer.
  • the high- speed rotating dicing saw blade generates an airwave that exerts certain amount of pressure on the surface of the wafer.
  • the wafer surfaces also encounter pressure exerted by the water jets. Combined effects of the jet of water and the airwave tend to damage the sensitive MEMS on the wafer.
  • some sensitive MEMS such as floating membrane and thin diaphragm devices, cannot be diced using the conventional mechanical sawing method. Table 1 lists some challenges that are encountered when using conventional sawing process to dice a wafer with sensitive MEMS.
  • an additional layer such as an additional silicon wafer or a polymer coating layer, is provided to cover the sensitive MEMS structures.
  • Protecting the MEMS structures by an additional wafer is usually by wafer to wafer bonding of the MEMS wafer with a cap wafer, which can be either a silicon wafer or a glass wafer.
  • a cap wafer which can be either a silicon wafer or a glass wafer.
  • the MEMS wafer is bonded with the cap wafer, movement of the MEMS structure or sensing of the MEMS structure are not able to characterize properly during testing.
  • Each MEMS structure in the wafer may be protected by a thin cap membrane using a silicon nitride cap layer with a polymer coating. This is a wafer level process and requires additional process development. The MEMS wafer will be released during the capping process, and thus testing of the MEMS structures may not be possible during the development of the MEMS structures.
  • the additional layer above protects the MEMS structures during the dicing of the wafer, additional process is required and testing of devices with a protective capping is difficult.
  • the additional protective capping increases the form factor of the package (i.e. height of the package) .
  • Another approach is to use a dry dicing process, e.g. laser dicing, such that high jet of water process used in the conventional mechanical sawing can be avoided, thereby avoiding physical damage to the wafer.
  • a dry dicing process e.g. laser dicing
  • Conventional laser ablation is getting popular in semiconductor industry because of its advantage in dicing thin wafers and making through hole vias in silicon wafers.
  • laser dicing provides a dry process without wet and mechanical damage to the MEMS structures
  • debris i.e. small dust particles
  • Laser dicing is usually used to dice thin wafer (e.g. below 200 ⁇ m) .
  • thick wafer e.g. about 200 ⁇ m- 700 ⁇ m
  • heavy debris will be generated.
  • the volume of the debris is equal to the volume of wafer material to be removed away from the kerf, more debris will be generated if the deeper dicing is to be conducted.
  • Table 2 compares the laser dicing with the conventional mechanical dicing.
  • dicing a thick wafer e.g. about 200 ⁇ m-700 ⁇ m
  • MEMS structures such as comb structure
  • Embodiments provide a method of dicing a wafer having an active surface and an inactive surface opposing the active surface, wherein the active surface comprises components sensitive to at least one of liquid, pressure and vibration.
  • the method may include applying a protecting layer on at least a portion of the inactive surface of the wafer; and dry dicing through the wafer from the inactive surface of the wafer through the protecting layer and the wafer to form a plurality of dies separated from each other.
  • Fig. 1 shows a flowchart illustrating a method of dicing a wafer according to an embodiment
  • Fig. 2A shows a flowchart illustrating a method of dicing a wafer according to another embodiment
  • Fig. 2B shows a flowchart illustrating a method of dicing a wafer according to a further embodiment
  • Figs. 3A - 3G show a process of dicing a wafer according to an embodiment
  • Fig. 4 shows a supporting medium for a wafer according to an embodiment
  • Figs. 5A - 5C show some examples of step dicing
  • Fig. 6A illustrates the types of debris generated during the dry dicing
  • Fig. 6B shows an example of cleaning the debris according to an embodiment
  • Fig. 7 shows a cross-section view of a MEMS die
  • Fig. 8 shows a back side of a wafer.
  • Embodiments provide a method of dicing a wafer having an active surface and an inactive surface opposing the active surface.
  • the method according to the embodiments dices a wafer without damaging the sensitive component or circuit fabricated on the wafer.
  • the active surface may be understood to be a side of the wafer including components sensitive to at least one of liquid, pressure and vibration. These sensitive components may be damaged if contacting with liquid, or if subject to pressure caused by liquid, gas or mechanical force, or if subject to vibration. Examples of such sensitive components may include circuit, MEMS, optical or sensor devices.
  • the inactive surface may be understood to be the opposing side of the wafer without component or circuit.
  • a protecting layer is applied on at least a portion of the inactive surface of the wafer.
  • the wafer is diced through using a dry dicing process from its inactive surface through the protecting layer and the wafer to form a plurality of dies separated from each other.
  • the dry dicing through the wafer includes dry dicing the wafer from the inactive surface through the protective layer to form the plurality of dies partially separated from each other; cleaning the wafer to remove debris generated by the dry dicing; and dry dicing through the wafer from the inactive surface to separate the plurality of dies.
  • the method includes further dry dicing the wafer to deepen respective dicing streets formed by the dry dicing of the wafer which forms the plurality of dies partially separated from each other.
  • the dicing streets may be defined as the areas of the wafer that have been cut away during the dry dicing.
  • the further dry dicing removes more of the wafer material, such as silicon, between the dies partially separated from each other.
  • the wafer is further cleaned to remove debris generated by the further dry dicing of the wafer which deepens the respective dicing streets.
  • the further dry dicing and the further cleaning as described above may be repeated for one or more times, e.g., depending on the thickness of the wafer, to gradually deepen the dicing streets.
  • the dry dicing as described in the embodiments may include laser dicing along prescribed dicing lines.
  • the dry dicing may also include plasma dicing along prescribed dicing lines.
  • Other types of dry dicing may also be used in other embodiments.
  • the cleaning as described above may include dry cleaning.
  • the dry cleaning may include dry etching, such as plasma etching or other types of etching, wherein wet etchants are not used in the cleaning.
  • the dry cleaning may be performed using one or more cleaning materials.
  • the debris generated during the dry dicing may include different semiconductor materials, and different cleaning materials are used to etch away the corresponding semiconductor materials.
  • fluoroform (CHF3) may be used in the dry cleaning to remove silicon oxide debris generated in the kerf.
  • XeF2 xenon difluoride
  • SF ⁇ Sulfur hexafluoride
  • the dry cleaning may be performed in a vacuum chamber, such that the cleaning material in the form of gas may be input into the chamber to clean the wafer being diced.
  • the protecting layer may include a protecting tape.
  • the protecting tape may be selected with a small thickness, such that less dust will be generated during dicing of the wafer through the protecting tape.
  • the protecting tape may be selected with an appropriate adhesion, such that the protecting tape adheres to the inactive surface of the wafer during the dicing. After the plurality of dies is separated from each other, the protecting layer covering the plurality of dies may be removed. The protecting tape may be selected with an appropriate adhesion, such that the protecting tape is able to be removed without damaging the dies after the dies are separated.
  • the components sensitive to at least one of liquid, pressure and vibration includes at least one microelectromechanical system.
  • the at least one microelectromechanical system may be located on the active surface of the wafer, and may be damaged if contacting with liquid or if subject to liquid pressure and/or mechanical pressure.
  • the sensitive components may include other types of circuitry, which is vulnerable to liquid contamination and/or pressure and/or vibration.
  • the dry dicing of the wafer as described above is from the inactive surface of the wafer.
  • the inactive surface of the wafer may be a surface with one or more through holes or without holes.
  • the inactive surface may also include one or more cavities which link to the active surface, e.g. the sensitive components on the active surface.
  • the through holes and/or the cavities may be protected by the protecting layer, such that the debris generated during the dicing will not enter the through holes and/or cavities.
  • the method further includes mounting the wafer on a supporting medium with the active surface facing the supporting medium.
  • the active surface may face downwardly.
  • the dicing and cleaning of the wafer may be performed on the inactive surface facing upwardly.
  • the laser burning, the debris, and the cleaning materials as used in the dicing and cleaning process will not affect the active surface of the wafer which may include circuit or sensitive MEMS.
  • the wafer is mounted on the supporting medium in a manner such that the supporting medium only contacts at least part of the perimeter of the wafer, leaving the central area of active surface of the wafer intact. In an embodiment, at least part of the perimeter of the wafer is an area without active/sensitive components or circuit. In another embodiment, the wafer may be mounted on the supporting medium in a manner such that the supporting medium contacts the entire active surface of the wafer.
  • the supporting medium may include a supporting frame, e.g. a thin sheet metal frame.
  • a dicing tape may be attached on the supporting frame, such that it sticks to the wafer to hold the wafer on the supporting frame.
  • the supporting medium may further include a supporting layer, e.g., a supporting wafer or a layer comprising any other suitable material, arranged on the dicing tape to support the wafer to be diced.
  • the supporting layer may further protect the circuit or MEMS on the active surface of the wafer facing the supporting medium.
  • Fig. 1 shows a flowchart illustrating a method of dicing a wafer according to an embodiment.
  • a protecting layer is applied on at least a portion of an inactive surface of the wafer.
  • An active surface of the wafer comprises components sensitive to at least one of liquid, pressure and vibration.
  • the wafer is dry diced from its inactive surface through the protecting layer and the wafer to form a plurality of dies separated from each other.
  • the wafer is diced from its inactive surface using a dry dicing process.
  • Fig. 2A shows a flowchart illustrating a method of dicing a wafer according to another embodiment.
  • a protecting layer is applied on at least a portion of an inactive surface of the wafer.
  • An active surface of the wafer comprises components sensitive to at least one of liquid, pressure and vibration.
  • the wafer is dry diced from its inactive surface through the protecting" layer to form a plurality of dies partially separated from each other.
  • the wafer is cleaned to remove debris generated by the dry dicing.
  • the wafer is dry diced through to separate the plurality of dies.
  • the dry dicing at 203 may separate the dies partially, and then followed by the cleaning at 205. This is to timely remove the debris deposited on the side walls and the opening of the die streets, so as to avoid the neighboring MEMS structures to be damaged.
  • the wafer may be dry diced through to separate the plurality of dies.
  • Fig. 2B shows a flowchart illustrating a method of dicing a wafer according to a further embodiment.
  • a protecting layer is applied on at least a portion of an inactive surface of the wafer.
  • An active surface of the wafer comprises components sensitive to at least one of liquid, pressure and vibration.
  • the wafer is dry diced from its inactive surface through the protecting layer to form a plurality of dies partially separated from each other.
  • the wafer is cleaned to remove debris generated by the dry dicing.
  • the wafer is further dry diced to deepen respective dicing streets formed by the dry dicing of the wafer which forms the plurality of dies partially separated from each other at 253.
  • the wafer is further cleaned to remove debris generated by the further dry dicing which deepens the respective dicing streets at 257.
  • the wafer is dry diced through to separate the plurality of dies .
  • the further dicing and further cleaning at 257 and 259 may be repeated for one or more times depending on the thickness of the wafer, so as to gradually deepen the dicing streets and increase the degree of separation of the dies. This helps to avoid accumulation of too much debris on the side walls and the opening of the die streets, and makes it possible to timely remove the debris deposited on the side walls and the opening of the die streets. In this way, the damage of the neighboring sensitive components including MEMS structures may be avoided.
  • Figs. 2A and 2B thus provide a step dicing method which may dice thick wafer without letting the debris damaging the sensitive circuit or component of the wafer.
  • Figs. 3A - 3G show a process of dicing a wafer according to an embodiment .
  • Fig. 3A shows a wafer 300 having an active surface 301 and an inactive surface 303.
  • the active surface 301 also referred to as the front side of the wafer 300, may include sensitive circuit or MEMS structures, such as comb structures 305.
  • the inactive surface 303 also referred to as the back side of the wafer 300, may be a surface without holes, a surface including one or more through holes or cavities linked to the components on the active surface 301.
  • the wafer may be a semiconductor wafer such as a silicon wafer, a polymer wafer, or a metal wafer, a glass wafer, a ceramic wafer, or may be made of any material which is suitable to fabricate electronic device or MEMS structures thereon.
  • a protecting layer 311 e.g. a protecting tape 311 or other types of protecting layer such as a photoresist is applied on an inactive surface 303 without a cavity, or on an inactive surface 303 with one or more cavities which link to the components on the active side of the wafer 300.
  • the active surface 301 is facing downwardly, and the inactive surface 303 is facing upwardly for the convenience of applying the protecting tape 311.
  • the inactive surface 303 including the through holes or cavities at the inactive surface 303 is protected in the following dicing and cleaning process.
  • the protecting tape 311 may be a plastic tape, a normal dicing tape, a UV release tape, a heat release tape, or any other suitable tape, which may adhere to the inactive surface 303 to protect the inactive surface 303 during the dicing and cleaning process.
  • the protecting layer 311 may also be a metal foil thin film, gel, wafers including Si or glass wafers bonded on the inactive surface 303 of the wafer 300, to protect the inactive surface during the dicing and cleaning process.
  • the protecting tape 311 may be applied to cover at least a portion of the inactive surface 303.
  • the protecting tape 311 may also be applied to cover the side surfaces of the wafer 300 in an example shown in Fig. 3B. A top view of the wafer 300 protected by the protecting tape 311 is shown as 319.
  • the wafer 300 is mounted on a supporting medium.
  • the supporting medium may be a hollow chuck 313.
  • the wafer 300 may be mounted on the hollow chuck 313, such that the wafer
  • the supporting medium may support the wafer 300 in a manner such that the entire active surface 301 is supported and protected by the supporting medium.
  • the wafer 300 is dry diced from the inactive surface 303 through the protecting tape 311 to form a plurality of dies 321 partially separated from each other. Dicing the wafer 300 from the inactive surface 303 will prevent debris generated during the dicing falling on the active surface 301 of the wafer 300.
  • a top view of the wafer 300 with the plurality of dies 321 is shown by 323, wherein the lines 325 are the dicing lines along which the dry dicing is carried out.
  • the dry dicing may be performed by laser dicing.
  • the areas within the wafer 300 that has been cut away, i.e. die streets 327, are in a predetermined first width 331, e.g. in a range from about 200 ⁇ m to about 20 ⁇ m, e.g. in a range from about 175 ⁇ m to about 45 ⁇ m, e.g. 150 ⁇ m.
  • the protecting tape 311 above the die streets 327 (in other words, the portions of the protecting tape 311 covering the die streets 327) is cut away, but a portion of the protecting tape 311 remains on the respective dies 321 to protect the dies 321.
  • the dry dicing is not cutting through the wafer 300, remaining the areas connecting the plurality of dies 321 partially separated from each other with a predetermined first height 333, e.g. about 200 ⁇ m, so that not too much debris is generated and accumulated.
  • the wafer 300 is cleaned to remove the debris generated during the dry dicing in Fig. 3C.
  • the dry dicing in Fig. 3C such as the laser dicing, may be carried out under ambient condition.
  • the cleaning of the wafer may be performed in a chamber, e.g. a vacuum chamber 341 in Fig. 3D.
  • the wafer 300 being diced may be placed in the vacuum chamber 341.
  • Cleaning gas such as etching gas, may be supplied to an inlet port 343 of the vacuum chamber 341 and purged through an outlet port 345 of the vacuum chamber 341.
  • the cleaning gas provides a dry cleaning process to clean or etch the debris generated during the dicing of the wafer 300, which will be described in more detail below.
  • the wafer 300 may be mounted back on the hollow chuck 313 under ambient condition, and is further dry diced to deepen the respective dicing streets 327.
  • the areas connecting the plurality of dies 321 may be reduced to a second predetermined height 335, e.g. in a range from about 150 ⁇ m to about 50 ⁇ m, e.g. in a range from about 125 ⁇ m to about 75 ⁇ m, e.g. lOO ⁇ m.
  • the further dry dicing may be performed from the bottom surface of the dicing streets 327.
  • the dicing streets 327 may be deepened with a predetermined second width 337 in Fig. 3E.
  • the second width 337 in one example may be the same as the first width 331 of e.g. 150 ⁇ m in Fig. 3C, or in another example may be a reduced second width, e.g. 60 ⁇ m.
  • the wafer 300 may be further cleaned, as shown in Fig. 3F, to remove the debris generated during the dry dicing in Fig.3E.
  • the further cleaning in Fig. 3F is similar to the cleaning in Fig. 3D, wherein the wafer in Fig.
  • a dry dicing is carried out through the wafer 300, such that the plurality of dies 321 is separated from each other. As the supporting frame 313 only contacts the perimeter of the wafer and leaves the central area of the active surface 301 intact, the debris generated during the dry dicing through step in Fig. 3G will fall via the dicing streets 327, without the need for an additional cleaning step.
  • the further dry dicing in Fig. 3G may deepen the dicing streets 327 with a predetermined third width 339.
  • the third width 337 may be smaller compared with the second width 337, as shown in Fig. 3F. In other examples the third width 339 may be the same as the second width 337.
  • the wafer 300 is mounted on a supporting medium in the form of a hollow chuck 313 during the dry dicing.
  • the supporting medium may include a dicing tape 351 attached to a supporting frame 353, and may include a supporting layer 355 arranged on the dicing tape 351 to support the wafer 300.
  • the supporting layer 355 may be a supporting wafer in an example, and may be a supporting layer in any other suitable material, to further protect the circuit or MEMS on the active surface 301 of the wafer 300 facing the supporting medium.
  • the supporting medium may be selected to be a hollow chuck, such that the debris may fall via the dicing streets, saving the need for a further cleaning.
  • the laser action in the dry dicing can be stopped after dicing through the wafer which is supported on the hollow chuck.
  • the supporting medium selected as the hollow chuck in the last dicing through step may also be advantageous over the supporting medium shown in Fig. 4 by avoiding reaction of laser with the supporting layer in Fig. 4 and additional debris generated by such a reaction.
  • the plurality of dies may be obtained.
  • the protecting tape applied on the plurality of dies for protecting the dies during the dry dicing and cleaning may then be removed.
  • the protecting tape covering the plurality of dies protects the dies during the dry cleaning process in the vacuum chamber, which requires a protecting tape with sufficient adhesion.
  • a protecting tape with excessive adhesion will damage the MEMS structures during the removal.
  • a protecting tape with an appropriate adhesion is applied to the inactive surface of the wafer, such that the protecting tape does not peel during the dry cleaning and is easy to be removed after dicing and cleaning.
  • the dicing process as described in the above embodiments dices the wafer from its inactive surface without damaging the sensitive circuit or MEMS structures on the active surface, and at the same time prevents debris spreading into the neighboring MEMS structures by performing the cleaning during the dicing and by a step dicing method.
  • Figs. 5A - 5C show some examples of step dicing.
  • a dicing with single step cut is performed on a silicon wafer 300, which may be used for a thin wafer
  • the dicing streets 501 extend through the wafer 500 to form a plurality of dies 503 separated from each other.
  • the melted silicon may become vaporized and is removed by a suction process.
  • a thick wafer e.g. about 200 ⁇ m -
  • Fig. 5B shows a dicing with two step cut performed on the silicon wafer 300 according to an embodiment.
  • the dicing streets 501 extend partially through the wafer- 500 to form a plurality of dies 503 partially separated from each other.
  • the debris generated during the first step cut is timely cleaned.
  • the second step cut is then performed to deepen the dicing streets 501 such that the dicing streets 501 extend through the wafer 500. This may prevent the debris generated during the dicing from spreading into the dies 503.
  • Fig. 5C shows a dicing with three step cut performed on the silicon wafer 300 according to another embodiment. Different from Fig. 5B, a third step cut is used to dice through the wafer. This may further improve the performance of the dicing process.
  • Figs. 5B and 5C may be performed to cut the wafer with different widths as illustrated, or may be performed to cut the wafer with the same width.
  • debris is cleaned during the dicing.
  • Fig. 6A illustrates the types of debris generated during the dry dicing.
  • a silicon wafer 600 is protected with a protecting tape 601 at its inactive surface, and is dry diced to form a plurality of dies partially separated from each other by the respective dicing streets 603.
  • some floating debris 611 flies to the top and deposits on the inactive surface of the wafer 600. This type of debris may be removed, e.g. by cleaning or suction process.
  • the debris 613 along the side wall and opening of the dicing streets 603 may include several types of debris.
  • the first type may be floating debris, which may be easily removed as the floating debris 611 above.
  • the second type of debris 613 is fused silicon oxide debris, which is formed by transformation of silicon in the wafer under high temperature of laser dicing.
  • the second type of debris may be deposited along the surface of the dicing streets 603.
  • the third type of debris 613 is fused silicon, which is ' in the kerf.
  • the cleaning process may need to use different cleaning material to remove all types of debris.
  • the second type of debris 613 i.e. the silicon oxide on the surface of the dicing streets 603, may be cleaned using fluoroform (CHF3) in a dry etching process.
  • fluoroform CHF3
  • Other suitable etching material which may etch away silicon oxide may be used in other embodiments.
  • the third type of debris 613 i.e. the fused silicon in the kerf, may be cleaned using xenon difluoride (XeF2) in a dry etching process.
  • XeF2 xenon difluoride
  • Other suitable etching material which may etch away silicon may be used in other embodiments, such as Sulfur hexafluoride (SF 6 ) .
  • a dry etching process may include alternate silicon oxide etching and silicon etching to remove all types of debris.
  • Fig. 6B shows an example of cleaning the debris according to an embodiment.
  • the fused silicon debris 613 is to be cleaned in this example.
  • xenon difluoride (XeF2) gas 621 is used to dry etch the fused silicon debris 613 based on the following formula: 2XeF2 + Si -» 2Xe (g) t + SiF4 (g) f
  • the protecting tape 601 protects the wafer surface during the dry etching using XeF2. It is noticed that Figs. 6A and 6B are according to an example wherein the wafer to be diced is a silicon wafer.
  • Fig. 7 shows a cross-section view of a MEMS die 701, including comb structures 703 and springs 705.
  • the MEMS die 701 may have a dimension of 900 ⁇ m along one longitudinal side of the die 701, and may have a dimension of 50 ⁇ m in thickness.
  • the back side of the MEMS die 701 includes a cavity 711 linked to the comb structures 703 and springs 705 on the front side of the MEMS die 701.
  • the cavity may have a dimension of 500 ⁇ m along one longitudinal side of the die 701 and may have a dimension of 350 ⁇ m in height. Due to the cavity 711, the sensitive comb structures 703 and springs 705 may be damaged by liquid or pressure from the back side of the wafer.
  • a protective layer is applied on the back side of the wafer covering the cavity.
  • the sensitive structure at the front side of the wafer is protected from liquid, pressure and vibration, and the MEMS die 701 is obtained without damaging the comb structures 703 and the springs 705 of the die 701.
  • Fig. 8 shows a back side of a wafer 800, which includes a cavity 811.
  • the cavity 811 may be protected with a protecting tape during the dry dicing and cleaning, according to the method as described in the above embodiments.
  • the method of dicing a wafer according to the embodiments above uses a dry dicing from an inactive surface of the wafer, which protects the active surface of the wafer during the dicing as well as prevents debris from falling on the active surface to contaminate the active surface.
  • the method of the embodiments reduces damages to the sensitive circuit or component of the wafer, and would thus also increase the yield.
  • the method of dicing a wafer according to the embodiments also provide a step dicing method, which further improves the performance of the diced dies by cleaning debris timely during the dicing process.
  • the method is also suitable for dicing a thick wafer.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Micromachines (AREA)

Abstract

Les modes de réalisation de l’invention concernent un procédé de découpage en dés d’une tranche comportant une surface active et une surface inactive, opposée à la surface active, la surface active comprenant des composants sensibles à au moins un des éléments du groupe constitué par un liquide, une pression et des vibrations. Le procédé comprend les étapes consistant à : appliquer une couche de protection sur au moins une partie de la surface inactive de la tranche; et découper la tranche en dés à sec à partir de la surface inactive de la tranche, à travers la couche de protection et la tranche, pour former une pluralité de dés séparés les uns des autres.
PCT/SG2009/000284 2009-08-17 2009-08-17 Procédé de découpage d’une tranche en dés WO2011021981A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/SG2009/000284 WO2011021981A1 (fr) 2009-08-17 2009-08-17 Procédé de découpage d’une tranche en dés

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SG2009/000284 WO2011021981A1 (fr) 2009-08-17 2009-08-17 Procédé de découpage d’une tranche en dés

Publications (1)

Publication Number Publication Date
WO2011021981A1 true WO2011021981A1 (fr) 2011-02-24

Family

ID=43607224

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SG2009/000284 WO2011021981A1 (fr) 2009-08-17 2009-08-17 Procédé de découpage d’une tranche en dés

Country Status (1)

Country Link
WO (1) WO2011021981A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103060920A (zh) * 2013-01-05 2013-04-24 武汉电信器件有限公司 一种高精度无污染的半导体晶片解理方法
CN110998797A (zh) * 2017-07-20 2020-04-10 岩谷产业株式会社 切割加工方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040102025A1 (en) * 2002-11-20 2004-05-27 Matsushita Electric Industrial Co., Ltd. Method of manufacturing semiconductor device, plasma processing apparatus and plasma processing method
EP1439578A2 (fr) * 2003-01-20 2004-07-21 Shinko Electric Industries Co., Ltd. Procédé de découpage d'une plaquette semi-conductrice
EP1892275A2 (fr) * 2006-08-22 2008-02-27 Nitto Denko Corporation Feuille adhésive pour traitement au laser
US20090124063A1 (en) * 2007-11-13 2009-05-14 Disco Corporation Method of manufacturing semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040102025A1 (en) * 2002-11-20 2004-05-27 Matsushita Electric Industrial Co., Ltd. Method of manufacturing semiconductor device, plasma processing apparatus and plasma processing method
EP1439578A2 (fr) * 2003-01-20 2004-07-21 Shinko Electric Industries Co., Ltd. Procédé de découpage d'une plaquette semi-conductrice
EP1892275A2 (fr) * 2006-08-22 2008-02-27 Nitto Denko Corporation Feuille adhésive pour traitement au laser
US20090124063A1 (en) * 2007-11-13 2009-05-14 Disco Corporation Method of manufacturing semiconductor device

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
"Sulphur Hexafluoride (SF6)", Retrieved from the Internet <URL:http://web.archive.org/webl19981201181414/http://www.c-fc.com/charts/sf6data.htm> [retrieved on 19981201] *
"What is MEMS Technology?", Retrieved from the Internet <URL:http://web.archive.org/web/20020220054127/http://www.memsnet.org/mems/what-is.html> [retrieved on 20020220] *
"Xenon Difluoride", Retrieved from the Internet <URL:http://web.archive.org/web/20071214054255/http://en.wikipedia.org/wiki/Xenon> [retrieved on 20071214] *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103060920A (zh) * 2013-01-05 2013-04-24 武汉电信器件有限公司 一种高精度无污染的半导体晶片解理方法
CN110998797A (zh) * 2017-07-20 2020-04-10 岩谷产业株式会社 切割加工方法
CN110998797B (zh) * 2017-07-20 2024-03-08 岩谷产业株式会社 切割加工方法

Similar Documents

Publication Publication Date Title
EP0657759B1 (fr) Traitement en plaquette de dispostifs à miroirs déformables (DMD) après sciage
TW559876B (en) Method and apparatus for dicing a semiconductor wafer
JP3568980B2 (ja) チップに切断後のicのウエハ形態での加工処理法
US5710065A (en) Method and apparatus for breaking and separating dies from a wafer
EP0818808B1 (fr) Améliorations relatives aux dispositifs semi-conducteurs
KR20070051360A (ko) 웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법
CN1740087B (zh) 半导体装置的单片化方法
JP2005051007A (ja) 半導体チップの製造方法
JP5887633B1 (ja) 半導体片の製造方法
JP2009111147A (ja) 半導体チップ及びその製造方法
US8043880B2 (en) Microelectronic device
US8030180B2 (en) Method of manufacturing a semiconductor device
JP2009226582A (ja) 半導体装置の製造方法
CN108962820B (zh) 处理衬底的方法
CN109052307B (zh) 晶圆结构及晶圆加工方法
WO2011021981A1 (fr) Procédé de découpage d’une tranche en dés
JP4408900B2 (ja) 複数の半導体ウエハのサポートシステムおよびその方法
US8999107B2 (en) Laser ashing of polyimide for semiconductor manufacturing
JP2004349416A (ja) Memsの製造方法
TWI469914B (zh) 微機械構造切分用的保護系統及方法
CN100382280C (zh) 晶片切割方法
US20090298231A1 (en) Cmos process for fabrication of ultra small or non standard size or shape semiconductor die
EP2015356A1 (fr) Procédé de séparation de gaufres
JPH1070094A (ja) 半導体センサウェハの切断方法
Martin et al. Dicing of MEMS devices

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09848543

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 09848543

Country of ref document: EP

Kind code of ref document: A1