WO2011005008A2 - Substrate for the deposition of a deposition apparatus, film-forming method, and method for manufacturing an organic electroluminescence display device using the substrate for deposition - Google Patents

Substrate for the deposition of a deposition apparatus, film-forming method, and method for manufacturing an organic electroluminescence display device using the substrate for deposition Download PDF

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WO2011005008A2
WO2011005008A2 PCT/KR2010/004390 KR2010004390W WO2011005008A2 WO 2011005008 A2 WO2011005008 A2 WO 2011005008A2 KR 2010004390 W KR2010004390 W KR 2010004390W WO 2011005008 A2 WO2011005008 A2 WO 2011005008A2
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layer
heating
joule
deposition
substrate
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PCT/KR2010/004390
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French (fr)
Korean (ko)
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WO2011005008A3 (en
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노재상
홍원의
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주식회사 엔씰텍
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Publication of WO2011005008A3 publication Critical patent/WO2011005008A3/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/12Organic material
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24Vacuum evaporation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/10Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/18Deposition of organic active material using non-liquid printing techniques, e.g. thermal transfer printing from a donor sheet
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays

Definitions

  • the present invention relates to a film formation method using a deposition substrate of a vapor deposition apparatus, and more particularly to a film deposition method for depositing a constant film by Joule heating by applying an electric field to the conductive layer.
  • the organic light emitting display device has a high response time with a response speed of 1 ms or less, low power consumption, and self-luminous light, so there is no problem in viewing angle, and thus it is advantageous as a moving image display medium regardless of the size of the device. .
  • low-temperature manufacturing is possible, and the manufacturing process is simple based on the existing semiconductor process technology has attracted attention as a next-generation flat panel display device in the future.
  • Formation of the thin film of the flat panel display or the organic light emitting display device can be broadly divided into a high molecular type device using a wet process and a low molecular type device using a deposition process according to the materials and processes used.
  • the light emitting layer is formed by a deposition process
  • a separate metal mask is used.
  • the size of the metal mask must increase in size, and the metal mask sags as the size increases. There is a problem that occurs, it is difficult to manufacture a large device.
  • FIG. 1 is a schematic cross-sectional view of a deposition apparatus having a deposition mask.
  • a thin film deposition container provided in a vacuum chamber 2 is provided.
  • the frame 4 coupled with the mask is installed on the side corresponding to the) and the object 5 on which the thin film is to be formed is mounted.
  • the magnet unit 6 for driving the mask 1 supported on the frame 4 to the object 5 on which the thin film is to be formed is driven on the upper portion of the mask 1 to form the thin film or the like.
  • the operation of the thin film deposition container 3 causes the material attached thereto to be deposited on the object 5.
  • the deposition mask should be enlarged as the flat panel display device becomes larger.
  • the mask may be formed due to the deflection of the mask. It is difficult to manufacture a large device because the alignment between the object and the object is difficult.
  • an object of the present invention is to solve all the disadvantages and problems of the prior art as described above, and an object of the present invention is to provide a new film forming method, which is advantageous for manufacturing a large device.
  • the present invention is a substrate; Joule heating exothermic conductive layer formed on the substrate; And a deposition material layer formed on an entire surface of the substrate including the joule heating exothermic conductive layer.
  • the present invention also provides a substrate for deposition of a deposition apparatus, wherein the heating conductive layer for heating the joule is patterned according to the shape of a film formed by the deposition apparatus.
  • the present invention provides a substrate, forming a heating conductive layer for Joule heating on the substrate, forming a material layer for deposition on the entire surface of the substrate including the heating conductive layer for Joule heating, the Joule heating
  • a film forming method is provided by applying an electric field to a heat generating conductive layer to Joule heat the deposition material layer.
  • the present invention provides a film forming method characterized in that the heating conductive layer for Joule heating is patterned corresponding to the shape of the film formed by the deposition apparatus.
  • the present invention provides a film forming method characterized in that the joule heating of the material layer for deposition is a material layer for deposition in a region corresponding to the heating conductive layer for heating the joule.
  • the present invention provides a film forming method characterized in that the deposition material of the deposition material layer in the region corresponding to the heat generating conductive layer for Joule heating is evaporated.
  • the present invention also provides a first substrate; Forming a first electrode layer on the first substrate; Forming a pixel definition layer on the first electrode layer; An opening for exposing a portion of the first electrode layer on the pixel definition layer; Forming an organic layer on the first electrode layer and including an emission layer;
  • the method of manufacturing an organic light emitting display device including forming a second electrode layer on the organic layer, wherein at least one layer of the organic light emitting display device includes a second substrate corresponding to the first substrate.
  • a method of manufacturing an organic light emitting display device is provided by applying an electric field to a heat generating conductive layer for heating a first joule to form a joule heating of the first deposition material layer.
  • the present invention is a semiconductor layer comprising a channel region and a source / drain region on the first substrate; A gate electrode corresponding to the channel region of the semiconductor layer; And forming a thin film transistor having a source / drain electrode electrically connected to the semiconductor layer, wherein the gate electrode or the source / drain electrode of the thin film transistor includes a third substrate corresponding to the first substrate.
  • a method of manufacturing an organic light emitting display device is provided by applying an electric field to a heat generating conductive layer for heating a second joule to Joule heating the second material layer for deposition.
  • the present invention provides a method of manufacturing an organic light emitting display device, wherein the joule heating of the deposition material layer is a deposition material layer in a region corresponding to the heating conductive layer for heating the joule.
  • the present invention provides a method of manufacturing an organic light emitting display device, characterized in that the deposition material of the deposition material layer in the region corresponding to the heat generating conductive layer for Joule heating is evaporated.
  • the present invention is characterized in that the shape of the heat generating conductive layer for heating the first joule is patterned corresponding to the shape of the organic film layer, the first deposition material layer is an organic electric field, characterized in that using the material of the organic film layer.
  • a method of manufacturing a light emitting display device is provided.
  • the present invention is characterized in that the shape of the heat generating conductive layer for heating the first joule is patterned corresponding to the shape of the first electrode layer, the material layer for the first deposition using the material of the first electrode layer.
  • a method of manufacturing an organic light emitting display device is provided.
  • the shape of the second conductive heating layer for heating the joule is patterned corresponding to the shape of the gate electrode, and the second deposition material layer is an organic electric field using a material of the gate electrode.
  • the present invention is characterized in that the shape of the heat generating conductive layer for heating the second joule is patterned corresponding to the shape of the source / drain electrode, the second deposition material layer is characterized in that using the material of the source / drain electrode.
  • a manufacturing method of an organic light emitting display device is provided.
  • the present invention has the effect of providing a film forming method which is advantageous for the production of large sized devices.
  • the present invention has an effect that can provide a method for patterning during film formation without a lithography process or a separate shadow mask during the fabrication of the device.
  • the present invention has the effect of forming a film within a relatively short time as compared with the conventional film forming method.
  • FIG. 1 is a cross-sectional view schematically showing a deposition apparatus having a deposition mask
  • FIGS. 2 to 4 are cross-sectional views showing a schematic configuration of a substrate for deposition of a deposition apparatus according to the present invention
  • FIG. 5 and 6 is a schematic cross-sectional view showing a film forming method using a deposition substrate according to the present invention
  • FIG. 7 is a cross-sectional view illustrating an organic light emitting display device having a general structure
  • FIG. 8 and 9 are schematic cross-sectional views illustrating a process of forming an organic film layer of the organic light emitting display device of FIG. 7 using the deposition substrate according to the present invention.
  • channel region 230 gate insulating film
  • gate electrode 240 interlayer insulating film
  • 150a source electrode 150b: drain electrode
  • first electrode layer 281 pixel defining layer
  • FIGS. 2 to 4 are cross-sectional views showing a schematic configuration of a substrate for deposition of a deposition apparatus according to the present invention.
  • the deposition substrate may be located in the vacuum chamber.
  • a heating conductive layer material 110 for Joule heating is formed on a substrate 100 such as glass, ceramic, or plastic, and patterned to form the heating conductive layer 110a for Joule heating. To form.
  • the joule heating exothermic conductive layer 110a generates joule heat by applying an electric field to the electrode, and evaporates the deposition material through the generated joule heat, which will be described later.
  • Forming the heating conductive layer material 110 for joule heating on the substrate 100 is a well-known film forming method of low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, PECVD (plasma enhanced chemical vapor deposition), sputtering, vacuum deposition ( It can be formed by a method such as vacuum evaporation, it is not limited to the method of forming the heating conductive layer material 110 for Joule heating in the present invention.
  • the material of the heating conductive layer material 110 for joule heating may use a metal or a metal alloy.
  • the metal or metal alloy may be, for example, molybdenum (Mo), titanium (Ti), chromium (Cr), or molybdenum tungsten (MoW), but in the present invention, the heating conductive layer material 110 for joule heating. ) Is not limited to the material.
  • forming the joule heating exothermic conductive layer 110a by patterning the joule heating exothermic conductive layer material 110 may be performed by a known photolithography process.
  • the forming of the joule heating exothermic conductive layer 110a is patterned corresponding to the shape of a predetermined film formed by the deposition apparatus according to the present invention.
  • the shape of the heating conductive layer for heating the joule is patterned corresponding to the shape of the gate electrode, or the deposition apparatus according to the present invention.
  • the shape of the joule heating exothermic conductive layer is patterned corresponding to the shape of the organic film layer.
  • the shape of the predetermined film may mean the shape of the planar structure of the predetermined film.
  • the deposition material layer 120 is formed on the entire surface of the substrate 100 including the joule heating exothermic conductive layer 110a.
  • the deposition material layer 120 may be formed by a method such as low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, plasma enhanced chemical vapor deposition (PECVD), sputtering, vacuum evaporation, or the like. In the present invention, the method of forming the deposition material layer 120 is not limited.
  • the deposition material layer 120 corresponds to a material of a predetermined film formed by the deposition apparatus according to the present invention.
  • the gate electrode is formed using the deposition apparatus according to the present invention.
  • the wear material layer 120 may be formed using the material of the gate electrode, or assuming that the organic film layer is formed using the deposition apparatus according to the present invention, the deposition material layer 120 may be formed of the organic material. It is formed using the material of the membrane layer.
  • the material of the material layer 120 for deposition varies depending on the object to be deposited using the deposition apparatus according to the present invention, and may be an organic film, an inorganic film, or a metal film.
  • FIG. 5 and 6 are schematic cross-sectional views showing a film formation method using a deposition substrate according to the present invention.
  • the deposition substrate and the element substrate are shown, and the film forming process may be performed in a vacuum chamber.
  • the deposition substrate according to the present invention is aligned to correspond to the device substrate 130.
  • the joule heating exothermic conductive layer 110a is formed on the substrate 100, and the deposition material layer is formed on the entire surface of the substrate 100 including the joule heating exothermic conductive layer. Is formed.
  • an electric field is applied to the heating conductive layer 110a for joule heating of the deposition substrate.
  • the joule heating of the deposition material layer 120 is performed by applying an electric field to the heating conductive layer 110a for joule heating.
  • the deposition material layer 120 which is Joule heated by the applied electric field corresponds to the region 120a corresponding to the Joule heating exothermic conductive layer 110a, and thus, the joule heating exothermic conductive layer 110a.
  • the evaporated deposition material may be deposited on the device substrate 130 to form a predetermined film 140 to be formed.
  • the joule heating means heating by using heat generated by resistance when current flows through the conductor.
  • the amount of energy per unit time applied to the conductive layer by Joule heating due to the application of the electric field may be represented by the following equation.
  • W is the amount of energy per unit time of Joule heating
  • V is the voltage across the conductive layer
  • I is the current, respectively.
  • Application of the electric field to the heating conductive layer 110a for joule heating may generate high heat by Joule heating sufficient to induce the evaporation of the region 120a corresponding to the heating conductor layer 110a for heating the joule. This is done by applying energy of power density. Since the application of the electric field is determined by various factors such as resistance, length and thickness of the heating conductive layer 110a for joule heating, it is difficult to specify the electric field.
  • the temperature applied to the region 120a corresponding to the joule heating exothermic conductive layer 110a is preferably 10 ° C. or more higher than the melting point of the deposition material. It is preferable that the melting point is less than 110a). For this purpose, it is preferable to apply an electric field of about 1 kw / cm 2 to 1,000 kw / cm 2.
  • the temperature is less than the melting point of the deposition material it may be difficult to evaporate the deposition material, and if the temperature exceeds the melting point of the heating conductive layer 110a for Joule heating, it is difficult to deposit an accurate pattern. do.
  • the vapor deposition material to be evaporated should be a vapor deposition material in a region corresponding to the joule heating exothermic conductive layer, but the joule heating when the temperature exceeds the melting point of the exothermic conductive layer for joule heating Since the heat generating conductive layer evaporates, the composition, thickness, and shape of the pattern to be formed become uneven, and in a severe case, the conductive layer cannot tolerate and is destroyed.
  • the applied current may be a direct current or an alternating current
  • an application time of the electric field may be 1 / 1000,000 to 100 seconds, preferably 1 / 1,000,000 to 10 seconds, more preferably 1 / 1,000,000 to 1 second.
  • the application of this electric field can be repeated several times in regular or irregular units.
  • the total heat treatment time may be larger than the above electric field application time, but this is at least a very short time compared with the conventional deposition methods.
  • the thin film is formed by a deposition apparatus having a deposition mask, and as the size of the flat panel display becomes larger, the deposition mask should also be enlarged. Difficult to arrange a large device due to difficult alignment between objects, but when the deposition process using the deposition substrate according to the present invention is performed, the substrate sag even if the flat panel display is enlarged because the thickness of the deposition substrate is thick. Etc. do not occur, and therefore a large sized device can be manufactured.
  • FIG. 7 is a cross-sectional view illustrating an organic light emitting display device having a general structure.
  • a buffer layer 210 having a predetermined thickness is formed on a front surface of the transparent insulating substrate 200 by plasma-enhanced chemical vapor deposition (PECVD).
  • PECVD plasma-enhanced chemical vapor deposition
  • the buffer layer 210 prevents the diffusion of impurities in the transparent insulating substrate 200 during the crystallization process of the amorphous silicon layer formed in a subsequent process.
  • An amorphous silicon layer (not shown), which is a semiconductor layer, is deposited on the buffer layer 210 at a predetermined thickness. Subsequently, the amorphous silicon layer is crystallized by using Excimer Laser Annealing (ELA), Sequential Lateral Solidification (SLS), Metal Induced Crystallization (MIC) or Metal Induced Lateral Crystallization (MIC), and patterned by photolithography. The semiconductor layer pattern in a pixel is formed.
  • ELA Excimer Laser Annealing
  • SLS Sequential Lateral Solidification
  • MIC Metal Induced Crystallization
  • MIC Metal Induced Lateral Crystallization
  • a gate insulating layer 230 is formed on the entire surface of the substrate including the semiconductor layer pattern.
  • the gate insulating film 230 may be formed of a silicon oxide film (SiO 2 ), a silicon nitride film (SiN x ), or a double layer thereof.
  • the gate electrode 231 is formed in a predetermined region corresponding to the channel region 221 of the semiconductor layer pattern on the gate insulating layer 230.
  • the gate electrode 231 may be formed of one selected from the group consisting of aluminum (Al), aluminum alloy (Al-alloy), molybdenum (Mo), and molybdenum alloy (Mo-alloy).
  • an impurity is implanted into the semiconductor layer pattern 220 using the gate electrode 231 as an ion implantation mask to form a source / drain region 220a 220b.
  • the ion implantation process is performed using n + or p + impurities as a dopant.
  • the interlayer insulating film 240 may be formed of a silicon oxide film (SiO 2 ), a silicon nitride film (SiN x ), or a double layer thereof.
  • the interlayer insulating layer 240 and the gate insulating layer 230 are etched by a photolithography process to form contact holes exposing the source / drain regions 220a and 220b.
  • source / drain electrodes 250a and 250b connected to the source / drain regions 220a and 220b are formed.
  • the source / drain electrode material may be selected from the group consisting of Mo, W, MoW, AlNd, Ti, Al, Al alloys, Ag, and Ag alloys.
  • a two-layer structure of Mo, Al, or Ag, or a multi-layer structure of low resistance material that is, Mo / Al / Mo, MoW / Al-Nd / MoW, Ti / Al / Ti, Mo / Ag / Mo and Mo / Ag-alloy / Mo and the like formed in one laminated structure selected from the group consisting of.
  • An insulating layer may be positioned on the source / drain electrodes 250a and 250b, and the insulating layer may be an inorganic layer 260, an organic layer 270, or a double layer thereof.
  • a first electrode layer 280 connected through a via hole in the insulating layer is disposed on the insulating layer.
  • the first electrode layer 280 may be provided as a transparent electrode in the case of the bottom emission type and a reflective electrode in the case of the top emission type.
  • the first electrode layer may be provided as one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO) and zinc oxide (ZnO), and a reflective electrode.
  • ITO Indium Tin Oxide
  • IZO Indium Zinc Oxide
  • TO Tin Oxide
  • ZnO Zinc Oxide
  • the first electrode layer 280 may be formed in a stacked structure of the lower electrode layer 280a, the reflective electrode layer 280b, and the upper electrode layer 280c in the case of a top emission type.
  • the lower electrode layer 280a may be formed of one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO), and zinc oxide (ZnO). At this time, the lower electrode layer 280a is formed to have a thickness of 50 to 100 ⁇ . If the thickness of the lower electrode layer 280a is less than or equal to 50 GPa, it is difficult to secure uniformity. If the thickness of the lower electrode is less than 100 GPa, the adhesive strength is weakened due to the stress of the lower electrode layer itself.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • TO tin oxide
  • ZnO zinc oxide
  • the reflective electrode layer 280b may be formed using one material selected from the group consisting of Al, Al alloys, Ag, and Ag alloys, and at this time, the thickness of the reflective electrode layer 280b may be 900 to 2000 ⁇ s. Can be. If the thickness is 900 ⁇ or less, a part of the light is transmitted, and about 1000 ⁇ is the minimum thickness that light does not transmit. In addition, when it is 2000 kPa or more, it is not preferable in terms of cost or process time.
  • the reflective electrode layer 280b may act as a light reflection to increase luminance and light efficiency.
  • the upper electrode layer 280c may be formed of one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO), and zinc oxide (ZnO). At this time, the thickness of the upper electrode layer 280c is formed to 50 ⁇ 100 ⁇ . If the thickness of the upper electrode layer 280c is less than or equal to 50 ⁇ s, the uniformity of the thin film cannot be guaranteed. If the thickness of the upper electrode layer 280c is less than or equal to 100 ⁇ s, the reflectance is particularly lower in the blue region by 10% to 15% due to the interference effect.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • TO tin oxide
  • ZnO zinc oxide
  • the insulating layer may be a pixel defined layer 281.
  • the pixel definition layer 281 may be made of polyacrylates, epoxy resins, phenolic resins, polyamides resins, polyimides resins, and unsaturated polys. Unsaturated polyesters resin, poly (phenylenethers) resin, polyphenylenesulfide resin (poly (phenylenesulfides) resin) and benzocyclobutene (benzocyclobutene (BCB)) It can be formed of a material.
  • the pixel defining layer 281 includes an opening 281a exposing a part of the first electrode layer.
  • an organic layer 291 is formed on the first electrode layer exposed by the opening 281a and includes a light emitting layer. Then, a second electrode 292 is formed on the organic layer 291. do.
  • the organic layer 291 includes a light emitting layer, and may further include any one or more layers of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. And no limitations with regard to matter.
  • the film thickness of the hole transport layer can be formed in the range of 10 to 50nm. If it is out of the thickness range of the hole transport layer, the hole injection characteristics are deteriorated, which is not preferable.
  • a dopant capable of emitting light with respect to electron-hole bonds may be added to the hole transport layer, and such a dopant may be 4- (dicyanomethylene) -2-tert-butyl-6- (1,1, 7,7-tetramethyljulolidyl-9-enyl) -4H-pyran (4- (dicyanomethylene) -2-t-butyl-6- (1,1,7,7-tetramethyljulolidyl-9-enyl) -4H -pyran: DCJTB), Coumarin 6, Rubrene, DCM, DCJTB, phenylene (Perylene), quinacridone and the like, the content of the total weight of the material for forming the hole transport layer 0.1 to 5% by weight is used.
  • the emission color may be adjusted according to the type and content of the dopant, and the thermal stability of the hole transport layer may be improved to improve the life of
  • the hole injection layer may be formed using a starbust amine compound, and the thickness of the hole injection layer may be formed to 30 to 100 nm.
  • the thickness of the hole injection layer is out of the range, the hole injection property is poor, which is not preferable.
  • the contact resistance between the counter electrode and the hole transport layer may be reduced, and the hole transporting ability of the anode electrode may be improved, thereby improving overall device characteristics.
  • the material for forming the light emitting layer of the present invention is not particularly limited, and specific examples thereof include CBP (4,4'-bis (carbazol-9-yl) -biphenyl).
  • the light emitting layer of the present invention may further contain a dopant capable of emitting light with respect to electron-hole coupling like the above-described hole transport layer, wherein the dopant type and content are about the same level as that of the hole transport layer, and the film of the light emitting layer
  • the thickness is preferably in the range of 10 to 40 nm.
  • the electron transporting material for forming the electron transporting layer tris (8-quinolinolate) -aluminum (tris (8-quinolinolate) -aluminum: Alq 3) and Almq 3 are used. It may further contain a dopant capable of emitting light with respect to hole bonding. At this time, the type and content of the dopant is almost the same level as the case of the hole transport layer, the film thickness of the electron transport layer may be in the range of 30 to 100nm. If the electron transport layer is out of the thickness range, the efficiency is lowered and the driving voltage is increased, which is not preferable.
  • a hole barrier layer HBL may be further formed between the emission layer and the electron transport layer.
  • the hole barrier layer serves to prevent the excitons formed from the phosphorescent material from moving to the electron transport layer or to prevent the holes from moving to the electron transport layer, and BAlq may be used as the hole barrier layer forming material.
  • the electron injection layer may be formed of a material consisting of LiF, the thickness thereof may be formed in the range of 0.1 to 10nm. If it is out of the thickness range of the electron injection layer, the driving voltage increases, which is not preferable.
  • the second electrode 292 formed on the organic layer is formed of a reflective type in the case of the bottom emission type, and is formed of Li, Ca, LiF / Ca, LiF / Al, Al, Mg, and alloys thereof in the reflective type. It can be formed of any one material selected from the group consisting of.
  • the second electrode 292 formed on the organic layer is a top emission type
  • the second electrode 292 has a structure in which a transflective cathode is formed or a transmissive cathode is laminated after the transflective cathode is formed, and the transflective cathode is Li, Ca
  • a transflective cathode is formed or a transmissive cathode is laminated after the transflective cathode is formed, and the transflective cathode is Li, Ca
  • any one material selected from the group consisting of LiF / Ca, LiF / Al, Al, Mg and Mg alloy can be formed by forming a thin to a thickness of 5 to 30nm
  • the transmissive cathode after forming the transflective cathode The method of forming the mold is performed by forming a semi-transmissive cathode using any one material selected from the group consisting of metals having a small work function, that is, Li, Ca, LiF
  • a film using ITO, IZO (Indium Zinc Oxide), etc. having low resistance is additionally formed.
  • the thickness of the transflective cathode is less than 5 nm, electron injection is not possible at low voltage, and when the thickness of the transflective cathode is 30 nm or more, the transmittance is remarkably low, which is not preferable.
  • the total thickness of the transflective cathode and the transmissive cathode is preferably 10 to 400 nm in thickness.
  • FIG. 8 and 9 are schematic cross-sectional views illustrating a process of forming an organic film layer of the organic light emitting display device of FIG. 7 using the deposition substrate according to the present invention.
  • an electric field is applied to the Joule heating exothermic conductive layer 310a of the substrate 300 on which the deposition material layer 320 is formed on the Joule heating exothermic conductive layer 310a.
  • the shape of the heating conductive layer 310a for heating the joule is determined by the shape of the organic film layer. Correspondingly patterned.
  • the deposition material layer 320 is formed using a material of the organic layer.
  • the organic layer includes a light emitting layer and may further include any one or more layers of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.
  • a hole injection layer a hole transport layer
  • an electron transport layer a hole transport layer
  • an electron injection layer a layer of a hole injection layer
  • the deposition material layer 320 is formed using the material of the light emitting layer.
  • the deposition material layer 320 which is Joule heated by the applied electric field corresponds to the region 320a corresponding to the Joule heating exothermic conductive layer 310a, and thus, the joule heating exothermic conductive layer 310a.
  • the evaporated deposition material may be deposited on the first electrode layer exposed by the opening formed in the pixel definition layer 281 to form an organic layer.
  • the shape of the joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the gate electrode, and the deposition material layer 320 is formed of the material of the gate electrode. To form.
  • the shape of the joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the source / drain electrodes, and the deposition material layer 320 is It is formed using the material of the source / drain electrodes.
  • the shape of the Joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the first electrode layer, and the deposition material layer 320 is the first electrode layer. It is formed using the material of.

Abstract

The present invention provides a substrate for the deposition of a deposition apparatus, a film-forming method, and a method for manufacturing an organic electroluminescence display device using the substrate for deposition, comprising: providing a substrate; forming a conductive layer for joule heating on the substrate; forming a deposition material layer on the substrate containing the conductive layer for joule heating; and applying electric fields to the conductive layer for joule heating to joule heat the deposition material layer. Consequently, the present invention has the effects of providing a film-forming method which is advantageous in manufacturing large devices.

Description

증착장치의 증착용 기판, 상기 증착용 기판을 사용한 성막 방법 및 유기전계발광표시장치의 제조방법A substrate for deposition of a deposition apparatus, a film formation method using the deposition substrate, and a method of manufacturing an organic light emitting display device
본 발명은 증착장치의 증착용 기판을 사용한 성막방법에 관한 것으로, 보다 구체적으로는 도전층에 전계를 인가하여 주울 가열에 의해 일정한 막을 증착하기 위한 성막방법에 관한 것이다.The present invention relates to a film formation method using a deposition substrate of a vapor deposition apparatus, and more particularly to a film deposition method for depositing a constant film by Joule heating by applying an electric field to the conductive layer.
평판 표시 장치 중 유기전계발광표시장치는 응답속도가 1ms 이하로서 고속의 응답속도를 가지며, 소비 전력이 낮고, 자체 발광이므로 시야각에 문제가 없어서, 장치의 크기에 상관없이 동화상 표시 매체로서 장점이 있다. 또한, 저온 제작이 가능하고, 기존의 반도체 공정 기술을 바탕으로 제조 공정이 간단하므로 향후 차세대 평판 표시 장치로 주목받고 있다.Among the flat panel display devices, the organic light emitting display device has a high response time with a response speed of 1 ms or less, low power consumption, and self-luminous light, so there is no problem in viewing angle, and thus it is advantageous as a moving image display medium regardless of the size of the device. . In addition, low-temperature manufacturing is possible, and the manufacturing process is simple based on the existing semiconductor process technology has attracted attention as a next-generation flat panel display device in the future.
상기 평판표시장치 또는 유기전계발광표시장치의 박막의 형성은 사용하는 재료와 공정에 따라 습식공정을 사용하는 고분자형 소자와 증착공정을 사용하는 저분자형 소자로 크게 나눌 수 있다.Formation of the thin film of the flat panel display or the organic light emitting display device can be broadly divided into a high molecular type device using a wet process and a low molecular type device using a deposition process according to the materials and processes used.
예를 들어, 상기 고분자 또는 저분자 발광층의 형성 방법 중 잉크젯 프린팅 방법의 경우 발광층 이외의 유기층들의 재료가 제한적이고, 기판 상에 잉크젯 프린팅을 위한 구조를 형성해야하는 번거로움이 있다.For example, in the method of forming the polymer or the low molecular light emitting layer, in the inkjet printing method, materials of organic layers other than the light emitting layer are limited, and there is a need to form a structure for inkjet printing on the substrate.
또한, 증착 공정에 의해 발광층을 형성하는 경우, 별도의 금속마스크를 사용하게 되는데, 상기 금속 마스크는 평판 표시 장치가 대형화가 될수록 금속 마스크도 대형화가 되어야 하며, 이때, 상기 금속 마스크는 대형화가 될수록 처짐 현상이 발생하는 문제점이 있어, 대형 소자의 제작에 어려움이 있다.In addition, when the light emitting layer is formed by a deposition process, a separate metal mask is used. As the size of the flat panel display increases, the size of the metal mask must increase in size, and the metal mask sags as the size increases. There is a problem that occurs, it is difficult to manufacture a large device.
도 1은 증착용 마스크를 구비한 증착 장치를 개략적으로 도시한 단면도이다.1 is a schematic cross-sectional view of a deposition apparatus having a deposition mask.
도 1을 참조하면, 마스크(1)를 이용하여 유기전계발광표시장치의 박막, 예를 들어, 발광층을 포함하는 유기막층을 증착하기 위해서는, 진공챔버(2)에 설치된 박막 증착 용기(crucible ; 3)와 대응되는 측에 마스크와 결합된 프레임(4)을 설치하고 이의 상부에 박막 등이 형성될 대상물(5)을 장착한다. 그리고 그 상부에는 프레임(4)에 지지된 마스크(1)를 박막 등이 형성될 대상물(5)에 밀착시키기 위한 마그네트 유니트(6)를 구동시켜 상기 마스크(1)가 상기 박막 등이 형성될 대상물(5)에 밀착되도록 한다. 이 상태에서 상기 박막 증착 용기(3)의 작동으로 이에 장착된 물질이 상기 대상물(5)에 증착되게 된다.Referring to FIG. 1, in order to deposit a thin film of an organic light emitting display device, for example, an organic film layer including a light emitting layer by using a mask 1, a thin film deposition container provided in a vacuum chamber 2 is provided. The frame 4 coupled with the mask is installed on the side corresponding to the) and the object 5 on which the thin film is to be formed is mounted. In addition, the magnet unit 6 for driving the mask 1 supported on the frame 4 to the object 5 on which the thin film is to be formed is driven on the upper portion of the mask 1 to form the thin film or the like. To be in close contact with (5). In this state, the operation of the thin film deposition container 3 causes the material attached thereto to be deposited on the object 5.
하지만, 상술한 바와 같이, 이러한 증착용 마스크를 구비한 증착장치에 의한 박막의 형성은 평판 표시 장치가 대형화가 될수록 상기 증착용 마스크도 대형화가 되어야 하며, 이 경우, 마스크의 처짐 현상 등으로 인하여 마스크와 대상물간의 어라인이 어려워 대형 소자의 제작에 어려움이 있다.However, as described above, in the formation of the thin film by the deposition apparatus having the deposition mask, the deposition mask should be enlarged as the flat panel display device becomes larger. In this case, the mask may be formed due to the deflection of the mask. It is difficult to manufacture a large device because the alignment between the object and the object is difficult.
따라서 본 발명은 상기와 같은 종래 기술의 제반 단점과 문제점을 해결하기 위한 것으로, 대형 소자의 제작에 유리한 새로운 성막 방법을 제공하는데 목적이 있다.Accordingly, an object of the present invention is to solve all the disadvantages and problems of the prior art as described above, and an object of the present invention is to provide a new film forming method, which is advantageous for manufacturing a large device.
전술한 바와 같은 목적을 달성하기 위하여, 본 발명은 기판; 상기 기판 상에 형성된 주울 가열용 발열 도전층; 및 상기 주울 가열용 발열 도전층을 포함한 상기 기판의 전면에 형성된 증착용 물질층을 포함하는 증착장치의 증착용 기판을 제공한다.In order to achieve the object as described above, the present invention is a substrate; Joule heating exothermic conductive layer formed on the substrate; And a deposition material layer formed on an entire surface of the substrate including the joule heating exothermic conductive layer.
또한, 본 발명은 상기 주울 가열용 발열 도전층은 상기 증착장치에 의하여 형성되는 막의 형상에 대응하여 패터닝되는 것을 특징으로 하는 증착장치의 증착용 기판을 제공한다.The present invention also provides a substrate for deposition of a deposition apparatus, wherein the heating conductive layer for heating the joule is patterned according to the shape of a film formed by the deposition apparatus.
또한, 본 발명은 기판을 제공하고, 상기 기판 상에 주울 가열용 발열 도전층을 형성하고, 상기 주울 가열용 발열 도전층을 포함한 상기 기판의 전면에 증착용 물질층을 형성하고, 상기 주울 가열용 발열 도전층에 전계를 인가하여 상기 증착용 물질층을 주울 가열하는 것을 특징으로 하는 성막 방법을 제공한다.In addition, the present invention provides a substrate, forming a heating conductive layer for Joule heating on the substrate, forming a material layer for deposition on the entire surface of the substrate including the heating conductive layer for Joule heating, the Joule heating A film forming method is provided by applying an electric field to a heat generating conductive layer to Joule heat the deposition material layer.
또한, 본 발명은 상기 주울 가열용 발열 도전층은 증착장치에 의하여 형성되는 막의 형상에 대응하여 패터닝되는 것을 특징으로 하는 성막 방법을 제공한다.In another aspect, the present invention provides a film forming method characterized in that the heating conductive layer for Joule heating is patterned corresponding to the shape of the film formed by the deposition apparatus.
또한, 본 발명은 상기 증착용 물질층을 주울 가열하는 것은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층인 것을 특징으로 하는 성막 방법을 제공한다.In another aspect, the present invention provides a film forming method characterized in that the joule heating of the material layer for deposition is a material layer for deposition in a region corresponding to the heating conductive layer for heating the joule.
또한, 본 발명은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층의 증착용 물질이 증발하는 것을 특징으로 하는 성막 방법을 제공한다.In another aspect, the present invention provides a film forming method characterized in that the deposition material of the deposition material layer in the region corresponding to the heat generating conductive layer for Joule heating is evaporated.
또한, 본 발명은 제1기판을 제공하고; 상기 제1기판의 상부에 제1전극층을 형성하고; 상기 제1전극층의 상부에 화소정의막을 형성하고; 상기 화소정의막 상에 제1전극층의 일부를 노출시키는 개구부를 형성하고; 상기 제1전극층의 상부에 위치하며, 발광층을 포함하는 유기막층을 형성하고; 상기 유기막층의 상부에 제2전극층을 형성하는 것을 포함하는 유기전계발광 표시장치의 제조방법에 있어서, 상기 유기전계발광표시장치의 적어도 어느 하나의 층은 상기 제1기판과 대응되는 제2기판을 제공하고, 상기 제2기판 상에 제 1 주울 가열용 발열 도전층을 형성하고, 상기 제 1 주울 가열용 발열 도전층을 포함한 상기 제2기판의 전면에 제 1 증착용 물질층을 형성하고, 상기 제 1 주울 가열용 발열 도전층에 전계를 인가하여 상기 제 1 증착용 물질층을 주울 가열하여 형성하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.The present invention also provides a first substrate; Forming a first electrode layer on the first substrate; Forming a pixel definition layer on the first electrode layer; An opening for exposing a portion of the first electrode layer on the pixel definition layer; Forming an organic layer on the first electrode layer and including an emission layer; The method of manufacturing an organic light emitting display device including forming a second electrode layer on the organic layer, wherein at least one layer of the organic light emitting display device includes a second substrate corresponding to the first substrate. Providing a heat generating conductive layer for heating the first joule on the second substrate, forming a first material layer for depositing on the entire surface of the second substrate including the heat generating conductive layer for heating the first joule, A method of manufacturing an organic light emitting display device is provided by applying an electric field to a heat generating conductive layer for heating a first joule to form a joule heating of the first deposition material layer.
또한, 본 발명은 상기 제1기판 상에 채널영역 및 소오스/드레인 영역을 구비하는 반도체층; 상기 반도체층의 채널영역과 대응되는 게이트 전극; 및 상기 반도체층과 전기적으로 연결되는 소오스/드레인 전극을 구비하는 박막트랜지스터를 형성하는 공정을 더 포함하고, 상기 박막트랜지스터의 게이트 전극 또는 소오스/드레인 전극은 상기 제1기판과 대응되는 제3기판을 제공하고, 상기 제3기판 상에 제 2 주울 가열용 발열 도전층을 형성하고, 상기 제 2 주울 가열용 발열 도전층을 포함한 상기 제3기판의 전면에 제 2 증착용 물질층을 형성하고, 상기 제 2 주울 가열용 발열 도전층에 전계를 인가하여 상기 제 2 증착용 물질층을 주울 가열하여 형성하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, the present invention is a semiconductor layer comprising a channel region and a source / drain region on the first substrate; A gate electrode corresponding to the channel region of the semiconductor layer; And forming a thin film transistor having a source / drain electrode electrically connected to the semiconductor layer, wherein the gate electrode or the source / drain electrode of the thin film transistor includes a third substrate corresponding to the first substrate. Providing a heat generating conductive layer for heating the second joule on the third substrate, forming a second material layer for depositing on the entire surface of the third substrate including the heat generating conductive layer for heating the second joule, A method of manufacturing an organic light emitting display device is provided by applying an electric field to a heat generating conductive layer for heating a second joule to Joule heating the second material layer for deposition.
또한, 본 발명은 상기 증착용 물질층을 주울 가열하는 것은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층인 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, the present invention provides a method of manufacturing an organic light emitting display device, wherein the joule heating of the deposition material layer is a deposition material layer in a region corresponding to the heating conductive layer for heating the joule.
또한, 본 발명은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층의 증착용 물질이 증발하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, the present invention provides a method of manufacturing an organic light emitting display device, characterized in that the deposition material of the deposition material layer in the region corresponding to the heat generating conductive layer for Joule heating is evaporated.
또한, 본 발명은 상기 제 1 주울 가열용 발열 도전층의 형상은 상기 유기막층의 형상에 대응하여 패터닝되고, 상기 제 1 증착용 물질층은 상기 유기막층의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, the present invention is characterized in that the shape of the heat generating conductive layer for heating the first joule is patterned corresponding to the shape of the organic film layer, the first deposition material layer is an organic electric field, characterized in that using the material of the organic film layer. A method of manufacturing a light emitting display device is provided.
또한, 본 발명은 상기 제 1 주울 가열용 발열 도전층의 형상은 상기 제1전극층의 형상에 대응하여 패터닝되고, 상기 제 1 증착용 물질층은 상기 제1전극층의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, the present invention is characterized in that the shape of the heat generating conductive layer for heating the first joule is patterned corresponding to the shape of the first electrode layer, the material layer for the first deposition using the material of the first electrode layer. A method of manufacturing an organic light emitting display device is provided.
또한,본 발명은 상기 제 2 주울 가열용 발열 도전층의 형상은 상기 게이트 전극의 형상에 대응하여 패터닝되고, 상기 제 2 증착용 물질층은 상기 게이트 전극의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, in the present invention, the shape of the second conductive heating layer for heating the joule is patterned corresponding to the shape of the gate electrode, and the second deposition material layer is an organic electric field using a material of the gate electrode. A method of manufacturing a light emitting display device is provided.
또한, 본 발명은 상기 제 2 주울 가열용 발열 도전층의 형상은 상기 소오스/드레인 전극의 형상에 대응하여 패터닝되고, 상기 제 2 증착용 물질층은 상기 소오스/드레인 전극의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법을 제공한다.In addition, the present invention is characterized in that the shape of the heat generating conductive layer for heating the second joule is patterned corresponding to the shape of the source / drain electrode, the second deposition material layer is characterized in that using the material of the source / drain electrode. A manufacturing method of an organic light emitting display device is provided.
따라서, 본 발명은 대형 소자의 제작에 유리한 성막 방법을 제공할 수 있는 효과가 있다.Therefore, the present invention has the effect of providing a film forming method which is advantageous for the production of large sized devices.
또한, 본 발명은 소자의 제작시 리소그라피 공정이나 별도의 쉐도우 마스크 없이 성막시 패터닝되는 방법을 제공할 수 있는 효과가 있다.In addition, the present invention has an effect that can provide a method for patterning during film formation without a lithography process or a separate shadow mask during the fabrication of the device.
또한, 본 발명은 종래의 성막 방법에 비하여, 비교적 짧은 시간 내에 성막을 할 수 있는 효과가 있다.In addition, the present invention has the effect of forming a film within a relatively short time as compared with the conventional film forming method.
도 1은 증착용 마스크를 구비한 증착 장치를 개략적으로 도시한 단면도,1 is a cross-sectional view schematically showing a deposition apparatus having a deposition mask;
도 2 내지 도 4는 본 발명에 따른 증착장치의 증착용 기판의 개략적인 구성을 나타내는 단면도,2 to 4 are cross-sectional views showing a schematic configuration of a substrate for deposition of a deposition apparatus according to the present invention;
도 5 및 6은 본 발명에 따른 증착용 기판을 사용한 성막 방법을 나타내는 개략적인 단면도,5 and 6 is a schematic cross-sectional view showing a film forming method using a deposition substrate according to the present invention,
도 7은 일반적인 구조의 유기전계발광표시장치를 나타내는 단면도,7 is a cross-sectional view illustrating an organic light emitting display device having a general structure;
도 8 및 도 9는 본 발명에 따른 증착용 기판을 사용하여, 상기 도 7의 유기전계발광표시장치의 유기막층을 성막하는 공정을 나타내는 개략적인 단면도이다.8 and 9 are schematic cross-sectional views illustrating a process of forming an organic film layer of the organic light emitting display device of FIG. 7 using the deposition substrate according to the present invention.
<도면 주요부분에 대한 부호의 설명><Description of Symbols for Main Parts of Drawing>
100, 300 : 기판100, 300: Substrate
110a : 주울 가열용 발열 도전층 120: 층착용 물질층110a: heat generating conductive layer for joule heating 120: layered material layer
130. 200 : 소자 기판 210 : 버퍼층130. 200: element substrate 210: buffer layer
220a : 소오스영역 220b : 드레인영역220a: source region 220b: drain region
221 : 채널영역 230 : 게이트절연막221: channel region 230: gate insulating film
231 : 게이트전극 240 : 층간절연막231: gate electrode 240: interlayer insulating film
150a : 소오스전극 150b : 드레인전극150a: source electrode 150b: drain electrode
260 : 무기막 270 : 유기막260: inorganic film 270: organic film
280 : 제1전극층 281 : 화소정의막280: first electrode layer 281: pixel defining layer
291 : 유기막층 292 : 제2전극291 an organic film layer 292 a second electrode
본 발명의 상기 목적과 기술적 구성 및 그에 따른 작용효과에 관한 자세한 사항은 본 발명의 바람직한 실시 예를 도시하고 있는 도면을 참조한 이하 상세한 설명에 의해 보다 명확하게 이해될 것이다. 또한 도면들에 있어서, 층 및 영역의 길이, 두께 등은 편의를 위하여 과장되어 표현될 수도 있다. 명세서 전체에 걸쳐서 동일한 참조번호들은 동일한 구성요소들을 나타낸다.Details of the above objects and technical configurations and the effects thereof according to the present invention will be more clearly understood by the following detailed description with reference to the drawings showing preferred embodiments of the present invention. In addition, in the drawings, the length, thickness, etc. of layers and regions may be exaggerated for convenience. Like numbers refer to like elements throughout.
도 2 내지 도 4는 본 발명에 따른 증착장치의 증착용 기판의 개략적인 구성을 나타내는 단면도이다. 이때, 도면에는 설명의 편의를 위하여 증착용 기판의 구성만을 도시하였을 뿐, 상기 증착용 기판은 진공챔버 내에 위치할 수 있다.2 to 4 are cross-sectional views showing a schematic configuration of a substrate for deposition of a deposition apparatus according to the present invention. In this case, only the configuration of the deposition substrate for convenience of description, the deposition substrate may be located in the vacuum chamber.
먼저, 도 2 및 도 3을 참조하면, 유리, 세라믹 또는 플라스틱과 같은 기판(100) 상에 주울 가열용 발열 도전층 물질(110)을 형성하고, 이를 패터닝 하여 주울 가열용 발열 도전층(110a)를 형성한다.First, referring to FIGS. 2 and 3, a heating conductive layer material 110 for Joule heating is formed on a substrate 100 such as glass, ceramic, or plastic, and patterned to form the heating conductive layer 110a for Joule heating. To form.
상기 주울 가열용 발열 도전층(110a)은 전극에 전계를 인가하여 줄열을 발생시켜, 상기 발생된 줄열을 통하여 증착물질을 증발시키기 위한 것으로, 구체적인 설명은 후술할 바와 같다.The joule heating exothermic conductive layer 110a generates joule heat by applying an electric field to the electrode, and evaporates the deposition material through the generated joule heat, which will be described later.
상기 기판(100) 상에 주울 가열용 발열 도전층 물질(110)을 형성하는 것은 공지된 성막방법인 저압화학 증착법, 상압화학 증착법, PECVD(plasma enhanced chemical vapor deposition)법, 스퍼터링법, 진공증착법(vacuum evaporation) 등의 방법에 의하여 형성할 수 있으며, 본 발명에서 상기 주울 가열용 발열 도전층 물질(110)의 형성방법을 한정하는 것은 아니다.Forming the heating conductive layer material 110 for joule heating on the substrate 100 is a well-known film forming method of low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, PECVD (plasma enhanced chemical vapor deposition), sputtering, vacuum deposition ( It can be formed by a method such as vacuum evaporation, it is not limited to the method of forming the heating conductive layer material 110 for Joule heating in the present invention.
또한, 주울 가열용 발열 도전층 물질(110)의 재질은 금속 또는 금속합금을 사용할 수 있다. 상기 금속 또는 금속합금은 예를 들어, 몰리브덴(Mo), 티탄늄(Ti), 크롬(Cr) 또는 몰리텅스텐(MoW) 등일 수 있으며, 다만, 본 발명에서 상기 주울 가열용 발열 도전층 물질(110)의 재질을 한정하는 것은 아니다.In addition, the material of the heating conductive layer material 110 for joule heating may use a metal or a metal alloy. The metal or metal alloy may be, for example, molybdenum (Mo), titanium (Ti), chromium (Cr), or molybdenum tungsten (MoW), but in the present invention, the heating conductive layer material 110 for joule heating. ) Is not limited to the material.
또한, 상기 주울 가열용 발열 도전층 물질(110)을 패터닝 하여 주울 가열용 발열 도전층(110a)를 형성하는 것은 공지된 사진 식각공정에 의하여 진행할 수 있다.In addition, forming the joule heating exothermic conductive layer 110a by patterning the joule heating exothermic conductive layer material 110 may be performed by a known photolithography process.
이때, 본 발명에서 상기 주울 가열용 발열 도전층(110a)을 형성하는 것은 본 발명에 따른 증착장치에 의하여 형성되는 일정한 막의 형상에 대응하여 패터닝한다.At this time, in the present invention, the forming of the joule heating exothermic conductive layer 110a is patterned corresponding to the shape of a predetermined film formed by the deposition apparatus according to the present invention.
예를 들어, 본 발명에 따른 증착장치를 사용하여 게이트 전극을 형성한다고 가정하면, 상기 주울 가열용 발열 도전층의 형상은 상기 게이트 전극의 형상에 대응하여 패터닝되며, 또는, 본 발명에 따른 증착장치를 사용하여 유기막층을 형성한다고 가정하면, 상기 주울 가열용 발열 도전층의 형상은 상기 유기막층의 형상에 대응하여 패터닝된다.For example, assuming that the gate electrode is formed using the deposition apparatus according to the present invention, the shape of the heating conductive layer for heating the joule is patterned corresponding to the shape of the gate electrode, or the deposition apparatus according to the present invention. Assuming that the organic film layer is formed using, the shape of the joule heating exothermic conductive layer is patterned corresponding to the shape of the organic film layer.
이때, 본 발명에서 일정한 막의 형상이라 함은 일정한 막의 평면구조의 형상을 의미할 수 있다.In this case, in the present invention, the shape of the predetermined film may mean the shape of the planar structure of the predetermined film.
계속해서, 도 4를 참조하면, 상기 주울 가열용 발열 도전층(110a)을 포함한 기판(100) 전면에 증착용 물질층(120)을 형성한다.4, the deposition material layer 120 is formed on the entire surface of the substrate 100 including the joule heating exothermic conductive layer 110a.
상기 증착용 물질층(120)은 공지된 성막방법인 저압화학 증착법, 상압화학 증착법, PECVD(plasma enhanced chemical vapor deposition)법, 스퍼터링법, 진공증착법(vacuum evaporation) 등의 방법에 의하여 형성할 수 있으며, 본 발명에서 상기 증착용 물질층(120)의 형성방법을 한정하는 것은 아니다The deposition material layer 120 may be formed by a method such as low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, plasma enhanced chemical vapor deposition (PECVD), sputtering, vacuum evaporation, or the like. In the present invention, the method of forming the deposition material layer 120 is not limited.
상기 증착용 물질층(120)은 본 발명에 따른 증착장치에 의하여 형성되는 일정한 막의 재질에 해당하는 것으로, 예를 들어, 본 발명에 따른 증착장치를 사용하여 게이트 전극을 형성한다고 가정하면, 상기 증착용 물질층(120)은 상기 게이트 전극의 재질을 사용하여 형성할 수 있으며, 또는, 본 발명에 따른 증착장치를 사용하여 유기막층을 형성한다고 가정하면, 상기 증착용 물질층(120)은 상기 유기막층의 재질을 사용하여 형성하게 된다.The deposition material layer 120 corresponds to a material of a predetermined film formed by the deposition apparatus according to the present invention. For example, it is assumed that the gate electrode is formed using the deposition apparatus according to the present invention. The wear material layer 120 may be formed using the material of the gate electrode, or assuming that the organic film layer is formed using the deposition apparatus according to the present invention, the deposition material layer 120 may be formed of the organic material. It is formed using the material of the membrane layer.
즉, 상기 증착용 물질층(120)의 재질은 본 발명에 따른 증착장치를 사용하여 성막하고자 하는 대상에 따라 달라지는 것으로, 유기막, 무기막 또는 금속막 등이 될 수 있다.That is, the material of the material layer 120 for deposition varies depending on the object to be deposited using the deposition apparatus according to the present invention, and may be an organic film, an inorganic film, or a metal film.
도 5 및 6은 본 발명에 따른 증착용 기판을 사용한 성막 방법을 나타내는 개략적인 단면도이다. 이때, 도면에는 설명의 편의를 위하여 증착용 기판 및 소자 기판의 구성만을 도시하였을 뿐, 상기 성막 공정은 진공챔버 내에서 이루어질 수 있다.5 and 6 are schematic cross-sectional views showing a film formation method using a deposition substrate according to the present invention. In this case, for convenience of description, only the configuration of the deposition substrate and the element substrate are shown, and the film forming process may be performed in a vacuum chamber.
먼저, 도 5를 참조하면, 소자기판(130)에 대응되도록 본 발명에 따른 증착용 기판을 어라인시킨다.First, referring to FIG. 5, the deposition substrate according to the present invention is aligned to correspond to the device substrate 130.
이때, 상기 증착용 기판은 상술한 바와 같이, 기판(100) 상에 주울 가열용 발열 도전층(110a)이 형성되고, 상기 주울 가열용 발열 도전층을 포함한 기판(100) 전면에 증착용 물질층이 형성되어 있다.In this case, as described above, the joule heating exothermic conductive layer 110a is formed on the substrate 100, and the deposition material layer is formed on the entire surface of the substrate 100 including the joule heating exothermic conductive layer. Is formed.
이후, 증착용 기판의 주울 가열용 발열 도전층(110a)에 전계를 인가한다. 상기 주울 가열용 발열 도전층(110a)에 전계를 인가하여 증착용 물질층(120)을 주울 가열하게 된다.Thereafter, an electric field is applied to the heating conductive layer 110a for joule heating of the deposition substrate. The joule heating of the deposition material layer 120 is performed by applying an electric field to the heating conductive layer 110a for joule heating.
이때, 인가된 전계에 의하여 주울 가열되는 증착용 물질층(120)은 상기 주울 가열용 발열 도전층(110a)과 대응되는 영역(120a)에 해당하고, 따라서, 상기 주울 가열용 발열 도전층(110a)과 대응되는 영역(120a)의 증착용 물질이 증발하게 된다.In this case, the deposition material layer 120 which is Joule heated by the applied electric field corresponds to the region 120a corresponding to the Joule heating exothermic conductive layer 110a, and thus, the joule heating exothermic conductive layer 110a. The deposition material in the region 120a corresponding to the evaporates.
계속해서 도 6을 참조하면, 상기 증발된 증착용 물질이 소자 기판(130)에 증착되어, 성막하고자 하는 일정한 막(140)을 형성할 수 있다. 6, the evaporated deposition material may be deposited on the device substrate 130 to form a predetermined film 140 to be formed.
상기 주울 가열이란, 도체를 통하여 전류가 흐를 때 저항으로 인하여 발생되는 열을 이용하여 가열하는 것을 의미한다. 전계의 인가로 인한 주울 가열에 의해 도전층에 가해지는 단위 시간당 에너지량은 하기 식으로 표시될 수 있다.The joule heating means heating by using heat generated by resistance when current flows through the conductor. The amount of energy per unit time applied to the conductive layer by Joule heating due to the application of the electric field may be represented by the following equation.
W = V × IW = V × I
상기 식에서, W 는 주울 가열의 단위 시간당 에너지량, V 는 도전층의 양단에 걸리는 전압, I 는 전류를 각각 의미한다.In the above formula, W is the amount of energy per unit time of Joule heating, V is the voltage across the conductive layer, and I is the current, respectively.
상기 식으로부터 전압(V)이 증가할수록, 및/또는 전류(I)가 클수록, 주울 가열에 의해 도전층에 가해지는 단위 시간당 에너지량이 증가함을 알 수 있다. 주울 가열에 의해 도전층의 온도가 올라가면 도전층, 즉, 주울 가열용 발열 도전층의 상부에 위치하는 증착용 물질층으로 열전도가 일어나게 되며, 전달된 열로 인하여 상기 주울 가열용 발열 도전층(110a)과 대응되는 영역(120a)의 증착용 물질을 증발시킬 수 있다.It can be seen from the above equation that as the voltage V increases and / or the current I increases, the amount of energy per unit time applied to the conductive layer by Joule heating increases. When the temperature of the conductive layer is increased by Joule heating, heat conduction occurs to the conductive layer, that is, the material layer for deposition located on the heating conductive layer for heating the joule, and the heat generating conductive layer 110 for heating the joule due to the transferred heat. The evaporation material of the region 120a corresponding to the evaporation may be evaporated.
상기 주울 가열용 발열 도전층(110a)에 대한 전계 인가는 상기 주울 가열용 발열 도전층(110a)과 대응되는 영역(120a)의 증발을 유도하기에 충분한 고열을 주울 가열에 의해 발생시킬 수 있는 파워 밀도(power density)의 에너지를 인가함으로써 행해진다. 상기 전계의 인가는 상기 주울 가열용 발열 도전층(110a)의 저항, 길이, 두께 등 다양한 요소들에 의해 결정되므로 특정되기는 어렵다.Application of the electric field to the heating conductive layer 110a for joule heating may generate high heat by Joule heating sufficient to induce the evaporation of the region 120a corresponding to the heating conductor layer 110a for heating the joule. This is done by applying energy of power density. Since the application of the electric field is determined by various factors such as resistance, length and thickness of the heating conductive layer 110a for joule heating, it is difficult to specify the electric field.
다만, 원활한 증발을 위해서는 상기 주울 가열용 발열 도전층(110a)과 대응되는 영역(120a)에 가해지는 온도가 상기 증착용 물질의 녹는점 보다 10℃ 이상 높은 것이 바람직하며 주울 가열용 발열 도전층(110a)의 녹는점 이하인 것이 바람직 하다, 이를 위하여 약 1 kw/㎠ 내지 1,000 kw/㎠ 의 전계를 인가하는 것이 바람직하다.However, for smooth evaporation, the temperature applied to the region 120a corresponding to the joule heating exothermic conductive layer 110a is preferably 10 ° C. or more higher than the melting point of the deposition material. It is preferable that the melting point is less than 110a). For this purpose, it is preferable to apply an electric field of about 1 kw / cm 2 to 1,000 kw / cm 2.
상기 온도가 증착용 물질의 녹는점 미만인 경우는 증착용 물질의 증발이 어려울 수 있으며, 또한, 상기 온도가 주울 가열용 발열 도전층(110a)의 녹는점을 초과하는 경우는 정확한 패턴의 증착이 어렵게 된다.If the temperature is less than the melting point of the deposition material it may be difficult to evaporate the deposition material, and if the temperature exceeds the melting point of the heating conductive layer 110a for Joule heating, it is difficult to deposit an accurate pattern. do.
즉, 본 발명에서 증발되어야 할 증착용 물질은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질이어야 하나, 상기 온도가 주울 가열용 발열 도전층의 녹는점을 초과하는 경우는 상기 주울 가열용 발열 도전층도 증발이 일어나게 되므로, 성막하고자 하는 패턴의 조성, 두께 및 형상 등이 불균일 해지며, 심한 경우 도전층이 견디지 못하고 파괴되는 현상이 일어나게 된다.That is, in the present invention, the vapor deposition material to be evaporated should be a vapor deposition material in a region corresponding to the joule heating exothermic conductive layer, but the joule heating when the temperature exceeds the melting point of the exothermic conductive layer for joule heating Since the heat generating conductive layer evaporates, the composition, thickness, and shape of the pattern to be formed become uneven, and in a severe case, the conductive layer cannot tolerate and is destroyed.
이때, 인가되는 전류는 직류이거나 교류일 수 있으며, 전계의 1회 인가 시간은1/1,000,000 ~ 100 초일 수 있으며, 바람직하게는 1/1,000,000 ~ 10 초, 더욱 바람직하게는 1/1,000,000 ~ 1초이다. In this case, the applied current may be a direct current or an alternating current, and an application time of the electric field may be 1 / 1000,000 to 100 seconds, preferably 1 / 1,000,000 to 10 seconds, more preferably 1 / 1,000,000 to 1 second. .
이러한 전계의 인가는 규칙적 또는 불규칙적 단위로 수회 반복될 수 있다. 따라서 총 열처리 시간은 상기의 전계 인가 시간보다 클 수 있지만, 이는 적어도 종래의 성막 방법들과 비교하여 매우 짧은 시간이다.The application of this electric field can be repeated several times in regular or irregular units. Thus, the total heat treatment time may be larger than the above electric field application time, but this is at least a very short time compared with the conventional deposition methods.
또한, 종래의 성막방법 중 증착용 마스크를 구비한 증착장치에 의한 박막의 형성은 평판 표시 장치가 대형화가 될수록 상기 증착용 마스크도 대형화가 되어야 하며, 이 경우, 마스크의 처짐 현상 등으로 인하여 마스크와 대상물간의 어라인이 어려워 대형 소자의 제작에 어려움이 있었으나, 본 발명에 따른 증착용 기판을 사용하여 성막 공정을 실시하는 경우, 증착용 기판의 두께가 두껍기 때문에 평판 표시 장치가 대형화되더라도 기판의 처짐 현상 등은 발생하지 않게 되고, 따라서, 대형 소자의 제작이 가능하게 된다.In addition, in the conventional film forming method, the thin film is formed by a deposition apparatus having a deposition mask, and as the size of the flat panel display becomes larger, the deposition mask should also be enlarged. Difficult to arrange a large device due to difficult alignment between objects, but when the deposition process using the deposition substrate according to the present invention is performed, the substrate sag even if the flat panel display is enlarged because the thickness of the deposition substrate is thick. Etc. do not occur, and therefore a large sized device can be manufactured.
도 7은 일반적인 구조의 유기전계발광표시장치를 나타내는 단면도이다.7 is a cross-sectional view illustrating an organic light emitting display device having a general structure.
도 7을 참조하면, 투명절연기판(200)의 전면에 실리콘산화물을 플라즈마-강화 화학기상증착(plasma-enhanced chemical vapor deposition, PECVD)방법으로 소정 두께의 버퍼층(210)을 형성한다. 이때, 상기 버퍼층(210)은 후속 공정으로 형성되는 비정질실리콘층의 결정화 공정 시 상기 투명절연기판(200) 내의 불순물이 확산되는 것을 방지한다.Referring to FIG. 7, a buffer layer 210 having a predetermined thickness is formed on a front surface of the transparent insulating substrate 200 by plasma-enhanced chemical vapor deposition (PECVD). In this case, the buffer layer 210 prevents the diffusion of impurities in the transparent insulating substrate 200 during the crystallization process of the amorphous silicon layer formed in a subsequent process.
상기 버퍼층(210) 상부에 반도체층인 비정질실리콘층(도시안됨)을 소정두께 증착한다. 이어서, 상기 비정질실리콘층을 ELA(Excimer Laser Annealing), SLS(Sequential Lateral Solidification), MIC(Metal Induced Crystallization) 또는 MILC(Metal Induced Lateral Crystallization)법 등을 사용하여 결정화하고, 사진식각공정으로 패터닝하여 단위 화소 내의 반도체층 패턴을 형성한다.An amorphous silicon layer (not shown), which is a semiconductor layer, is deposited on the buffer layer 210 at a predetermined thickness. Subsequently, the amorphous silicon layer is crystallized by using Excimer Laser Annealing (ELA), Sequential Lateral Solidification (SLS), Metal Induced Crystallization (MIC) or Metal Induced Lateral Crystallization (MIC), and patterned by photolithography. The semiconductor layer pattern in a pixel is formed.
상기 반도체층패턴을 포함하는 기판 전면에 게이트 절연막(230)을 형성한다. 이때, 상기 게이트절연막(230)은 실리콘산화막(SiO2), 실리콘질화막(SiNx) 또는 이들의 이중층으로 형성할 수 있다.A gate insulating layer 230 is formed on the entire surface of the substrate including the semiconductor layer pattern. In this case, the gate insulating film 230 may be formed of a silicon oxide film (SiO 2 ), a silicon nitride film (SiN x ), or a double layer thereof.
상기 게이트 절연막(230) 상의 상기 반도체층 패턴의 채널영역(221)과 대응되는 일정영역에 게이트 전극(231)을 형성한다. 상기 게이트 전극(231)은 알루미늄(Al), 알루미늄 합금(Al-alloy), 몰리브덴(Mo) 및 몰리브덴 합금(Mo-alloy)으로 이루어진 군에서 선택되는 하나로 형성할 수 있다.The gate electrode 231 is formed in a predetermined region corresponding to the channel region 221 of the semiconductor layer pattern on the gate insulating layer 230. The gate electrode 231 may be formed of one selected from the group consisting of aluminum (Al), aluminum alloy (Al-alloy), molybdenum (Mo), and molybdenum alloy (Mo-alloy).
그 다음, 상기 게이트전극(231)을 이온주입마스크로 사용하여 상기 반도체층패턴(220)에 불순물을 이온주입하여 소오스/드레인영역(220a 220b)을 형성한다. 이때, 상기 이온주입공정은 n+ 또는 p+ 불순물을 도펀트로 이용하여 실시된다. Next, an impurity is implanted into the semiconductor layer pattern 220 using the gate electrode 231 as an ion implantation mask to form a source / drain region 220a 220b. In this case, the ion implantation process is performed using n + or p + impurities as a dopant.
다음으로, 전체표면 상부에 소정 두께의 층간절연막(240)을 형성한다. 이때, 상기 층간절연막(240)은 실리콘산화막(SiO2), 실리콘질화막(SiNx) 또는 이들의 이중층으로 형성할 수 있다.Next, an interlayer insulating film 240 having a predetermined thickness is formed on the entire surface. In this case, the interlayer insulating film 240 may be formed of a silicon oxide film (SiO 2 ), a silicon nitride film (SiN x ), or a double layer thereof.
그 다음, 사진식각공정으로 상기 층간절연막(240) 및 게이트절연막(230)을 식각하여 상기 소오스/드레인영역(220a, 220b)을 노출시키는 콘택홀을 형성한다.Next, the interlayer insulating layer 240 and the gate insulating layer 230 are etched by a photolithography process to form contact holes exposing the source / drain regions 220a and 220b.
다음, 상기 소오스/드레인영역(220a, 220b)에 접속되는 소오스/드레인전극(250a, 250b)을 형성한다. 이때, 상기 소오스/드레인 전극(250a, 250b)을 형성함에 있어, 상기 소오스/드레인 전극 물질로는 Mo, W, MoW, AlNd, Ti, Al, Al 합금, Ag 및 Ag 합금 등으로 이루어진 군에서 선택되는 하나의 물질로 단일층으로 형성하거나, 배선 저항을 줄이기 위해 저저항물질인 Mo, Al 또는 Ag의 2층 구조 또는 그 이상의 다중막 구조, 즉, Mo/Al/Mo, MoW/Al-Nd/MoW, Ti/Al/Ti, Mo/Ag/Mo 및 Mo/Ag-합금/Mo 등으로 이루어진 군에서 선택되는 하나의 적층구조로 형성한다.Next, source / drain electrodes 250a and 250b connected to the source / drain regions 220a and 220b are formed. In this case, in forming the source / drain electrodes 250a and 250b, the source / drain electrode material may be selected from the group consisting of Mo, W, MoW, AlNd, Ti, Al, Al alloys, Ag, and Ag alloys. To form a single layer of a single material, or to reduce the wiring resistance, a two-layer structure of Mo, Al, or Ag, or a multi-layer structure of low resistance material, that is, Mo / Al / Mo, MoW / Al-Nd / MoW, Ti / Al / Ti, Mo / Ag / Mo and Mo / Ag-alloy / Mo and the like formed in one laminated structure selected from the group consisting of.
상기 소오스/드레인 전극(250a, 250b) 상부에는 절연막이 위치하고, 상기 절연막은 무기막(260), 유기막(270) 또는 그들의 이중층일 수 있다. 또한, 상기 절연막 내의 비아홀을 통하여 연결되는 제1전극층(280)이 상기 절연막 상에 위치한다.An insulating layer may be positioned on the source / drain electrodes 250a and 250b, and the insulating layer may be an inorganic layer 260, an organic layer 270, or a double layer thereof. In addition, a first electrode layer 280 connected through a via hole in the insulating layer is disposed on the insulating layer.
상기 제1전극층(280)은 배면발광형의 경우에는 투명전극으로, 전면발광형의 경우에는 반사형전극으로 구비될 수 있다. 상기 제1전극층이 투명전극으로 사용될 때에는 ITO(Indium Tin Oxide), IZO(Indium Zinc Oxide), TO(Tin Oxide) 및 ZnO(Zinc Oxide)로 이루어지는 군에서 선택되는 하나로 구비될 수 있고, 반사형전극으로 사용될 때에는 Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr 및 이들의 화합물로 이루어지는 군에서 선택되는 어느 하나로 반사막을 형성한 후, 그 위에 ITO(Indium Tin Oxide), IZO(Indium Zinc Oxide), TO(Tin Oxide) 및 ZnO(Zinc Oxide)로 이루어지는 군에서 선택되는 하나의 물질로 투명전극을 적층하여 형성할 수 있다.The first electrode layer 280 may be provided as a transparent electrode in the case of the bottom emission type and a reflective electrode in the case of the top emission type. When the first electrode layer is used as a transparent electrode, it may be provided as one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO) and zinc oxide (ZnO), and a reflective electrode. When used as a Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr and a reflective film formed of any one selected from the group consisting of these compounds, thereafter ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), TO (Tin Oxide) and ZnO (Zinc Oxide) may be formed by laminating a transparent electrode with one material selected from the group consisting of.
또한, 상기 제 1 전극층(280)은 전면발광형의 경우에 하부전극층(280a), 반사전극층(280b) 및 상부전극층(280c)의 적층구조로 하여 형성할 수 있다.In addition, the first electrode layer 280 may be formed in a stacked structure of the lower electrode layer 280a, the reflective electrode layer 280b, and the upper electrode layer 280c in the case of a top emission type.
상기 하부전극층(280a)은 ITO(Indium Tin Oxide), IZO(Indium Zinc Oxide), TO(Tin Oxide) 및 ZnO(Zinc Oxide)로 이루어지는 군에서 선택되는 하나로 형성할 수 있다. 이때, 상기 하부전극층(280a)은 50 내지 100Å의 두께를 지니도록 형성한다. 상기 하부전극층(280a)의 두께가 50Å이하일 경우 균일도 확보가 어렵고, 100Å 이상일 경우 하부전극층 자체 스트레스 때문에 접착력이 약화된다.The lower electrode layer 280a may be formed of one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO), and zinc oxide (ZnO). At this time, the lower electrode layer 280a is formed to have a thickness of 50 to 100Å. If the thickness of the lower electrode layer 280a is less than or equal to 50 GPa, it is difficult to secure uniformity. If the thickness of the lower electrode is less than 100 GPa, the adhesive strength is weakened due to the stress of the lower electrode layer itself.
상기 반사전극층(280b)은 Al, Al 합금, Ag 및 Ag 합금 등으로 이루어진 군에서 선택되는 하나의 물질을 이용하여 형성할 수 있으며, 이때, 반사전극층(280b)의 두께는 900∼2000Å으로 형성할 수 있다. 두께가 900Å 이하인 경우 빛의 일부가 투과하게 되며, 1000Å 정도가 빛이 투과하지 않는 최소의 두께이다. 또한, 2000Å 이상일 경우 원가 측면이나 공정 시간 등에서 바람직하지 않다.The reflective electrode layer 280b may be formed using one material selected from the group consisting of Al, Al alloys, Ag, and Ag alloys, and at this time, the thickness of the reflective electrode layer 280b may be 900 to 2000 μs. Can be. If the thickness is 900Å or less, a part of the light is transmitted, and about 1000Å is the minimum thickness that light does not transmit. In addition, when it is 2000 kPa or more, it is not preferable in terms of cost or process time.
이때, 상기 반사전극층(280b)은 광 반사 역할을 하여 휘도와 광 효율을 증가시킬 수 있다.In this case, the reflective electrode layer 280b may act as a light reflection to increase luminance and light efficiency.
상기 상부전극층(280c)은 ITO(Indium Tin Oxide), IZO(Indium Zinc Oxide), TO(Tin Oxide) 및 ZnO(Zinc Oxide)로 이루어지는 군에서 선택되는 하나로 형성할 수 있다. 이때, 상기 상부전극층(280c)의 두께는 50∼100Å으로 형성한다. 상기 상부전극층(280c) 두께가 50Å이하일 경우 박막의 균일도를 보장할 수 없으며, 100Å이상일 경우 간섭효과로 인하여 블루 영역에서 특히 반사율이 10%∼15% 이상 낮아지게 된다.The upper electrode layer 280c may be formed of one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO), and zinc oxide (ZnO). At this time, the thickness of the upper electrode layer 280c is formed to 50 ~ 100Å. If the thickness of the upper electrode layer 280c is less than or equal to 50 μs, the uniformity of the thin film cannot be guaranteed. If the thickness of the upper electrode layer 280c is less than or equal to 100 μs, the reflectance is particularly lower in the blue region by 10% to 15% due to the interference effect.
이어서, 상기 제1전극층(280) 상에 절연막을 형성한다. 이때, 상기 절연막은 화소정의막(pixel defined layer; 281)일 수 있다.Subsequently, an insulating film is formed on the first electrode layer 280. In this case, the insulating layer may be a pixel defined layer 281.
상기 화소정의막(281)은 폴리아크릴계 수지(polyacrylates resin), 에폭시 수지(epoxy resin), 페놀 수지(phenolic resin), 폴리아미드계 수지(polyamides resin), 폴리이미드계 수지(polyimides rein), 불포화 폴리에스테르계 수지(unsaturated polyesters resin), 폴리페닐렌계 수지(poly(phenylenethers) resin) , 폴리페닐렌설파이드계 수지(poly(phenylenesulfides) resin) 및 벤조사이클로부텐(benzocyclobutene, BCB)으로 이루어진 군에서 선택된 하나의 물질로 형성할 수 있다.The pixel definition layer 281 may be made of polyacrylates, epoxy resins, phenolic resins, polyamides resins, polyimides resins, and unsaturated polys. Unsaturated polyesters resin, poly (phenylenethers) resin, polyphenylenesulfide resin (poly (phenylenesulfides) resin) and benzocyclobutene (benzocyclobutene (BCB)) It can be formed of a material.
이때, 상기 화소정의막(281)은 상기 제1전극층의 일부를 노출시키는 개구부(281a)를 포함하고 있다.In this case, the pixel defining layer 281 includes an opening 281a exposing a part of the first electrode layer.
이어서, 상기 개구부(281a)에 의해 노출된 제1전극층 상에 위치하며, 발광층을 포함하는 유기막층(291)을 형성하고, 이어서, 상기 유기막층(291) 상에 제2전극(292)을 형성한다.Subsequently, an organic layer 291 is formed on the first electrode layer exposed by the opening 281a and includes a light emitting layer. Then, a second electrode 292 is formed on the organic layer 291. do.
구체적으로는 상기 유기막층(291)은 발광층을 포함하며 그 외에 홀주입층, 홀수송층, 전자수송층 및 전자주입층 중 어느 하나 이상의 층을 추가로 포함할 수 있으며, 본 발명에서는 상기 유기막층의 구성 및 물질에 관하여 한정하는 것은 아니다.Specifically, the organic layer 291 includes a light emitting layer, and may further include any one or more layers of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. And no limitations with regard to matter.
상기 홀 수송층을 형성하는 홀 수송성 물질로는 N,N'-디(나프탈렌-1-일)-N,N'-디페닐-벤지딘{N,N'-di(naphthalene-1-yl)-N,N'-diphenyl-benzidine:α-NPB}, N,N'-비스(3-메틸페닐)-N,N'-디페닐-[1,1'-비페닐]-4,4'-디아민(TPD) 등을 사용할 수 있다. 그리고 홀수송층의 막두께는 10 내지 50nm 범위로 형성할 수 있다. 상기 홀수송층의 두께 범위를 벗어나는 경우에는 홀 주입 특성이 저하되므로 바람직하지 못하다.As a hole transporting material for forming the hole transporting layer, N, N'-di (naphthalen-1-yl) -N, N'-diphenyl-benzidine {N, N'-di (naphthalene-1-yl) -N , N'-diphenyl-benzidine: α-NPB}, N, N'-bis (3-methylphenyl) -N, N'-diphenyl- [1,1'-biphenyl] -4,4'-diamine ( TPD) and the like can be used. And the film thickness of the hole transport layer can be formed in the range of 10 to 50nm. If it is out of the thickness range of the hole transport layer, the hole injection characteristics are deteriorated, which is not preferable.
이러한 홀수송층에는 홀수송성 물질이외에 전자-홀 결합에 대하여 발광할 수 있는 도펀트를 부가할 수 있으며, 이러한 도펀트로는 4-(디시아노메틸렌)-2-터트-부틸-6-(1,1,7,7-테트라메틸줄로리딜-9-에닐)-4H-피란(4-(dicyanomethylene)-2-t-butyl-6-(1,1,7,7-tetramethyljulolidyl-9-enyl)-4H-pyran: DCJTB), 쿠마린6(Coumarin 6), 루브레네(Rubrene), DCM, DCJTB, 페닐렌(Perylene), 퀴나크리돈(Quinacridone) 등을 이용하며, 그 함량은 홀수송층 형성용 물질 총중량에 대하여 0.1 내지 5중량%를 사용한다. 이와 같이 홀수송층 형성시 도펀트를 부가하면, 발광색을 도펀트 종류 및 함량에 따라 조절가능하며, 홀수송층의 열적 안정성을 개선하여 소자의 수명을 향상시키는 잇점이 있다.In addition to the hole transport material, a dopant capable of emitting light with respect to electron-hole bonds may be added to the hole transport layer, and such a dopant may be 4- (dicyanomethylene) -2-tert-butyl-6- (1,1, 7,7-tetramethyljulolidyl-9-enyl) -4H-pyran (4- (dicyanomethylene) -2-t-butyl-6- (1,1,7,7-tetramethyljulolidyl-9-enyl) -4H -pyran: DCJTB), Coumarin 6, Rubrene, DCM, DCJTB, phenylene (Perylene), quinacridone and the like, the content of the total weight of the material for forming the hole transport layer 0.1 to 5% by weight is used. In this way, when the dopant is added when forming the hole transport layer, the emission color may be adjusted according to the type and content of the dopant, and the thermal stability of the hole transport layer may be improved to improve the life of the device.
또한, 상기 홀주입층은 스타버스트(starbust) 아민계 화합물을 이용하여 형성할 수 있으며, 홀 주입층의 두께는 30 내지 100nm로 형성할 수 있다. 상기 홀주입층의 두께 범위를 벗어나는 경우에는 홀 주입 특성이 불량하므로 바람직하지 못하다. 상기 홀주입층을 통하여 대향전극과 홀수송층간의 접촉저항을 감소시키고, 애노드전극의 홀 수송능력이 향상시켜 소자의 특성이 전반적으로 개선되는 효과를 얻을 수 있다.In addition, the hole injection layer may be formed using a starbust amine compound, and the thickness of the hole injection layer may be formed to 30 to 100 nm. When the thickness of the hole injection layer is out of the range, the hole injection property is poor, which is not preferable. Through the hole injection layer, the contact resistance between the counter electrode and the hole transport layer may be reduced, and the hole transporting ability of the anode electrode may be improved, thereby improving overall device characteristics.
본 발명의 발광층의 형성재료는 특별히 제한되지는 않으며, 구체적인 예로서 CBP(4,4'-bis(carbazol-9-yl)-biphenyl)을 들 수 있다.The material for forming the light emitting layer of the present invention is not particularly limited, and specific examples thereof include CBP (4,4'-bis (carbazol-9-yl) -biphenyl).
본 발명의 발광층은 상술한 홀수송층과 마찬가지로 전자-홀 결합에 대하여 발광할 수 있는 도펀트를 더 함유할 수 있으며, 이때, 도펀트 종류 및 함량은 홀수송층의 경우와 거의 동일한 수준이며, 상기 발광층의 막두께는 10 내지 40 nm 범위인 것이 바람직하다.The light emitting layer of the present invention may further contain a dopant capable of emitting light with respect to electron-hole coupling like the above-described hole transport layer, wherein the dopant type and content are about the same level as that of the hole transport layer, and the film of the light emitting layer The thickness is preferably in the range of 10 to 40 nm.
상기 전자수송층을 형성하는 전자수송성 물질로는 트리스(8-퀴놀리놀라토)-알루미늄(tris(8-quinolinolate)-aluminium: Alq 3 ), Almq 3 을 이용하며, 상술한 홀수송층과 마찬가지로 전자-홀 결합에 대하여 발광할 수 있는 도펀트를 더 함유하기도 한다. 이때, 도펀트 종류 및 함량은 홀수송층의 경우와 거의 동일한 수준이며, 상기 전자수송층의 막두께는 30 내지 100nm 범위로 할 수 있다. 상기 전자수송층의 두께 범위를 벗어나는 경우에는 효율 저하 및 구동전압이 상승하여 바람직하지 못하다.As the electron transporting material for forming the electron transporting layer, tris (8-quinolinolate) -aluminum (tris (8-quinolinolate) -aluminum: Alq 3) and Almq 3 are used. It may further contain a dopant capable of emitting light with respect to hole bonding. At this time, the type and content of the dopant is almost the same level as the case of the hole transport layer, the film thickness of the electron transport layer may be in the range of 30 to 100nm. If the electron transport layer is out of the thickness range, the efficiency is lowered and the driving voltage is increased, which is not preferable.
상기 발광층과 전자수송층 사이에는 홀 장벽층(HBL)이 더 형성될 수 있다. 여기에서 홀 장벽층은 인광발광물질에서 형성되는 엑시톤이 전자수송층으로 이동되는것을 막아주거나 홀이 전자수송층으로 이동되는 것을 막아주는 역할을 하는 것으로, 상기 홀 장벽층 형성 재료로서 BAlq를 사용할 수 있다.A hole barrier layer HBL may be further formed between the emission layer and the electron transport layer. Here, the hole barrier layer serves to prevent the excitons formed from the phosphorescent material from moving to the electron transport layer or to prevent the holes from moving to the electron transport layer, and BAlq may be used as the hole barrier layer forming material.
상기 전자주입층은 LiF로 이루어진 물질로 형성할 수 있으며, 이의 두께는 0.1 내지 10nm 범위로 형성할 수 있다. 상기 전자주입층층의 두께범위를 벗어나는 경우에는 구동전압이 상승하여 바람직하지 못하다.The electron injection layer may be formed of a material consisting of LiF, the thickness thereof may be formed in the range of 0.1 to 10nm. If it is out of the thickness range of the electron injection layer, the driving voltage increases, which is not preferable.
상기 유기막층 상부에 형성된 제2전극(292)은 배면발광형인 경우, 반사형으로 구성되며, 반사형으로 구성되는 경우 Li, Ca, LiF/Ca, LiF/Al, Al, Mg 및 이들의 합금으로 이루어지는 군에서 선택되는 어느 하나의 물질로 형성할 수 있다.The second electrode 292 formed on the organic layer is formed of a reflective type in the case of the bottom emission type, and is formed of Li, Ca, LiF / Ca, LiF / Al, Al, Mg, and alloys thereof in the reflective type. It can be formed of any one material selected from the group consisting of.
또한, 상기 유기막층 상부에 형성된 제2전극(292)은 전면발광형인 경우, 반투과 캐소드형 또는 반투과 캐소드 형성 후 투과형 캐소드형를 적층한 구조로 구성되며, 상기 반투과 캐소드형은 Li, Ca, LiF/Ca, LiF/Al, Al, Mg 및 Mg 합금으로 이루어지는 군에서 선택되는 어느 하나의 물질을 이용하여 이를 5 내지 30nm의 두께로 얇게 형성하여 구성할 수 있으며, 상기 반투과 캐소드 형성후 투과형 캐소드형을 구성하는 방법은 일 함수가 작은 금속 즉, Li, Ca, LiF/Ca, LiF/Al, Al, Mg 및 Mg 합금으로 이루어지는 군에서 선택되는 어느 하나의 물질을 이용하여 반투과형 캐소드를 형성한 후 저저항 특성을 갖는 ITO, IZO(Indium Zinc Oxide)등을 이용한 막을 추가적으로 형성하여 만든다. 이때, 반투과 캐소드의 두께가 5nm미만인 경우에는 저전압에서 전자주입을 못하고 만약 반투과 캐소드의 두께가 30nm 이상인 경우에는 경우에는 투과율이 현저하게 떨어져 바람직하지 못하다. 또한 반투과 캐소드와 투과형 캐소드를 합친 총두께는 10 내지 400nm의 두께가 적당하다.In addition, when the second electrode 292 formed on the organic layer is a top emission type, the second electrode 292 has a structure in which a transflective cathode is formed or a transmissive cathode is laminated after the transflective cathode is formed, and the transflective cathode is Li, Ca, Using any one material selected from the group consisting of LiF / Ca, LiF / Al, Al, Mg and Mg alloy can be formed by forming a thin to a thickness of 5 to 30nm, the transmissive cathode after forming the transflective cathode The method of forming the mold is performed by forming a semi-transmissive cathode using any one material selected from the group consisting of metals having a small work function, that is, Li, Ca, LiF / Ca, LiF / Al, Al, Mg, and Mg alloys. After that, a film using ITO, IZO (Indium Zinc Oxide), etc. having low resistance is additionally formed. In this case, when the thickness of the transflective cathode is less than 5 nm, electron injection is not possible at low voltage, and when the thickness of the transflective cathode is 30 nm or more, the transmittance is remarkably low, which is not preferable. The total thickness of the transflective cathode and the transmissive cathode is preferably 10 to 400 nm in thickness.
도 8 및 도 9는 본 발명에 따른 증착용 기판을 사용하여, 상기 도 7의 유기전계발광표시장치의 유기막층을 성막하는 공정을 나타내는 개략적인 단면도이다.8 and 9 are schematic cross-sectional views illustrating a process of forming an organic film layer of the organic light emitting display device of FIG. 7 using the deposition substrate according to the present invention.
도 8을 참조하면, 주울 가열용 발열 도전층(310a) 상에 증착용 물질층(320)이 형성된 기판(300)의 주울 가열용 발열 도전층(310a)에 전계를 인가한다.Referring to FIG. 8, an electric field is applied to the Joule heating exothermic conductive layer 310a of the substrate 300 on which the deposition material layer 320 is formed on the Joule heating exothermic conductive layer 310a.
이때, 본 발명에 따른 증착용 기판을 사용하여, 상기 도 7의 유기전계발광표시장치의 유기막층을 형성하는 것이므로, 상기 상기 주울 가열용 발열 도전층(310a)의 형상은 상기 유기막층의 형상에 대응하여 패터닝되어 있다.In this case, since the organic film layer of the organic light emitting display device of FIG. 7 is formed by using the substrate for deposition according to the present invention, the shape of the heating conductive layer 310a for heating the joule is determined by the shape of the organic film layer. Correspondingly patterned.
또한, 상기 증착용 물질층(320)은 상기 유기막층의 재질을 사용하여 형성하게 된다.In addition, the deposition material layer 320 is formed using a material of the organic layer.
상술한 바와 같이, 유기막층은 발광층을 포함하며 그 외에 홀주입층, 홀수송층, 전자수송층 및 전자주입층 중 어느 하나 이상의 층을 추가로 포함할 수 있으므로, 예를 들어, 발광층을 성막하는 경우에는 상기 주울 가열용 발열 도전층(310a)의 형상은 발광층의 형상에 대응하여 패터닝되어 있고, 상기 증착용 물질층(320)은 상기 발광층의 재질을 사용하여 형성하게 된다.As described above, the organic layer includes a light emitting layer and may further include any one or more layers of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. Thus, for example, when forming a light emitting layer The shape of the joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the light emitting layer, and the deposition material layer 320 is formed using the material of the light emitting layer.
이때, 인가된 전계에 의하여 주울 가열되는 증착용 물질층(320)은 상기 주울 가열용 발열 도전층(310a)과 대응되는 영역(320a)에 해당하고, 따라서, 상기 주울 가열용 발열 도전층(310a)과 대응되는 영역(320a)의 증착용 물질이 증발하게 된다.In this case, the deposition material layer 320 which is Joule heated by the applied electric field corresponds to the region 320a corresponding to the Joule heating exothermic conductive layer 310a, and thus, the joule heating exothermic conductive layer 310a. Evaporation material in the region 320a corresponding to
계속해서, 도 9를 참조하면, 상기 증발된 증착용 물질이 화소정의막(281)에 형성된 개구부에 의해 노출된 제1전극층 상에 증착되어, 유기막층을 형성할 수 있다. Subsequently, referring to FIG. 9, the evaporated deposition material may be deposited on the first electrode layer exposed by the opening formed in the pixel definition layer 281 to form an organic layer.
다만, 도 8 및 도 9에서는 도 7의 유기막층을 형성하는 성막하는 공정만을 도시하였으나, 이와는 달리, 도 7의 게이트 전극(231), 소오스/드레인 전극(250a, 250b) 또는 제1전극층(280)을 상술한 바와 같은 방법에 의하여 형성할 수 있다.8 and 9 illustrate only the process of forming the organic layer of FIG. 7, the gate electrode 231, the source / drain electrodes 250a and 250b, or the first electrode layer 280 of FIG. 7. ) Can be formed by the method as described above.
이때, 게이트 전극(231)을 성막하는 경우에는 상기 주울 가열용 발열 도전층(310a)의 형상은 게이트 전극의 형상에 대응하여 패터닝되고, 상기 증착용 물질층(320)은 상기 게이트 전극의 재질을 사용하여 형성하게 된다.In this case, when the gate electrode 231 is formed, the shape of the joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the gate electrode, and the deposition material layer 320 is formed of the material of the gate electrode. To form.
또한, 소오스/드레인 전극(250a, 250b)을 성막하는 경우에는 상기 주울 가열용 발열 도전층(310a)의 형상은 소오스/드레인 전극의 형상에 대응하여 패터닝되고, 상기 증착용 물질층(320)은 상기 소오스/드레인 전극의 재질을 사용하여 형성하게 된다.In addition, when the source / drain electrodes 250a and 250b are formed, the shape of the joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the source / drain electrodes, and the deposition material layer 320 is It is formed using the material of the source / drain electrodes.
또한, 제1전극층(280)을 성막하는 경우에는 상기 주울 가열용 발열 도전층(310a)의 형상은 제1전극층의 형상에 대응하여 패터닝되고, 상기 증착용 물질층(320)은 상기 제1전극층의 재질을 사용하여 형성하게 된다.In addition, when the first electrode layer 280 is formed, the shape of the Joule heating exothermic conductive layer 310a is patterned to correspond to the shape of the first electrode layer, and the deposition material layer 320 is the first electrode layer. It is formed using the material of.
본 발명은 이상에서 살펴본 바와 같이 바람직한 실시 예를 들어 도시하고 설명하였으나, 상기한 실시 예에 한정되지 아니하며 본 발명의 정신을 벗어나지 않는 범위 내에서 당해 발명이 속하는 기술 분야에서 통상의 지식을 가진 자에 의해 다양한 변경과 수정이 가능할 것이다.Although the present invention has been shown and described with reference to the preferred embodiments as described above, it is not limited to the above embodiments and those skilled in the art without departing from the spirit of the present invention. Various changes and modifications will be possible.

Claims (25)

  1. 기판;Board;
    상기 기판 상에 형성된 주울 가열용 발열 도전층; 및Joule heating exothermic conductive layer formed on the substrate; And
    상기 주울 가열용 발열 도전층을 포함한 상기 기판의 전면에 형성된 증착용 물질층을 포함하는 증착장치의 증착용 기판.And a deposition material layer formed on an entire surface of the substrate including the joule heating exothermic layer.
  2. 제 1 항에 있어서,The method of claim 1,
    상기 기판의 재질은 유리, 세라믹 또는 플라스틱인 것을 특징으로 하는 증착장치의 증착용 기판.The substrate material is a substrate for deposition of the deposition apparatus, characterized in that the glass, ceramic or plastic.
  3. 제 1 항에 있어서,The method of claim 1,
    상기 주울 가열용 발열 도전층의 재질은 금속 또는 금속합금인 것을 특징으로 하는 증착장치의 증착용 기판.The material of the heating conductive layer for heating the joule is a substrate for deposition of a deposition apparatus, characterized in that the metal or metal alloy.
  4. 제 1 항에 있어서,The method of claim 1,
    상기 주울 가열용 발열 도전층은 상기 증착장치에 의하여 형성되는 막의 형상에 대응하여 패터닝되는 것을 특징으로 하는 증착장치의 증착용 기판.The joule heating exothermic conductive layer is patterned according to the shape of the film formed by the deposition apparatus.
  5. 제 1 항에 있어서,The method of claim 1,
    상기 증착용 물질층의 재질은 유기막, 무기막 또는 금속막인 것을 특징으로 하는 증착장치의 증착용 기판.The material of the deposition material layer is an organic film, an inorganic film or a metal film deposition substrate, characterized in that the metal film.
  6. 기판을 제공하고,Providing a substrate,
    상기 기판 상에 주울 가열용 발열 도전층을 형성하고,Forming a heating conductive layer for joule heating on the substrate,
    상기 주울 가열용 발열 도전층을 포함한 상기 기판의 전면에 증착용 물질층을 형성하고,Forming a deposition material layer on the entire surface of the substrate including the joule heating exothermic conductive layer,
    상기 주울 가열용 발열 도전층에 전계를 인가하여 상기 증착용 물질층을 주울 가열하는 것을 특징으로 하는 성막 방법.And applying the electric field to the exothermic conductive layer for heating the joule to joule heat the vapor deposition material layer.
  7. 제 6 항에 있어서,The method of claim 6,
    상기 주울 가열용 발열 도전층은 증착장치에 의하여 형성되는 막의 형상에 대응하여 패터닝되는 것을 특징으로 하는 성막 방법.The joule heating exothermic conductive layer is patterned according to the shape of the film formed by the deposition apparatus.
  8. 제 6 항에 있어서,The method of claim 6,
    상기 증착용 물질층을 주울 가열하는 것은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층인 것을 특징으로 하는 성막 방법.Joule heating the vapor deposition material layer is a deposition material layer, characterized in that the deposition material layer in a region corresponding to the heat generation conductive layer for heating the joule.
  9. 제 8 항에 있어서,The method of claim 8,
    상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층의 증착용 물질이 증발하는 것을 특징으로 하는 성막 방법.The deposition method of claim 1, wherein the deposition material of the deposition material layer corresponding to the heating conductive layer for heating the joule is evaporated.
  10. 제 8 항에 있어서,The method of claim 8,
    상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층에 가해지는 온도는 상기 증착용 물질의 녹는점 보다 10℃ 이상이고, 상기 주울 가열용 발열 도전층의 녹는점 이하인 것을 특징으로 하는 성막 방법.The temperature applied to the deposition material layer corresponding to the heating conductive layer for heating the joule is 10 ° C. or higher than the melting point of the vapor deposition material and is below the melting point of the heating conductive layer for heating the joule. Way.
  11. 제 6 항에 있어서,The method of claim 6,
    상기 주울 가열용 발열 도전층에 1kw/㎠ 내지 1,000kw/㎠의 전계를 인가하는 것을 특징으로 하는 성막 방법.A film forming method, comprising applying an electric field of 1 kw / cm 2 to 1,000 kw / cm 2 to the heating conductive layer for heating the joule.
  12. 제 6 항에 있어서,The method of claim 6,
    상기 전계의 인가 시간은 1/1,000,000 내지 100초인 것을 특징으로 하는 성막 방법.The deposition time of the electric field is characterized in that 1 / 1,000,000 to 100 seconds.
  13. 제 6 항에 있어서,The method of claim 6,
    상기 전계의 인가 시간은 1/1,000,000 내지 1초인 것을 특징으로 하는 성막 방법.The deposition time of the electric field is characterized in that 1 / 1,000,000 to 1 second.
  14. 제1기판을 제공하고; 상기 제1기판의 상부에 제1전극층을 형성하고; 상기 제1전극층의 상부에 화소정의막을 형성하고; 상기 화소정의막 상에 제1전극층의 일부를 노출시키는 개구부를 형성하고; 상기 제1전극층의 상부에 위치하며, 발광층을 포함하는 유기막층을 형성하고; 상기 유기막층의 상부에 제2전극층을 형성하는 것을 포함하는 유기전계발광 표시장치의 제조방법에 있어서,Providing a first substrate; Forming a first electrode layer on the first substrate; Forming a pixel definition layer on the first electrode layer; An opening for exposing a portion of the first electrode layer on the pixel definition layer; Forming an organic layer on the first electrode layer and including an emission layer; In the manufacturing method of the organic light emitting display device comprising forming a second electrode layer on the organic film layer,
    상기 유기전계발광표시장치의 적어도 어느 하나의 층은At least one layer of the organic light emitting display device
    상기 제1기판과 대응되는 제2기판을 제공하고,Providing a second substrate corresponding to the first substrate,
    상기 제2기판 상에 제 1 주울 가열용 발열 도전층을 형성하고,Forming a heating conductive layer for heating the first joule on the second substrate,
    상기 제 1 주울 가열용 발열 도전층을 포함한 상기 제2기판의 전면에 제 1 증착용 물질층을 형성하고,Forming a first deposition material layer on the entire surface of the second substrate including the first joule heating exothermic layer,
    상기 제 1 주울 가열용 발열 도전층에 전계를 인가하여 상기 제 1 증착용 물질층을 주울 가열하여 형성하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The method of manufacturing an organic light emitting display device according to claim 1, wherein the first deposition material layer is subjected to Joule heating by applying an electric field to the heating conductive layer for heating the first joule.
  15. 제 14 항에 있어서,The method of claim 14,
    상기 제1기판 상에 채널영역 및 소오스/드레인 영역을 구비하는 반도체층; 상기 반도체층의 채널영역과 대응되는 게이트 전극; 및 상기 반도체층과 전기적으로 연결되는 소오스/드레인 전극을 구비하는 박막트랜지스터를 형성하는 공정을 더 포함하고,A semiconductor layer having a channel region and a source / drain region on the first substrate; A gate electrode corresponding to the channel region of the semiconductor layer; And forming a thin film transistor having a source / drain electrode electrically connected to the semiconductor layer.
    상기 박막트랜지스터의 게이트 전극 또는 소오스/드레인 전극은The gate electrode or source / drain electrode of the thin film transistor
    상기 제1기판과 대응되는 제3기판을 제공하고,Providing a third substrate corresponding to the first substrate,
    상기 제3기판 상에 제 2 주울 가열용 발열 도전층을 형성하고,Forming a heating conductive layer for heating the second joule on the third substrate,
    상기 제 2 주울 가열용 발열 도전층을 포함한 상기 제3기판의 전면에 제 2 증착용 물질층을 형성하고,Forming a second deposition material layer on the entire surface of the third substrate including the second joule heating heating conductive layer,
    상기 제 2 주울 가열용 발열 도전층에 전계를 인가하여 상기 제 2 증착용 물질층을 주울 가열하여 형성하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The method of manufacturing an organic light emitting display device according to claim 1, wherein the second deposition material layer is subjected to Joule heating by applying an electric field to the heating conductive layer for heating the second joule.
  16. 제 14 항 또는 제 15 항에 있어서,The method according to claim 14 or 15,
    상기 증착용 물질층을 주울 가열하는 것은 상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층인 것을 특징으로 하는 유기전계발광표시장치의 제조방법.Joule heating of the material layer for deposition is a method for manufacturing an organic light emitting display device, characterized in that the material layer for deposition in a region corresponding to the heat generating conductive layer for heating the joule.
  17. 제 14 항 또는 제 15 항에 있어서,The method according to claim 14 or 15,
    상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층의 증착용 물질이 증발하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.And depositing a material of a deposition material layer in a region corresponding to the heat generating conductive layer for heating the joule.
  18. 제 14 항 또는 제 15 항에 있어서,The method according to claim 14 or 15,
    상기 주울 가열용 발열 도전층과 대응되는 영역의 증착용 물질층에 가해지는 온도는 상기 증착용 물질의 녹는점 보다 10℃ 이상이고, 상기 주울 가열용 발열 도전층의 녹는점 이하인 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The temperature applied to the deposition material layer in the region corresponding to the heat generating conductive layer for heating the joules is 10 ° C. or higher than the melting point of the material for depositing, and the organic melting point of the heating conductive layer for heating the joules. Method of manufacturing an electroluminescent display device.
  19. 제 14 항 또는 제 15 항에 있어서,The method according to claim 14 or 15,
    상기 주울 가열용 발열 도전층에 1kw/㎠ 내지 1,000kw/㎠의 전계를 인가하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.A method of manufacturing an organic light emitting display device, characterized in that an electric field of 1 kw / cm 2 to 1,000 kw / cm 2 is applied to the heating conductive layer for joule heating.
  20. 제 14 항 또는 제 15 항에 있어서,The method according to claim 14 or 15,
    상기 전계의 인가 시간은 1/1,000,000 내지 100초인 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The application time of the electric field is a method of manufacturing an organic light emitting display device, characterized in that 1/1 / 000,000 to 100 seconds.
  21. 제 14 항 또는 제 15 항에 있어서,The method according to claim 14 or 15,
    상기 전계의 인가 시간은 1/1,000,000 내지 1초인 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The application time of the electric field is a manufacturing method of an organic light emitting display device, characterized in that 1/1 / 000,000 to 1 second.
  22. 제 14 항에 있어서,The method of claim 14,
    상기 제 1 주울 가열용 발열 도전층의 형상은 상기 유기막층의 형상에 대응하여 패터닝되고, 상기 제 1 증착용 물질층은 상기 유기막층의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The shape of the first joule heating exothermic conductive layer is patterned according to the shape of the organic layer, and the first deposition material layer is formed of the organic layer. Way.
  23. 제 14 항에 있어서,The method of claim 14,
    상기 제 1 주울 가열용 발열 도전층의 형상은 상기 제1전극층의 형상에 대응하여 패터닝되고, 상기 제 1 증착용 물질층은 상기 제1전극층의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The shape of the heat generating conductive layer for heating the first joule is patterned according to the shape of the first electrode layer, and the material layer for the first deposition material uses the material of the first electrode layer. Manufacturing method.
  24. 제 15 항에 있어서,The method of claim 15,
    상기 제 2 주울 가열용 발열 도전층의 형상은 상기 게이트 전극의 형상에 대응하여 패터닝되고, 상기 제 2 증착용 물질층은 상기 게이트 전극의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The shape of the second joule heating exothermic conductive layer is patterned according to the shape of the gate electrode, and the second deposition material layer is formed of a material of the gate electrode. Way.
  25. 제 15 항에 있어서,The method of claim 15,
    상기 제 2 주울 가열용 발열 도전층의 형상은 상기 소오스/드레인 전극의 형상에 대응하여 패터닝되고, 상기 제 2 증착용 물질층은 상기 소오스/드레인 전극의 재질을 사용하는 것을 특징으로 하는 유기전계발광표시장치의 제조방법.The shape of the heat generating conductive layer for heating the second joule is patterned to correspond to the shape of the source / drain electrodes, and the second material layer for deposition uses the material of the source / drain electrodes. Method for manufacturing a display device.
PCT/KR2010/004390 2009-07-10 2010-07-06 Substrate for the deposition of a deposition apparatus, film-forming method, and method for manufacturing an organic electroluminescence display device using the substrate for deposition WO2011005008A2 (en)

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