WO2010147006A1 - Infrared detection element and method for manufacturing same - Google Patents

Infrared detection element and method for manufacturing same Download PDF

Info

Publication number
WO2010147006A1
WO2010147006A1 PCT/JP2010/059518 JP2010059518W WO2010147006A1 WO 2010147006 A1 WO2010147006 A1 WO 2010147006A1 JP 2010059518 W JP2010059518 W JP 2010059518W WO 2010147006 A1 WO2010147006 A1 WO 2010147006A1
Authority
WO
WIPO (PCT)
Prior art keywords
main surface
junction
substrate
semiconductor layer
detection element
Prior art date
Application number
PCT/JP2010/059518
Other languages
French (fr)
Japanese (ja)
Inventor
牧野　健二
Original Assignee
浜松ホトニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 浜松ホトニクス株式会社 filed Critical 浜松ホトニクス株式会社
Publication of WO2010147006A1 publication Critical patent/WO2010147006A1/en

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
    • G01J5/20—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
    • G01J5/22—Electrical features thereof
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G01J5/0225—Shape of the cavity itself or of elements contained in or suspended over the cavity
    • G01J5/024—Special manufacturing steps or sacrificial layers or layer structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L31/03046—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H01L31/03529—Shape of the potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • H01L31/1035—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type the devices comprising active layers formed only by AIIIBV compounds

Definitions

  • the present invention relates to an infrared detection element and a manufacturing method thereof.
  • Patent Document 1 discloses an infrared sensor including a substrate, an N-type semiconductor layer and a P-type semiconductor layer stacked on the substrate, and a plurality of single sensors connected to each other in a state of being separated from each other by a groove. Are listed. This infrared sensor detects infrared rays by a change in current generated in each single sensor.
  • the inventors discovered the following problems as a result of examining the conventional infrared detection element in detail.
  • the present invention has been made to solve the above-described problems, and an object thereof is to provide a highly reliable infrared detection element and a method for manufacturing the same.
  • an infrared detecting element includes a substrate, a PN semiconductor layer, an intermediate electrode, and a terminal electrode.
  • the substrate has a first main surface and a second main surface opposite to the first main surface.
  • the PN semiconductor layer is formed of a plurality of N-type conductive layers and a plurality of P-type conductive layers provided on the first main surface of the substrate and arranged alternately along the first main surface. Yes.
  • the PN semiconductor layer is provided with a groove whose bottom surface is defined by the first main surface. By this groove, a pair of the first PN junction and the second PN junction adjacent to each other is formed. It is processed so as to extend linearly along the main surface of 1. That is, the PN semiconductor layer provided on the first main surface of the substrate can be processed into an arbitrary shape by adjusting the groove formation position.
  • the arrangement direction (stacking direction) of the N-type conductive layer and the P-type conductive layer constituting the PN semiconductor layer is parallel to the first main surface of the substrate and extends in the extending direction of the PN semiconductor layer. Match. Therefore, the PN junction portion that is the boundary between the N-type conductive layer and the P-type conductive layer constituting the PN semiconductor layer is also arranged along the extending direction of the PN semiconductor layer.
  • one is a first PN junction that constitutes a part of an effective sensitivity region for infrared rays, and the other is an intermediate This is called a second PN junction that constitutes a part of the electrode installation region.
  • the intermediate electrode short-circuits the second PN junction.
  • the intermediate electrode exposes the first PN junction when the first main surface of the substrate is viewed along the direction of incidence of infrared rays from the first main surface of the substrate toward the second main surface, while the second PN junction is exposed.
  • the second PN junction is provided in contact with the PN junction.
  • the terminal electrode outputs a potential change caused by the electric charge generated at the first PN junction due to the infrared rays incident along the infrared incident direction.
  • This terminal electrode is provided at both ends of the PN semiconductor layer extending on the first main surface of the substrate.
  • the sensitivity is determined by the number of PN junctions per unit area. For this reason, when forming the intermediate electrode, it is not necessary to consider the aperture ratio (the area ratio of the effective sensitivity region to the infrared light receiving region), and the degree of freedom in design is improved.
  • the intermediate electrode is formed on the second PN junction, that is, on the PN semiconductor layer (on the side opposite to the substrate with respect to the PN semiconductor layer) without straddling the grooves partitioning each part of the PN semiconductor layer. This facilitates the formation of the intermediate electrode (that is, the intermediate electrode is accurately and reliably formed.
  • the infrared detection element As a result, it is possible to improve the yield of the infrared detecting element.
  • partitioning each part and processing the shape of the PN semiconductor layer itself into a linear shape a large number of PN junctions can be concentrated on the first main surface of the substrate with a simple configuration. Therefore, according to the infrared detection element having the above-described structure, it is possible to improve the yield of the infrared detection element and increase the number of PN junctions per unit area (improvement of sensitivity of the infrared detection element). As a result, the reliability of the obtained infrared detection element is greatly improved.
  • the PN semiconductor layer is preferably processed so as to extend in a meandering manner along the first main surface of the substrate.
  • the PN semiconductor layer is processed in such a shape, the number of PN junctions per unit area can be further increased, and as a result, the sensitivity of the infrared detection element can be improved.
  • the PN semiconductor layer may be processed so as to extend in a spiral shape along the first main surface of the substrate. Even when the PN semiconductor layer is processed in such a shape, the number of PN junctions per unit area can be further increased, and as a result, the sensitivity of the infrared detection element can be improved.
  • a method for manufacturing an infrared detecting element according to the present invention is a method for manufacturing an infrared detecting element having the above-described structure, and includes a conductive layer forming step, a groove forming step, an intermediate electrode forming step, and a terminal. An electrode formation process is provided.
  • a substrate having a first main surface and a second main surface opposite to the first main surface is prepared.
  • a conductive layer composed of a plurality of N-type conductive layers and a plurality of P-type conductive layers arranged alternately along the first main surface of the substrate is formed into a first layer of the substrate. It is formed on the main surface.
  • a PN semiconductor layer processed so that a pair of the first PN junction and the second PN junction adjacent to each other extends linearly along the first main surface is formed.
  • the PN semiconductor layer having such a shape can be obtained by forming a groove whose bottom surface is defined by the first main surface in a conductive layer formed on the first main surface.
  • the intermediate electrode forming step when the first main surface of the substrate is viewed along the infrared incident direction from the first main surface of the substrate toward the second main surface, the first PN junction is exposed, An intermediate electrode in contact with the second PN junction is formed on the second PN junction.
  • the intermediate electrode formed in this way functions to short-circuit the second PN junction.
  • terminal electrodes for outputting a potential change caused by charges generated in the first PN junction due to the incidence of infrared rays are formed at both ends of the PN semiconductor layer.
  • the intermediate electrode is formed on the second PN junction, that is, the PN semiconductor layer so as to sandwich the PN semiconductor layer together with the substrate.
  • the intermediate electrode is formed on the PN semiconductor layer without sandwiching the groove, the formation of the intermediate electrode is facilitated, and the yield of the infrared detection element can be improved.
  • the PN semiconductor layer processed into a linear shape by the groove on the first main surface of the substrate it becomes possible to densely arrange a large number of PN junctions with a simple configuration. In this case, the yield of the infrared detection element can be improved, and the sensitivity of the infrared detection element can be improved by increasing the number of PN junctions per unit area. As a result, according to the manufacturing method, a highly reliable infrared detection element can be obtained.
  • the reliability of the infrared detection element can be improved.
  • FIG. 2 is a cross-sectional view of the infrared detection element taken along line II-II in FIG.
  • FIG. 9 is a partial plan view showing an electrode layer formed in the step of FIG. 8.
  • FIG. 11 is a plan view showing grooves formed in the process of FIG. 10.
  • FIG. 14 is a plan view showing an opening formed in the step of FIG. 13.
  • the infrared detection element 1 is a quantum infrared detection element that outputs a potential change (voltage change) of a charge generated at a PN junction due to incidence of infrared rays. is there.
  • the infrared detection element 1 is formed on the substrate 2, the PN semiconductor layer 3 formed on the main surface A of the substrate 2, and the upper surface of the PN semiconductor layer 3 (surface opposite to the surface facing the substrate 2).
  • the substrate 2 has a first main surface and a second main surface opposite to the first main surface. In the following description, the first main surface is referred to as a main surface A.
  • FIG. 1 is a plan view showing a configuration of an embodiment of an infrared detection element according to the present invention.
  • FIG. 2 is a cross-sectional view of the infrared detecting element 1 taken along line II-II in FIG.
  • the substrate 2 is a semi-insulating substrate made of, for example, GaAs or InP.
  • a PN semiconductor layer 3 composed of a plurality of N-type conductive layers 7 and a plurality of P-type conductive layers 8 is provided on the main surface A of the substrate 2.
  • the PN semiconductor layer 3 is configured by arranging a plurality of N-type conductive layers 7 and a plurality of P-type conductive layers 8 alternately along the main surface A of the substrate 2. It is a lateral type semiconductor layer extending in a meandering manner.
  • the PN semiconductor layer 3 is formed so that its upper surface is flat, and its thickness is about 0.2 to 2 ⁇ m.
  • Each N-type conductive layer 7 is made of, for example, InAs, InSb, InAsSb, or the like, and is formed on the main surface A by epitaxial growth.
  • Each N-type conductive layer 7 is a light absorption layer having sensitivity to infrared rays, and the material thereof is selected according to the detection wavelength.
  • the impurity concentration of each N-type conductive layer 7 is 10 14 to 10 18 cm ⁇ 3 .
  • Each of the P-type conductive layers 8 is formed by performing thermal diffusion or ion implantation of Zn on the N-type conductive region (corresponding to the N-type conductive layer). Each P-type conductive layer 8 is formed so as to be all P-type in the thickness direction until reaching the main surface A of the substrate 2.
  • the plurality of N-type conductive layers 7 and the plurality of P-type conductive layers 8 are alternately arranged along the main surface A of the substrate 2. Between the N-type conductive layer 7 and the P-type conductive layer 8 adjacent to each other, the first PN junction portions 9 and the second PN junction portions 10 are alternately formed.
  • the first PN junction 9 and the second PN junction 10 are formed substantially perpendicular to the main surface A of the substrate 2.
  • the 1st PN junction part 9 the outer edge (edge on the opposite side to the edge which faces the board
  • the second PN junction portion 10 a part of the outer edge (the edge opposite to the edge facing the substrate 2) is covered with the intermediate electrode 4.
  • the intermediate electrode 4 is formed on the PN semiconductor layer 3 so as to straddle the second PN junction 10.
  • the intermediate electrode 4 includes a first ohmic metal 11, a second ohmic metal 12, and an electrode layer 13.
  • the first ohmic metal 11 is made of, for example, AuGe—Ni—Au.
  • the first ohmic metal 11 is formed in a block shape on the N-type conductive layer 7 and is in ohmic contact with the N-type conductive layer 7.
  • the first ohmic metal 11 is formed along the second PN junction 10.
  • the second ohmic metal 12 is made of, for example, AuZn—Au or AuBe—Au.
  • the second ohmic metal 12 is formed in a block shape on the P-type conductive layer 8 and is in ohmic contact with the P-type conductive layer 8.
  • the second ohmic metal 12 is formed along the second PN junction 10.
  • the first ohmic metal 11 and the second ohmic metal 12 are in contact with each other on the second PN junction 10.
  • the electrode layer 13 is made of, for example, Ni—Au, Cr—Au, Ti—Pt—Au.
  • the electrode layer 13 is composed of a first electrode layer 13A and a second electrode layer 13B.
  • the first electrode layer 13 ⁇ / b> A is formed so as to cover the first ohmic metal 11 and the second ohmic metal 12.
  • the first electrode layer 13 ⁇ / b> A electrically connects the first ohmic metal 11 and the second ohmic metal 12.
  • the first electrode layer 13 ⁇ / b> A short-circuits the second PN junction 10 in cooperation with the first ohmic metal 11 and the second ohmic metal 12.
  • the second electrode layer 13B is formed on the folded portion of the PN semiconductor layer 3 extending in a meandering manner.
  • the second electrode layer 13B is formed on the N-type conductive layer 7 in the PN semiconductor layer 3.
  • the second electrode layer 13 ⁇ / b> B is formed in a U shape along the PN semiconductor layer 3.
  • One end of the second electrode layer 13 ⁇ / b> B is connected to the first ohmic metal 11 and the second ohmic metal 12 across the second PN junction 10.
  • the other end of the second electrode layer 13B is connected to the first ohmic metal 11 formed in front of the first PN junction 9.
  • the terminal electrode 5 is made of the same material as the electrode layer 13 and is formed on one end E1 of the PN semiconductor layer 3. A part of the terminal electrode 5 protrudes linearly along the extending direction of the PN semiconductor layer 3 and is connected to the first electrode layer 13A.
  • the terminal electrode 6 is made of the same material as the electrode layer 13, and is formed on one end E ⁇ b> 2 of the PN semiconductor layer 3. A part of the terminal electrode 6 protrudes linearly along the extending direction of the PN semiconductor layer 3, and its tip is located in front of the first PN junction 9.
  • the terminal electrode 5 and the terminal electrode 6 are connected to a lead wire or the like, and function as a bonding pad for taking out a potential change caused by the electric charge generated in the first PN junction 9 by the incidence of infrared rays.
  • the terminal electrode 5 and the terminal electrode 6 are formed in a substantially rectangular shape so as to have a sufficient area for functioning as a bonding pad.
  • Each part of the PN semiconductor layer 3 extending in a meandering manner on the main surface A is partitioned by a groove 15 formed on the main surface A of the substrate 2.
  • This groove 15 is formed by selectively removing a part of the PN semiconductor layer 3 by mesa etching or trench etching to expose the main surface A of the substrate 2 (the main surface A is the same as the bottom surface of the groove 15). Become).
  • the groove 15 is formed so as to surround the PN semiconductor layer 3. Further, the groove 15 is formed so as to separate and partition adjacent portions on the substrate 2 in the PN semiconductor layer 3 extending in a meandering manner. Further, the groove 15 separates the PN semiconductor layer 3 from the outer frame portion W extending along the outer edge of the main surface A.
  • the outer frame portion W is composed of an N-type conductive layer 7 and a P-type conductive layer 8. In the present embodiment, all the parts of the PN semiconductor layer 3 are adjacent to each other except the part facing the outer frame portion W on the substrate 2.
  • a passivation layer 16 for protecting the PN semiconductor layer 3 and the intermediate electrode 4 is formed on the main surface A of the substrate 2 (FIG. 2).
  • the passivation layer 16 is made of, for example, SiN or Al 2 O 3 .
  • openings T1 and T2 for exposing the terminal electrodes 5 and 6 to the outside are formed in the passivation layer 16.
  • the passivation layer 16 covers the entire main surface A of the substrate 2 except for the openings T1 and T2.
  • FIGS. 3, 4, 6, 7, 8, 10, and 12 are schematic views for explaining the manufacturing method.
  • Other drawings, terminal electrodes 5, and openings T ⁇ b> 1 are illustrated. The shape is different.
  • a region (a) is a cross-sectional view for explaining a step of forming an N-type conductive layer
  • a region (b) is for explaining a step of forming an N-type conductive layer.
  • FIG. 4 a region (a) is a cross-sectional view for explaining a step of forming a P-type conductive layer
  • a region (b) is a plan view for explaining a step of forming a P-type conductive layer.
  • FIG. 5 is a plan view showing a P-type conductive layer formed in the step of FIG. In FIG.
  • the region (a) is a cross-sectional view for explaining the step of forming the first ohmic metal
  • the region (b) is a plane for explaining the step of forming the first ohmic metal.
  • FIG. 7 a region (a) is a cross-sectional view for explaining the step of forming the second ohmic metal
  • a region (b) is a plane for explaining the step of forming the second ohmic metal.
  • FIG. 8 a region (a) is a cross-sectional view for explaining the step of forming the electrode layer
  • a region (b) is a plan view for explaining the step of forming the electrode layer.
  • FIG. 9 is a partial plan view showing the electrode layer formed in the step of FIG. FIG.
  • FIG. 10 is a plan view for explaining a step of forming a groove.
  • FIG. 11 is a plan view showing grooves formed in the process of FIG.
  • a region (a) is a cross-sectional view for explaining a step of forming a passivation layer, and a plan view for explaining a step of forming the passivation layer.
  • the region (a) is a cross-sectional view for explaining the step of forming the opening
  • the region (b) is a plan view for explaining the step of forming the opening.
  • FIG. 14 is a plan view showing the opening formed in the step of FIG.
  • This conductive layer forming step includes an N-type conductive layer forming step and a P-type conductive layer forming step.
  • the N-type conductive layer 7 is formed on the main surface A of the semi-insulating substrate 2 by epitaxial growth. N-type conductive layer 7 is formed over the entire main surface A.
  • P-type conductive layers 8 are respectively formed at a plurality of locations of the N-type conductive layer 7 by thermal diffusion or ion implantation. At this time, each P-type conductive layer 8 is formed so as to be all P-type in the thickness direction until reaching the main surface A of the substrate 2. In addition, as shown in FIG. 5, each P-type conductive layer 8 is formed to extend in the width direction of the substrate 2. Further, each P-type conductive layer 8 is formed in a stripe shape so as to be alternately arranged with the N-type conductive layer 7 in the longitudinal direction of the substrate 2.
  • the intermediate electrode forming step includes a first ohmic metal forming step, a second ohmic metal forming step, and an electrode layer forming step.
  • first ohmic metal 11 is formed on each N-type conductive layer 7.
  • the first ohmic metal 11 extends along a portion planned as the second PN junction portion 10 among the PN junction portions formed between the N-type conductive layer 7 and the P-type conductive layer 8 adjacent to each other. It is formed.
  • block-shaped second ohmic metal 12 is formed on each P-type conductive layer 8.
  • the second ohmic metal 12 is formed along the PN junction so as to come into contact with the first ohmic metal 11.
  • the first electrode layer 13A and the second electrode layer 13B are formed.
  • the first electrode layer 13 ⁇ / b> A is formed so as to cover the first ohmic metal 11 and the second ohmic metal 12.
  • the second electrode layer 13B is formed in a region planned as a folded portion of the PN semiconductor layer 3 extending in a meandering manner.
  • the terminal electrode forming step is executed simultaneously with the electrode layer forming step.
  • terminal electrodes 5 and 6 are formed on the N-type conductive layer 7.
  • the terminal electrode 5 is formed in a region planned as the end E1 of the PN semiconductor layer 3. Further, the terminal electrode 5 is formed in a region planned as the end E ⁇ b> 2 of the PN semiconductor layer 3.
  • a groove forming step is performed.
  • the groove 15 is formed by selectively removing the N-type conductive layer 7 and the P-type conductive layer 8 until the main surface A of the substrate 2 is exposed by mesa etching or trench etching.
  • the PN semiconductor layer 3 is processed in a meandering manner by partitioning each part by the groove 15.
  • the PN semiconductor layer 3 is also partitioned from the outer frame portion W by the grooves 15.
  • a passivation layer forming step is performed.
  • the passivation layer 16 is formed on the main surface A side of the substrate 2.
  • an opening forming step is performed.
  • openings T1 and T2 for exposing the terminal electrodes 5 and 6 to the outside are formed in the passivation layer 16.
  • the infrared detection element 1 is obtained by executing the steps shown in FIGS. 3 to 14.
  • the execution order of the intermediate electrode forming process, the terminal electrode forming process, and the groove forming process is not limited to the order described above, and these processes are performed in other orders between the conductive layer forming process and the passivation layer forming process. May be executed.
  • the sensitivity is determined by the number of PN junctions per unit area. For this reason, when the intermediate electrode 4 is formed, it is not necessary to consider the aperture ratio (the area ratio of the effective sensitivity region to the infrared light receiving region), and the degree of design freedom is improved. Moreover, since the intermediate electrode 4 is formed on the upper surface of the PN semiconductor layer 3 without a step, it does not cross the groove 15. Therefore, formation of the intermediate electrode 4 becomes easy and there is no fear of disconnection.
  • the intermediate electrode 4 is formed with high accuracy, and as a result, the yield of the infrared detection element obtained through the above steps can be improved. Further, since the intermediate electrode 4 is formed before the passivation layer 16 is formed, there is no need to form a contact hole in the passivation layer 16 for connection to the PN junction. This contributes to simplification and speeding up of the manufacturing process. Furthermore, in the infrared detection element 1, by processing the PN semiconductor layer 3 in a meandering manner by the grooves 15, it becomes possible to densely arrange a large number of PN junctions with a simple configuration. Therefore, the infrared detection element 1 can improve the yield of the infrared detection element and increase the number of PN junctions per unit area. That is, according to the present embodiment, it is possible to improve the sensitivity of the infrared detection element, so that the reliability is dramatically improved.
  • the outer edge of the first PN junction 9 is exposed. Therefore, it is not necessary to adopt a back-illuminated structure in which infrared rays are incident from the back surface of the substrate, and a front-illuminated structure can be realized. In this case, flip-chip connection by through bumps and through electrodes that are necessary in the back-illuminated structure are unnecessary, which is advantageous in reducing the cost of the infrared detection element.
  • FIGS. 15 to 21 is a plan view showing an infrared detection element according to another embodiment. 16 to 21, only the PN semiconductor layers 33 to 83, the terminal electrodes 31 to 81, and the terminal electrodes 32 to 82 are shown as the infrared detecting elements 30 to 80 according to other embodiments. Since this configuration is the same as the configuration shown in FIGS. 1 and 2, it is not shown.
  • the PN semiconductor layer 3 on the substrate 2 is exposed. Even if the area (the area of the infrared light receiving region) is extremely narrow compared to the area of the intermediate electrode 23 (the area of the first electrode layer 24A and the second electrode layer 24B) and the area of the terminal electrodes 21, 22. Good.
  • the infrared detection element 20 Since the sensitivity of the infrared detection element 20 according to the present invention is determined by the number of PN junctions per unit area regardless of the aperture ratio, the infrared detection element 20 has the same sensitivity as the infrared detection element 1 described above. Obtainable. Therefore, according to the infrared detection element 20 according to the present invention, by reducing the area of the PN semiconductor layer 3 while exposing the first PN junction 9, the infrared detection element can be reduced in size while ensuring sufficient sensitivity. It becomes possible to plan. In addition, since the area of the intermediate electrode 23 that is difficult to miniaturize can be secured relatively large, the formation of the intermediate electrode 23 is further facilitated. As a result, it is possible to improve the yield of the infrared detection element.
  • the infrared detecting element according to the present invention is not limited to the meandering PN semiconductor layer, and any shape of the PN semiconductor layer can be adopted as long as it can be expressed on the substrate by one-stroke writing.
  • FIGS. 16 to 21 show examples of the shape of the PN semiconductor layer. 16 to 21, the PN semiconductor layer is represented as a line in which rectangular terminal electrodes are connected to both ends. Therefore, the first PN junction that forms part of the effective sensitivity region with respect to infrared rays and the second PN junction that forms part of the intermediate electrode installation region follow the line illustrated as the PN semiconductor layer. They are lined up alternately. Adjacent portions of the PN semiconductor layer are partitioned by grooves not shown. C shown in FIGS. 16 to 21 indicates the central portion of the main surface on one side of the substrate.
  • the infrared detection element 30 shown in FIG. 16 includes a PN semiconductor layer 33 extending in a spiral shape.
  • the terminal electrodes 31 and 32 of the infrared detection element 30 are formed on the substrate and outside the PN semiconductor layer 33.
  • the infrared detection element 40 shown in FIG. 17 includes a PN semiconductor layer 43 that extends in a spiral shape.
  • One terminal electrode 41 of the infrared detection element 40 is formed on the substrate and outside the PN semiconductor layer 43.
  • the other terminal electrode 42 is formed inside the PN semiconductor layer 43 and at the center C of the main surface of the substrate.
  • the infrared detection element 50 shown in FIG. 18 includes a PN semiconductor layer 53 extending in a rectangular spiral shape.
  • the terminal electrodes 51 and 52 of the infrared detection element 50 are formed on the substrate and outside the PN semiconductor layer 53.
  • the infrared detection element 60 shown in FIG. 19 includes a PN semiconductor layer 63 extending so as to draw a set of rectangular spirals. A set of spirals drawn by the PN semiconductor layer 63 is formed rotationally symmetric about the central portion C of the substrate main surface.
  • the terminal electrodes 61 and 62 of the infrared detection element 60 are formed on the outside of the PN semiconductor layer 63 at positions that are rotationally symmetric with respect to the center portion C of the substrate main surface.
  • the 20 includes a PN semiconductor layer 73 extending in a polygonal spiral shape.
  • the terminal electrodes 71 and 72 of the infrared detection element 70 are formed on the substrate and outside the PN semiconductor layer 73.
  • the infrared detection element 80 shown in FIG. 21 includes a PN semiconductor layer 83 extending in a polygonal spiral shape. The spiral drawn by the PN semiconductor layer 83 is formed so as to pass through the center C of the main surface of the substrate.
  • the terminal electrodes 81 and 82 of the infrared detecting element 80 are formed outside the PN semiconductor layer 83 and at positions that are rotationally symmetric with respect to the central portion C of the substrate main surface.
  • the intermediate electrode 4 includes the first ohmic metal 11 and the second ohmic metal 12 in order to obtain good ohmic contact with the N-type conductive layer 7 and the P-type conductive layer 8. It was. However, the N-type conductive layer 7 and the P-type conductive layer 8 may be directly connected without using an ohmic metal. In this case, the intermediate electrode 4 is made of, for example, Ni—Au.

Landscapes

  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Light Receiving Elements (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)

Abstract

Disclosed are a highly reliable infrared detection element and a method for manufacturing the element. The infrared detection element (1) is provided with a substrate (2), a PN semiconductor layer (3), an intermediate electrode (4), and terminal electrodes (5, 6). Each part of the PN semiconductor layer (3) is partitioned by means of grooves (15) such that pairs of adjacent first and second PN junction parts (9, 10) are alternately arranged and linearly extend along the main surface (A) of the substrate (2). The intermediate electrode (4) is provided on the PN semiconductor layer (3) side which is the reverse side having the substrate (2) thereon, in a state wherein the intermediate electrode is in contact with the second PN junction part (10), while having the first PN junction part (9) exposed. The terminal electrodes (5, 6) are the electrodes for outputting a potential change due to the charges generated by means of the first PN junction part (9) when infrared rays are inputted, and the terminal electrodes are provided on both the end portions (E1, E2) of the PN semiconductor layer (3) that linearly extends along the main surface (A) of the substrate (2).

Description

赤外線検出素子及びその製造方法Infrared detecting element and manufacturing method thereof
　本発明は、赤外線検出素子及びその製造方法に関するものである。 The present invention relates to an infrared detection element and a manufacturing method thereof.
　従来の赤外線検出素子として、例えば、以下の特許文献１及び２に記載された素子が知られている。特許文献１には、基板と、基板上に積層されたＮ型半導体層及びＰ型半導体層と、溝によって互いに分離された状態で互いに多段接続された複数の単一センサを備えた赤外線センサが記載されている。この赤外線センサは、各単一センサにおいて生じる電流の変化によって赤外線を検出する。 As conventional infrared detection elements, for example, elements described in Patent Documents 1 and 2 below are known. Patent Document 1 discloses an infrared sensor including a substrate, an N-type semiconductor layer and a P-type semiconductor layer stacked on the substrate, and a plurality of single sensors connected to each other in a state of being separated from each other by a groove. Are listed. This infrared sensor detects infrared rays by a change in current generated in each single sensor.
特開２００７－８１２２５号公報JP 2007-81225 A
特許３０２９４９７号公報Japanese Patent No. 3029497
　発明者らは、従来の赤外線検出素子について詳細に検討した結果、以下のような課題を発見した。 The inventors discovered the following problems as a result of examining the conventional infrared detection element in detail.
　すなわち、上記特許文献１及び２記載の赤外線センサでは、溝によって分離された複数の単一センサを多段に接続するに際し、溝をまたいで凹凸部に配線を形成する必要がある。そのため、配線形成が容易ではない。また、このような配線では段差切れの可能性もあるため、製品の歩留まりが低下してしまう。更に、配線の形成により赤外線受光領域の開口率が低くなると、それに伴ってセンサの感度が低下する。したがって、従来の赤外線センサでは、十分な信頼性が得られないという課題があった。 That is, in the infrared sensors described in Patent Documents 1 and 2, when a plurality of single sensors separated by a groove are connected in multiple stages, it is necessary to form a wiring on the uneven portion across the groove. Therefore, wiring formation is not easy. In addition, there is a possibility that such a wiring may be stepped, so that the yield of the product is lowered. Further, when the aperture ratio of the infrared light receiving region is lowered due to the formation of the wiring, the sensitivity of the sensor is lowered accordingly. Therefore, the conventional infrared sensor has a problem that sufficient reliability cannot be obtained.
　本発明は上述のような課題を解決するためになされたものであり、信頼性の高い赤外線検出素子及びその製造方法を提供することを目的としている。 The present invention has been made to solve the above-described problems, and an object thereof is to provide a highly reliable infrared detection element and a method for manufacturing the same.
　上記目的を達成するために、本発明に係る赤外線検出素子は、基板と、ＰＮ半導体層と、中間電極と、端子電極を備える。 In order to achieve the above object, an infrared detecting element according to the present invention includes a substrate, a PN semiconductor layer, an intermediate electrode, and a terminal electrode.
　基板は、第１の主面と第１の主面に対向する第２の主面を有する。ＰＮ半導体層は、基板の第1の主面上に設けられるとともに第1の主面に沿って交互に並ぶように配置された複数のＮ型導電層と複数のＰ型導電層により構成されている。また、ＰＮ半導体層には第1の主面によってその底面が規定された溝が設けられており、この溝により、互いに隣接する第１のＰＮ接合部と第２のＰＮ接合部の組が第1の主面に沿って線状に延在するよう加工されている。すなわち、基板の第1の主面上に設けられるＰＮ半導体層は、溝の形成位置を調節することにより任意形状に加工可能である。また、ＰＮ半導体層を構成するＮ型導電層とＰ型導電層の配列方向（積層方向）は、基板の第1の主面に対して平行となり、かつ、当該ＰＮ半導体層の延在方向に一致している。したがって、ＰＮ半導体層を構成するＮ型導電層とＰ型導電層の境界であるＰＮ接合部も、当該ＰＮ半導体層の延在方向に沿って並ぶこととなる。なお、本明細書では、当該ＰＮ半導体層の延在方向に沿って互いに隣接するＰＮ接合部のうち、一方を赤外線に対する有効感度領域の一部を構成する第1のＰＮ接合部、他方を中間電極設置領域の一部を構成する第２のＰＮ接合部と呼ぶ。 The substrate has a first main surface and a second main surface opposite to the first main surface. The PN semiconductor layer is formed of a plurality of N-type conductive layers and a plurality of P-type conductive layers provided on the first main surface of the substrate and arranged alternately along the first main surface. Yes. In addition, the PN semiconductor layer is provided with a groove whose bottom surface is defined by the first main surface. By this groove, a pair of the first PN junction and the second PN junction adjacent to each other is formed. It is processed so as to extend linearly along the main surface of 1. That is, the PN semiconductor layer provided on the first main surface of the substrate can be processed into an arbitrary shape by adjusting the groove formation position. The arrangement direction (stacking direction) of the N-type conductive layer and the P-type conductive layer constituting the PN semiconductor layer is parallel to the first main surface of the substrate and extends in the extending direction of the PN semiconductor layer. Match. Therefore, the PN junction portion that is the boundary between the N-type conductive layer and the P-type conductive layer constituting the PN semiconductor layer is also arranged along the extending direction of the PN semiconductor layer. In the present specification, among the PN junctions adjacent to each other along the extending direction of the PN semiconductor layer, one is a first PN junction that constitutes a part of an effective sensitivity region for infrared rays, and the other is an intermediate This is called a second PN junction that constitutes a part of the electrode installation region.
　さらに、中間電極は、第２のＰＮ接合部を短絡させる。この中間電極は、基板の第１の主面から第２の主面に向かう赤外線入射方向に沿って基板の第1の主面を見たとき、第１のＰＮ接合部を露出させる一方第２のＰＮ接合部に接触した状態で、第２のＰＮ接合部上に設けられている。また、端子電極は、赤外線入射方向に沿って入射する赤外線によって第１のＰＮ接合部で発生した電荷に起因した電位変化を出力する。この端子電極は、基板の第1の主面上に延在しているＰＮ半導体層の両端部に設けられている。 Furthermore, the intermediate electrode short-circuits the second PN junction. The intermediate electrode exposes the first PN junction when the first main surface of the substrate is viewed along the direction of incidence of infrared rays from the first main surface of the substrate toward the second main surface, while the second PN junction is exposed. The second PN junction is provided in contact with the PN junction. Further, the terminal electrode outputs a potential change caused by the electric charge generated at the first PN junction due to the infrared rays incident along the infrared incident direction. This terminal electrode is provided at both ends of the PN semiconductor layer extending on the first main surface of the substrate.
　本発明に係る赤外線検出素子では、赤外線の入射を電位変化として出力するので、その感度は単位面積当たりのＰＮ接合部の数によって決定される。このため、中間電極を形成するに際し、開口率（赤外線受光領域に対する有効感度領域の面積比）を考慮する必要がなく、設計自由度が向上する。しかも、中間電極が、ＰＮ半導体層の各部位を仕切っている溝を跨ぐことなく第２のＰＮ接合部すなわちＰＮ半導体層上（ＰＮ半導体層に対して基板と反対側）に形成される。これにより、中間電極の形成が容易となる（すなわち、中間電極が精度良く確実に形成される。その結果、赤外線検出素子の歩留まり向上を図ることが可能になる。また、溝によってＰＮ半導体層の各部位を仕切ることにより、当該ＰＮ半導体層自体の形状を線状に加工することにより、簡素な構成で多数のＰＮ接合部を、基板の第1主面上に密集せることが可能になる。したがって、上述のような構造を有する赤外線検出素子によれば、赤外線検出素子の歩留まり向上を可能にするとともに、単位面積当たりのＰＮ接合部の数を増加（赤外線検出素子の感度向上）させることが可能になる。その結果、得られた赤外線検出素子の信頼性は飛躍的に向上する。 In the infrared detection element according to the present invention, since the incidence of infrared rays is output as a potential change, the sensitivity is determined by the number of PN junctions per unit area. For this reason, when forming the intermediate electrode, it is not necessary to consider the aperture ratio (the area ratio of the effective sensitivity region to the infrared light receiving region), and the degree of freedom in design is improved. In addition, the intermediate electrode is formed on the second PN junction, that is, on the PN semiconductor layer (on the side opposite to the substrate with respect to the PN semiconductor layer) without straddling the grooves partitioning each part of the PN semiconductor layer. This facilitates the formation of the intermediate electrode (that is, the intermediate electrode is accurately and reliably formed. As a result, it is possible to improve the yield of the infrared detecting element. By partitioning each part and processing the shape of the PN semiconductor layer itself into a linear shape, a large number of PN junctions can be concentrated on the first main surface of the substrate with a simple configuration. Therefore, according to the infrared detection element having the above-described structure, it is possible to improve the yield of the infrared detection element and increase the number of PN junctions per unit area (improvement of sensitivity of the infrared detection element). As a result, the reliability of the obtained infrared detection element is greatly improved.
　本発明に係る赤外線検出素子において、ＰＮ半導体層は、基板の第１の主面に沿って蛇行状に延在するよう加工されるのが好ましい。このような形状にＰＮ半導体層が加工された場合、単位面積当たりのＰＮ接合部の数を更に増加させることができ、その結果、赤外線検出素子の感度向上が可能になる。 In the infrared detecting element according to the present invention, the PN semiconductor layer is preferably processed so as to extend in a meandering manner along the first main surface of the substrate. When the PN semiconductor layer is processed in such a shape, the number of PN junctions per unit area can be further increased, and as a result, the sensitivity of the infrared detection element can be improved.
　また、本発明に係る赤外線検出素子において、ＰＮ半導体層は、基板の第１の主面に沿って渦巻状に延在するよう加工されもよい。このような形状にＰＮ半導体層が加工された場合も、単位面積当たりのＰＮ接合部の数を更に増加させることができ、その結果、赤外線検出素子の感度向上が可能になる。 In the infrared detection element according to the present invention, the PN semiconductor layer may be processed so as to extend in a spiral shape along the first main surface of the substrate. Even when the PN semiconductor layer is processed in such a shape, the number of PN junctions per unit area can be further increased, and as a result, the sensitivity of the infrared detection element can be improved.
　本発明に係る赤外線検出素子の製造方法は、上述のような構造を有する赤外線検出素子を製造するための方法であって、導電層形成工程と、溝形成工程と、中間電極形成工程と、端子電極形成工程を備える。 A method for manufacturing an infrared detecting element according to the present invention is a method for manufacturing an infrared detecting element having the above-described structure, and includes a conductive layer forming step, a groove forming step, an intermediate electrode forming step, and a terminal. An electrode formation process is provided.
　本発明に係る製造方法では、まず、第１の主面と第１の主面に対向する第２の主面を有する基板が用意される。導電層形成工程では、基板の第１の主面に沿って交互に並ぶように配置された複数のＮ型導電層と複数のＰ型導電層で構成された導電層が、基板の第１の主面上に形成される。溝形成工程では、互いに隣接する第１のＰＮ接合部と第２のＰＮ接合部の組が第1の主面に沿って線状に延在するよう加工されたＰＮ半導体層が形成される。具体的には、このような形状のＰＮ半導体層は、第１の主面によりその底面が規定された溝を、第1の主面上に形成された導電層に形成することにより得られる。中間電極形成工程では、基板の第１の主面から第２の主面に向かう赤外線入射方向に沿って基板の第1の主面を見たとき、第１のＰＮ接合部を露出させる一方、第２のＰＮ接合部に接触した中間電極が、第２のＰＮ接合部上に形成される。なお、このように形成された中間電極は、第２のＰＮ接合部を短絡させるよう機能する。端子電極形成工程では、赤外線の入射により第１のＰＮ接合部で発生した電荷に起因した電位変化を出力するための端子電極が、ＰＮ半導体層の両端部に形成される。 In the manufacturing method according to the present invention, first, a substrate having a first main surface and a second main surface opposite to the first main surface is prepared. In the conductive layer forming step, a conductive layer composed of a plurality of N-type conductive layers and a plurality of P-type conductive layers arranged alternately along the first main surface of the substrate is formed into a first layer of the substrate. It is formed on the main surface. In the groove forming step, a PN semiconductor layer processed so that a pair of the first PN junction and the second PN junction adjacent to each other extends linearly along the first main surface is formed. Specifically, the PN semiconductor layer having such a shape can be obtained by forming a groove whose bottom surface is defined by the first main surface in a conductive layer formed on the first main surface. In the intermediate electrode forming step, when the first main surface of the substrate is viewed along the infrared incident direction from the first main surface of the substrate toward the second main surface, the first PN junction is exposed, An intermediate electrode in contact with the second PN junction is formed on the second PN junction. The intermediate electrode formed in this way functions to short-circuit the second PN junction. In the terminal electrode formation step, terminal electrodes for outputting a potential change caused by charges generated in the first PN junction due to the incidence of infrared rays are formed at both ends of the PN semiconductor layer.
　本発明に係る製造方法によれば、中間電極が、基板とともにＰＮ半導体層を挟むように、第２のＰＮ接合部すなわちＰＮ半導体層上に形成される。このように中間電極が溝を挟むことなくＰＮ半導体層上に形成されるので、中間電極の形成が容易となり、赤外線検出素子の歩留まり向上させることが可能になる。また、溝によって線状に加工されたＰＮ半導体層を基板の第1の主面上に形成することにより、簡素な構成で多数のＰＮ接合部を密集させることが可能になる。この場合、赤外線検出素子の歩留まり向上が可能になるとともに、単位面積当たりのＰＮ接合部の数を増加して赤外線検出素子の感度を向上させることが可能になる。その結果、当該製造方法によれば、信頼性の高い赤外線検出素子を得ることができる。 According to the manufacturing method of the present invention, the intermediate electrode is formed on the second PN junction, that is, the PN semiconductor layer so as to sandwich the PN semiconductor layer together with the substrate. Thus, since the intermediate electrode is formed on the PN semiconductor layer without sandwiching the groove, the formation of the intermediate electrode is facilitated, and the yield of the infrared detection element can be improved. Further, by forming the PN semiconductor layer processed into a linear shape by the groove on the first main surface of the substrate, it becomes possible to densely arrange a large number of PN junctions with a simple configuration. In this case, the yield of the infrared detection element can be improved, and the sensitivity of the infrared detection element can be improved by increasing the number of PN junctions per unit area. As a result, according to the manufacturing method, a highly reliable infrared detection element can be obtained.
　なお、この発明に係る各実施例は、以下の詳細な説明及び添付図面によりさらに十分に理解可能となる。これら実施例は単に例示のために示されるものであって、この発明を限定するものと考えるべきではない。 It should be noted that each embodiment according to the present invention can be more fully understood from the following detailed description and the accompanying drawings. These examples are given for illustration only and should not be construed as limiting the invention.
　また、この発明のさらなる応用範囲は、以下の詳細な説明から明らかになる。しかしながら、詳細な説明及び特定の事例はこの発明の好適な実施例を示すものではあるが、例示のためにのみ示されているものであって、この発明の範囲における様々な変形および改良はこの詳細な説明から当業者には自明であることは明らかである。
Further scope of applicability of the present invention will become apparent from the detailed description given below. However, the detailed description and specific examples, while indicating the preferred embodiment of the invention, are presented for purposes of illustration only and various modifications and improvements within the scope of the invention may It will be apparent to those skilled in the art from the detailed description.
　本発明によれば、赤外線検出素子の信頼性を向上させることが可能となる。 According to the present invention, the reliability of the infrared detection element can be improved.
は、本発明に係る赤外線検出素子の一実施形態の構成を示す平面図である。These are top views which show the structure of one Embodiment of the infrared detection element which concerns on this invention.
は、図１のII－II線に沿った赤外線検出素子の断面図である。FIG. 2 is a cross-sectional view of the infrared detection element taken along line II-II in FIG.
は、Ｎ型導電層を形成する工程を説明するための断面図、及び、Ｎ型導電層を形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming an N type conductive layer, and the top view for demonstrating the process of forming an N type conductive layer.
は、Ｐ型導電層を形成する工程を説明するための断面図、及び、Ｐ型導電層を形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming a P-type conductive layer, and the top view for demonstrating the process of forming a P-type conductive layer.
は、図４の工程で形成されたＰ型導電層を示す平面図である。These are top views which show the P-type conductive layer formed at the process of FIG.
は、第１のオーミックメタルを形成する工程を説明するための断面図、及び、第１のオーミックメタルを形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming 1st ohmic metal, and the top view for demonstrating the process of forming 1st ohmic metal.
は、第２のオーミックメタルを形成する工程を説明するための断面図、及び、第２のオーミックメタルを形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming 2nd ohmic metal, and the top view for demonstrating the process of forming 2nd ohmic metal.
は、電極層を形成する工程を説明するための断面図、及び、電極層を形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming an electrode layer, and the top view for demonstrating the process of forming an electrode layer.
は、図８の工程で形成された電極層を示す部分平面図である。FIG. 9 is a partial plan view showing an electrode layer formed in the step of FIG. 8.
は、溝を形成する工程を説明するための平面図である。These are top views for demonstrating the process of forming a groove | channel.
は、図１０の工程で形成された溝を示す平面図である。FIG. 11 is a plan view showing grooves formed in the process of FIG. 10.
は、パッシベーション層を形成する工程を説明するための断面図、及び、パッシベーション層を形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming a passivation layer, and a top view for demonstrating the process of forming a passivation layer.
は、開口部を形成する工程を説明するための断面図、及び、開口部を形成する工程を説明するための平面図である。These are sectional drawing for demonstrating the process of forming an opening part, and the top view for demonstrating the process of forming an opening part.
は、図１３の工程で形成された開口部を示す平面図である。FIG. 14 is a plan view showing an opening formed in the step of FIG. 13.
は、他の実施形態に係る赤外線検出素子を示す平面図である。These are top views which show the infrared detection element which concerns on other embodiment.
は、他の実施形態に係る赤外線検出素子を示す概略平面図である。These are the schematic plan views which show the infrared detection element which concerns on other embodiment.
は、他の実施形態に係る赤外線検出素子を示す概略平面図である。These are the schematic plan views which show the infrared detection element which concerns on other embodiment.
は、他の実施形態に係る赤外線検出素子を示す概略平面図である。These are the schematic plan views which show the infrared detection element which concerns on other embodiment.
は、他の実施形態に係る赤外線検出素子を示す概略平面図である。These are the schematic plan views which show the infrared detection element which concerns on other embodiment.
は、他の実施形態に係る赤外線検出素子を示す概略平面図である。These are the schematic plan views which show the infrared detection element which concerns on other embodiment.
は、他の実施形態に係る赤外線検出素子を示す概略平面図である。These are the schematic plan views which show the infrared detection element which concerns on other embodiment.
　以下、本発明に係る赤外線検出素子及びその製造方法の各実施形態を、図１～図２１を参照しながら詳細に説明する。なお、図面の説明において、同一部位、同一要素には同一符号を付して重複する説明を省略する。 Hereinafter, embodiments of the infrared detection element and the manufacturing method thereof according to the present invention will be described in detail with reference to FIGS. In the description of the drawings, the same portions and the same elements are denoted by the same reference numerals, and redundant description is omitted.
　図１及び図２に示されたように、本実施形態に係る赤外線検出素子１は、赤外線の入射によりＰＮ接合部に生じる電荷の電位変化（電圧変化）を出力する量子型の赤外線検出素子である。赤外線検出素子１は、基板２と、基板２の主面Ａに形成されたＰＮ半導体層３と、ＰＮ半導体層３の上面（基板２に対面している面とは反対側の面）に形成された中間電極４及び端子電極５、６と、を有している。なお、基板２は、第１の主面とこの第1の主面に対向する第２の主面を有しており、以下の説明では、第1の主面を主面Ａと呼ぶ。また、図１は、本発明に係る赤外線検出素子の一実施形態の構成を示す平面図である。図２は、図１のII－II線に沿った赤外線検出素子１の断面図を示す。 As shown in FIGS. 1 and 2, the infrared detection element 1 according to the present embodiment is a quantum infrared detection element that outputs a potential change (voltage change) of a charge generated at a PN junction due to incidence of infrared rays. is there. The infrared detection element 1 is formed on the substrate 2, the PN semiconductor layer 3 formed on the main surface A of the substrate 2, and the upper surface of the PN semiconductor layer 3 (surface opposite to the surface facing the substrate 2). Intermediate electrode 4 and terminal electrodes 5, 6. The substrate 2 has a first main surface and a second main surface opposite to the first main surface. In the following description, the first main surface is referred to as a main surface A. FIG. 1 is a plan view showing a configuration of an embodiment of an infrared detection element according to the present invention. FIG. 2 is a cross-sectional view of the infrared detecting element 1 taken along line II-II in FIG.
　基板２は、例えばＧａＡｓやＩｎＰからなる半絶縁性基板である。基板２の主面Ａ上には、複数のＮ型導電層７と複数のＰ型導電層８で構成されたＰＮ半導体層３が設けられている。ＰＮ半導体層３は、基板２の主面Ａに沿って複数のＮ型導電層７と複数のＰ型導電層８とが交互に並ぶように配置されることにより構成されており、主面Ａ上において蛇行状に延在しているラテラル型半導体層である。ＰＮ半導体層３は、その上面が平坦になるように形成されており、その厚さは０．２～２μｍ程度である。 The substrate 2 is a semi-insulating substrate made of, for example, GaAs or InP. A PN semiconductor layer 3 composed of a plurality of N-type conductive layers 7 and a plurality of P-type conductive layers 8 is provided on the main surface A of the substrate 2. The PN semiconductor layer 3 is configured by arranging a plurality of N-type conductive layers 7 and a plurality of P-type conductive layers 8 alternately along the main surface A of the substrate 2. It is a lateral type semiconductor layer extending in a meandering manner. The PN semiconductor layer 3 is formed so that its upper surface is flat, and its thickness is about 0.2 to 2 μm.
　Ｎ型導電層７それぞれは、例えばＩｎＡｓ、ＩｎＳｂ、ＩｎＡｓＳｂなどからなり、エピタキシャル成長により主面Ａ上に形成される。各Ｎ型導電層７は、赤外線に対して感度を有する光吸収層であり、その材料は検出波長に応じて選択される。各Ｎ型導電層７の不純物濃度は、１０１４～１０１８ｃｍ－３である。 Each N-type conductive layer 7 is made of, for example, InAs, InSb, InAsSb, or the like, and is formed on the main surface A by epitaxial growth. Each N-type conductive layer 7 is a light absorption layer having sensitivity to infrared rays, and the material thereof is selected according to the detection wavelength. The impurity concentration of each N-type conductive layer 7 is 10 14 to 10 18 cm −3 .
　Ｐ型導電層８それぞれは、Ｎ型導電領域（Ｎ型導電層に相当）に対してＺｎの熱拡散やイオン注入を行うことで形成される。各Ｐ型導電層８は、基板２の主面Ａに達するまで、その厚さ方向全てがＰ型となるように形成されている。 Each of the P-type conductive layers 8 is formed by performing thermal diffusion or ion implantation of Zn on the N-type conductive region (corresponding to the N-type conductive layer). Each P-type conductive layer 8 is formed so as to be all P-type in the thickness direction until reaching the main surface A of the substrate 2.
　複数のＮ型導電層７と複数のＰ型導電層８は、基板２の主面Ａに沿って交互に配置されている。互いに隣接するＮ型導電層７とＰ型導電層８との間には、第１のＰＮ接合部９と第２のＰＮ接合部１０とが交互に形成されている。第１のＰＮ接合部９及び第２のＰＮ接合部１０は、基板２の主面Ａに対して略垂直に形成されている。第１のＰＮ接合部９は、外側の縁（基板２に対面する縁とは反対側の縁）が全て露出している。一方、第２のＰＮ接合部１０は、外側の縁（基板２に対面する縁とは反対側の縁）の一部が中間電極４によって覆われている。 The plurality of N-type conductive layers 7 and the plurality of P-type conductive layers 8 are alternately arranged along the main surface A of the substrate 2. Between the N-type conductive layer 7 and the P-type conductive layer 8 adjacent to each other, the first PN junction portions 9 and the second PN junction portions 10 are alternately formed. The first PN junction 9 and the second PN junction 10 are formed substantially perpendicular to the main surface A of the substrate 2. As for the 1st PN junction part 9, the outer edge (edge on the opposite side to the edge which faces the board | substrate 2) is all exposed. On the other hand, in the second PN junction portion 10, a part of the outer edge (the edge opposite to the edge facing the substrate 2) is covered with the intermediate electrode 4.
　中間電極４は、第２のＰＮ接合部１０をまたぐように、ＰＮ半導体層３上に形成されている。中間電極４は、第１のオーミックメタル１１と、第２のオーミックメタル１２と、電極層１３と、から構成されている。 The intermediate electrode 4 is formed on the PN semiconductor layer 3 so as to straddle the second PN junction 10. The intermediate electrode 4 includes a first ohmic metal 11, a second ohmic metal 12, and an electrode layer 13.
　第１のオーミックメタル１１は、例えばＡｕＧｅ－Ｎｉ－Ａｕからなる。第１のオーミックメタル１１は、Ｎ型導電層７上においてブロック状に形成されており、Ｎ型導電層７に対してオーミックコンタクトが取られている。第１のオーミックメタル１１は、第２のＰＮ接合部１０に沿って形成されている。 The first ohmic metal 11 is made of, for example, AuGe—Ni—Au. The first ohmic metal 11 is formed in a block shape on the N-type conductive layer 7 and is in ohmic contact with the N-type conductive layer 7. The first ohmic metal 11 is formed along the second PN junction 10.
　第２のオーミックメタル１２は、例えばＡｕＺｎ－ＡｕやＡｕＢｅ－Ａｕからなる。第２のオーミックメタル１２は、Ｐ型導電層８上においてブロック状に形成されており、Ｐ型導電層８に対してオーミックコンタクトが取られている。第２のオーミックメタル１２は、第２のＰＮ接合部１０に沿って形成されている。第１のオーミックメタル１１と第２のオーミックメタル１２とは、第２のＰＮ接合部１０の上で互いに当接している。 The second ohmic metal 12 is made of, for example, AuZn—Au or AuBe—Au. The second ohmic metal 12 is formed in a block shape on the P-type conductive layer 8 and is in ohmic contact with the P-type conductive layer 8. The second ohmic metal 12 is formed along the second PN junction 10. The first ohmic metal 11 and the second ohmic metal 12 are in contact with each other on the second PN junction 10.
　電極層１３は、例えばＮｉ－Ａｕ、Ｃｒ－Ａｕ、Ｔｉ－Ｐｔ－Ａｕからなる。電極層１３は、第１の電極層１３Ａと、第２の電極層１３Ｂと、から構成されている。第１の電極層１３Ａは、第１のオーミックメタル１１及び第２のオーミックメタル１２を覆うように形成されている。第１の電極層１３Ａは、第１のオーミックメタル１１と第２のオーミックメタル１２とを電気的に接続させる。第１の電極層１３Ａは、第１のオーミックメタル１１と第２のオーミックメタル１２と協働で第２のＰＮ接合部１０を短絡させている。 The electrode layer 13 is made of, for example, Ni—Au, Cr—Au, Ti—Pt—Au. The electrode layer 13 is composed of a first electrode layer 13A and a second electrode layer 13B. The first electrode layer 13 </ b> A is formed so as to cover the first ohmic metal 11 and the second ohmic metal 12. The first electrode layer 13 </ b> A electrically connects the first ohmic metal 11 and the second ohmic metal 12. The first electrode layer 13 </ b> A short-circuits the second PN junction 10 in cooperation with the first ohmic metal 11 and the second ohmic metal 12.
　第２の電極層１３Ｂは、蛇行状に延在するＰＮ半導体層３の折り返し部分に形成されている。この第２の電極層１３Ｂは、ＰＮ半導体層３のうちＮ型導電層７の上に形成されている。また、第２の電極層１３Ｂは、ＰＮ半導体層３に沿ってＵ字状に形成されている。第２の電極層１３Ｂの一方の端は、第２のＰＮ接合部１０をまたいで第１のオーミックメタル１１及び第２のオーミックメタル１２と接続されている。第２の電極層１３Ｂの他方の端は、第１のＰＮ接合部９の手前に形成された第１のオーミックメタル１１と接続されている。 The second electrode layer 13B is formed on the folded portion of the PN semiconductor layer 3 extending in a meandering manner. The second electrode layer 13B is formed on the N-type conductive layer 7 in the PN semiconductor layer 3. The second electrode layer 13 </ b> B is formed in a U shape along the PN semiconductor layer 3. One end of the second electrode layer 13 </ b> B is connected to the first ohmic metal 11 and the second ohmic metal 12 across the second PN junction 10. The other end of the second electrode layer 13B is connected to the first ohmic metal 11 formed in front of the first PN junction 9.
　端子電極５は、電極層１３と同じ材料からなり、ＰＮ半導体層３の一方の端部Ｅ１上に形成されている。端子電極５の一部は、ＰＮ半導体層３の延在方向に沿って直線状に突出しており、第１の電極層１３Ａと接続している。同様に、端子電極６は、電極層１３と同じ材料からなり、ＰＮ半導体層３の一方の端部Ｅ２上に形成されている。端子電極６の一部は、ＰＮ半導体層３の延在方向に沿って直線状に突出しており、その先端は第１のＰＮ接合部９の手前に位置している。 The terminal electrode 5 is made of the same material as the electrode layer 13 and is formed on one end E1 of the PN semiconductor layer 3. A part of the terminal electrode 5 protrudes linearly along the extending direction of the PN semiconductor layer 3 and is connected to the first electrode layer 13A. Similarly, the terminal electrode 6 is made of the same material as the electrode layer 13, and is formed on one end E <b> 2 of the PN semiconductor layer 3. A part of the terminal electrode 6 protrudes linearly along the extending direction of the PN semiconductor layer 3, and its tip is located in front of the first PN junction 9.
　端子電極５及び端子電極６は、リード線などが接続されて、赤外線の入射により第１のＰＮ接合部９に発生した電荷に起因した電位変化を外部に取り出すためのボンディングパッドとして機能する。端子電極５及び端子電極６は、ボンディングパッドとして機能するための十分な面積を備えるように略矩形状に形成されている。 The terminal electrode 5 and the terminal electrode 6 are connected to a lead wire or the like, and function as a bonding pad for taking out a potential change caused by the electric charge generated in the first PN junction 9 by the incidence of infrared rays. The terminal electrode 5 and the terminal electrode 6 are formed in a substantially rectangular shape so as to have a sufficient area for functioning as a bonding pad.
　主面Ａ上において蛇行状に延在するＰＮ半導体層３は、基板２の主面Ａ上に形成された溝１５によって各部位が仕切られている。この溝１５は、メサエッチング又はトレンチエッチングによりＰＮ半導体層３の一部を選択的に除去して、基板２の主面Ａを露出させることで形成される（主面Ａが溝１５の底面となる）。溝１５は、ＰＮ半導体層３を囲むように形成されている。また、溝１５は、蛇行状に延在するＰＮ半導体層３のうち基板２上で隣り合う部位を分離して仕切るように形成されている。また、溝１５は、ＰＮ半導体層３を主面Ａの外縁に沿って延在する外枠部Ｗから分離させている。この外枠部Ｗは、Ｎ型導電層７とＰ型導電層８とから構成されている。なお、本実施形態においては、ＰＮ半導体層３のうち基板２上で外枠部Ｗと対向する部位以外は全て隣り合う部位となる。 Each part of the PN semiconductor layer 3 extending in a meandering manner on the main surface A is partitioned by a groove 15 formed on the main surface A of the substrate 2. This groove 15 is formed by selectively removing a part of the PN semiconductor layer 3 by mesa etching or trench etching to expose the main surface A of the substrate 2 (the main surface A is the same as the bottom surface of the groove 15). Become). The groove 15 is formed so as to surround the PN semiconductor layer 3. Further, the groove 15 is formed so as to separate and partition adjacent portions on the substrate 2 in the PN semiconductor layer 3 extending in a meandering manner. Further, the groove 15 separates the PN semiconductor layer 3 from the outer frame portion W extending along the outer edge of the main surface A. The outer frame portion W is composed of an N-type conductive layer 7 and a P-type conductive layer 8. In the present embodiment, all the parts of the PN semiconductor layer 3 are adjacent to each other except the part facing the outer frame portion W on the substrate 2.
　また、基板２の主面Ａ上には、ＰＮ半導体層３や中間電極４を保護するためのパッシベーション層１６が形成されている（図２）。このパッシベーション層１６は、例えばＳｉＮやＡｌ２Ｏ３からなる。また、パッシベーション層１６には、端子電極５、６を外部に露出させるための開口部Ｔ１、Ｔ２が形成されている。パッシベーション層１６は、開口部Ｔ１、Ｔ２を除き基板２の主面Ａ全体を被覆している。 A passivation layer 16 for protecting the PN semiconductor layer 3 and the intermediate electrode 4 is formed on the main surface A of the substrate 2 (FIG. 2). The passivation layer 16 is made of, for example, SiN or Al 2 O 3 . In addition, openings T1 and T2 for exposing the terminal electrodes 5 and 6 to the outside are formed in the passivation layer 16. The passivation layer 16 covers the entire main surface A of the substrate 2 except for the openings T1 and T2.
　次に、本実施形態に係る赤外線検出素子１の製造方法について図３～図１４を参照しながら説明する。なお、図３、図４、図６、図７、図８、図１０、図１２は、製造方法を説明するために模式化した図面であり、その他の図面と端子電極５及び開口部Ｔ１の形状が異なっている。 Next, a method for manufacturing the infrared detection element 1 according to the present embodiment will be described with reference to FIGS. 3, 4, 6, 7, 8, 10, and 12 are schematic views for explaining the manufacturing method. Other drawings, terminal electrodes 5, and openings T <b> 1 are illustrated. The shape is different.
　具体的に、図３において、領域（ａ）は、Ｎ型導電層を形成する工程を説明するための断面図であり、領域（ｂ）は、Ｎ型導電層を形成する工程を説明するための平面図である。図４において、領域（ａ）は、Ｐ型導電層を形成する工程を説明するための断面図であり、領域（ｂ）は、Ｐ型導電層を形成する工程を説明するための平面図である。図５は、図４の工程で形成されたＰ型導電層を示す平面図である。図６において、領域（ａ）は、第１のオーミックメタルを形成する工程を説明するための断面図であり、領域（ｂ）は、第１のオーミックメタルを形成する工程を説明するための平面図である。図７において、領域（ａ）は、第２のオーミックメタルを形成する工程を説明するための断面図であり、領域（ｂ）は、第２のオーミックメタルを形成する工程を説明するための平面図である。図８において、領域（ａ）は、電極層を形成する工程を説明するための断面図であり、領域（ｂ）は、電極層を形成する工程を説明するための平面図である。図９は、図８の工程で形成された電極層を示す部分平面図である。図１０は、溝を形成する工程を説明するための平面図である。図１１は、図１０の工程で形成された溝を示す平面図である。図１２において、領域（ａ）は、パッシベーション層を形成する工程を説明するための断面図であり、及び、パッシベーション層を形成する工程を説明するための平面図である。図１３において、領域（ａ）は、開口部を形成する工程を説明するための断面図であり、領域（ｂ）は、開口部を形成する工程を説明するための平面図である。図１４は、図１３の工程で形成された開口部を示す平面図である。 Specifically, in FIG. 3, a region (a) is a cross-sectional view for explaining a step of forming an N-type conductive layer, and a region (b) is for explaining a step of forming an N-type conductive layer. FIG. In FIG. 4, a region (a) is a cross-sectional view for explaining a step of forming a P-type conductive layer, and a region (b) is a plan view for explaining a step of forming a P-type conductive layer. is there. FIG. 5 is a plan view showing a P-type conductive layer formed in the step of FIG. In FIG. 6, the region (a) is a cross-sectional view for explaining the step of forming the first ohmic metal, and the region (b) is a plane for explaining the step of forming the first ohmic metal. FIG. In FIG. 7, a region (a) is a cross-sectional view for explaining the step of forming the second ohmic metal, and a region (b) is a plane for explaining the step of forming the second ohmic metal. FIG. In FIG. 8, a region (a) is a cross-sectional view for explaining the step of forming the electrode layer, and a region (b) is a plan view for explaining the step of forming the electrode layer. FIG. 9 is a partial plan view showing the electrode layer formed in the step of FIG. FIG. 10 is a plan view for explaining a step of forming a groove. FIG. 11 is a plan view showing grooves formed in the process of FIG. In FIG. 12, a region (a) is a cross-sectional view for explaining a step of forming a passivation layer, and a plan view for explaining a step of forming the passivation layer. In FIG. 13, the region (a) is a cross-sectional view for explaining the step of forming the opening, and the region (b) is a plan view for explaining the step of forming the opening. FIG. 14 is a plan view showing the opening formed in the step of FIG.
　まず、基板２が用意されると、導電層形成工程が実行される。この導電層形成工程は、Ｎ型導電層形成工程と、Ｐ型導電層形成工程と、を含む。 First, when the substrate 2 is prepared, a conductive layer forming step is executed. This conductive layer forming step includes an N-type conductive layer forming step and a P-type conductive layer forming step.
　まず、図３に示されたように、Ｎ型導電層形成工程では、エピタキシャル成長によって半絶縁性の基板２の主面Ａ上にＮ型導電層７が形成される。Ｎ型導電層７は、主面Ａ全体にわたって形成される。 First, as shown in FIG. 3, in the N-type conductive layer forming step, the N-type conductive layer 7 is formed on the main surface A of the semi-insulating substrate 2 by epitaxial growth. N-type conductive layer 7 is formed over the entire main surface A.
　続いて、図４に示されたように、Ｐ型導電層形成工程では、熱拡散やイオン注入によりＮ型導電層７の複数個所に対してそれぞれＰ型導電層８が形成される。このとき、各Ｐ型導電層８は、基板２の主面Ａに達するまで、その厚さ方向全てがＰ型となるように形成される。また、図５に示されたように、各Ｐ型導電層８は、基板２の幅方向に延在するように形成される。更に、各Ｐ型導電層８は、基板２の長手方向でＮ型導電層７と交互に並ぶようにストライプ状に形成される。 Subsequently, as shown in FIG. 4, in the P-type conductive layer forming step, P-type conductive layers 8 are respectively formed at a plurality of locations of the N-type conductive layer 7 by thermal diffusion or ion implantation. At this time, each P-type conductive layer 8 is formed so as to be all P-type in the thickness direction until reaching the main surface A of the substrate 2. In addition, as shown in FIG. 5, each P-type conductive layer 8 is formed to extend in the width direction of the substrate 2. Further, each P-type conductive layer 8 is formed in a stripe shape so as to be alternately arranged with the N-type conductive layer 7 in the longitudinal direction of the substrate 2.
　次に、中間電極形成工程が実行される。この中間電極形成工程は、第１のオーミックメタル形成工程と、第２のオーミックメタル形成工程と、電極層形成工程と、を含む。 Next, an intermediate electrode forming step is executed. The intermediate electrode forming step includes a first ohmic metal forming step, a second ohmic metal forming step, and an electrode layer forming step.
　まず、図６に示されたように、第１のオーミックメタル形成工程では、各Ｎ型導電層７上にブロック状の第１のオーミックメタル１１が形成される。第１のオーミックメタル１１は、互いに隣接するＮ型導電層７とＰ型導電層８との間に形成されるＰＮ接合部のうち、第２のＰＮ接合部１０として予定される部位に沿って形成される。 First, as shown in FIG. 6, in the first ohmic metal forming step, block-shaped first ohmic metal 11 is formed on each N-type conductive layer 7. The first ohmic metal 11 extends along a portion planned as the second PN junction portion 10 among the PN junction portions formed between the N-type conductive layer 7 and the P-type conductive layer 8 adjacent to each other. It is formed.
　次に、図７に示されたように、第２のオーミックメタル形成工程では、各Ｐ型導電層８上にブロック状の第２のオーミックメタル１２が形成される。第２のオーミックメタル１２は、第１のオーミックメタル１１と当接するようにＰＮ接合部に沿って形成される。 Next, as shown in FIG. 7, in the second ohmic metal forming step, block-shaped second ohmic metal 12 is formed on each P-type conductive layer 8. The second ohmic metal 12 is formed along the PN junction so as to come into contact with the first ohmic metal 11.
　続いて、図８及び図９に示されたように、電極層形成工程では、第１の電極層１３Ａと、第２の電極層１３Ｂと、が形成される。第１の電極層１３Ａは、第１のオーミックメタル１１及び第２のオーミックメタル１２を覆うように形成される。第２の電極層１３Ｂは、蛇行状に延在するＰＮ半導体層３の折り返し部として予定される領域に形成される。ここで、本実施形態においては、この電極層形成工程と同時に、端子電極形成工程が実行される。端子電極形成工程では、Ｎ型導電層７上に端子電極５、６が形成される。端子電極５は、ＰＮ半導体層３の端部Ｅ１として予定される領域に形成される。また、端子電極５は、ＰＮ半導体層３の端部Ｅ２として予定される領域に形成される。 Subsequently, as shown in FIGS. 8 and 9, in the electrode layer forming step, the first electrode layer 13A and the second electrode layer 13B are formed. The first electrode layer 13 </ b> A is formed so as to cover the first ohmic metal 11 and the second ohmic metal 12. The second electrode layer 13B is formed in a region planned as a folded portion of the PN semiconductor layer 3 extending in a meandering manner. Here, in this embodiment, the terminal electrode forming step is executed simultaneously with the electrode layer forming step. In the terminal electrode formation step, terminal electrodes 5 and 6 are formed on the N-type conductive layer 7. The terminal electrode 5 is formed in a region planned as the end E1 of the PN semiconductor layer 3. Further, the terminal electrode 5 is formed in a region planned as the end E <b> 2 of the PN semiconductor layer 3.
　その後、図１０及び図１１に示されたように、溝形成工程が実行される。この工程では、メサエッチング又はトレンチエッチングにより基板２の主面Ａが露出するまで、Ｎ型導電層７及びＰ型導電層８を選択的に除去することで溝１５が形成される。ＰＮ半導体層３は、この溝１５によって各部位が仕切られることにより蛇行状に加工される。また、ＰＮ半導体層３は、溝１５によって外枠部Ｗとも仕切られる。 Thereafter, as shown in FIGS. 10 and 11, a groove forming step is performed. In this step, the groove 15 is formed by selectively removing the N-type conductive layer 7 and the P-type conductive layer 8 until the main surface A of the substrate 2 is exposed by mesa etching or trench etching. The PN semiconductor layer 3 is processed in a meandering manner by partitioning each part by the groove 15. The PN semiconductor layer 3 is also partitioned from the outer frame portion W by the grooves 15.
　続いて、図１２に示されたように、パッシベーション層形成工程が実行される。この工程では、基板２の主面Ａ側にパッシベーション層１６が形成される。その後、図１３及び図１４に示されたように、開口部形成工程が実行される。この工程では、端子電極５、６を外部に露出するための開口部Ｔ１、Ｔ２がパッシベーション層１６に形成される。 Subsequently, as shown in FIG. 12, a passivation layer forming step is performed. In this step, the passivation layer 16 is formed on the main surface A side of the substrate 2. Thereafter, as shown in FIGS. 13 and 14, an opening forming step is performed. In this step, openings T1 and T2 for exposing the terminal electrodes 5 and 6 to the outside are formed in the passivation layer 16.
　以上のように図３～図１４に示された工程が実行されることで、本実施形態に係る赤外線検出素子１が得られる。なお、中間電極形成工程、端子電極形成工程、及び溝形成工程の実行順序は、上述した順番に限られず、これら各工程は、導電層形成工程とパッシベーション層形成工程との間において他の順番で実行されてもよい。 As described above, the infrared detection element 1 according to the present embodiment is obtained by executing the steps shown in FIGS. 3 to 14. The execution order of the intermediate electrode forming process, the terminal electrode forming process, and the groove forming process is not limited to the order described above, and these processes are performed in other orders between the conductive layer forming process and the passivation layer forming process. May be executed.
　次に、上述した赤外線検出素子１の作用効果について説明する。 Next, the function and effect of the infrared detection element 1 described above will be described.
　この赤外線検出素子１では、赤外線の入射を電位変化として出力するので、その感度は単位面積当たりのＰＮ接合部の数によって決定される。このため、中間電極４の形成に際し、開口率（赤外線受光領域に対する有効感度領域の面積比）を考慮する必要がなく、設計自由度が向上する。しかも、中間電極４は、段差のないＰＮ半導体層３の上面に形成されるので、溝１５をまたぐこともない。そのため、中間電極４の形成が容易となり、また段切れのおそれもない。このように、本実施形態によれば、中間電極４が精度良く形成され、その結果、上記工程を経て得られる赤外線検出素子の歩留まり向上が図られる。また、中間電極４の形成は、パッシベーション層１６の形成前に行われるので、ＰＮ接合部と接続するためのコンタクトホールをパッシベーション層１６に形成する必要がない。このことは、製造工程の簡素化及び迅速化に寄与する。更に、当該赤外線検出素子１では、溝１５によってＰＮ半導体層３を蛇行状に加工することにより、簡素な構成で多数のＰＮ接合部を密集させることが可能になる。したがって、当該赤外線検出素子１では、赤外線検出素子の歩留まり向上が図れるとともに、単位面積当たりのＰＮ接合部の数を増加させることが可能になる。すなわち、本実施形態によれば、赤外線検出素子の感度を向上させることが可能になるので、信頼性が飛躍的に向上する。 In this infrared detecting element 1, since the incidence of infrared rays is output as a potential change, the sensitivity is determined by the number of PN junctions per unit area. For this reason, when the intermediate electrode 4 is formed, it is not necessary to consider the aperture ratio (the area ratio of the effective sensitivity region to the infrared light receiving region), and the degree of design freedom is improved. Moreover, since the intermediate electrode 4 is formed on the upper surface of the PN semiconductor layer 3 without a step, it does not cross the groove 15. Therefore, formation of the intermediate electrode 4 becomes easy and there is no fear of disconnection. As described above, according to the present embodiment, the intermediate electrode 4 is formed with high accuracy, and as a result, the yield of the infrared detection element obtained through the above steps can be improved. Further, since the intermediate electrode 4 is formed before the passivation layer 16 is formed, there is no need to form a contact hole in the passivation layer 16 for connection to the PN junction. This contributes to simplification and speeding up of the manufacturing process. Furthermore, in the infrared detection element 1, by processing the PN semiconductor layer 3 in a meandering manner by the grooves 15, it becomes possible to densely arrange a large number of PN junctions with a simple configuration. Therefore, the infrared detection element 1 can improve the yield of the infrared detection element and increase the number of PN junctions per unit area. That is, according to the present embodiment, it is possible to improve the sensitivity of the infrared detection element, so that the reliability is dramatically improved.
　また、当該赤外線検出素子１によれば、第１のＰＮ接合部９の外側の縁が露出している。そのため、赤外線を基板の裏面から入射させる裏面入射型の構造を採用する必要はなく、表面入射型の構造が実現できる。この場合、裏面入射型の構造において必要なバンプによるフリップチップ接続や貫通電極などが不要となるので、赤外線検出素子の低コスト化に有利である。 Further, according to the infrared detection element 1, the outer edge of the first PN junction 9 is exposed. Therefore, it is not necessary to adopt a back-illuminated structure in which infrared rays are incident from the back surface of the substrate, and a front-illuminated structure can be realized. In this case, flip-chip connection by through bumps and through electrodes that are necessary in the back-illuminated structure are unnecessary, which is advantageous in reducing the cost of the infrared detection element.
　本発明は、上述の実施形態に限定されるものではなく、種々の変形が可能である。例えば、図１５～図２１のそれぞれには、他の実施形態に係る赤外線検出素子を示す平面図が示されている。なお、図１６～図２１には、他の実施形態に係る赤外線検出素子３０～８０として、ＰＮ半導体層３３～８３、端子電極３１～８１、端子電極３２～８２のみ示されているが、他の構成は図１及び図２に示された構成と同様であるため、図示されていない。 The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, each of FIGS. 15 to 21 is a plan view showing an infrared detection element according to another embodiment. 16 to 21, only the PN semiconductor layers 33 to 83, the terminal electrodes 31 to 81, and the terminal electrodes 32 to 82 are shown as the infrared detecting elements 30 to 80 according to other embodiments. Since this configuration is the same as the configuration shown in FIGS. 1 and 2, it is not shown.
　図１５に示されたように、第１のＰＮ接合部９の一方側（基板２に対面する側とは反対に位置する側）が露出していれば、基板２上のＰＮ半導体層３の面積（赤外線受光領域の面積）が中間電極２３の面積（第１の電極層２４Ａ及び第２の電極層２４Ｂの面積）及び端子電極２１、２２の面積と比べて極端に狭く形成されていてもよい。 As shown in FIG. 15, if one side of the first PN junction 9 (the side opposite to the side facing the substrate 2) is exposed, the PN semiconductor layer 3 on the substrate 2 is exposed. Even if the area (the area of the infrared light receiving region) is extremely narrow compared to the area of the intermediate electrode 23 (the area of the first electrode layer 24A and the second electrode layer 24B) and the area of the terminal electrodes 21, 22. Good.
　本発明に係る赤外線検出素子２０の感度は、開口率に関わらず単位面積当たりのＰＮ接合部の数によって決定されるので、この赤外線検出素子２０においても上述した赤外線検出素子１と同様の感度を得ることができる。したがって、本発明に係る赤外線検出素子２０によれば、第１のＰＮ接合部９を露出させつつＰＮ半導体層３の面積を狭めることにより、十分な感度を確保しながら赤外線検出素子の小型化を図ることが可能になる。しかも、微細化の困難な中間電極２３の面積を比較的大きく確保できるため、中間電極２３の形成が更に容易となる。その結果、赤外線検出素子の歩留まり向上を図ることが可能になる。 Since the sensitivity of the infrared detection element 20 according to the present invention is determined by the number of PN junctions per unit area regardless of the aperture ratio, the infrared detection element 20 has the same sensitivity as the infrared detection element 1 described above. Obtainable. Therefore, according to the infrared detection element 20 according to the present invention, by reducing the area of the PN semiconductor layer 3 while exposing the first PN junction 9, the infrared detection element can be reduced in size while ensuring sufficient sensitivity. It becomes possible to plan. In addition, since the area of the intermediate electrode 23 that is difficult to miniaturize can be secured relatively large, the formation of the intermediate electrode 23 is further facilitated. As a result, it is possible to improve the yield of the infrared detection element.
　また、本発明に係る赤外線検出素子は、蛇行状のＰＮ半導体層に限られず、いわゆる一筆書きで基板上に表せるものであればどのような形状のＰＮ半導体層であっても採用可能である。例えば、図１６～図２１は、ＰＮ半導体層の形状の例を示す。なお、図１６～図２１において、ＰＮ半導体層は、両端に矩形状の端子電極が接続された線として表されている。したがって、赤外線に対する有効感度領域の一部を構成する第１のＰＮ接合部と、中間電極設置領域の一部を構成する第２のＰＮ接合部は、ＰＮ半導体層として図示された線に沿って交互に並んでいる。また、ＰＮ半導体層の隣り合う部位は、図示しない溝によって仕切られている。図１６～図２１に示されたＣは、基板の一方の側の主面における中心部を示している。 Further, the infrared detecting element according to the present invention is not limited to the meandering PN semiconductor layer, and any shape of the PN semiconductor layer can be adopted as long as it can be expressed on the substrate by one-stroke writing. For example, FIGS. 16 to 21 show examples of the shape of the PN semiconductor layer. 16 to 21, the PN semiconductor layer is represented as a line in which rectangular terminal electrodes are connected to both ends. Therefore, the first PN junction that forms part of the effective sensitivity region with respect to infrared rays and the second PN junction that forms part of the intermediate electrode installation region follow the line illustrated as the PN semiconductor layer. They are lined up alternately. Adjacent portions of the PN semiconductor layer are partitioned by grooves not shown. C shown in FIGS. 16 to 21 indicates the central portion of the main surface on one side of the substrate.
　図１６に示された赤外線検出素子３０は、渦巻状に延在するＰＮ半導体層３３を備える。この赤外線検出素子３０の端子電極３１、３２は、基板上であってＰＮ半導体層３３の外側に形成されている。図１７に示された赤外線検出素子４０は、渦巻状に延在するＰＮ半導体層４３を備える。この赤外線検出素子４０の一方の端子電極４１は、基板上であってＰＮ半導体層４３の外側に形成されている。また、他方の端子電極４２は、ＰＮ半導体層４３の内側であって基板主面の中心部Ｃに形成されている。 The infrared detection element 30 shown in FIG. 16 includes a PN semiconductor layer 33 extending in a spiral shape. The terminal electrodes 31 and 32 of the infrared detection element 30 are formed on the substrate and outside the PN semiconductor layer 33. The infrared detection element 40 shown in FIG. 17 includes a PN semiconductor layer 43 that extends in a spiral shape. One terminal electrode 41 of the infrared detection element 40 is formed on the substrate and outside the PN semiconductor layer 43. The other terminal electrode 42 is formed inside the PN semiconductor layer 43 and at the center C of the main surface of the substrate.
　図１８に示された赤外線検出素子５０は、矩形の渦巻状に延在するＰＮ半導体層５３を備える。この赤外線検出素子５０の端子電極５１、５２は、基板上であってＰＮ半導体層５３の外側に形成されている。図１９に示された赤外線検出素子６０は、一組の矩形の渦巻を描くように延在するＰＮ半導体層６３を備える。ＰＮ半導体層６３が描く一組の渦巻は、基板主面の中心部Ｃを中心として回転対称に形成されている。この赤外線検出素子６０の端子電極６１、６２は、ＰＮ半導体層６３の外側で基板主面の中心部Ｃを中心として回転対称となる位置に形成されている。 The infrared detection element 50 shown in FIG. 18 includes a PN semiconductor layer 53 extending in a rectangular spiral shape. The terminal electrodes 51 and 52 of the infrared detection element 50 are formed on the substrate and outside the PN semiconductor layer 53. The infrared detection element 60 shown in FIG. 19 includes a PN semiconductor layer 63 extending so as to draw a set of rectangular spirals. A set of spirals drawn by the PN semiconductor layer 63 is formed rotationally symmetric about the central portion C of the substrate main surface. The terminal electrodes 61 and 62 of the infrared detection element 60 are formed on the outside of the PN semiconductor layer 63 at positions that are rotationally symmetric with respect to the center portion C of the substrate main surface.
　図２０に示された赤外線検出素子７０は、多角形の渦巻状に延在するＰＮ半導体層７３を備える。この赤外線検出素子７０の端子電極７１、７２は、基板上であってＰＮ半導体層７３の外側に形成されている。図２１に示された赤外線検出素子８０は、多角形の渦巻状に延在するＰＮ半導体層８３を備える。このＰＮ半導体層８３が描く渦巻は、基板主面の中心部Ｃを通るように形成されている。この赤外線検出素子８０の端子電極８１、８２は、ＰＮ半導体層８３の外側であって基板主面の中心部Ｃを中心として回転対称となる位置に形成されている。 20 includes a PN semiconductor layer 73 extending in a polygonal spiral shape. The terminal electrodes 71 and 72 of the infrared detection element 70 are formed on the substrate and outside the PN semiconductor layer 73. The infrared detection element 80 shown in FIG. 21 includes a PN semiconductor layer 83 extending in a polygonal spiral shape. The spiral drawn by the PN semiconductor layer 83 is formed so as to pass through the center C of the main surface of the substrate. The terminal electrodes 81 and 82 of the infrared detecting element 80 are formed outside the PN semiconductor layer 83 and at positions that are rotationally symmetric with respect to the central portion C of the substrate main surface.
　図１６～図２１に示されたように、ＰＮ半導体層の形状として渦巻状の形状を採用すると、多数のＰＮ接合部を密集させて、単位面積当たりのＰＮ接合部の数を飛躍的に増加させることが可能になる。その結果、得られる赤外線検出素子の感度を向上させることが可能になる。 As shown in FIG. 16 to FIG. 21, when the spiral shape is adopted as the shape of the PN semiconductor layer, a large number of PN junctions are concentrated, and the number of PN junctions per unit area is dramatically increased. It becomes possible to make it. As a result, the sensitivity of the obtained infrared detecting element can be improved.
　また、上述の実施形態では、Ｎ型導電層７及びＰ型導電層８と良好なオーミックコンタクトを取るために、中間電極４が第１のオーミックメタル１１と第２のオーミックメタル１２とを有していた。しかしながら、オーミックメタルを介さずにＮ型導電層７及びＰ型導電層８が直接接続される態様であってもよい。この場合の中間電極４は、例えばＮｉ－Ａｕから構成される。 In the above-described embodiment, the intermediate electrode 4 includes the first ohmic metal 11 and the second ohmic metal 12 in order to obtain good ohmic contact with the N-type conductive layer 7 and the P-type conductive layer 8. It was. However, the N-type conductive layer 7 and the P-type conductive layer 8 may be directly connected without using an ohmic metal. In this case, the intermediate electrode 4 is made of, for example, Ni—Au.
　以上の本発明の説明から、本発明を様々に変形しうることは明らかである。そのような変形は、本発明の思想および範囲から逸脱するものとは認めることはできず、すべての当業者にとって自明である改良は、以下の請求の範囲に含まれるものである。 From the above description of the present invention, it is apparent that the present invention can be variously modified. Such modifications cannot be construed as departing from the spirit and scope of the invention, and modifications obvious to one skilled in the art are intended to be included within the scope of the following claims.
　１、２０、３０、４０、５０、６０、７０、８０…赤外線検出素子、２…基板、３…ＰＮ半導体層、４…中間電極、５、６、２１、２２…端子電極、７…Ｎ型導電層、８…Ｐ型導電層、９…第１のＰＮ接合部、１０…第２のＰＮ接合部、１５…溝、Ａ…主面、Ｅ１、Ｅ２…ＰＮ半導体層の端部 DESCRIPTION OF SYMBOLS 1, 20, 30, 40, 50, 60, 70, 80 ... Infrared detector, 2 ... Substrate, 3 ... PN semiconductor layer, 4 ... Intermediate electrode, 5, 6, 21, 22 ... Terminal electrode, 7 ... N type Conductive layer, 8 ... P-type conductive layer, 9 ... first PN junction, 10 ... second PN junction, 15 ... groove, A ... main surface, E1, E2 ... end of PN semiconductor layer

Claims (4)

  1. 第１の主面と前記第１の主面に対向する第２の主面を有する基板と、
    　前記基板の第1の主面上に設けられるとともに前記第1の主面に沿って交互に並ぶように配置された複数のＮ型導電層と複数のＰ型導電層により構成されたＰＮ半導体層であって、当該ＰＮ半導体層に設けられるとともに前記第1の主面によってその底面が規定された溝により、互いに隣接する第１のＰＮ接合部と第２のＰＮ接合部の組が前記第1の主面に沿って線状に延在するよう加工されたＰＮ半導体層と、
    　前記第２のＰＮ接合部を短絡させる中間電極であって、前記基板の第１の主面から第２の主面に向かう赤外線入射方向に沿って前記基板の第1の主面を見たとき、前記第１のＰＮ接合部を露出させる一方前記第２のＰＮ接合部に接触した状態で、前記第２のＰＮ接合部上に設けられた中間電極と、そして、
    　前記赤外線入射方向に沿って入射する赤外線によって前記第１のＰＮ接合部で発生した電荷に起因した電位変化を出力する端子電極であって、前記ＰＮ半導体層の両端部に設けられた端子電極と、を備えた赤外線検出素子。     A substrate having a first main surface and a second main surface opposite to the first main surface;
    A PN semiconductor layer comprising a plurality of N-type conductive layers and a plurality of P-type conductive layers provided on the first main surface of the substrate and arranged alternately along the first main surface The first PN junction portion and the second PN junction portion adjacent to each other are formed in the PN semiconductor layer by a groove whose bottom surface is defined by the first main surface. A PN semiconductor layer processed to extend linearly along the main surface of
    An intermediate electrode for short-circuiting the second PN junction, when the first main surface of the substrate is viewed along an infrared incident direction from the first main surface of the substrate toward the second main surface An intermediate electrode provided on the second PN junction, in contact with the second PN junction while exposing the first PN junction; and
    A terminal electrode for outputting a potential change caused by charges generated in the first PN junction by infrared rays incident along the infrared incident direction, the terminal electrodes provided at both ends of the PN semiconductor layer; , An infrared detection element.
  2. 請求項１記載の赤外線検出素子において、
    　前記ＰＮ半導体層は、前記基板の第１の主面に沿って蛇行状に延在する。     The infrared detection element according to claim 1,
    The PN semiconductor layer extends in a meandering manner along the first main surface of the substrate.
  3. 請求項１記載の赤外線検出素子において、
    　前記ＰＮ半導体層は、前記基板の第１の主面に沿って渦巻状に延在する。     The infrared detection element according to claim 1,
    The PN semiconductor layer extends in a spiral shape along the first main surface of the substrate.
  4. 請求項１～３のいずれか一項記載の赤外線検出素子の製造方法であって、
    　第１の主面と前記第１の主面に対向する第２の主面を有する基板を用意し、
    　前記基板の第１の主面に沿って交互に並ぶように配置された複数のＮ型導電層と複数のＰ型導電層で構成された導電層を、前記基板の第１の主面上に形成する導電層形成工程と、
    　互いに隣接する第１のＰＮ接合部と第２のＰＮ接合部の組が前記第1の主面に沿って線状に延在するよう加工されたＰＮ半導体層を形成するために、前記第１の主面によりその底面が規定された溝を、前記第1の主面上に形成された導電層に形成する溝形成工程と、
    　前記第２のＰＮ接合部を短絡させる中間電極であって、前記基板の第１の主面から第２の主面に向かう赤外線入射方向に沿って前記基板の第1の主面を見たとき、前記第１のＰＮ接合部を露出させる一方、前記第２のＰＮ接合部に接触した中間電極を、前記第２のＰＮ接合部上に形成する中間電極形成工程と、そして、
    　前記赤外線入射方向に沿って入射した赤外線により前記第１のＰＮ接合部で発生した電荷に起因した電位変化を出力するための端子電極を、前記ＰＮ半導体層の両端部に形成する端子電極形成工程と、を備えた製造方法。     A method for manufacturing an infrared detection element according to any one of claims 1 to 3,
    Preparing a substrate having a first main surface and a second main surface opposite to the first main surface;
    A conductive layer made up of a plurality of N-type conductive layers and a plurality of P-type conductive layers arranged alternately along the first main surface of the substrate is disposed on the first main surface of the substrate. A conductive layer forming step to be formed;
    In order to form a PN semiconductor layer processed so that a pair of first PN junction and second PN junction adjacent to each other extends linearly along the first main surface, Forming a groove whose bottom surface is defined by the main surface of the conductive layer formed on the first main surface;
    An intermediate electrode for short-circuiting the second PN junction, when the first main surface of the substrate is viewed along an infrared incident direction from the first main surface of the substrate toward the second main surface Forming an intermediate electrode on the second PN junction while exposing the first PN junction, while forming an intermediate electrode in contact with the second PN junction; and
    A terminal electrode forming step of forming terminal electrodes at both ends of the PN semiconductor layer for outputting a potential change caused by charges generated at the first PN junction by infrared rays incident along the infrared incident direction. And a manufacturing method comprising:
PCT/JP2010/059518 2009-06-16 2010-06-04 Infrared detection element and method for manufacturing same WO2010147006A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009143312A JP2011003588A (en) 2009-06-16 2009-06-16 Infrared detection element, and method for manufacturing same
JP2009-143312 2009-06-16

Publications (1)

Publication Number Publication Date
WO2010147006A1 true WO2010147006A1 (en) 2010-12-23

Family

ID=43356327

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2010/059518 WO2010147006A1 (en) 2009-06-16 2010-06-04 Infrared detection element and method for manufacturing same

Country Status (2)

Country Link
JP (1) JP2011003588A (en)
WO (1) WO2010147006A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2942609A1 (en) * 2014-05-07 2015-11-11 ams AG Bolometer and method for measurement of electromagnetic radiation

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108881533B (en) * 2018-06-06 2020-09-11 北京小米移动软件有限公司 Terminal device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50134774A (en) * 1974-04-15 1975-10-25
JPS63226075A (en) * 1986-10-08 1988-09-20 Nippon Denso Co Ltd Semiconductor device and manufacture thereof
JPH05175537A (en) * 1991-12-20 1993-07-13 Rohm Co Ltd Photo diode array and manufacture thereof
JP2002148111A (en) * 2000-11-15 2002-05-22 Mitsubishi Electric Corp Thermal type infrared detector
JP2007081225A (en) * 2005-09-15 2007-03-29 Asahi Kasei Electronics Co Ltd Infrared sensor, and manufacturing method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008066584A (en) * 2006-09-08 2008-03-21 Asahi Kasei Electronics Co Ltd Photosensor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50134774A (en) * 1974-04-15 1975-10-25
JPS63226075A (en) * 1986-10-08 1988-09-20 Nippon Denso Co Ltd Semiconductor device and manufacture thereof
JPH05175537A (en) * 1991-12-20 1993-07-13 Rohm Co Ltd Photo diode array and manufacture thereof
JP2002148111A (en) * 2000-11-15 2002-05-22 Mitsubishi Electric Corp Thermal type infrared detector
JP2007081225A (en) * 2005-09-15 2007-03-29 Asahi Kasei Electronics Co Ltd Infrared sensor, and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2942609A1 (en) * 2014-05-07 2015-11-11 ams AG Bolometer and method for measurement of electromagnetic radiation
US10234332B2 (en) 2014-05-07 2019-03-19 Ams Ag Bolometer and method for measurement of electromagnetic radiation

Also Published As

Publication number Publication date
JP2011003588A (en) 2011-01-06

Similar Documents

Publication Publication Date Title
US7041978B2 (en) Photovoltaic infrared radiation detector with independent three-dimensional conducting grid
JP5983076B2 (en) Photodiode array
JP6436424B2 (en) Solar cell and method for manufacturing solar cell
EP3540788B1 (en) Light receiving device and method of manufacturing light receiving device
JP2007081225A (en) Infrared sensor, and manufacturing method thereof
KR100670828B1 (en) Photo-detector for image signal of infrared laser radar and method of manufacturing the same
US8274127B2 (en) Photodiode array for image pickup device
US20130183788A1 (en) Multicolor Detectors And Applications Thereof
TW475273B (en) Light-receiving element array and light-receiving element array chip
CN113167637A (en) Optical detection device
WO2010147006A1 (en) Infrared detection element and method for manufacturing same
JP5085122B2 (en) Semiconductor light detection element and radiation detection apparatus
WO2021131758A1 (en) Semiconductor photodetector
KR20190085786A (en) Compound semiconductor solar cell module
JP4335104B2 (en) Photodiode array and spectrometer
JP7109718B2 (en) Compound semiconductor photodiode array
JP5139923B2 (en) Semiconductor photo detector
JP5474662B2 (en) Semiconductor photo detector
JP6849900B2 (en) Detection element and detector
US20230369365A1 (en) Light receiving element array and manufacturing method therefor
US11674850B1 (en) Continuous full-resolution two-color infrared detector
US11411040B2 (en) Methods for fabricating mechanically stacked multicolor focal plane arrays and detection devices
WO2022270301A1 (en) Avalanche photodiode array
US20240234463A9 (en) Active pixel sensor and method for fabricating an active pixel sensor
US11398572B2 (en) Semiconductor wafer manufacturing method, method of manufacturing semiconductor energy beam detecting element, and semiconductor wafer

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10789381

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 10789381

Country of ref document: EP

Kind code of ref document: A1