WO2010125792A1 - Light emitting diode and method for producing the same, and light emitting diode lamp - Google Patents

Light emitting diode and method for producing the same, and light emitting diode lamp Download PDF

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Publication number
WO2010125792A1
WO2010125792A1 PCT/JP2010/002983 JP2010002983W WO2010125792A1 WO 2010125792 A1 WO2010125792 A1 WO 2010125792A1 JP 2010002983 W JP2010002983 W JP 2010002983W WO 2010125792 A1 WO2010125792 A1 WO 2010125792A1
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light emitting
emitting diode
light
layer
transparent substrate
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PCT/JP2010/002983
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French (fr)
Japanese (ja)
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竹内良一
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昭和電工株式会社
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds

Definitions

  • the present invention relates to a light emitting diode, a manufacturing method thereof, and a light emitting diode lamp.
  • gallium indium composition formula (Al X Ga 1-X ) Y In 1- Y P; 0 ⁇ X ⁇ 1,0 ⁇ compound semiconductor LED having a light emitting layer composed of Y ⁇ 1) is known.
  • a light-emitting portion having a light-emitting layer made of (Al X Ga 1-X ) Y In 1-YP (0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1) is generally formed from the light-emitting layer. It is formed on a substrate material such as gallium arsenide (GaAs) that is optically opaque to emitted light and that is not mechanically strong.
  • GaAs gallium arsenide
  • LED lamp products in which a plurality of LED chips are put into the same package for high output and multicolor use are widespread.
  • these substrates have a problem that the improvement in light absorption is insufficient.
  • a product in which a plurality of LED chips are mounted in the same package light emission is lost by the substrate of adjacent chips, and the efficiency of extracting light out of the package is reduced. was there.
  • the substrate of the light emitting diode chip absorbs light emitted from the adjacent chip, and the entire package is reduced in luminous efficiency or taken out from the package. There was a problem that light emission became non-uniform.
  • the present invention has been made in view of the above circumstances, and is a high-intensity light-emitting diode capable of reducing loss of light emission from an LED chip in a package and improving light extraction efficiency from the package, and its It is an object to provide a manufacturing method and a light emitting diode lamp.
  • the present invention relates to the following.
  • a compound semiconductor layer including at least a light emitting part having a light emitting layer, a connection layer, and a transparent substrate, wherein the compound semiconductor layer and the transparent substrate are bonded via the connection layer,
  • a first reflective surface is provided between the bottom surface of the compound semiconductor layer and the top surface of the connection layer, and a second reflective surface is provided between the bottom surface of the connection layer and the top surface of the transparent substrate.
  • a light-emitting diode which is provided.
  • the first reflecting surface has a reflectance of 90% or more in the wavelength band of light emitted from the light emitting unit, and the second and third reflecting surfaces have a reflectance of 90% or more in the wavelength band of external light.
  • the first electrode is provided on the upper surface side of the compound semiconductor layer, the second electrode is provided on the bottom surface side of the transparent substrate, and the space between the bottom surface of the transparent substrate and the second electrode. 4.
  • the transparent substrate is a semiconductor.
  • the transparent substrate is GaP or SiC.
  • the transparent conductive film is provided between the compound semiconductor layer and the connection layer, and the compound semiconductor layer and the transparent conductive film are in ohmic contact, The light emitting diode according to any one of the above.
  • the transparent conductive film is provided between the transparent substrate and the second electrode, and the transparent conductive film and the transparent substrate are in ohmic contact. The light emitting diode according to any one of the above.
  • a light emitting diode comprising: a step of forming a second metal film; a step of bonding the first and second metal films to form a connection layer; and a step of removing the semiconductor substrate. Manufacturing method.
  • the growth surface of the compound semiconductor layer is flattened to form a flat surface, and a transparent conductive film is formed on the flat surface.
  • the first and second metal films are made of a metal containing at least one of silver, gold, copper, and aluminum, and a connection layer is formed by joining the first and second metal films.
  • a light-emitting diode lamp having two or more light-emitting diodes mounted thereon, wherein at least one or more light-emitting diodes according to any one of items 1 to 14 are mounted.
  • a compound semiconductor layer and a transparent substrate with little light absorption are joined via a connection layer, and the first reflective surface is between the bottom surface of the compound semiconductor layer and the top surface of the connection layer. It has a provided configuration. Since the light emitted from the light emitting unit can be reflected by the first reflecting surface, loss of light emitted from the LED chip in the package can be reduced.
  • the second reflecting surfaces provided on the top and bottom surfaces of the transparent substrate can reflect external light such as light emitted from adjacent LED chips in the package, so that light is absorbed in the transparent substrate. Can be reduced. Therefore, the light extraction efficiency from the package can be improved. Furthermore, the configuration in which the third reflecting surface is provided on the bottom surface of the transparent substrate can further improve the light extraction efficiency from the package.
  • the light-emitting diode of the present invention it is possible to provide a high-intensity light-emitting diode capable of reducing the loss of light emission from the LED chip in the package and improving the light extraction efficiency from the package.
  • a compound semiconductor layer including a light emitting portion having a light emitting layer is formed on a semiconductor substrate, a first metal film is formed on a growth surface of the compound semiconductor layer, After the second metal film is formed on the other surface, the first and second metal films are joined to form a connection layer.
  • the light emitting diode can be reliably and easily manufactured.
  • the third metal film can be formed simultaneously with the formation of the second metal film, the light-emitting diode with high light extraction efficiency can be easily manufactured.
  • the light-emitting diode lamp in which two or more light-emitting diodes are mounted has a configuration in which at least one light-emitting diode is mounted. Since the second and third reflecting surfaces provided in the light emitting diode reflect light emitted from the LED chips adjacent in the package, loss of light emitted from the LED chip in the package can be reduced. Therefore, it is possible to provide a light emitting diode lamp capable of improving the light extraction efficiency from the package.
  • FIG. 1B is a view showing a light emitting diode according to an embodiment of the present invention, and is a cross-sectional view taken along the line A-A ′ shown in FIG. 1A.
  • FIG. It is a cross-sectional schematic diagram of the epiwafer used for the light emitting diode which is one Embodiment of this invention.
  • FIG. 4B is a diagram for explaining the light-emitting diode lamp according to the embodiment of the present invention, and is a cross-sectional view taken along line C-C ′ shown in FIG. 4A.
  • a light emitting diode (LED) 1 includes a compound semiconductor layer 2, a connection layer 3, and a transparent substrate 4, and the compound semiconductor layer 2 and the transparent substrate 4 include It is schematically configured by being joined via a connection layer 3.
  • the first electrode 5 is provided on the upper surface side of the compound semiconductor layer 2, and the second electrode 6 is provided on the bottom surface side of the transparent substrate 4.
  • the compound semiconductor layer 2 is not particularly limited as long as it includes the pn junction type light emitting portion 7.
  • the compound semiconductor layer 2 includes a p-type GaP layer 8 doped with Mg and having a carrier concentration of 1 ⁇ 10 18 to 8 ⁇ 10 18 cm ⁇ 3 and a layer thickness of 1 to 15 ⁇ m.
  • a light emitting unit 7 is laminated on the top.
  • the p-type GaP layer 8 can be omitted or replaced with another transparent layer.
  • the light emitting unit 7 is a stacked body of compound semiconductors in which, for example, a lower cladding layer 9, a light emitting layer 10, and an upper cladding layer 11 are sequentially stacked.
  • a compound semiconductor including a light emitting layer 10 made of (Al X Ga 1-X ) Y In 1-YP (0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1) which is a red light source is used.
  • a compound semiconductor including the light emitting layer 10 made of Al x Ga (1-x) As (0 ⁇ X ⁇ 1) which is a light source for red and infrared light emission can be used.
  • the light emitting layer 10 is also composed of undoped, n-type or p-type conductivity type (Al X Ga 1-X ) Y In 1-YP (0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1). be able to.
  • the light emitting layer 10 may have a double hetero structure, a single quantum well (abbreviation: SQW) structure, or a multi quantum well (abbreviation: MQW) structure, but is monochromatic. In order to obtain excellent light emission, an MQW structure is preferable.
  • a barrier layer and a well layer having a quantum well (English abbreviation: QW) structure are formed (Al X Ga 1-X ) Y In 1-YP (0 ⁇ X ⁇ 1,0)
  • QW quantum well
  • the light emitting unit 7 is a lower portion disposed opposite to the upper side and the upper side of the light emitting layer 10 in order to “confine” the light emitting layer 10, a carrier (carrier) that causes radiative recombination, and light emission in the light emitting layer 10.
  • a so-called double hetero (English abbreviation: DH) structure including the clad layer 9 and the upper clad layer 11 is preferable for obtaining high-intensity light emission.
  • the lower cladding layer 9 and the upper cladding layer 11 have a forbidden bandwidth larger than (Al X Ga 1-X ) Y In 1-YP (0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1) constituting the light emitting layer 10. It is preferable to construct from a wide semiconductor material.
  • an intermediate layer for gently changing the band discontinuity between both layers may be provided between the light emitting layer 10 and the lower cladding layer 9 and the upper cladding layer 11.
  • the intermediate layer is preferably made of a semiconductor material having a band gap between the light emitting layer 10 and the lower and upper clad layers 9 and 11.
  • a contact layer for lowering the contact resistance of the ohmic electrode a current diffusion layer for planarly diffusing the element driving current throughout the light emitting portion, and conversely, the element driving current.
  • a known layer structure such as a current blocking layer or a current confinement layer for limiting the region through which the current flows may be provided.
  • the light emitting unit 7 may have either the p-type or n-type polarity on the upper surface side (and the bottom surface side).
  • the p-type GaP layer 8 is, for example, a semiconductor layer doped with Mg and having a carrier concentration of 1 ⁇ 10 18 to 8 ⁇ 10 18 cm ⁇ 3 and a layer thickness of 1 to 15 ⁇ m.
  • the p-type GaP layer 8 is arranged on the connection layer 3 side in the compound semiconductor layer 2, and the bottom surface of the p-type GaP layer 8 is a connection surface with the upper surface of the connection layer 3.
  • the bottom surface of the p-type GaP layer 8 is preferably a mirror-polished smooth surface. Specifically, the surface roughness is preferably in the range of 0.1 to 10 nm, for example.
  • connection layer 3 is disposed between the compound semiconductor layer 2 and the transparent substrate 4, and on the first metal film 3A provided on the compound semiconductor layer 2 side and the transparent substrate 4 side.
  • the provided second metal film 3B is joined to the second metal film 3B.
  • the connection layer 3 has a function of bonding the compound semiconductor layer 2 and the transparent substrate 4 together.
  • the connection layer 3 has a reflective structure with a high reflectivity for increasing the brightness, and has a function of reflecting light incident from the compound semiconductor layer 2 side and the transparent substrate 4 side.
  • the material of the connection layer 3 is preferably a material having a low electrical resistance, and is preferably a material that can be connected at a low temperature in consideration of the stress of the light emitting portion.
  • the first metal film 3A reflects light (hereinafter referred to as internal light) emitted mainly from the light emitting portion 7 (light emitting layer 10) toward the transparent substrate 4 for the purpose of increasing the luminance of the light emitting diode 1. It is provided to efficiently take it out.
  • the material of the first metal film 3A is not particularly limited, but a material having a reflectance of 90% or more in the wavelength band of internal light can be used. Among these, it is particularly preferable to use silver, aluminum, or an alloy thereof having a reflectance of 90% in the entire visible light region.
  • examples of the material having a reflectance of 90% or more in a part of the wavelength band of the visible light region include gold and copper.
  • gold has a high reflectance at a wavelength longer than about 550 nm, and the reflectance exceeds 90% at about 590 nm.
  • Copper has a high reflectance at a wavelength longer than about 600 nm, and the reflectance exceeds 90% at about 610 nm.
  • the material of the first metal film 3 ⁇ / b> A can be appropriately selected according to the wavelength band of light emitted from the light emitting unit 7.
  • the second metal film 3B is used for the purpose of increasing the brightness of the package and is adjacent to the light-emitting diode 1 in the package.
  • external light light emitted from the light emitting diode or the like
  • the transparent substrate 4 it is provided to reflect the external light and efficiently extract it to the outside of the transparent substrate 4.
  • the material of the second metal film 3B is not particularly limited, but a material having a reflectance of 90% or more in the wavelength band of external light can be used. Among these, it is particularly preferable to use silver, aluminum, or an alloy thereof having a reflectance of 90% in the entire visible light region.
  • examples of the material having a reflectance of 90% or more in a part of the wavelength band of the visible light region include gold and copper.
  • gold has a high reflectance at a wavelength longer than about 550 nm, and the reflectance exceeds 90% at about 590 nm.
  • Copper has a high reflectance at a wavelength longer than about 600 nm, and the reflectance exceeds 90% at about 610 nm.
  • the material of the second metal film 3B can be appropriately selected according to the wavelength band of the external light.
  • the materials of the first and second metal films 3A and 3B may be different from each other, but are preferably the same.
  • the connection layer 3 is formed by connecting the first metal film 3A and the second metal film 3B to a room temperature metal bonding method (J. Vac. Sci. Technol. A-16 (4), Jul / Aug 1998-P2125 Metal-bonding-during-sputter-film-deposition-T.Shimatsu-et-al.).
  • connection layer 3 is formed by bonding the first metal film 3A and the second metal film 3B with a eutectic metal such as AuSn or AuGe.
  • a eutectic metal such as AuSn or AuGe.
  • it can be a structure joined by a known joining technique such as joining at high temperature and high pressure.
  • titanium and titanium are prevented so that no diffusion or reaction occurs between the first and second metal films 3A and 3B, the compound semiconductor layer 2 and the transparent substrate 4. It is preferable to insert a known high melting point barrier metal layer (not shown) such as chromium, tungsten or the like.
  • the transparent substrate 4 is joined to the p-type GaP layer 8 side of the compound semiconductor layer 2 via the connection layer 3 as shown in FIG. 1B.
  • the transparent substrate 4 has a sufficient strength to mechanically support the light emitting unit 7 and has a wide forbidden band width through which light emitted from the light emitting unit 7 can be transmitted.
  • it is made of a material.
  • III-V group compound semiconductor crystal such as gallium phosphide (GaP), aluminum gallium arsenide (AlGaAs), and gallium nitride (GaN), zinc sulfide (ZnS), and selenide.
  • a II-VI compound semiconductor crystal such as zinc (ZnSe), a IV group semiconductor crystal such as hexagonal or cubic silicon carbide (SiC), a glass substrate, a sapphire substrate, or the like can be used.
  • SiC and GaP having characteristics of transparency, workability, mechanical strength, and low cost are the most suitable semiconductor materials.
  • SiC is excellent in heat conduction and mechanical strength.
  • GaP has an advantage that it is a semiconductor material that can be easily processed, although the wavelength that can be transmitted is longer than that of green.
  • glass, sapphire substrates, and the like can be used, but are limited to low current applications because they are insulative and have better thermal conductivity than semiconductor materials.
  • the thickness of the transparent substrate 4 is desirably thin, it can be appropriately optimized according to the strength of the material so that cracking and warping during handling do not occur. Specifically, when using GaP which is the most suitable material for the transparent substrate 4, if it is thinner than 100 ⁇ m, it is not preferable because it tends to break. On the other hand, if it is thicker than 350 ⁇ m, it becomes difficult to cut, which is not preferable because it leads to an increase in cost. On the other hand, when SiC is used as the transparent substrate 4, 50 to 150 ⁇ m is a good range for the same reason.
  • the first electrode 5 is a low-resistance ohmic contact electrode provided on the upper surface side of the compound semiconductor layer 2.
  • the second electrode 6 is a low-resistance ohmic contact electrode provided on the bottom side of the substrate 3.
  • the polarity of the first electrode 5 is n-type and the polarity of the second electrode 6 is p-type will be described.
  • the polarity of the first electrode 5 is p-type and the second electrode 6 is The polarity may be n-type.
  • the first electrode 5 can be formed using, for example, AuGe, AuSi, or the like. Further, as the surface material of the first electrode 5, gold is generally used in order to cope with mounting by wire bonding. Note that it is preferable to devise the shape and arrangement of the first electrode 5 with respect to the light emitting unit 7 in order to uniformly diffuse the current to the light emitting unit 7. There is no restriction
  • the second electrode 6 (third metal film) is not particularly limited, but a material having a reflectance of 90% or more in the wavelength band of external light can be used. Among these, it is particularly preferable to use silver, aluminum, or an alloy thereof having a reflectance of 90% in the entire visible light region. On the other hand, examples of the material having a reflectance of 90% or more in a part of the wavelength band of the visible light region include gold and copper. Here, gold has a high reflectance at a wavelength longer than about 550 nm, and the reflectance exceeds 90% at about 590 nm. Copper has a high reflectance at a wavelength longer than about 600 nm, and the reflectance exceeds 90% at about 610 nm. Thus, the material of the second electrode 6 can be appropriately selected according to the wavelength band of the external light.
  • the second electrode 6 may have a single layer structure or a laminated structure composed of a plurality of metal films composed of the above metals.
  • the laminated structure include a three-layer structure composed of silver, tungsten (W), and a gold metal film from the transparent substrate 4 side.
  • silver having high reflectance can be disposed on the third reflecting surface 6a.
  • tungsten for the intermediate layer, mutual diffusion between silver and gold can be prevented, and chemically stable gold can be disposed on the surface side.
  • a transparent conductive film 12 having a small light absorption is provided at the interface between the semiconductor layer and the metal layer.
  • the transparent conductive film 12 prevents diffusion / reaction between the metal constituting the connection layer 3 and the second electrode 6 and the semiconductor substrate constituting the transparent substrate 4 when the transparent substrate 4 is a semiconductor substrate. be able to. Thereby, the fall of the reflectance of the 1st reflective surface 3a mentioned later, the 2nd reflective surface 3b, and the 3rd reflective surface 6a can be suppressed.
  • the transparent conductive film 12 for example, indium tin oxide (ITO), indium zinc oxide (IZO), or the like is preferably used.
  • the transparent conductive film 12 is in direct ohmic contact at the interface between the metal constituting the connection layer 3 and the second electrode 6 and the semiconductor substrate constituting the transparent substrate 4. It is preferable. Specifically, a transparent conductive film 12A is provided between the p-type GaP layer 8 constituting the compound semiconductor layer 2 and the first metal film 3A constituting the connection layer 3, and the compound semiconductor layer 2 and the transparent layer 12 are transparent. The conductive film 12A is in ohmic contact. Further, a transparent conductive film 12B is provided between the second metal film 3B constituting the connection layer 3 and the transparent substrate 4, and the transparent conductive film 12B and the transparent substrate 4 are in ohmic contact. Further, a transparent conductive film 12C is provided between the transparent substrate 4 and the second electrode 6, and the transparent conductive film 12C and the transparent substrate 4 are in ohmic contact.
  • the light-emitting diode 1 of the present embodiment has a reflective surface that reflects internal light for higher brightness, and when the light-emitting diode 1 is used in a package such as a light-emitting diode lamp, the brightness of the package is increased. And a reflective surface for reflecting external light. That is, between the bottom surface of the p-type GaP layer 8 constituting the compound semiconductor layer 2 and the top surface of the first metal film 3A constituting the connection layer 3, the first reflecting surface 3a for reflecting internal light. Is provided. Further, a second reflecting surface 3 b for reflecting external light is provided between the bottom surface of the second metal film 3 ⁇ / b> B constituting the connection layer 3 and the top surface of the transparent substrate 4. Further, a third reflecting surface 6 a for reflecting external light is provided between the bottom surface of the transparent substrate 4 and the second electrode 6.
  • the first is an interface between the p-type GaP layer 8 (or the transparent conductive film 12A when the transparent conductive film 12A is provided) and the first metal film 3A.
  • the upper surface of the metal film 3A is a first reflecting surface 3a.
  • the bottom surface of the second metal film 3B which is the interface between the second metal film 3B and the transparent substrate 4 (the transparent conductive film 12B when the transparent conductive film 12B is provided), is the second reflective surface 3b. It is said that.
  • the upper surface of the second electrode 6 that is an interface between the transparent substrate 4 (the transparent conductive film 12C when the transparent conductive film 12C is provided) and the second electrode 6 is defined as the third reflective surface 6a. ing.
  • the first reflective surface 3a is made of a material having a reflectance of 90% or more in the wavelength band of internal light because the material of the first metal film 3A is 90% or more in the wavelength band of internal light.
  • the second reflecting surface 3b is made of a material having a reflectance of 90% or more in the wavelength band of external light because the material of the second metal film 3B is 90% or more in the wavelength band of external light.
  • the third electrode 6 is made of a material having a reflectivity of 90% or more in the external light wavelength band
  • the third reflective surface 6a is in the external light wavelength band. The reflectance is 90% or more.
  • the light-emitting diode 1 of the present embodiment since the first reflecting surface 3a is provided, the light is emitted mainly from the light-emitting portion 7 (light-emitting layer 10) to the transparent substrate 4 side.
  • the internal light can be reflected and taken out efficiently. Thereby, high brightness of the light emitting diode 1 can be achieved.
  • the second reflecting surface 3b and the third reflecting surface 6a are provided on the upper surface and the bottom surface of the transparent substrate 4, respectively. For this reason, when external light other than the internal light emitted mainly from the light emitting unit 7 is incident on the inside of the transparent substrate 4, the external light is transmitted by the second reflective surface 3b and the third reflective surface 6a. It can be taken out of the transparent substrate 4 efficiently. Thereby, when the light-emitting diode 1 of the present embodiment is used in a package such as a light-emitting diode lamp, the brightness of the package can be increased.
  • connection layer 13 is provided on the bottom surface side of the second electrode 6 in order to connect (die bond) the light emitting diode 1 and the p-type terminal 24.
  • a known metal material can be used. Specifically, for example, an Ag paste can be used.
  • the connection layer 13 can be made of a material having a low electrical resistance and capable of being connected at a low temperature, that is, a metal having a low melting point.
  • a metal having a low melting point As the low melting point metal, In, Sn metal and a known solder material can be applied, but it is preferable to use an Au-based eutectic metal material which is chemically stable and has a low melting point.
  • the Au-based eutectic metal material examples include AuSn, AuGe, and AuSi.
  • AuSn an Au-based eutectic metal material
  • AuGe an Au-based eutectic metal material
  • AuSi an Au-based eutectic metal material
  • the method for manufacturing the light-emitting diode 1 of the present embodiment includes a step of forming a compound semiconductor layer including a light-emitting portion having a light-emitting layer on a semiconductor substrate, and a step of forming a first metal film on a growth surface of the compound semiconductor layer. A step of forming second and third metal films on one and other surfaces of the transparent substrate, a step of bonding the first and second metal films to form a connection layer, and a step of removing the semiconductor substrate And.
  • the compound semiconductor layer 2 is composed of, for example, a buffer layer 16 made of n-type GaAs doped with Si, an etching stop layer (not shown), and an n-type AlGaInP doped with Si on a semiconductor substrate 15 made of GaAs single crystal or the like.
  • the contact layer 17, the n-type upper clad layer 11, the light emitting layer 10, the p-type lower clad layer 9, and the Mg-doped p-type GaP layer 8 are sequentially laminated.
  • the buffer layer 16 is provided to alleviate a lattice mismatch between the semiconductor substrate 15 and the constituent layers of the light emitting unit 7.
  • the etching stop layer is provided for use in selective etching.
  • the layers constituting the compound semiconductor layer 2 are, for example, trimethylaluminum ((CH 3 ) 3 Al), trimethylgallium ((CH 3 ) 3 Ga), and trimethylindium ((CH 3 ) 3 In ) Can be epitaxially grown on the GaAs substrate 15 by a low pressure metalorganic chemical vapor deposition method (MOCVD method) using a group III constituent element as a raw material.
  • MOCVD method metalorganic chemical vapor deposition method
  • Mg doping material for example, biscyclopentadienyl magnesium (bis- (C 5 H 5 ) 2 Mg) or the like can be used.
  • a Si doping material for example, disilane (Si 2 H 6 ) or the like can be used.
  • phosphine (PH 3 ), arsine (AsH 3 ), or the like can be used as a raw material for the group V constituent element.
  • As the growth temperature of each layer 750 ° C. can be applied to the p-type GaP layer 8, and 730 ° C. can be applied to the other layers.
  • the carrier concentration and layer thickness of each layer can be selected as appropriate.
  • the epitaxial growth surface of the compound semiconductor layer 2 is flattened to form a flat surface. Specifically, a region extending from the surface of the p-type GaP layer 8 to a depth of, for example, about 1 ⁇ m is polished and processed into a mirror surface having a surface roughness of about 0.1 to 10 nm.
  • an ITO film is formed as the transparent conductive film 12A, and then heat treatment is performed at about 400 to 650 ° C. to form an ohmic contact.
  • an ohmic contact electrode made of an alloy can be partially formed instead of the transparent conductive film, but the optical properties are inferior to the structure of the transparent conductive film because the electrode portion has a low reflectance.
  • one and the other surfaces of the transparent substrate 4 are flattened to form a flat surface.
  • heat treatment is performed to form ohmic contacts.
  • the compound semiconductor layer 2 and the transparent substrate 4 are joined. Specifically, the first metal film 3A is formed on the transparent conductive film 12A formed on the compound semiconductor layer 2, and the second metal film is formed on the transparent conductive film 12B formed on one surface of the transparent substrate 4. The metal film 3B is formed. Then, these first and second metal films 3A and 3B are bonded to room temperature metal bonding method (J.Vac.Sci.Technol.A 16 (4), Jul / Aug 1998 P2125 Metal bonding during sputter film deposition T.Shimatsu et al.) to form the connection layer 3. Thereby, as shown in FIG. 3, the compound semiconductor layer 2 and the transparent substrate 4 can be joined.
  • room temperature metal bonding method J.Vac.Sci.Technol.A 16 (4), Jul / Aug 1998 P2125 Metal bonding during sputter film deposition T.Shimatsu et al.
  • the compound semiconductor layer 2 and the transparent substrate 4 are carried into the bonding apparatus, and the apparatus is evacuated to 3 ⁇ 10 ⁇ 5 Pa. .
  • silver having a reflectivity of 98% is formed on each bonding surface of the transparent conductive film 12A formed on the compound semiconductor layer 2 and the transparent conductive film 12B formed on the transparent substrate 4 as the first and second metal films 3A and 3B.
  • the first and second metal films 3A and 3B are preferably bonded at a bonding temperature of less than 100 ° C., desirably less than 50 ° C.
  • a room temperature metal bonding method as a bonding technique between the compound semiconductor layer 2 and the transparent substrate 4. Stress caused by heating in a simple process by joining the first and second metal films 3A, 3B constituting the first and second reflecting surfaces 3a, 3b at room temperature using a mirror material having high reflectivity. In addition, bonding can be performed without being restricted by a reduction in reflectance. Note that, as described above, room temperature metal bonding is a technique in which metal is sputtered in vacuum and bonded by bonding a clean surface, but in the present invention, the surface of the compound semiconductor has been successfully planarized. The present inventors have also found a condition that enables metal bonding even with high reflectance silver, aluminum, and gold.
  • connection method of the compound semiconductor layer 2 and the transparent substrate 4 is not limited to the room temperature metal bonding method using the connection layer 3 described above, and known techniques such as diffusion bonding, adhesive, eutectic metal bonding, and the like. And a structure suitable for the joining method can be selected as appropriate.
  • the semiconductor substrate 15 made of GaAs and the buffer layer 16 are selectively removed from the compound semiconductor layer 2 bonded to the transparent substrate 4 with an ammonia-based etchant.
  • the first electrode 5 is formed.
  • the first electrode 5 is formed by forming an n-type ohmic electrode on the exposed surface of the contact layer 17. Specifically, for example, AuGe, Ni alloy / Pt / Au are laminated by a vacuum deposition method so as to have an arbitrary thickness, and then patterned by a general photolithography means to arbitrarily form the first electrode 5. The shape is formed.
  • the second electrode 6 is formed.
  • the second electrode 6 is formed by forming a third metal film on the transparent conductive film 12 ⁇ / b> C that is an ohmic contact formed on the other surface of the transparent substrate 4.
  • silver is formed as the third metal film with a thickness of 0.1 ⁇ m by sputtering.
  • tungsten (W) is formed to a thickness of 0.1 ⁇ m and gold is formed to a thickness of 0.5 ⁇ m to form a second electrode 6 having a three-layer structure.
  • the light emitting diode 1 is cut into chips. Specifically, first, before cutting into chips, the light emitting portion 7 in the cut region is removed by etching. As described above, the light-emitting diode 1 of the present embodiment can be manufactured.
  • the light-emitting diode lamp (LED lamp) 21 of this embodiment is schematically configured by mounting three light-emitting diodes 1, 21, 31 on the surface of a mount substrate 22. More specifically, the light emitting diode 1 is a red light emitting diode having the AlGaInP light emitting layer 10 using a GaAs substrate as described above.
  • the light emitting diodes 21 and 31 may be the same red light emitting diode as the light emitting diode 1. Thereby, it can be set as a monochromatic LED lamp.
  • blue and green light emitting diodes having a GaInN light emitting layer using a sapphire substrate as the light emitting diodes 21 and 31, a full color LED lamp can be obtained.
  • a plurality of n-electrode terminals 23 and p-electrode terminals 24 are provided on the surface of the mount substrate 22, and the light-emitting diode 1 has a silver (Ag) paste (metal layer) on the p-electrode terminals 24 of the mount substrate 22. ) Are fixed and supported (die-bonded), and the second electrode 6 and the p-electrode terminal 24 are connected.
  • the first electrode 5 of the light emitting diode 1 and the n electrode terminal 23 of the mount substrate 22 are connected using a gold wire 25 (wire bonding).
  • the light emitting diodes 21 and 31 are fixed and supported (mounted) by silver (Ag) paste on the p electrode terminal 24, and the first and second electrodes (not shown) are the n electrode terminal 23 and the p electrode. Each is connected to a terminal 24.
  • a reflection wall 26 is provided on the surface of the mount substrate 22 so as to cover the periphery of the light-emitting diodes 1, 21 and 31, and the space inside the reflection wall 26 is generally made of epoxy resin or the like.
  • the sealing material 27 is sealed.
  • the light emitting diode lamp 21 of the present embodiment has a configuration in which three red light emitting diodes are incorporated in the same package.
  • the light emitting diodes 1, 21 and 31 are caused to emit light simultaneously with respect to the light emitting diode lamp 21 having the above configuration will be described.
  • the upward light emission from the light emitting portion of each of the light emitting diodes 1, 21 and 31 is light emission from the main light extraction surface. Therefore, it can be taken out directly to the outside of the light emitting diode lamp 21. Further, light emitted downward from the light emitting portion of each of the light emitting diodes 1, 21, 31 cannot be taken out directly to the outside of the light emitting diode lamp 21.
  • the first reflecting surface 3 a is provided between the bottom surface of the compound semiconductor layer 2 and the top surface of the bonding layer 3. For this reason, since the 1st reflective surface 3a reflects the internal light of the light emitting diode 1 to the light extraction surface side, the light emission from the light emission part 7 can be efficiently taken out of the light emitting diode lamp 21 outside. Therefore, the high-intensity light-emitting diode 1 and light-emitting diode lamp 21 can be provided.
  • the light emission in the circumferential direction from the light emitting portions of the respective light emitting diodes 1, 21, 31 cannot be taken out directly to the outside of the light emitting diode lamp 21.
  • the light emitting diode lamp 21 is provided with a reflection wall 26 on the surface of the mount substrate 22. For this reason, light emitted from each light emitting diode in the circumferential direction can be reflected upward by the reflecting wall 26. Therefore, the light extraction efficiency of the light emitting diode lamp 21 can be improved.
  • the reflective surface was not provided in the upper surface and bottom face of the opaque substrate or transparent substrate connected with the compound semiconductor layer. For this reason, light emitted from the light emitting portion of each light emitting diode in the circumferential direction is emitted when the side surface of the substrate of the adjacent light emitting diode is irradiated in addition to the light reflected by the reflecting wall 26 provided on the mount substrate 22. In some cases, the substrate was absorbed. Therefore, there is a problem that the luminous efficiency of the entire package is lowered.
  • the light-emitting diode lamp 21 of the present embodiment has two or more light-emitting diodes mounted thereon, and the light-emitting diodes in which the second and third reflecting surfaces 3b and 6a are provided on the top and bottom surfaces of the transparent substrate 4. 1 has a configuration in which at least one is mounted. For this reason, even if the light emitted in the circumferential direction from the adjacent light emitting diode is irradiated from the side surface of the transparent substrate 4 of the light emitting diode 1, it is reflected by the second and third reflecting surfaces 3b and 6a. It will be.
  • the light emitting diode 1 having the second and third reflecting surfaces 3b and 6a provided on the upper surface and the bottom surface of the transparent substrate 4 is included in the package, the loss of light emission from the LED chip in the package. Can be reduced. Therefore, it is possible to provide the high-intensity light-emitting diode lamp 21 capable of improving the light extraction efficiency from the package.
  • the light emitting wavelengths of the mounted light emitting diodes have the same configuration, but the light emitting wavelengths of the mounted light emitting diodes may all be different.
  • tip height of the mounted light emitting diode has the same structure, However, All the chip heights of the mounted light emitting diode may differ.
  • the light emitting diode manufactured in this example is a red light emitting diode having an AlGaInP light emitting portion.
  • the red light-emitting diodes of Example 1 and Comparative Example 1 are semiconductor layers sequentially stacked on a semiconductor substrate made of GaAs single crystal having a surface inclined by 15 ° from an n-type (100) surface doped with Si. It produced using the epitaxial wafer provided with.
  • the laminated semiconductor layer includes a buffer layer made of n-type GaAs doped with Si, a layer made of n-type (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P doped with Si (contact An upper cladding layer made of n-type (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P doped with Si, undoped (Al 0.2 Ga 0.8 ) 0.
  • Light-emitting layer composed of 20 pairs of 0.5 In 0.5 P, and Mg-doped p-type (Al 0.7 Ga 0.3 )
  • a lower clad layer made of 0.5 In 0.5 P, a thin film (Al 0.5 Ga 0.5 ), an intermediate layer made of 0.5 In 0.5 P, and a Mg-doped p-type GaP layer.
  • Each of the semiconductor layers described above used trimethylaluminum ((CH 3 ) 3 Al), trimethylgallium ((CH 3 ) 3 Ga), and trimethylindium ((CH 3 ) 3 In) as a group III constituent element material.
  • An epitaxial wafer was formed by stacking on a GaAs substrate by a low pressure metalorganic chemical vapor deposition method (MOCVD method).
  • MOCVD method metalorganic chemical vapor deposition method
  • Biscyclopentadienyl magnesium bis- (C 5 H 5 ) 2 Mg
  • Disilane (Si 2 H 6 ) was used as a Si doping material.
  • phosphine (PH 3 ) or arsine (AsH 3 ) was used as a group V constituent element material.
  • the GaP layer was grown at 750 ° C., and the other semiconductor layers were grown at 730 ° C.
  • the carrier concentration of the GaAs buffer layer was about 2 ⁇ 10 18 cm ⁇ 3 and the layer thickness was about 0.2 ⁇ m.
  • the layer made of (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P had a carrier concentration of about 2 ⁇ 10 18 cm ⁇ 3 and a layer thickness of about 1.5 ⁇ m.
  • the carrier concentration of the upper cladding layer was about 8 ⁇ 10 17 cm ⁇ 3 and the layer thickness was about 1 ⁇ m.
  • the light emitting layer was undoped 0.8 ⁇ m.
  • the carrier concentration of the lower cladding layer was about 2 ⁇ 10 17 cm ⁇ 3 and the layer thickness was 1 ⁇ m.
  • the carrier concentration of the p-type GaP layer was about 3 ⁇ 10 18 cm ⁇ 3 and the layer thickness was 3 ⁇ m.
  • a region from the surface of the p-type GaP layer to a depth of 1 ⁇ m was polished and mirror-finished.
  • the surface roughness after polishing was 0.18 nm.
  • an ITO film was formed on the mirror-polished surface of the p-type GaP layer, and then heat treatment was performed at 550 ° C. to form an ohmic contact.
  • the epitaxial wafer and the transparent substrate were carried into the bonding apparatus, and the inside of the apparatus was evacuated to 3 ⁇ 10 ⁇ 5 Pa. Then, 0.2 ⁇ m of silver having a reflectance of 98% was formed by sputtering on each bonding surface of the epitaxial wafer and the transparent substrate, and room temperature bonding was performed as it was.
  • the GaAs semiconductor substrate for epitaxial lamination and the buffer layer were selectively removed with an ammonia-based etchant.
  • a vacuum is applied to the surface of the contact layer so that the AuGe (Ge mass ratio 12%) alloy has a thickness of 0.15 ⁇ m, the Ni alloy has a thickness of 0.05 ⁇ m, and Au has a thickness of 1 ⁇ m.
  • An n-type ohmic electrode was formed by vapor deposition. After that, patterning was performed using a general photolithography means, and heat treatment was performed at 450 ° C. for 3 minutes to form an n-type ohmic electrode.
  • the second electrode is formed on the ITO film on the back surface of the transparent substrate by vapor deposition so that the silver is 0.2 ⁇ m, the tungsten film is 0.1 ⁇ m, Au is 0.5 ⁇ m, and AuSn is 1 ⁇ m.
  • a second electrode and a die bonding connection layer were formed.
  • Example 1 A red light emitting diode chip (hereinafter referred to as an LED chip) used in Example 1 was produced.
  • the Ag reflective film had a reflectivity of 95% or more with respect to visible light (blue, green, red).
  • the dominant wavelength is 625 nm and the luminous efficiency is 65 lm. / W.
  • the dominant wavelength was 625 nm and the luminous efficiency was 70 lm / W, and it was confirmed that high luminous efficiency was obtained.
  • the light emitting diode of the present invention is a light emitting diode with high brightness and high efficiency that reduces light absorption in the package, and can be used for various display lamps, lighting fixtures, and the like.

Abstract

Disclosed is a light emitting diode of high brightness wherein the loss of light emitted from the LED chip in the package can be reduced and the efficiency of extraction of light from the package can also be improved. In a light emitting diode (1), a chemical compound semiconductor layer (2) and a transparent substrate (4) are connected through a connecting layer (3). A first reflective surface (3a) is provided between the bottom face of the chemical compound semiconductor layer (2) and the top face of the connecting layer (3). A second reflective surface (3b) is provided between the bottom face of the connecting layer (3) and the top face of the transparent substrate (4).

Description

発光ダイオード及びその製造方法、並びに発光ダイオードランプLIGHT EMITTING DIODE, MANUFACTURING METHOD THEREOF, AND LIGHT EMITTING DIODE LAMP
 本発明は、発光ダイオード及びその製造方法、並びに発光ダイオードランプに関するものである。
 本願は、2009年5月1日に、日本に出願された特願2009-112268号に基づき優先権を主張し、その内容をここに援用する。
The present invention relates to a light emitting diode, a manufacturing method thereof, and a light emitting diode lamp.
This application claims priority based on Japanese Patent Application No. 2009-112268 filed in Japan on May 1, 2009, the contents of which are incorporated herein by reference.
 従来から、赤色、橙色、黄色或いは黄緑色の可視光を発する高輝度発光ダイオード(英略称:LED)として、燐化アルミニウム・ガリウム・インジウム(組成式(AlGa1-XIn1-YP;0≦X≦1,0<Y≦1)から成る発光層を備えた化合物半導体LEDが知られている。この様なLEDにあって、(AlGa1-XIn1-YP(0≦X≦1,0<Y≦1)から成る発光層を備えた発光部は、一般に発光層から出射される発光に対し光学的に不透明であり、また機械的にもそれ程強度のない砒化ガリウム(GaAs)等の基板材料上に形成されている。 Conventionally, as a high-intensity light emitting diode (English abbreviation: LED) that emits red, orange, yellow or yellow-green visible light, aluminum phosphide, gallium indium (composition formula (Al X Ga 1-X ) Y In 1- Y P; 0 ≦ X ≦ 1,0 < compound semiconductor LED having a light emitting layer composed of Y ≦ 1) is known. In such an LED, a light-emitting portion having a light-emitting layer made of (Al X Ga 1-X ) Y In 1-YP (0 ≦ X ≦ 1, 0 <Y ≦ 1) is generally formed from the light-emitting layer. It is formed on a substrate material such as gallium arsenide (GaAs) that is optically opaque to emitted light and that is not mechanically strong.
 このため、最近では、より高輝度の可視LEDを得るために、また、更なる素子の機械的強度の向上を目的として、発光光に対して不透明な基板材料を除去して、然る後、発光光を透過または反射し、尚且つ機械強度的に優れる材料からなる支持体層(基板)を改めて接合させて、接合型LEDを構成する技術が開示されている(例えば、特許文献1~7参照)。 Therefore, recently, in order to obtain a brighter visible LED, and for the purpose of further improving the mechanical strength of the element, the substrate material opaque to the emitted light is removed, and then, Techniques are disclosed in which a bonded layer is formed by bonding a support layer (substrate) made of a material that transmits or reflects emitted light and is excellent in mechanical strength (for example, Patent Documents 1 to 7). reference).
 また、LEDを用いたパッケージ技術に於いては、高出力用、多色用として複数のLEDチップを同一パッケージに入れるLEDランプ製品が普及している。 Further, in the package technology using LEDs, LED lamp products in which a plurality of LED chips are put into the same package for high output and multicolor use are widespread.
特開2001-339100号公報JP 2001-339100 A 特開平6-302857号公報JP-A-6-302857 特開2002-246640号公報JP 2002-246640 A 日本国特許第2588849号公報Japanese Patent No. 2588849 特開2001-57441号公報JP 2001-57441 A 特開2007-81010号公報JP 2007-81010 A 特開2006-32952号公報JP 2006-32952 A
 上述したように、基板接合技術の開発により、支持体層として適用できる基板の自由度が増え、コスト面、機械強度など大きなメリットを有するSi、Ge、金属、セラミック、GaP基板などの適用が提案されている。 As described above, the development of substrate bonding technology has increased the degree of freedom of substrates that can be applied as a support layer, and proposals have been made for applications such as Si, Ge, metals, ceramics, and GaP substrates that have significant advantages such as cost and mechanical strength. Has been.
 しかしながら、これらの基板、特に、不透明基板は、光吸収についての改善が不十分であるという問題があった。具体的には、同一のパッケージ内に複数のLEDチップを搭載する製品においては、隣接するチップの基板によって発光をロスすることになり、パッケージの外へ光を取り出す効率が低下してしまうという問題があった。特に、フルカラーや高出力用パッケージは、複数のLEDチップを隣接して配置する為、発光ダイオードチップの基板が隣接チップの発光を吸収してしまい、パッケージ全体の発光効率の低下やパッケージから取り出される発光が不均一になるという課題があった。 However, these substrates, particularly opaque substrates, have a problem that the improvement in light absorption is insufficient. Specifically, in a product in which a plurality of LED chips are mounted in the same package, light emission is lost by the substrate of adjacent chips, and the efficiency of extracting light out of the package is reduced. was there. In particular, in a full color or high output package, since a plurality of LED chips are arranged adjacent to each other, the substrate of the light emitting diode chip absorbs light emitted from the adjacent chip, and the entire package is reduced in luminous efficiency or taken out from the package. There was a problem that light emission became non-uniform.
 本発明は、上記事情を鑑みてなされたものであり、パッケージ内においてLEDチップからの発光のロスを低減すると共に、パッケージからの光取り出し効率を向上することが可能な高輝度の発光ダイオード及びその製造方法、並びに発光ダイオードランプを提供することを目的とする。 The present invention has been made in view of the above circumstances, and is a high-intensity light-emitting diode capable of reducing loss of light emission from an LED chip in a package and improving light extraction efficiency from the package, and its It is an object to provide a manufacturing method and a light emitting diode lamp.
 すなわち、本発明は以下に関する。
(1) 発光層を有する発光部を少なくとも含む化合物半導体層と、接続層と、透明基板と、を備え、前記化合物半導体層と前記透明基板とが、前記接続層を介して接合されており、前記化合物半導体層の底面と前記接続層の上面との間には、第1の反射面が設けられ、前記接続層の底面と前記透明基板の上面との間には、第2の反射面が設けられていることを特徴とする発光ダイオード。
(2) 前記透明基板の底面には、第3の反射面が設けられていることを特徴とする前項1に記載の発光ダイオード。
(3) 前記第1の反射面が、発光部からの発光の波長帯において反射率90%以上であり、前記第2及び第3の反射面が、外部光の波長帯において反射率90%以上であることを特徴とする前項1又は2に記載の発光ダイオード。
(4) 前記化合物半導体層の上面側に第1の電極が設けられ、前記透明基板の底面側に第2の電極が設けられており、前記透明基板の底面と前記第2の電極との間に、前記第3の反射面が設けられていることを特徴とする前項1乃至3のいずれか一項に記載の発光ダイオード。
(5) 前記接続層が、銀、金、銅、アルミニウムの少なくとも1つを含む金属から構成されていることを特徴とする前項1乃至4のいずれか一項に記載の発光ダイオード。
(6) 前記第2の電極が、銀、金、銅、アルミニウムの少なくとも1つを含む金属から構成されていることを特徴とする前項5に記載の発光ダイオード。
(7) 前記透明基板が、半導体であることを特徴とする前項1乃至6のいずれか一項に記載の発光ダイオード。
(8) 前記透明基板が、GaP又はSiCであることを特徴とする前項1乃至7のいずれか一項に記載の発光ダイオード。
(9) 前記発光層が、AlGaInP又はAlGaAs層を含むことを特徴とする前項1乃至8のいずれか一項に記載の発光ダイオード。
(10) 前記化合物半導体層と前記接続層との間に透明導電膜が設けられており、前記化合物半導体層と前記透明導電膜とがオーミック接触していることを特徴とする前項1乃至9のいずれか一項に記載の発光ダイオード。
(11) 前記接続層と前記透明基板との間に透明導電膜が設けられており、前記透明導電膜と前記透明基板とがオーミック接触していることを特徴とする前項1乃至10のいずれか一項に記載の発光ダイオード。
(12) 前記透明基板と前記第2の電極との間に透明導電膜が設けられており、前記透明導電膜と前記透明基板とがオーミック接触していることを特徴とする前項1乃至11のいずれか一項に記載の発光ダイオード。
(13) 前記透明導電膜が、酸化インジウム錫又は酸化インジウム亜鉛であることを特徴とする前項10に記載の発光ダイオード。
(14) 前記透明導電膜が、酸化インジウム錫又は酸化インジウム亜鉛であることを特徴とする前項12に記載の発光ダイオード。
(15) 前記透明基板の厚さが、50μm以上350μm以下であることを特徴とする前項1乃至13のいずれか一項に記載の発光ダイオード。
(16) 半導体基板上に発光層を有する発光部を含む化合物半導体層を形成する工程と、前記化合物半導体層の成長面に第1の金属膜を形成する工程と、透明基板の一方の表面に第2の金属膜を形成する工程と、前記第1及び第2の金属膜を接合して接続層を形成する工程と、前記半導体基板を除去する工程と、を備えることを特徴とする発光ダイオードの製造方法。
(17) 前記透明基板の一方の表面に第2の金属膜を形成すると同時に、前記透明基板の他方の表面に第3の金属膜を形成することを特徴とする前項16に記載の発光ダイオードの製造方法。
(18) 前記化合物半導体層の成長面に第1の金属膜を形成する工程が、前記化合物半導体層の成長面を平坦化して平坦面を形成し、前記平坦面上に透明導電膜を形成した後に熱処理をし、熱処理をした後の前記透明導電膜上に第1の金属膜を形成する工程であり、透明基板の一方及び他方の表面に第2及び第3の金属膜を形成する工程が、前記透明基板の一方及び他方の表面を平坦化して平坦面を形成し、前記平坦面上に透明導電膜をそれぞれ形成した後に熱処理をし、熱処理をした後の前記透明導電膜上に第2及び第3の金属膜をそれぞれ形成する工程であることを特徴とする前項17に記載の発光ダイオードの製造方法。
(19) 前記第1及び第2の金属膜が、銀、金、銅、アルミニウムの少なくとも1つを含む金属から構成されており、前記第1及び第2の金属膜を接合して接続層を形成する工程が、50℃未満の接合温度で前記第1及び第2の金属膜を接合する常温金属接合工程であることを特徴とする前項16乃至18のいずれか一項に記載の発光ダイオードの製造方法。
(20) 発光ダイオードが2以上搭載されている発光ダイオードランプであって、前項1乃至14のいずれか一項に記載の発光ダイオードが少なくとも1以上搭載されていることを特徴とする発光ダイオードランプ。
(21) 搭載された発光ダイオードが金属層によりダイボンドされていることを特徴とする前項20に記載の発光ダイオードランプ。
That is, the present invention relates to the following.
(1) A compound semiconductor layer including at least a light emitting part having a light emitting layer, a connection layer, and a transparent substrate, wherein the compound semiconductor layer and the transparent substrate are bonded via the connection layer, A first reflective surface is provided between the bottom surface of the compound semiconductor layer and the top surface of the connection layer, and a second reflective surface is provided between the bottom surface of the connection layer and the top surface of the transparent substrate. A light-emitting diode, which is provided.
(2) The light-emitting diode according to item 1 above, wherein a third reflecting surface is provided on the bottom surface of the transparent substrate.
(3) The first reflecting surface has a reflectance of 90% or more in the wavelength band of light emitted from the light emitting unit, and the second and third reflecting surfaces have a reflectance of 90% or more in the wavelength band of external light. 3. The light-emitting diode according to item 1 or 2 above.
(4) The first electrode is provided on the upper surface side of the compound semiconductor layer, the second electrode is provided on the bottom surface side of the transparent substrate, and the space between the bottom surface of the transparent substrate and the second electrode. 4. The light emitting diode according to claim 1, wherein the third reflecting surface is provided.
(5) The light-emitting diode according to any one of (1) to (4), wherein the connection layer is made of a metal including at least one of silver, gold, copper, and aluminum.
(6) The light-emitting diode according to (5), wherein the second electrode is made of a metal including at least one of silver, gold, copper, and aluminum.
(7) The light-emitting diode according to any one of (1) to (6), wherein the transparent substrate is a semiconductor.
(8) The light-emitting diode according to any one of (1) to (7), wherein the transparent substrate is GaP or SiC.
(9) The light-emitting diode according to any one of (1) to (8), wherein the light-emitting layer includes an AlGaInP or AlGaAs layer.
(10) The transparent conductive film is provided between the compound semiconductor layer and the connection layer, and the compound semiconductor layer and the transparent conductive film are in ohmic contact, The light emitting diode according to any one of the above.
(11) Any one of the preceding items 1 to 10, wherein a transparent conductive film is provided between the connection layer and the transparent substrate, and the transparent conductive film and the transparent substrate are in ohmic contact. The light emitting diode according to one item.
(12) The transparent conductive film is provided between the transparent substrate and the second electrode, and the transparent conductive film and the transparent substrate are in ohmic contact. The light emitting diode according to any one of the above.
(13) The light-emitting diode according to (10), wherein the transparent conductive film is indium tin oxide or indium zinc oxide.
(14) The light-emitting diode as described in (12) above, wherein the transparent conductive film is indium tin oxide or indium zinc oxide.
(15) The light-emitting diode according to any one of (1) to (13), wherein a thickness of the transparent substrate is 50 μm or more and 350 μm or less.
(16) A step of forming a compound semiconductor layer including a light emitting portion having a light emitting layer on a semiconductor substrate, a step of forming a first metal film on the growth surface of the compound semiconductor layer, and a surface of one of the transparent substrates A light emitting diode comprising: a step of forming a second metal film; a step of bonding the first and second metal films to form a connection layer; and a step of removing the semiconductor substrate. Manufacturing method.
(17) The light-emitting diode according to item 16 above, wherein a second metal film is formed on one surface of the transparent substrate and a third metal film is formed on the other surface of the transparent substrate. Production method.
(18) In the step of forming the first metal film on the growth surface of the compound semiconductor layer, the growth surface of the compound semiconductor layer is flattened to form a flat surface, and a transparent conductive film is formed on the flat surface. A step of forming a first metal film on the transparent conductive film after the heat treatment and the heat treatment; and forming a second and third metal film on one and the other surfaces of the transparent substrate. Then, one and the other surfaces of the transparent substrate are flattened to form a flat surface, a transparent conductive film is formed on the flat surface, heat treatment is performed, and a second heat treatment is performed on the transparent conductive film after the heat treatment. 18. The method for producing a light-emitting diode according to 17 above, wherein the method is a step of forming a third metal film and a third metal film, respectively.
(19) The first and second metal films are made of a metal containing at least one of silver, gold, copper, and aluminum, and a connection layer is formed by joining the first and second metal films. 19. The light-emitting diode according to any one of items 16 to 18, wherein the forming step is a room temperature metal bonding step of bonding the first and second metal films at a bonding temperature of less than 50 ° C. Production method.
(20) A light-emitting diode lamp having two or more light-emitting diodes mounted thereon, wherein at least one or more light-emitting diodes according to any one of items 1 to 14 are mounted.
(21) The light emitting diode lamp as described in (20) above, wherein the mounted light emitting diode is die-bonded by a metal layer.
 本発明の発光ダイオードは、化合物半導体層と光吸収の少ない透明基板とを接続層を介して接合しており、化合物半導体層の底面と接続層の上面との間には第1の反射面が設けられた構成となっている。この第1の反射面によって、発光部からの発光を反射することができるため、パッケージ内においてLEDチップからの発光のロスを低減することができる。 In the light-emitting diode of the present invention, a compound semiconductor layer and a transparent substrate with little light absorption are joined via a connection layer, and the first reflective surface is between the bottom surface of the compound semiconductor layer and the top surface of the connection layer. It has a provided configuration. Since the light emitted from the light emitting unit can be reflected by the first reflecting surface, loss of light emitted from the LED chip in the package can be reduced.
 また、透明基板の上面及び底面に設けられた第2の反射面によって、例えばパッケージ内で隣接するLEDチップからの発光等の外部光を反射することができるため、透明基板内での光の吸収を低減することができる。したがって、パッケージからの光取り出し効率を向上することができる。
 さらに、透明基板の底面には第3の反射面が設けられた構成とすることにより、パッケージからの光取り出し効率をより向上することができる。
Further, the second reflecting surfaces provided on the top and bottom surfaces of the transparent substrate can reflect external light such as light emitted from adjacent LED chips in the package, so that light is absorbed in the transparent substrate. Can be reduced. Therefore, the light extraction efficiency from the package can be improved.
Furthermore, the configuration in which the third reflecting surface is provided on the bottom surface of the transparent substrate can further improve the light extraction efficiency from the package.
 本発明の発光ダイオードによれば、パッケージ内においてLEDチップからの発光のロスを低減すると共に、パッケージからの光取り出し効率を向上することが可能な高輝度の発光ダイオードを提供することができる。 According to the light-emitting diode of the present invention, it is possible to provide a high-intensity light-emitting diode capable of reducing the loss of light emission from the LED chip in the package and improving the light extraction efficiency from the package.
 本発明の発光ダイオードの製造方法は、半導体基板上に発光層を有する発光部を含む化合物半導体層を形成し、この化合物半導体層の成長面に第1の金属膜を形成し、透明基板の一方及び他方の表面に第2の金属膜を形成した後に、第1及び第2の金属膜を接合して接続層を形成する構成となっている。第1及び第2の金属膜を接合して接続層を形成することにより、上記発光ダイオードを確実かつ簡便に製造することができる。
 また、第2の金属膜の形成と同時に第3の金属膜を形成することができるため、光取り出し効率の高い上記発光ダイオードを簡便に製造することができる。
According to the method of manufacturing a light emitting diode of the present invention, a compound semiconductor layer including a light emitting portion having a light emitting layer is formed on a semiconductor substrate, a first metal film is formed on a growth surface of the compound semiconductor layer, After the second metal film is formed on the other surface, the first and second metal films are joined to form a connection layer. By joining the first and second metal films to form a connection layer, the light emitting diode can be reliably and easily manufactured.
In addition, since the third metal film can be formed simultaneously with the formation of the second metal film, the light-emitting diode with high light extraction efficiency can be easily manufactured.
 本発明の発光ダイオードランプによれば、発光ダイオードが2以上搭載されている発光ダイオードランプにおいて、上記発光ダイオードが少なくとも1以上搭載された構成を有している。上記発光ダイオードに設けられた第2及び第3の反射面が、パッケージ内で隣接するLEDチップからの発光を反射するため、パッケージ内においてLEDチップからの発光のロスを低減することができる。したがって、パッケージからの光取り出し効率を向上することが可能な発光ダイオードランプを提供することができる。 According to the light-emitting diode lamp of the present invention, the light-emitting diode lamp in which two or more light-emitting diodes are mounted has a configuration in which at least one light-emitting diode is mounted. Since the second and third reflecting surfaces provided in the light emitting diode reflect light emitted from the LED chips adjacent in the package, loss of light emitted from the LED chip in the package can be reduced. Therefore, it is possible to provide a light emitting diode lamp capable of improving the light extraction efficiency from the package.
本発明の一実施形態である発光ダイオードを示す図であって、平面図を示す。It is a figure which shows the light emitting diode which is one Embodiment of this invention, Comprising: A top view is shown. 本発明の一実施形態である発光ダイオードを示す図であって、図1A中に示すA-A’線に沿った断面図である。1B is a view showing a light emitting diode according to an embodiment of the present invention, and is a cross-sectional view taken along the line A-A ′ shown in FIG. 1A. FIG. 本発明の一実施形態である発光ダイオードに用いるエピウェーハの断面模式図である。It is a cross-sectional schematic diagram of the epiwafer used for the light emitting diode which is one Embodiment of this invention. 本発明の一実施形態である発光ダイオードに用いる接合ウェーハの断面模式図である。It is a cross-sectional schematic diagram of the bonded wafer used for the light emitting diode which is one Embodiment of this invention. 本発明の一実施形態である発光ダイオードランプを説明するための図であって、平面図を示す。It is a figure for demonstrating the light emitting diode lamp which is one Embodiment of this invention, Comprising: The top view is shown. 本発明の一実施形態である発光ダイオードランプを説明するための図であって、図4A中に示すC-C’線に沿った断面図である。FIG. 4B is a diagram for explaining the light-emitting diode lamp according to the embodiment of the present invention, and is a cross-sectional view taken along line C-C ′ shown in FIG. 4A.
 以下、本発明を適用した一実施形態である発光ダイオード及び発光ダイオードランプについて図面を用いて詳細に説明する。なお、以下の説明で用いる図面は、特徴をわかりやすくするために、便宜上特徴となる部分を拡大して示している場合があり、各構成要素の寸法比率などが実際と同じであるとは限らない。 Hereinafter, a light-emitting diode and a light-emitting diode lamp according to an embodiment to which the present invention is applied will be described in detail with reference to the drawings. In the drawings used in the following description, in order to make the features easy to understand, the portions that become the features may be shown in an enlarged manner for convenience, and the dimensional ratios of the respective components are not always the same as the actual ones. Absent.
<発光ダイオード>
 先ず、本発明を適用した一実施形態である発光ダイオードの構成について説明する。
 図1A及び図1Bに示すように、本実施形態の発光ダイオード(LED)1は、化合物半導体層2と接続層3と透明基板4とを備えており、化合物半導体層2と透明基板4とが接続層3を介して接合されて概略構成されている。また、化合物半導体層2の上面側には、第1の電極5が設けられており、透明基板4の底面側に第2の電極6が設けられている。
<Light emitting diode>
First, a configuration of a light emitting diode according to an embodiment to which the present invention is applied will be described.
As shown in FIGS. 1A and 1B, a light emitting diode (LED) 1 according to this embodiment includes a compound semiconductor layer 2, a connection layer 3, and a transparent substrate 4, and the compound semiconductor layer 2 and the transparent substrate 4 include It is schematically configured by being joined via a connection layer 3. The first electrode 5 is provided on the upper surface side of the compound semiconductor layer 2, and the second electrode 6 is provided on the bottom surface side of the transparent substrate 4.
 化合物半導体層2は、pn接合型の発光部7を含むものであれば特に限定されるものではない。具体的には、化合物半導体層2は、例えば、図1Bに示すように、Mgをドープしたキャリア濃度1×1018~8×1018cm-3、層厚1~15μmのp型GaP層8上に、発光部7が積層されて構成されている。なお、p型GaP層8は、省略することも、あるいは他の透明層で代用することも可能である。 The compound semiconductor layer 2 is not particularly limited as long as it includes the pn junction type light emitting portion 7. Specifically, for example, as shown in FIG. 1B, the compound semiconductor layer 2 includes a p-type GaP layer 8 doped with Mg and having a carrier concentration of 1 × 10 18 to 8 × 10 18 cm −3 and a layer thickness of 1 to 15 μm. A light emitting unit 7 is laminated on the top. The p-type GaP layer 8 can be omitted or replaced with another transparent layer.
 発光部7は、具体的には、例えば、下部クラッド層9、発光層10、上部クラッド層11、が順次積層された化合物半導体の積層体である。この発光部7としては、例えば、赤色光源である(AlGa1-XIn1-YP(0≦X≦1,0<Y≦1)から成る発光層10を含む化合物半導体を用いることができる。また、赤および赤外発光の光源であるAlGa(1-x)As(0≦X≦1)からなる発光層10を含む化合物半導体を用いることができる。 Specifically, the light emitting unit 7 is a stacked body of compound semiconductors in which, for example, a lower cladding layer 9, a light emitting layer 10, and an upper cladding layer 11 are sequentially stacked. As the light emitting section 7, for example, a compound semiconductor including a light emitting layer 10 made of (Al X Ga 1-X ) Y In 1-YP (0 ≦ X ≦ 1, 0 <Y ≦ 1) which is a red light source is used. Can be used. Further, a compound semiconductor including the light emitting layer 10 made of Al x Ga (1-x) As (0 ≦ X ≦ 1) which is a light source for red and infrared light emission can be used.
 発光層10は、アンドープ、n形又はp形のいずれかの伝導型の(AlGa1-XIn1-YP(0≦X≦1,0<Y≦1)からも構成することができる。この発光層10は、ダブルヘテロ構造、単一(single)量子井戸(英略称:SQW)構造、あるいは多重(multi)量子井戸(英略称:MQW)構造のどちらであっても良いが、単色性に優れる発光を得るためにはMQW構造とすることが好ましい。また、量子井戸(英略称:QW)構造をなす障壁(barrier)層及び井戸(well)層を構成する(AlGa1-XIn1-YP(0≦X≦1,0<Y≦1)の組成は、所望の発光波長を帰結する量子準位が井戸層内に形成される様に決定することができる。 The light emitting layer 10 is also composed of undoped, n-type or p-type conductivity type (Al X Ga 1-X ) Y In 1-YP (0 ≦ X ≦ 1, 0 <Y ≦ 1). be able to. The light emitting layer 10 may have a double hetero structure, a single quantum well (abbreviation: SQW) structure, or a multi quantum well (abbreviation: MQW) structure, but is monochromatic. In order to obtain excellent light emission, an MQW structure is preferable. Further, a barrier layer and a well layer having a quantum well (English abbreviation: QW) structure are formed (Al X Ga 1-X ) Y In 1-YP (0 ≦ X ≦ 1,0) The composition of Y ≦ 1) can be determined so that quantum levels resulting in the desired emission wavelength are formed in the well layer.
 発光部7は、上記発光層10と、放射再結合をもたらすキャリア(担体;carrier)及び発光を発光層10に「閉じ込める」ために、発光層10の下側及び上側に対峙して配置した下部クラッド(clad)層9及び上部クラッド層11を含む、所謂、ダブルヘテロ(英略称:DH)構造とすることが高強度の発光を得る上で好ましい。下部クラッド層9及び上部クラッド層11は、発光層10を構成する(AlGa1-XIn1-YP(0≦X≦1,0<Y≦1)よりも禁止帯幅が広い半導体材料から構成するのが好ましい。 The light emitting unit 7 is a lower portion disposed opposite to the upper side and the upper side of the light emitting layer 10 in order to “confine” the light emitting layer 10, a carrier (carrier) that causes radiative recombination, and light emission in the light emitting layer 10. A so-called double hetero (English abbreviation: DH) structure including the clad layer 9 and the upper clad layer 11 is preferable for obtaining high-intensity light emission. The lower cladding layer 9 and the upper cladding layer 11 have a forbidden bandwidth larger than (Al X Ga 1-X ) Y In 1-YP (0 ≦ X ≦ 1, 0 <Y ≦ 1) constituting the light emitting layer 10. It is preferable to construct from a wide semiconductor material.
 また、発光層10と下部クラッド層9及び上部クラッド層11との間に、両層間におけるバンド(band)不連続性を緩やかに変化させるための中間層を設けても良い。この場合、中間層は、発光層10と下部クラッド層9及び上部クラッド層11との中間の禁止帯幅を有する半導体材料から構成するのが望ましい。 Further, an intermediate layer for gently changing the band discontinuity between both layers may be provided between the light emitting layer 10 and the lower cladding layer 9 and the upper cladding layer 11. In this case, the intermediate layer is preferably made of a semiconductor material having a band gap between the light emitting layer 10 and the lower and upper clad layers 9 and 11.
 また、発光部7の上方には、オーミック(Ohmic)電極の接触抵抗を下げるためのコンタクト層、素子駆動電流を発光部の全般に平面的に拡散させるための電流拡散層、逆に素子駆動電流の通流する領域を制限するための電流阻止層や電流狭窄層など公知の層構造を設けてもよい。さらに、発光部7は、上面側(及び底面側)の極性がp型、n型のどちらであってもよい。 Further, above the light emitting portion 7, a contact layer for lowering the contact resistance of the ohmic electrode, a current diffusion layer for planarly diffusing the element driving current throughout the light emitting portion, and conversely, the element driving current. A known layer structure such as a current blocking layer or a current confinement layer for limiting the region through which the current flows may be provided. Further, the light emitting unit 7 may have either the p-type or n-type polarity on the upper surface side (and the bottom surface side).
 p型GaP層8は、例えば、Mgをドープしたキャリア濃度1×1018~8×1018cm-3、層厚1~15μmの半導体層である。p型GaP層8は、化合物半導体層2において接続層3側に配置されており、このp型GaP層8の底面が接続層3の上面との接続面とされている。また、p型GaP層8の底面は、鏡面研磨された平滑面であることが好ましい。具体的には、表面粗さが、例えば0.1~10nmの範囲であることが好ましい。 The p-type GaP layer 8 is, for example, a semiconductor layer doped with Mg and having a carrier concentration of 1 × 10 18 to 8 × 10 18 cm −3 and a layer thickness of 1 to 15 μm. The p-type GaP layer 8 is arranged on the connection layer 3 side in the compound semiconductor layer 2, and the bottom surface of the p-type GaP layer 8 is a connection surface with the upper surface of the connection layer 3. The bottom surface of the p-type GaP layer 8 is preferably a mirror-polished smooth surface. Specifically, the surface roughness is preferably in the range of 0.1 to 10 nm, for example.
 接続層3は、図1Bに示すように、化合物半導体層2と透明基板4との間に配置されており、化合物半導体層2側に設けられた第1の金属膜3Aと透明基板4側に設けられた第2の金属膜3Bとが接合されて構成されている。接続層3は、化合物半導体層2と透明基板4とを接合する機能を有している。また、接続層3は、高輝度化のために反射率の高い反射構造を有しており、化合物半導体層2側及び透明基板4側から入射された光を反射させる機能を有している。接続層3の材質としては、電気抵抗が低い材料が好ましく、発光部のストレスを考慮すると低温で接続できる材質であることが望ましい。 As shown in FIG. 1B, the connection layer 3 is disposed between the compound semiconductor layer 2 and the transparent substrate 4, and on the first metal film 3A provided on the compound semiconductor layer 2 side and the transparent substrate 4 side. The provided second metal film 3B is joined to the second metal film 3B. The connection layer 3 has a function of bonding the compound semiconductor layer 2 and the transparent substrate 4 together. In addition, the connection layer 3 has a reflective structure with a high reflectivity for increasing the brightness, and has a function of reflecting light incident from the compound semiconductor layer 2 side and the transparent substrate 4 side. The material of the connection layer 3 is preferably a material having a low electrical resistance, and is preferably a material that can be connected at a low temperature in consideration of the stress of the light emitting portion.
 第1の金属膜3Aは、発光ダイオード1の高輝度化を目的として、主に発光部7(発光層10)から透明基板4側に放出された光(以下、内部光という)を反射して効率よく外部に取り出すために設けられている。この第1の金属膜3Aの材質としては、特に限定されるものではないが、内部光の波長帯において反射率が90%以上の材料を用いることができる。その中でも、可視光領域の全域において反射率が90%である銀、アルミニウム、又はこれらの合金を用いることが特に好ましい。 The first metal film 3A reflects light (hereinafter referred to as internal light) emitted mainly from the light emitting portion 7 (light emitting layer 10) toward the transparent substrate 4 for the purpose of increasing the luminance of the light emitting diode 1. It is provided to efficiently take it out. The material of the first metal film 3A is not particularly limited, but a material having a reflectance of 90% or more in the wavelength band of internal light can be used. Among these, it is particularly preferable to use silver, aluminum, or an alloy thereof having a reflectance of 90% in the entire visible light region.
 一方、可視光領域の一部の波長帯において反射率が90%以上となる材料としては、例えば、金、銅を例示することができる。ここで、金は、約550nmより長い波長で反射率が高くなり、約590nmで反射率が90%を超える。また、銅は、約600nmより長い波長で反射率が高くなり、約610nmで反射率が90%を超える。このように、第1の金属膜3Aの材質は、発光部7からの発光の波長帯に応じて適宜選択することができる。 On the other hand, examples of the material having a reflectance of 90% or more in a part of the wavelength band of the visible light region include gold and copper. Here, gold has a high reflectance at a wavelength longer than about 550 nm, and the reflectance exceeds 90% at about 590 nm. Copper has a high reflectance at a wavelength longer than about 600 nm, and the reflectance exceeds 90% at about 610 nm. As described above, the material of the first metal film 3 </ b> A can be appropriately selected according to the wavelength band of light emitted from the light emitting unit 7.
 第2の金属膜3Bは、本実施形態の発光ダイオード1が発光ダイオードランプ等のパッケージに用いられた場合に、そのパッケージの高輝度化を目的として、上記パッケージ内において発光ダイオード1に隣接する他の発光ダイオード等から発光された光(以下、外部光という)が透明基板4の内部に入射された際に、この外部光を反射して効率よく透明基板4の外部に取り出すために設けられている。 When the light-emitting diode 1 of the present embodiment is used in a package such as a light-emitting diode lamp, the second metal film 3B is used for the purpose of increasing the brightness of the package and is adjacent to the light-emitting diode 1 in the package. When light emitted from the light emitting diode or the like (hereinafter referred to as external light) is incident on the inside of the transparent substrate 4, it is provided to reflect the external light and efficiently extract it to the outside of the transparent substrate 4. Yes.
 第2の金属膜3Bの材質としては、特に限定されるものではないが、外部光の波長帯において反射率が90%以上の材料を用いることができる。その中でも、可視光領域の全域において反射率が90%である銀、アルミニウム、又はこれらの合金を用いることが特に好ましい。 The material of the second metal film 3B is not particularly limited, but a material having a reflectance of 90% or more in the wavelength band of external light can be used. Among these, it is particularly preferable to use silver, aluminum, or an alloy thereof having a reflectance of 90% in the entire visible light region.
 一方、可視光領域の一部の波長帯において反射率が90%以上となる材料としては、例えば、金、銅を例示することができる。ここで、金は、約550nmより長い波長で反射率が高くなり、約590nmで反射率が90%を超える。また、銅は、約600nmより長い波長で反射率が高くなり、約610nmで反射率が90%を超える。このように、第2の金属膜3Bの材質は、外部光の波長帯に応じて適宜選択することができる。 On the other hand, examples of the material having a reflectance of 90% or more in a part of the wavelength band of the visible light region include gold and copper. Here, gold has a high reflectance at a wavelength longer than about 550 nm, and the reflectance exceeds 90% at about 590 nm. Copper has a high reflectance at a wavelength longer than about 600 nm, and the reflectance exceeds 90% at about 610 nm. Thus, the material of the second metal film 3B can be appropriately selected according to the wavelength band of the external light.
 第1及び第2の金属膜3A,3Bの材質は、それぞれ異なっていても良いが、同一であることが好ましい。第1及び第2の金属膜3A,3Bの材質が同一である場合、接続層3は、第1の金属膜3Aと第2の金属膜3Bとが常温金属接合法(J.Vac.Sci.Technol.A 16(4),Jul/Aug 1998 P2125 Metal bonding during sputter film deposition T.Shimatsu et al.)により接合された構造とすることができる。 The materials of the first and second metal films 3A and 3B may be different from each other, but are preferably the same. In the case where the materials of the first and second metal films 3A and 3B are the same, the connection layer 3 is formed by connecting the first metal film 3A and the second metal film 3B to a room temperature metal bonding method (J. Vac. Sci. Technol. A-16 (4), Jul / Aug 1998-P2125 Metal-bonding-during-sputter-film-deposition-T.Shimatsu-et-al.).
 一方、第1及び第2の金属膜3A,3Bの材質が異なる場合、接続層3は、第1の金属膜3Aと第2の金属膜3Bとが、AuSn、AuGe等の共晶金属による接合や、高温・高圧による接合など公知の接合技術により接合された構造とすることができる。なお、これらの加熱を伴う接合技術を適用する場合は、第1及び第2の金属膜3A,3Bと、化合物半導体層2及び透明基板4との間で拡散や反応が生じないように、チタン、クロム、タングステン等の公知の高融点バリア金属層(図示略)を挿入することが好ましい。 On the other hand, when the materials of the first and second metal films 3A and 3B are different, the connection layer 3 is formed by bonding the first metal film 3A and the second metal film 3B with a eutectic metal such as AuSn or AuGe. Alternatively, it can be a structure joined by a known joining technique such as joining at high temperature and high pressure. In addition, when applying these joining techniques involving heating, titanium and titanium are prevented so that no diffusion or reaction occurs between the first and second metal films 3A and 3B, the compound semiconductor layer 2 and the transparent substrate 4. It is preferable to insert a known high melting point barrier metal layer (not shown) such as chromium, tungsten or the like.
 透明基板4は、図1Bに示すように、化合物半導体層2のp型GaP層8側に接続層3を介して接合されている。この透明基板4は、発光部7を機械的に支持するのに充分な強度を有し、且つ、発光部7から出射される発光を透過できる禁止帯幅が広く、導電性の光学的に透明な材料から構成することが好ましい。このような透明基板4としては、例えば、燐化ガリウム(GaP)、砒化アルミニウム・ガリウム(AlGaAs)、窒化ガリウム(GaN)等のIII-V族化合物半導体結晶体、硫化亜鉛(ZnS)やセレン化亜鉛(ZnSe)等のII-VI族化合物半導体結晶体、或いは六方晶或いは立方晶の炭化珪素(SiC)等のIV族半導体結晶体、ガラス基板、サファイア基板などを用いることができる。特に、透明度、加工性、機械強度、低コストの特性を兼ね備えたSiC、GaPが、最も好適な半導体材料である。SiCは、熱伝導、機械強度は優れている。また、GaPは、透過できる波長が、緑より長波長側であるが、加工しやすい半導体材料であるという利点がある。一方、ガラス、サファイア基板等も利用することが可能であるが、絶縁性であり、熱伝導で半導体材料より特性がおとるため、低電流用途に制限される。 The transparent substrate 4 is joined to the p-type GaP layer 8 side of the compound semiconductor layer 2 via the connection layer 3 as shown in FIG. 1B. The transparent substrate 4 has a sufficient strength to mechanically support the light emitting unit 7 and has a wide forbidden band width through which light emitted from the light emitting unit 7 can be transmitted. Preferably, it is made of a material. Examples of such a transparent substrate 4 include III-V group compound semiconductor crystal such as gallium phosphide (GaP), aluminum gallium arsenide (AlGaAs), and gallium nitride (GaN), zinc sulfide (ZnS), and selenide. A II-VI compound semiconductor crystal such as zinc (ZnSe), a IV group semiconductor crystal such as hexagonal or cubic silicon carbide (SiC), a glass substrate, a sapphire substrate, or the like can be used. In particular, SiC and GaP having characteristics of transparency, workability, mechanical strength, and low cost are the most suitable semiconductor materials. SiC is excellent in heat conduction and mechanical strength. GaP has an advantage that it is a semiconductor material that can be easily processed, although the wavelength that can be transmitted is longer than that of green. On the other hand, glass, sapphire substrates, and the like can be used, but are limited to low current applications because they are insulative and have better thermal conductivity than semiconductor materials.
 透明基板4の厚さは、薄い方が望ましいが、ハンドリング時の割れ、反りが発生しないように、材質の強度に合わせて適宜最適化することができる。具体的には、透明基板4として最も好適な材料であるGaPを用いる場合、100μmよりも薄いと割れやすくなるために好ましくない。一方、350μmよりも厚いと切断しにくくなり、コストアップにつながるために好ましくない。これに対して透明基板4としてSiCを用いる場合、同様の理由により、50~150μmが良好な範囲である。 Although the thickness of the transparent substrate 4 is desirably thin, it can be appropriately optimized according to the strength of the material so that cracking and warping during handling do not occur. Specifically, when using GaP which is the most suitable material for the transparent substrate 4, if it is thinner than 100 μm, it is not preferable because it tends to break. On the other hand, if it is thicker than 350 μm, it becomes difficult to cut, which is not preferable because it leads to an increase in cost. On the other hand, when SiC is used as the transparent substrate 4, 50 to 150 μm is a good range for the same reason.
 第1の電極5は、化合物半導体層2の上面側に設けられた低抵抗のオーミック接触電極である。一方、第2の電極6は、基板3の底面側に設けられた低抵抗のオーミック接触電極である。本実施形態では、第1の電極5の極性がn型かつ第2の電極6の極性がp型の場合について説明するが、第1の電極5の極性がp型かつ第2の電極6の極性がn型であってもよい。 The first electrode 5 is a low-resistance ohmic contact electrode provided on the upper surface side of the compound semiconductor layer 2. On the other hand, the second electrode 6 is a low-resistance ohmic contact electrode provided on the bottom side of the substrate 3. In the present embodiment, the case where the polarity of the first electrode 5 is n-type and the polarity of the second electrode 6 is p-type will be described. However, the polarity of the first electrode 5 is p-type and the second electrode 6 is The polarity may be n-type.
 第1の電極5は、例えば、AuGe、AuSi等を用いて形成することができる。また、第1の電極5の表面材質には、ワイヤボンディングによる実装に対応する為に金を用いるのが一般的である。なお、発光部7に電流を均一に拡散させるため、発光部7に対して第1の電極5の形状や配置を工夫することが好ましい。第1の電極5の形状や配置については、特に制約はなく、公知の技術を適用することができる。 The first electrode 5 can be formed using, for example, AuGe, AuSi, or the like. Further, as the surface material of the first electrode 5, gold is generally used in order to cope with mounting by wire bonding. Note that it is preferable to devise the shape and arrangement of the first electrode 5 with respect to the light emitting unit 7 in order to uniformly diffuse the current to the light emitting unit 7. There is no restriction | limiting in particular about the shape and arrangement | positioning of the 1st electrode 5, A well-known technique is applicable.
 第2の電極6(第3の金属膜)としては、特に限定されるものではないが、外部光の波長帯において反射率が90%以上の材料を用いることができる。その中でも、可視光領域の全域において反射率が90%である銀、アルミニウム、又はこれらの合金を用いることが特に好ましい。一方、可視光領域の一部の波長帯において反射率が90%以上となる材料としては、例えば、金、銅を例示することができる。ここで、金は、約550nmより長い波長で反射率が高くなり、約590nmで反射率が90%を超える。また、銅は、約600nmより長い波長で反射率が高くなり、約610nmで反射率が90%を超える。このように、第2の電極6の材質は、外部光の波長帯に応じて適宜選択することができる。 The second electrode 6 (third metal film) is not particularly limited, but a material having a reflectance of 90% or more in the wavelength band of external light can be used. Among these, it is particularly preferable to use silver, aluminum, or an alloy thereof having a reflectance of 90% in the entire visible light region. On the other hand, examples of the material having a reflectance of 90% or more in a part of the wavelength band of the visible light region include gold and copper. Here, gold has a high reflectance at a wavelength longer than about 550 nm, and the reflectance exceeds 90% at about 590 nm. Copper has a high reflectance at a wavelength longer than about 600 nm, and the reflectance exceeds 90% at about 610 nm. Thus, the material of the second electrode 6 can be appropriately selected according to the wavelength band of the external light.
 また、第2の電極6は、単層構造であっても、上記金属からなる複数の金属膜からなる積層構造であってもよい。上記積層構造としては、具体的には、透明基板4側から銀、タングステン(W)、金の金属膜からなる3層構造を例示することができる。3層構造の第2の電極6によれば、第3の反射面6aに反射率の高い銀を配置することができる。そして、中間の層にタングステンを用いることにより、銀と金との相互拡散を防止することができると共に、表面側には化学的に安定な金を配置することができる。 Further, the second electrode 6 may have a single layer structure or a laminated structure composed of a plurality of metal films composed of the above metals. Specific examples of the laminated structure include a three-layer structure composed of silver, tungsten (W), and a gold metal film from the transparent substrate 4 side. According to the second electrode 6 having the three-layer structure, silver having high reflectance can be disposed on the third reflecting surface 6a. By using tungsten for the intermediate layer, mutual diffusion between silver and gold can be prevented, and chemically stable gold can be disposed on the surface side.
 本実施形態の発光ダイオード1には、半導体層と金属層との界面に光吸収の小さい透明導電膜12が設けられている。この透明導電膜12は、透明基板4が半導体基板である場合に、接続層3及び第2の電極6を構成する金属と透明基板4を構成する半導体基板との間の拡散・反応を防止することができる。これにより、後述する第1の反射面3a、第2の反射面3b及び第3の反射面6aの反射率の低下を抑制することができる。また、透明導電膜12としては、例えば、酸化インジウム錫(ITO)、酸化インジウム亜鉛(IZO)等を用いることが好ましい。 In the light-emitting diode 1 of the present embodiment, a transparent conductive film 12 having a small light absorption is provided at the interface between the semiconductor layer and the metal layer. The transparent conductive film 12 prevents diffusion / reaction between the metal constituting the connection layer 3 and the second electrode 6 and the semiconductor substrate constituting the transparent substrate 4 when the transparent substrate 4 is a semiconductor substrate. be able to. Thereby, the fall of the reflectance of the 1st reflective surface 3a mentioned later, the 2nd reflective surface 3b, and the 3rd reflective surface 6a can be suppressed. As the transparent conductive film 12, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or the like is preferably used.
 透明導電膜12は、透明基板4が半導体基板である場合に、接続層3及び第2の電極6を構成する金属と透明基板4を構成する半導体基板との界面で直接オーミック接触が形成されることが好ましい。具体的には、化合物半導体層2を構成するp型GaP層8と接続層3を構成する第1の金属膜3Aとの間に透明導電膜12Aが設けられており、化合物半導体層2と透明導電膜12Aとがオーミック接触している。また、接続層3を構成する第2の金属膜3Bと透明基板4との間に透明導電膜12Bが設けられており、透明導電膜12Bと透明基板4とがオーミック接触している。さらに、透明基板4と第2の電極6との間に透明導電膜12Cが設けられており、透明導電膜12Cと透明基板4とがオーミック接触している。 When the transparent substrate 4 is a semiconductor substrate, the transparent conductive film 12 is in direct ohmic contact at the interface between the metal constituting the connection layer 3 and the second electrode 6 and the semiconductor substrate constituting the transparent substrate 4. It is preferable. Specifically, a transparent conductive film 12A is provided between the p-type GaP layer 8 constituting the compound semiconductor layer 2 and the first metal film 3A constituting the connection layer 3, and the compound semiconductor layer 2 and the transparent layer 12 are transparent. The conductive film 12A is in ohmic contact. Further, a transparent conductive film 12B is provided between the second metal film 3B constituting the connection layer 3 and the transparent substrate 4, and the transparent conductive film 12B and the transparent substrate 4 are in ohmic contact. Further, a transparent conductive film 12C is provided between the transparent substrate 4 and the second electrode 6, and the transparent conductive film 12C and the transparent substrate 4 are in ohmic contact.
 本実施形態の発光ダイオード1は、高輝度化のために内部光を反射する反射面と、この発光ダイオード1が発光ダイオードランプ等のパッケージに用いられた場合に、そのパッケージの高輝度化のために外部光を反射する反射面とを併せ持つことを特徴としている。すなわち、化合物半導体層2を構成するp型GaP層8の底面と接続層3を構成する第1の金属膜3Aの上面との間には、内部光を反射するための第1の反射面3aが設けられている。また、接続層3を構成する第2の金属膜3Bの底面と透明基板4の上面との間には、外部光を反射するための第2の反射面3bが設けられている。さらに、透明基板4の底面と第2の電極6との間には、外部光を反射するための第3の反射面6aが設けられている。 The light-emitting diode 1 of the present embodiment has a reflective surface that reflects internal light for higher brightness, and when the light-emitting diode 1 is used in a package such as a light-emitting diode lamp, the brightness of the package is increased. And a reflective surface for reflecting external light. That is, between the bottom surface of the p-type GaP layer 8 constituting the compound semiconductor layer 2 and the top surface of the first metal film 3A constituting the connection layer 3, the first reflecting surface 3a for reflecting internal light. Is provided. Further, a second reflecting surface 3 b for reflecting external light is provided between the bottom surface of the second metal film 3 </ b> B constituting the connection layer 3 and the top surface of the transparent substrate 4. Further, a third reflecting surface 6 a for reflecting external light is provided between the bottom surface of the transparent substrate 4 and the second electrode 6.
 より具体的には、図1Bに示すように、p型GaP層8(透明導電膜12Aが設けられている場合は、透明導電膜12A)と第1の金属膜3Aとの界面である第1の金属膜3Aの上面が第1の反射面3aとされている。また、第2の金属膜3Bと透明基板4(透明導電膜12Bが設けられている場合は、透明導電膜12B)との界面である第2の金属膜3Bの底面が第2の反射面3bとされている。さらに、透明基板4(透明導電膜12Cが設けられている場合は、透明導電膜12C)と第2の電極6との界面である第2の電極6の上面が第3の反射面6aとされている。 More specifically, as shown in FIG. 1B, the first is an interface between the p-type GaP layer 8 (or the transparent conductive film 12A when the transparent conductive film 12A is provided) and the first metal film 3A. The upper surface of the metal film 3A is a first reflecting surface 3a. The bottom surface of the second metal film 3B, which is the interface between the second metal film 3B and the transparent substrate 4 (the transparent conductive film 12B when the transparent conductive film 12B is provided), is the second reflective surface 3b. It is said that. Further, the upper surface of the second electrode 6 that is an interface between the transparent substrate 4 (the transparent conductive film 12C when the transparent conductive film 12C is provided) and the second electrode 6 is defined as the third reflective surface 6a. ing.
 第1の反射面3aは、第1の金属膜3Aの材質が内部光の波長帯において反射率90%以上の材料を用いているため、内部光の波長帯において反射率90%以上とされている。また、第2の反射面3bは、第2の金属膜3Bの材質が外部光の波長帯において反射率90%以上の材料を用いているため、外部光の波長帯において反射率90%以上とされている。さらに、第3の反射面6aは、第2の電極6(第3の金属膜)の材質が外部光の波長帯において反射率90%以上の材料を用いているため、外部光の波長帯において反射率90%以上とされている。 The first reflective surface 3a is made of a material having a reflectance of 90% or more in the wavelength band of internal light because the material of the first metal film 3A is 90% or more in the wavelength band of internal light. Yes. Further, the second reflecting surface 3b is made of a material having a reflectance of 90% or more in the wavelength band of external light because the material of the second metal film 3B is 90% or more in the wavelength band of external light. Has been. Furthermore, since the third electrode 6 (third metal film) is made of a material having a reflectivity of 90% or more in the external light wavelength band, the third reflective surface 6a is in the external light wavelength band. The reflectance is 90% or more.
 本実施形態の発光ダイオード1によれば、図1Bに示すように、第1の反射面3aが設けられているため、主に発光部7(発光層10)から透明基板4側に放出された内部光を反射して効率よく外部に取り出すことができる。これにより、発光ダイオード1の高輝度化を達成することができる。 According to the light-emitting diode 1 of the present embodiment, as shown in FIG. 1B, since the first reflecting surface 3a is provided, the light is emitted mainly from the light-emitting portion 7 (light-emitting layer 10) to the transparent substrate 4 side. The internal light can be reflected and taken out efficiently. Thereby, high brightness of the light emitting diode 1 can be achieved.
 また、本実施形態の発光ダイオード1によれば、透明基板4の上面及び底面に、それぞれ第2の反射面3b及び第3の反射面6aが設けられている。このため、主に発光部7から発光された内部光以外の外部光が透明基板4の内部に入射された際に、その外部光を第2の反射面3bと第3の反射面6aとによって効率よく透明基板4の外部に取り出すことができる。これにより、本実施形態の発光ダイオード1が発光ダイオードランプ等のパッケージに用いられた場合に、そのパッケージの高輝度化を達成することができる。 Further, according to the light emitting diode 1 of the present embodiment, the second reflecting surface 3b and the third reflecting surface 6a are provided on the upper surface and the bottom surface of the transparent substrate 4, respectively. For this reason, when external light other than the internal light emitted mainly from the light emitting unit 7 is incident on the inside of the transparent substrate 4, the external light is transmitted by the second reflective surface 3b and the third reflective surface 6a. It can be taken out of the transparent substrate 4 efficiently. Thereby, when the light-emitting diode 1 of the present embodiment is used in a package such as a light-emitting diode lamp, the brightness of the package can be increased.
 接続層13は、図1Bに示すように、発光ダイオード1とp型端子24とを接続(ダイボンド)するために、第2の電極6の底面側に設けられている。接続層13の材質としては、公知の金属材料を利用することができる。具体的には、例えば、Agペーストを用いることができる。また、接続層13としては、電気抵抗が低く、低温で接続できる材質、すなわち低融点の金属を用いることができる。この低融点金属としては、In、Snメタルおよび公知の半田材料を適用することが可能であるが、化学的に安定で、融点の低いAu系の共晶金属材料を用いることが好ましい。このAu系の共晶金属材料としては、例えばAuSn、AuGe,AuSi等が挙げられる。また、低融点金属としてAu系の共晶金属材料を用いる場合には、低融点金属の前後にAu層を形成することが好ましい。このようにAu層形成することにより、溶融後に組成が変わることで融点が高くなり、実装工程での耐熱性を向上させることができる。 As shown in FIG. 1B, the connection layer 13 is provided on the bottom surface side of the second electrode 6 in order to connect (die bond) the light emitting diode 1 and the p-type terminal 24. As the material of the connection layer 13, a known metal material can be used. Specifically, for example, an Ag paste can be used. The connection layer 13 can be made of a material having a low electrical resistance and capable of being connected at a low temperature, that is, a metal having a low melting point. As the low melting point metal, In, Sn metal and a known solder material can be applied, but it is preferable to use an Au-based eutectic metal material which is chemically stable and has a low melting point. Examples of the Au-based eutectic metal material include AuSn, AuGe, and AuSi. When an Au-based eutectic metal material is used as the low melting point metal, it is preferable to form an Au layer before and after the low melting point metal. By forming the Au layer in this way, the melting point is increased by changing the composition after melting, and the heat resistance in the mounting process can be improved.
<発光ダイオードの製造方法>
 次に、本実施形態の発光ダイオード1の製造方法について説明する。本実施形態の発光ダイオード1の製造方法は、半導体基板上に発光層を有する発光部を含む化合物半導体層を形成する工程と、化合物半導体層の成長面に第1の金属膜を形成する工程と、透明基板の一方及び他方の表面に第2及び第3の金属膜を形成する工程と、第1及び第2の金属膜を接合して接続層を形成する工程と、半導体基板を除去する工程と、を備えている。
<Method for manufacturing light-emitting diode>
Next, the manufacturing method of the light emitting diode 1 of this embodiment is demonstrated. The method for manufacturing the light-emitting diode 1 of the present embodiment includes a step of forming a compound semiconductor layer including a light-emitting portion having a light-emitting layer on a semiconductor substrate, and a step of forming a first metal film on a growth surface of the compound semiconductor layer. A step of forming second and third metal films on one and other surfaces of the transparent substrate, a step of bonding the first and second metal films to form a connection layer, and a step of removing the semiconductor substrate And.
 先ず、図2に示すように、化合物半導体層2を作製する。化合物半導体層2は、例えばGaAs単結晶等からなる半導体基板15上に、Siをドープしたn型のGaAsからなる緩衝層16、エッチングストップ層(図示略)、Siをドープしたn型のAlGaInPからなるコンタクト層17、n型の上部クラッド層11、発光層10、p型の下部クラッド層9、Mgドープしたp型GaP層8を順次積層して作製する。ここで、緩衝層(buffer)16は、半導体基板15と発光部7の構成層との格子ミスマッチを緩和するために設けられている。また、エッチングストップ層は、選択エッチングに利用するために設けられている。 First, as shown in FIG. 2, a compound semiconductor layer 2 is produced. The compound semiconductor layer 2 is composed of, for example, a buffer layer 16 made of n-type GaAs doped with Si, an etching stop layer (not shown), and an n-type AlGaInP doped with Si on a semiconductor substrate 15 made of GaAs single crystal or the like. The contact layer 17, the n-type upper clad layer 11, the light emitting layer 10, the p-type lower clad layer 9, and the Mg-doped p-type GaP layer 8 are sequentially laminated. Here, the buffer layer 16 is provided to alleviate a lattice mismatch between the semiconductor substrate 15 and the constituent layers of the light emitting unit 7. The etching stop layer is provided for use in selective etching.
 具体的には、上記の化合物半導体層2を構成する各層は、例えば、トリメチルアルミニウム((CHAl)、トリメチルガリウム((CHGa)およびトリメチルインジウム((CHIn)をIII族構成元素の原料として用いた減圧有機金属化学気相堆積法(MOCVD法)によりGaAs基板15上にエピタキシャル成長させて積層することができる。Mgのドーピング原料としては、例えばビスシクロペンタジエニルマグネシウム(bis-(CMg)等を用いることができる。また、Siのドーピング原料としては、例えばジシラン(Si)等を用いることができる。また、V族構成元素の原料としては、ホスフィン(PH)またはアルシン(AsH)等を用いることができる。また、各層の成長温度としては、p型GaP層8には750℃を適用することができ、その他の各層では730℃を適用することができる。さらに、各層のキャリア濃度及び層厚は、適宜選択することができる。 Specifically, the layers constituting the compound semiconductor layer 2 are, for example, trimethylaluminum ((CH 3 ) 3 Al), trimethylgallium ((CH 3 ) 3 Ga), and trimethylindium ((CH 3 ) 3 In ) Can be epitaxially grown on the GaAs substrate 15 by a low pressure metalorganic chemical vapor deposition method (MOCVD method) using a group III constituent element as a raw material. As the Mg doping material, for example, biscyclopentadienyl magnesium (bis- (C 5 H 5 ) 2 Mg) or the like can be used. As a Si doping material, for example, disilane (Si 2 H 6 ) or the like can be used. Further, phosphine (PH 3 ), arsine (AsH 3 ), or the like can be used as a raw material for the group V constituent element. As the growth temperature of each layer, 750 ° C. can be applied to the p-type GaP layer 8, and 730 ° C. can be applied to the other layers. Furthermore, the carrier concentration and layer thickness of each layer can be selected as appropriate.
 次に、化合物半導体層2のエピタキシャル成長面を平坦化して平坦面を形成する。具体的には、p型GaP層8の表面から例えば約1μmの深さに至る領域を研磨し、表面粗さが0.1~10nm程度の鏡面に加工する。次に、形成した平坦面の上に、透明導電膜12Aとして、例えばITO膜を形成した後に約400~650℃の熱処理を施して、オーミックコンタクトを形成する。また、透明導電膜の代わりに、合金によるオーミックコンタクト電極を部分的に形成することもできるが、電極部の反射率が低いため、透明導電膜の構造より、光学特性が劣る。 Next, the epitaxial growth surface of the compound semiconductor layer 2 is flattened to form a flat surface. Specifically, a region extending from the surface of the p-type GaP layer 8 to a depth of, for example, about 1 μm is polished and processed into a mirror surface having a surface roughness of about 0.1 to 10 nm. Next, on the formed flat surface, for example, an ITO film is formed as the transparent conductive film 12A, and then heat treatment is performed at about 400 to 650 ° C. to form an ohmic contact. In addition, an ohmic contact electrode made of an alloy can be partially formed instead of the transparent conductive film, but the optical properties are inferior to the structure of the transparent conductive film because the electrode portion has a low reflectance.
 次に、透明基板4の一方及び他方の表面を平坦化して平坦面を形成する。次いで、この平坦面上に透明導電膜12B,12Cをそれぞれ形成した後に熱処理を施して、オーミックコンタクトを形成する。 Next, one and the other surfaces of the transparent substrate 4 are flattened to form a flat surface. Next, after forming the transparent conductive films 12B and 12C on the flat surface, heat treatment is performed to form ohmic contacts.
 次に、化合物半導体層2と透明基板4とを接合する。具体的には、化合物半導体層2上に形成された透明導電膜12A上に第1の金属膜3Aを形成し、透明基板4の一方の面上に形成された透明導電膜12B上に第2の金属膜3Bを形成する。次いで、これらの第1及び第2の金属膜3A,3Bを常温金属接合法(J.Vac.Sci.Technol.A 16(4),Jul/Aug 1998 P2125 Metal bonding during sputter film deposition T.Shimatsu et al.)により接合して接続層3を形成する。これにより、図3に示すように、化合物半導体層2と透明基板4とを接合することができる。 Next, the compound semiconductor layer 2 and the transparent substrate 4 are joined. Specifically, the first metal film 3A is formed on the transparent conductive film 12A formed on the compound semiconductor layer 2, and the second metal film is formed on the transparent conductive film 12B formed on one surface of the transparent substrate 4. The metal film 3B is formed. Then, these first and second metal films 3A and 3B are bonded to room temperature metal bonding method (J.Vac.Sci.Technol.A 16 (4), Jul / Aug 1998 P2125 Metal bonding during sputter film deposition T.Shimatsu et al.) to form the connection layer 3. Thereby, as shown in FIG. 3, the compound semiconductor layer 2 and the transparent substrate 4 can be joined.
 常温金属接合法による化合物半導体層2と透明基板4との接合は、先ず、化合物半導体層2及び透明基板4を接合装置内に搬入し、3×10-5Paまで装置内を真空に排気する。次いで、化合物半導体層2に形成された透明導電膜12A及び透明基板4に形成された透明導電膜12Bの各接合面に、第1及び第2の金属膜3A,3Bとして反射率98%の銀をスパッタ法等により約0.2μmの厚さで成膜し、そのまま常温接合する。この際、100℃未満、望ましくは50℃未満の接合温度で第1及び第2の金属膜3A,3Bを接合することが好ましい。 In the bonding of the compound semiconductor layer 2 and the transparent substrate 4 by the room temperature metal bonding method, first, the compound semiconductor layer 2 and the transparent substrate 4 are carried into the bonding apparatus, and the apparatus is evacuated to 3 × 10 −5 Pa. . Next, silver having a reflectivity of 98% is formed on each bonding surface of the transparent conductive film 12A formed on the compound semiconductor layer 2 and the transparent conductive film 12B formed on the transparent substrate 4 as the first and second metal films 3A and 3B. Is formed with a thickness of about 0.2 μm by sputtering or the like, and is bonded at room temperature as it is. At this time, the first and second metal films 3A and 3B are preferably bonded at a bonding temperature of less than 100 ° C., desirably less than 50 ° C.
 本実施形態の発光ダイオードの製造方法では、化合物半導体層2と透明基板4との接合技術として常温金属接合法を用いることが特に好ましい。第1及び第2の反射面3a,3bを構成する第1及び第2の金属膜3A,3Bを反射率の高いミラー材料を用いて常温金属接合することにより、簡単な工程で、加熱による応力、反射率の低下等の制約を受けることなく接合することができる。なお、常温金属接合は、上述したように、真空中で、金属をスパッタし、クリーンな表面を貼り合わせて接合する技術であるが、本発明では、化合物半導体に対する表面平坦化に成功し、更に、高反射率の銀、アルミニウム、金でも金属接合できる条件を見出した。 In the method of manufacturing a light emitting diode according to this embodiment, it is particularly preferable to use a room temperature metal bonding method as a bonding technique between the compound semiconductor layer 2 and the transparent substrate 4. Stress caused by heating in a simple process by joining the first and second metal films 3A, 3B constituting the first and second reflecting surfaces 3a, 3b at room temperature using a mirror material having high reflectivity. In addition, bonding can be performed without being restricted by a reduction in reflectance. Note that, as described above, room temperature metal bonding is a technique in which metal is sputtered in vacuum and bonded by bonding a clean surface, but in the present invention, the surface of the compound semiconductor has been successfully planarized. The present inventors have also found a condition that enables metal bonding even with high reflectance silver, aluminum, and gold.
 なお、化合物半導体層2と透明基板4との接続方法は、上述の接続層3を用いた常温金属接合方法に制限されるものではなく、拡散接合、接着剤、共晶金属接合など公知の技術を利用でき、接合方法の適合した構造を適宜選択することができる。 In addition, the connection method of the compound semiconductor layer 2 and the transparent substrate 4 is not limited to the room temperature metal bonding method using the connection layer 3 described above, and known techniques such as diffusion bonding, adhesive, eutectic metal bonding, and the like. And a structure suitable for the joining method can be selected as appropriate.
 次に、透明基板4と接合した化合物半導体層2から、GaAsからなる半導体基板15及び緩衝層16をアンモニア系エッチャントによって選択的に除去する。 Next, the semiconductor substrate 15 made of GaAs and the buffer layer 16 are selectively removed from the compound semiconductor layer 2 bonded to the transparent substrate 4 with an ammonia-based etchant.
 次に、第1の電極5を形成する。第1の電極5の形成は、露出したコンタクト層17の表面にn型オーミック電極を形成する。具体的には、例えば、AuGe、Ni合金/Pt/Auを任意の厚さとなるように真空蒸着法により積層した後、一般的なフォトリソグラフィー手段によってパターニングを行って、第1の電極5を任意の形状に形成する。 Next, the first electrode 5 is formed. The first electrode 5 is formed by forming an n-type ohmic electrode on the exposed surface of the contact layer 17. Specifically, for example, AuGe, Ni alloy / Pt / Au are laminated by a vacuum deposition method so as to have an arbitrary thickness, and then patterned by a general photolithography means to arbitrarily form the first electrode 5. The shape is formed.
 次に、第2の電極6を形成する。第2の電極6の形成は、透明基板4の他方の面に形成したオーミックコンタクトである透明導電膜12Cの上に、第3の金属膜を形成する。具体的には、例えば、第3の金属膜として銀をスパッタにより厚さ0.1μmで形成する。その後、タングステン(W)を0.1um、金を0.5umの厚さで成膜し、3層構造の第2の電極6を形成する。 Next, the second electrode 6 is formed. The second electrode 6 is formed by forming a third metal film on the transparent conductive film 12 </ b> C that is an ohmic contact formed on the other surface of the transparent substrate 4. Specifically, for example, silver is formed as the third metal film with a thickness of 0.1 μm by sputtering. Thereafter, tungsten (W) is formed to a thickness of 0.1 μm and gold is formed to a thickness of 0.5 μm to form a second electrode 6 having a three-layer structure.
 次に、発光ダイオード1をチップ形状に切断する。具体的には、先ず、チップに切断する前に、切断領域の発光部7をエッチングにより除去する。以上のようにして、本実施形態の発光ダイオード1を製造することができる。 Next, the light emitting diode 1 is cut into chips. Specifically, first, before cutting into chips, the light emitting portion 7 in the cut region is removed by etching. As described above, the light-emitting diode 1 of the present embodiment can be manufactured.
<発光ダイオードランプ>
 次に、本発明を適用した一実施形態である発光ダイオードランプの構成について説明する。図4A及び図4Bに示すように、本実施形態の発光ダイオードランプ(LEDランプ)21は、マウント基板22の表面に3つの発光ダイオード1,21,31が搭載されて概略構成されている。より具体的には、発光ダイオード1は、上述したようにGaAs基板を用いたAlGaInP発光層10を有する赤色発光のダイオードである。また、発光ダイオード21,31は、発光ダイオード1と同じ赤色発光のダイオードを用いてもよい。これにより、単色のLEDランプとすることができる。一方、発光ダイオード21,31に、サファイア基板を用いたGaInN発光層を有する青色及び緑色発光のダイオードを用いることにより、フルカラー用のLEDランプとすることができる。
<Light emitting diode lamp>
Next, a configuration of a light emitting diode lamp which is an embodiment to which the present invention is applied will be described. As shown in FIGS. 4A and 4B, the light-emitting diode lamp (LED lamp) 21 of this embodiment is schematically configured by mounting three light-emitting diodes 1, 21, 31 on the surface of a mount substrate 22. More specifically, the light emitting diode 1 is a red light emitting diode having the AlGaInP light emitting layer 10 using a GaAs substrate as described above. The light emitting diodes 21 and 31 may be the same red light emitting diode as the light emitting diode 1. Thereby, it can be set as a monochromatic LED lamp. On the other hand, by using blue and green light emitting diodes having a GaInN light emitting layer using a sapphire substrate as the light emitting diodes 21 and 31, a full color LED lamp can be obtained.
 また、マウント基板22の表面には、複数のn電極端子23及びp電極端子24が設けられており、発光ダイオード1は、マウント基板22のp電極端子24上に銀(Ag)ペースト(金属層)で固定、支持(ダイボンド)されており、第2の電極6とp電極端子24とが接続されている。そして、発光ダイオード1の第1の電極5とマウント基板22のn電極端子23とが金線25を用いて接続されている(ワイヤボンディング)。同様に、発光ダイオード21,31は、p電極端子24上に銀(Ag)ペーストで固定、支持(マウント)されており、図示略の第1及び第2の電極がn電極端子23及びp電極端子24にそれぞれ接続されている。そして、マウント基板22の表面であって、これらの発光ダイオード1,21,31の周囲を覆うように、反射壁26が設けられており、この反射壁26の内側の空間はエポキシ樹脂等の一般的な封止材27によって封止されている。このようにして、本実施形態の発光ダイオードランプ21は、3個の赤色の発光ダイオードが同一のパッケージ内に組み込まれた構成となっている。 A plurality of n-electrode terminals 23 and p-electrode terminals 24 are provided on the surface of the mount substrate 22, and the light-emitting diode 1 has a silver (Ag) paste (metal layer) on the p-electrode terminals 24 of the mount substrate 22. ) Are fixed and supported (die-bonded), and the second electrode 6 and the p-electrode terminal 24 are connected. The first electrode 5 of the light emitting diode 1 and the n electrode terminal 23 of the mount substrate 22 are connected using a gold wire 25 (wire bonding). Similarly, the light emitting diodes 21 and 31 are fixed and supported (mounted) by silver (Ag) paste on the p electrode terminal 24, and the first and second electrodes (not shown) are the n electrode terminal 23 and the p electrode. Each is connected to a terminal 24. A reflection wall 26 is provided on the surface of the mount substrate 22 so as to cover the periphery of the light-emitting diodes 1, 21 and 31, and the space inside the reflection wall 26 is generally made of epoxy resin or the like. The sealing material 27 is sealed. Thus, the light emitting diode lamp 21 of the present embodiment has a configuration in which three red light emitting diodes are incorporated in the same package.
 以上のような構成を有する発光ダイオードランプ21に対して、発光ダイオード1,21,31を同時に発光させた場合について説明する。
 図4A、図4Bに示すように、各発光ダイオード1,21,31の発光部からの上側への発光は、主たる光取り出し面からの発光である。したがって、発光ダイオードランプ21の外側へ直接取り出すことができる。また、各発光ダイオード1,21,31の発光部からの下側への発光は、発光ダイオードランプ21の外側へは直接取り出すことができない。ここで、発光ダイオード1,21,31は、化合物半導体層2の底面と接合層3の上面との間に第1の反射面3aが設けられている。このため、発光ダイオード1の内部光を第1の反射面3aが光取り出し面側へ反射するため、発光部7からの発光を発光ダイオードランプ21の外側へ効率よく取り出すことができる。したがって、高輝度な発光ダイオード1及び発光ダイオードランプ21を提供することができる。
The case where the light emitting diodes 1, 21 and 31 are caused to emit light simultaneously with respect to the light emitting diode lamp 21 having the above configuration will be described.
As shown in FIGS. 4A and 4B, the upward light emission from the light emitting portion of each of the light emitting diodes 1, 21 and 31 is light emission from the main light extraction surface. Therefore, it can be taken out directly to the outside of the light emitting diode lamp 21. Further, light emitted downward from the light emitting portion of each of the light emitting diodes 1, 21, 31 cannot be taken out directly to the outside of the light emitting diode lamp 21. Here, in the light emitting diodes 1, 21, and 31, the first reflecting surface 3 a is provided between the bottom surface of the compound semiconductor layer 2 and the top surface of the bonding layer 3. For this reason, since the 1st reflective surface 3a reflects the internal light of the light emitting diode 1 to the light extraction surface side, the light emission from the light emission part 7 can be efficiently taken out of the light emitting diode lamp 21 outside. Therefore, the high-intensity light-emitting diode 1 and light-emitting diode lamp 21 can be provided.
 また、各発光ダイオード1,21,31の発光部からの周方向への発光は、発光ダイオードランプ21の外側に直接取り出すことができない。ここで、発光ダイオードランプ21は、マウント基板22の表面に反射壁26が設けられている。このため、各発光ダイオードから周方向への発光は、この反射壁26によって上側へ反射することができる。したがって、発光ダイオードランプ21の光取り出し効率を向上することができる。 Further, the light emission in the circumferential direction from the light emitting portions of the respective light emitting diodes 1, 21, 31 cannot be taken out directly to the outside of the light emitting diode lamp 21. Here, the light emitting diode lamp 21 is provided with a reflection wall 26 on the surface of the mount substrate 22. For this reason, light emitted from each light emitting diode in the circumferential direction can be reflected upward by the reflecting wall 26. Therefore, the light extraction efficiency of the light emitting diode lamp 21 can be improved.
 ところで、従来の発光ダイオードでは、化合物半導体層と接続された不透明基板または透明基板の上面及び底面には反射面が設けられていなかった。このため、各発光ダイオードの発光部から周方向への発光は、マウント基板22に設けられた反射壁26で反射する光以外に、隣接する発光ダイオードの基板の側面に照射される場合に、この基板に吸収されてしまう場合があった。したがって、パッケージ全体の発光効率が低下してしまうという課題があった。 By the way, in the conventional light emitting diode, the reflective surface was not provided in the upper surface and bottom face of the opaque substrate or transparent substrate connected with the compound semiconductor layer. For this reason, light emitted from the light emitting portion of each light emitting diode in the circumferential direction is emitted when the side surface of the substrate of the adjacent light emitting diode is irradiated in addition to the light reflected by the reflecting wall 26 provided on the mount substrate 22. In some cases, the substrate was absorbed. Therefore, there is a problem that the luminous efficiency of the entire package is lowered.
 これに対して、本実施形態の発光ダイオードランプ21は、発光ダイオードが2以上搭載されており、透明基板4の上面及び底面に第2及び第3の反射面3b,6aが設けられた発光ダイオード1が少なくとも1以上搭載された構成を有している。このため、隣接する発光ダイオードからの周方向への発光が、発光ダイオード1の透明基板4の側面から照射された場合であっても、第2及び第3の反射面3b,6aによって反射されることになる。このように、透明基板4の上面及び底面に第2及び第3の反射面3b,6aが設けられた発光ダイオード1をパッケージ内に有しているため、パッケージ内においてLEDチップからの発光のロスを低減することができる。したがって、パッケージからの光取り出し効率を向上することが可能な高輝度の発光ダイオードランプ21を提供することができる。 In contrast, the light-emitting diode lamp 21 of the present embodiment has two or more light-emitting diodes mounted thereon, and the light-emitting diodes in which the second and third reflecting surfaces 3b and 6a are provided on the top and bottom surfaces of the transparent substrate 4. 1 has a configuration in which at least one is mounted. For this reason, even if the light emitted in the circumferential direction from the adjacent light emitting diode is irradiated from the side surface of the transparent substrate 4 of the light emitting diode 1, it is reflected by the second and third reflecting surfaces 3b and 6a. It will be. Thus, since the light emitting diode 1 having the second and third reflecting surfaces 3b and 6a provided on the upper surface and the bottom surface of the transparent substrate 4 is included in the package, the loss of light emission from the LED chip in the package. Can be reduced. Therefore, it is possible to provide the high-intensity light-emitting diode lamp 21 capable of improving the light extraction efficiency from the package.
 本実施形態の発光ダイオードランプ21では、搭載された発光ダイオードの発光波長が同じ構成を有しているが、搭載された発光ダイオードの発光波長が全て異なる場合であっても良い。また、本実施形態の発光ダイオードランプ21では、搭載された発光ダイオードのチップ高さが同じ構成を有しているが、搭載された発光ダイオードのチップ高さが全て異なる場合であっても良い。 In the light emitting diode lamp 21 of the present embodiment, the light emitting wavelengths of the mounted light emitting diodes have the same configuration, but the light emitting wavelengths of the mounted light emitting diodes may all be different. Moreover, in the light emitting diode lamp 21 of this embodiment, the chip | tip height of the mounted light emitting diode has the same structure, However, All the chip heights of the mounted light emitting diode may differ.
 以下、本発明の効果を、実施例を用いて具体的に説明する。なお、本発明はこれらの実施例に限定されるものではない。 Hereinafter, the effects of the present invention will be described in detail with reference to examples. The present invention is not limited to these examples.
 本発明に係る発光ダイオード及び発光ダイオードランプを作製した例を具体的に説明する。また、本実施例で作製した発光ダイオードは、AlGaInP発光部を有する赤色発光ダイオードである。 An example in which a light-emitting diode and a light-emitting diode lamp according to the present invention are manufactured will be specifically described. In addition, the light emitting diode manufactured in this example is a red light emitting diode having an AlGaInP light emitting portion.
(発光ダイオードの作製)
 実施例1及び比較例1の赤色の発光ダイオードは、先ず、Siをドープしたn型の(100)面から15°傾けた面を有するGaAs単結晶からなる半導体基板上に順次、積層した半導体層を備えたエピタキシャルウェーハを使用して作製した。積層した半導体層とは、Siをドープしたn型のGaAsからなる緩衝層、Siをドープしたn型の(Al0.5Ga0.50.5In0.5Pからなる層(コンタクト層となる)、Siをドープしたn型の(Al0.7Ga0.30.5In0.5Pからなる上部クラッド層、アンドープの(Al0.2Ga0.80.5In0.5P/Al0.7Ga0.30.5In0.5Pの20対からなる発光層、およびMgをドープしたp型の(Al0.7Ga0.30.5In0.5Pからなる下部クラッド層および薄膜(Al0.5Ga0.50.5In0.5Pからなる中間層、Mgドープしたp型GaP層である。
(Production of light emitting diode)
The red light-emitting diodes of Example 1 and Comparative Example 1 are semiconductor layers sequentially stacked on a semiconductor substrate made of GaAs single crystal having a surface inclined by 15 ° from an n-type (100) surface doped with Si. It produced using the epitaxial wafer provided with. The laminated semiconductor layer includes a buffer layer made of n-type GaAs doped with Si, a layer made of n-type (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P doped with Si (contact An upper cladding layer made of n-type (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P doped with Si, undoped (Al 0.2 Ga 0.8 ) 0. 5 In 0.5 P / Al 0.7 Ga 0.3 ) Light-emitting layer composed of 20 pairs of 0.5 In 0.5 P, and Mg-doped p-type (Al 0.7 Ga 0.3 ) A lower clad layer made of 0.5 In 0.5 P, a thin film (Al 0.5 Ga 0.5 ), an intermediate layer made of 0.5 In 0.5 P, and a Mg-doped p-type GaP layer.
 上記の半導体層の各層は、トリメチルアルミニウム((CHAl)、トリメチルガリウム((CHGa)およびトリメチルインジウム((CHIn)をIII族構成元素の原料に用いた減圧有機金属化学気相堆積法(MOCVD法)によりGaAs基板上に積層して、エピタキシャルウェーハを形成した。Mgのドーピング原料にはビスシクロペンタジエニルマグネシウム(bis-(CMg)を使用した。Siのドーピング原料にはジシラン(Si)を使用した。また、V族構成元素の原料としては、ホスフィン(PH)またはアルシン(AsH)を用いた。GaP層は750℃で成長させ、その他の半導体層は730℃で成長させた。 Each of the semiconductor layers described above used trimethylaluminum ((CH 3 ) 3 Al), trimethylgallium ((CH 3 ) 3 Ga), and trimethylindium ((CH 3 ) 3 In) as a group III constituent element material. An epitaxial wafer was formed by stacking on a GaAs substrate by a low pressure metalorganic chemical vapor deposition method (MOCVD method). Biscyclopentadienyl magnesium (bis- (C 5 H 5 ) 2 Mg) was used as a Mg doping material. Disilane (Si 2 H 6 ) was used as a Si doping material. Further, phosphine (PH 3 ) or arsine (AsH 3 ) was used as a group V constituent element material. The GaP layer was grown at 750 ° C., and the other semiconductor layers were grown at 730 ° C.
 GaAs緩衝層のキャリア濃度は約2×1018cm-3、また、層厚は約0.2μmとした。(Al0.5Ga0.50.5In0.5Pからなる層は、キャリア濃度は約2×1018cm-3、層厚は、約1.5μmとした。上部クラッド層のキャリア濃度は約8×1017cm-3、また、層厚は約1μmとした。発光層は、アンドープの0.8μmとした。下部クラッド層のキャリア濃度は約2×1017cm-3とし、また、層厚は1μmとした。p型GaP層のキャリア濃度は約3×1018cm-3とし、層厚は3μmとした。 The carrier concentration of the GaAs buffer layer was about 2 × 10 18 cm −3 and the layer thickness was about 0.2 μm. The layer made of (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P had a carrier concentration of about 2 × 10 18 cm −3 and a layer thickness of about 1.5 μm. The carrier concentration of the upper cladding layer was about 8 × 10 17 cm −3 and the layer thickness was about 1 μm. The light emitting layer was undoped 0.8 μm. The carrier concentration of the lower cladding layer was about 2 × 10 17 cm −3 and the layer thickness was 1 μm. The carrier concentration of the p-type GaP layer was about 3 × 10 18 cm −3 and the layer thickness was 3 μm.
 次に、p型GaP層の表面から1μmの深さに至る領域を研磨し、鏡面加工した。研磨後の表面の粗さは、0.18nmであった。次に、p型GaP層の鏡面研磨した表面に、ITO膜を形成した後に550℃で熱処理を施して、オーミックコンタクト形成した。 Next, a region from the surface of the p-type GaP layer to a depth of 1 μm was polished and mirror-finished. The surface roughness after polishing was 0.18 nm. Next, an ITO film was formed on the mirror-polished surface of the p-type GaP layer, and then heat treatment was performed at 550 ° C. to form an ohmic contact.
 次に、貼付用の透明基板としては、熱膨張係数が発光部と同等の単結晶p型GaPを用いた。この透明基板の表面及び裏面にITO膜を形成した後に熱処理を施して、オーミックコンタクト形成した。 Next, as the transparent substrate for pasting, single crystal p-type GaP having a thermal expansion coefficient equivalent to that of the light emitting part was used. After forming an ITO film on the front and back surfaces of this transparent substrate, heat treatment was performed to form ohmic contacts.
 次に、エピタキシャルウェーハと透明基板とを接合装置内に搬入し、3×10-5Paまで装置内を真空に排気した。その後、エピタキシャルウェーハと透明基板の各接合面に、スパッタ法で反射率98%の銀を0.2μm成膜して、そのまま常温接合を行った。 Next, the epitaxial wafer and the transparent substrate were carried into the bonding apparatus, and the inside of the apparatus was evacuated to 3 × 10 −5 Pa. Then, 0.2 μm of silver having a reflectance of 98% was formed by sputtering on each bonding surface of the epitaxial wafer and the transparent substrate, and room temperature bonding was performed as it was.
 次に、エピタキシャル積層用のGaAs半導体基板及び緩衝層をアンモニア系エッチャントにより選択的に除去した。 Next, the GaAs semiconductor substrate for epitaxial lamination and the buffer layer were selectively removed with an ammonia-based etchant.
 次に、第1の電極として、コンタクト層の表面に、AuGe(Ge質量比12%)合金を厚さが0.15μm、Ni合金を厚さが0.05μm、Auを1μmとなるように真空蒸着法によりn形オーミック電極を形成した。その後、一般的なフォトリソグラフィー手段を利用してパターニングを施し、450℃で3分間熱処理を行って合金化してn型オーミック電極の形状を形成した。 Next, as a first electrode, a vacuum is applied to the surface of the contact layer so that the AuGe (Ge mass ratio 12%) alloy has a thickness of 0.15 μm, the Ni alloy has a thickness of 0.05 μm, and Au has a thickness of 1 μm. An n-type ohmic electrode was formed by vapor deposition. After that, patterning was performed using a general photolithography means, and heat treatment was performed at 450 ° C. for 3 minutes to form an n-type ohmic electrode.
 次に、第2の電極として、透明基板の裏面のITO膜の上に、銀を0.2μm、タングステン膜を0.1μm、Auを0.5μm、AuSnを1μmとなるように蒸着により形成して、第2の電極とダイボンド用の接続層を形成した。 Next, the second electrode is formed on the ITO film on the back surface of the transparent substrate by vapor deposition so that the silver is 0.2 μm, the tungsten film is 0.1 μm, Au is 0.5 μm, and AuSn is 1 μm. Thus, a second electrode and a die bonding connection layer were formed.
 次に、チップに切断する前に、切断領域の発光部をエッチングで除去した。その後、基板をダイシングソーで、0.3mmピッチで切断をした。実施例1に用いる赤色の発光ダイオードチップ(以下、LEDチップと記す)を作製した。なお、Ag反射膜は、可視光(青、緑、赤)に対し、95%以上の反射率であった。 Next, before cutting into chips, the light emitting part in the cut area was removed by etching. Thereafter, the substrate was cut with a dicing saw at a pitch of 0.3 mm. A red light emitting diode chip (hereinafter referred to as an LED chip) used in Example 1 was produced. The Ag reflective film had a reflectivity of 95% or more with respect to visible light (blue, green, red).
 これに対して、比較例1に用いる赤色のLEDチップには、透明基板に代えてシリコン(Si)基板を用いた。 In contrast, for the red LED chip used in Comparative Example 1, a silicon (Si) substrate was used instead of the transparent substrate.
(発光ダイオードランプの作製)
 上記の様にして作製した実施例1及び比較例1に用いる赤色のLEDチップを用いて、図4Aに示すような3個の赤色LEDチップを搭載する高出力用のLEDランプ(発光ダイオードランプ)の組み立てをそれぞれ行った(実施例1及び比較例1のLEDランプ)。
(Production of light-emitting diode lamp)
Using the red LED chips used in Example 1 and Comparative Example 1 manufactured as described above, a high output LED lamp (light emitting diode lamp) on which three red LED chips as shown in FIG. 4A are mounted. Were respectively assembled (LED lamps of Example 1 and Comparative Example 1).
(発光特性の評価結果)
 実施例1及び比較例1のLEDランプにおいて、LEDを3個同時に発光させて、発光特性の評価を行った。表1に発光特性の評価結果を示す。
(Evaluation results of light emission characteristics)
In the LED lamps of Example 1 and Comparative Example 1, three LEDs were caused to emit light simultaneously, and the light emission characteristics were evaluated. Table 1 shows the evaluation results of the light emission characteristics.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 表1に示すように、透明基板であるGaP基板の代わりに、不透明基板であるSi基板を用いて作製したLEDチップを搭載した比較例1のLEDランプでは、ドミナント波長が625nm、発光効率が65lm/Wであった。
 これに対して、実施例1のLEDランプでは、ドミナント波長625nm、発光効率が70lm/Wであり、高い発光効率が得られることを確認した。
As shown in Table 1, in the LED lamp of Comparative Example 1 in which the LED chip manufactured using the Si substrate that is an opaque substrate is used instead of the GaP substrate that is a transparent substrate, the dominant wavelength is 625 nm and the luminous efficiency is 65 lm. / W.
On the other hand, in the LED lamp of Example 1, the dominant wavelength was 625 nm and the luminous efficiency was 70 lm / W, and it was confirmed that high luminous efficiency was obtained.
 本発明の発光ダイオードは、パッケージ内の光吸収を減らし、従来にない高輝度で、高効率の発光ダイオードであり、各種の表示ランプ、照明器具等に利用することができる。 The light emitting diode of the present invention is a light emitting diode with high brightness and high efficiency that reduces light absorption in the package, and can be used for various display lamps, lighting fixtures, and the like.
 1,21,32・・・発光ダイオード
 2・・・化合物半導体層
 3・・・接続層
 3A・・・第1の金属膜
 3B・・・第2の金属膜
 3a・・・第1の反射面
 3b・・・第2の反射面
 4・・・透明基板
 5・・・第1の電極
 6・・・第2の電極(第3の金属膜)
 6a・・・第3の反射面
 7・・・発光部
 8・・・p型GaP層
 9・・・下部クラッド層
 10・・・発光層
 11・・・上部クラッド層
 12,12A,12B,12C・・・透明導電膜
 13・・・接続層
 15・・・半導体基板
 16・・・緩衝層
 17・・・コンタクト層
 21・・・発光ダイオードランプ
 22・・・マウント基板
 23・・・n電極端子
 24・・・p電極端子
 25・・・金線
 26・・・反射壁
 27・・・封止材
1, 2, 32 ... Light-emitting diodes 2 ... Compound semiconductor layer 3 ... Connection layer 3A ... First metal film 3B ... Second metal film 3a ... First reflecting surface 3b ... 2nd reflective surface 4 ... Transparent substrate 5 ... 1st electrode 6 ... 2nd electrode (3rd metal film)
6a ... 3rd reflective surface 7 ... Light emission part 8 ... p-type GaP layer 9 ... Lower clad layer 10 ... Light emitting layer 11 ... Upper clad layer 12, 12A, 12B, 12C ... Transparent conductive film 13 ... Connection layer 15 ... Semiconductor substrate 16 ... Buffer layer 17 ... Contact layer 21 ... Light emitting diode lamp 22 ... Mount substrate 23 ... n electrode terminal 24 ... P electrode terminal 25 ... Gold wire 26 ... Reflection wall 27 ... Sealing material

Claims (21)

  1.  発光層を有する発光部を少なくとも含む化合物半導体層と、接続層と、透明基板と、を備え、
     前記化合物半導体層と前記透明基板とが、前記接続層を介して接合されており、
     前記化合物半導体層の底面と前記接続層の上面との間には、第1の反射面が設けられ、
     前記接続層の底面と前記透明基板の上面との間には、第2の反射面が設けられていることを特徴とする発光ダイオード。
    A compound semiconductor layer including at least a light emitting portion having a light emitting layer, a connection layer, and a transparent substrate;
    The compound semiconductor layer and the transparent substrate are bonded via the connection layer,
    A first reflective surface is provided between the bottom surface of the compound semiconductor layer and the top surface of the connection layer,
    A light emitting diode, wherein a second reflective surface is provided between the bottom surface of the connection layer and the top surface of the transparent substrate.
  2.  前記透明基板の底面には、第3の反射面が設けられていることを特徴とする請求項1に記載の発光ダイオード。 The light emitting diode according to claim 1, wherein a third reflecting surface is provided on a bottom surface of the transparent substrate.
  3.  前記第1の反射面が、発光部からの発光の波長帯において反射率90%以上であり、
     前記第2及び第3の反射面が、外部光の波長帯において反射率90%以上であることを特徴とする請求項1又は2に記載の発光ダイオード。
    The first reflective surface has a reflectance of 90% or more in the wavelength band of light emitted from the light emitting unit,
    The light emitting diode according to claim 1 or 2, wherein the second and third reflecting surfaces have a reflectance of 90% or more in a wavelength band of external light.
  4.  前記化合物半導体層の上面側に第1の電極が設けられ、
     前記透明基板の底面側に第2の電極が設けられており、
     前記透明基板の底面と前記第2の電極との間に、前記第3の反射面が設けられていることを特徴とする請求項1又は2に記載の発光ダイオード。
    A first electrode is provided on the upper surface side of the compound semiconductor layer;
    A second electrode is provided on the bottom side of the transparent substrate;
    The light emitting diode according to claim 1, wherein the third reflecting surface is provided between a bottom surface of the transparent substrate and the second electrode.
  5.  前記接続層が、銀、金、銅、アルミニウムの少なくとも1つを含む金属から構成されていることを特徴とする請求項1又は2に記載の発光ダイオード。 3. The light emitting diode according to claim 1, wherein the connection layer is made of a metal including at least one of silver, gold, copper, and aluminum.
  6.  前記第2の電極が、銀、金、銅、アルミニウムの少なくとも1つを含む金属から構成されていることを特徴とする請求項4に記載の発光ダイオード。 The light emitting diode according to claim 4, wherein the second electrode is made of a metal including at least one of silver, gold, copper, and aluminum.
  7.  前記透明基板が、半導体であることを特徴とする請求項1又は2に記載の発光ダイオード。 3. The light emitting diode according to claim 1, wherein the transparent substrate is a semiconductor.
  8.  前記透明基板が、GaP又はSiCであることを特徴とする請求項7に記載の発光ダイオード。 The light-emitting diode according to claim 7, wherein the transparent substrate is GaP or SiC.
  9.  前記発光層が、AlGaInP又はAlGaAs層を含むことを特徴とする請求項1又は2に記載の発光ダイオード。 The light emitting diode according to claim 1 or 2, wherein the light emitting layer includes an AlGaInP or AlGaAs layer.
  10.  前記化合物半導体層と前記接続層との間に透明導電膜が設けられており、
     前記化合物半導体層と前記透明導電膜とがオーミック接触していることを特徴とする請求項1又は2に記載の発光ダイオード。
    A transparent conductive film is provided between the compound semiconductor layer and the connection layer,
    The light emitting diode according to claim 1, wherein the compound semiconductor layer and the transparent conductive film are in ohmic contact.
  11.  前記接続層と前記透明基板との間に透明導電膜が設けられており、
     前記透明導電膜と前記透明基板とがオーミック接触していることを特徴とする請求項1又は2に記載の発光ダイオード。
    A transparent conductive film is provided between the connection layer and the transparent substrate,
    The light emitting diode according to claim 1, wherein the transparent conductive film and the transparent substrate are in ohmic contact.
  12.  前記透明基板と前記第2の電極との間に透明導電膜が設けられており、
     前記透明導電膜と前記透明基板とがオーミック接触していることを特徴とする請求項4に記載の発光ダイオード。
    A transparent conductive film is provided between the transparent substrate and the second electrode;
    The light emitting diode according to claim 4, wherein the transparent conductive film and the transparent substrate are in ohmic contact.
  13.  前記透明導電膜が、酸化インジウム錫又は酸化インジウム亜鉛であることを特徴とする請求項10に記載の発光ダイオード。 The light-emitting diode according to claim 10, wherein the transparent conductive film is indium tin oxide or indium zinc oxide.
  14.  前記透明導電膜が、酸化インジウム錫又は酸化インジウム亜鉛であることを特徴とする請求項12に記載の発光ダイオード。 13. The light emitting diode according to claim 12, wherein the transparent conductive film is indium tin oxide or indium zinc oxide.
  15.  前記透明基板の厚さが、50μm以上350μm以下であることを特徴とする請求項1又は2に記載の発光ダイオード。 3. The light-emitting diode according to claim 1, wherein the transparent substrate has a thickness of 50 μm or more and 350 μm or less.
  16.  半導体基板上に発光層を有する発光部を含む化合物半導体層を形成する工程と、
     前記化合物半導体層の成長面に第1の金属膜を形成する工程と、
     透明基板の一方の表面に第2の金属膜を形成する工程と、
     前記第1及び第2の金属膜を接合して接続層を形成する工程と、
     前記半導体基板を除去する工程と、を備えることを特徴とする発光ダイオードの製造方法。
    Forming a compound semiconductor layer including a light emitting portion having a light emitting layer on a semiconductor substrate;
    Forming a first metal film on a growth surface of the compound semiconductor layer;
    Forming a second metal film on one surface of the transparent substrate;
    Bonding the first and second metal films to form a connection layer;
    And a step of removing the semiconductor substrate.
  17.  前記透明基板の一方の表面に第2の金属膜を形成すると同時に、前記透明基板の他方の表面に第3の金属膜を形成することを特徴とする請求項16に記載の発光ダイオードの製造方法。 17. The method of manufacturing a light emitting diode according to claim 16, wherein a second metal film is formed on one surface of the transparent substrate and a third metal film is formed on the other surface of the transparent substrate. .
  18.  前記化合物半導体層の成長面に第1の金属膜を形成する工程が、前記化合物半導体層の成長面を平坦化して平坦面を形成し、前記平坦面上に透明導電膜を形成した後に熱処理をし、熱処理をした後の前記透明導電膜上に第1の金属膜を形成する工程であり、
     透明基板の一方及び他方の表面に第2及び第3の金属膜を形成する工程が、前記透明基板の一方及び他方の表面を平坦化して平坦面を形成し、前記平坦面上に透明導電膜をそれぞれ形成した後に熱処理をし、熱処理をした後の前記透明導電膜上に第2及び第3の金属膜をそれぞれ形成する工程であることを特徴とする請求項17に記載の発光ダイオードの製造方法。
    The step of forming the first metal film on the growth surface of the compound semiconductor layer includes planarizing the growth surface of the compound semiconductor layer to form a flat surface, and forming a transparent conductive film on the flat surface, and then performing a heat treatment. And forming a first metal film on the transparent conductive film after the heat treatment,
    The step of forming the second and third metal films on one and other surfaces of the transparent substrate planarizes one and the other surfaces of the transparent substrate to form a flat surface, and the transparent conductive film is formed on the flat surface. 18. The light emitting diode manufacturing method according to claim 17, wherein a heat treatment is performed after each of the first and second metal films is formed, and a second metal film and a third metal film are formed on the transparent conductive film after the heat treatment. Method.
  19.  前記第1及び第2の金属膜が、銀、金、銅、アルミニウムの少なくとも1つを含む金属から構成されており、
     前記第1及び第2の金属膜を接合して接続層を形成する工程が、50℃未満の接合温度で前記第1及び第2の金属膜を接合する常温金属接合工程であることを特徴とする請求項16乃至18のいずれか一項に記載の発光ダイオードの製造方法。
    The first and second metal films are made of a metal containing at least one of silver, gold, copper, and aluminum;
    The step of bonding the first and second metal films to form a connection layer is a room temperature metal bonding step of bonding the first and second metal films at a bonding temperature of less than 50 ° C. The method for manufacturing a light emitting diode according to any one of claims 16 to 18.
  20.  発光ダイオードが2以上搭載されている発光ダイオードランプであって、
     請求項1又は2に記載の発光ダイオードが少なくとも1以上搭載されていることを特徴とする発光ダイオードランプ。
    A light emitting diode lamp having two or more light emitting diodes mounted thereon,
    3. A light-emitting diode lamp comprising at least one light-emitting diode according to claim 1 mounted thereon.
  21.  搭載された発光ダイオードが金属層によりダイボンドされていることを特徴とする請求項20に記載の発光ダイオードランプ。 21. The light emitting diode lamp according to claim 20, wherein the mounted light emitting diode is die-bonded by a metal layer.
PCT/JP2010/002983 2009-05-01 2010-04-26 Light emitting diode and method for producing the same, and light emitting diode lamp WO2010125792A1 (en)

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