WO2010098259A1 - Magnetic encoder - Google Patents

Magnetic encoder Download PDF

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Publication number
WO2010098259A1
WO2010098259A1 PCT/JP2010/052532 JP2010052532W WO2010098259A1 WO 2010098259 A1 WO2010098259 A1 WO 2010098259A1 JP 2010052532 W JP2010052532 W JP 2010052532W WO 2010098259 A1 WO2010098259 A1 WO 2010098259A1
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Prior art keywords
magnetic
output
comparator
circuit
magnetic detection
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PCT/JP2010/052532
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French (fr)
Japanese (ja)
Inventor
眞喜人 瀧川
幸光 山田
賢 川畑
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アルプス電気株式会社
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Publication of WO2010098259A1 publication Critical patent/WO2010098259A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/244Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains
    • G01D5/245Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains using a variable number of pulses in a train
    • G01D5/2451Incremental encoders
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • G01D5/142Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage using Hall-effect devices
    • G01D5/145Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage using Hall-effect devices influenced by the relative movement between the Hall device and magnetic fields

Definitions

  • the present invention relates to a signal processing circuit for a magnetic encoder.
  • FIG. 6 is a signal processing circuit diagram and an output waveform diagram of a high resolution magnetic encoder using a magnetic sensor formed by combining a plurality of magnetic detection elements, which the present inventors considered.
  • the configuration in FIG. 6 may be referred to as “conventional configuration” or “conventional circuit configuration”.
  • a plurality of magnetic detection elements R1 to R6 are connected in series, and an output voltage from a midpoint that divides the plurality of magnetic detection elements R1 to R6 into the same number is input to the differential amplifier 1.
  • an absolute value circuit (ABS circuit) 2 is connected to the output side of the differential amplifier 1, and a comparator 3 is connected between the output side of the absolute value circuit 2 and the output terminal 4. .
  • FIG. 6 shows output voltages from the plurality of magnetic detection elements R1 to R6.
  • the output voltage is amplified by the differential amplifier 1 as shown in FIG.
  • the absolute value circuit 2 has a configuration in which an adder circuit is connected to the subsequent stage of the ideal diode circuit.
  • the low output voltage lower than the reference voltage is inverted to the high output side with the reference voltage as the axis of symmetry (higher than the reference voltage depending on the direction of the diode).
  • the high output voltage can be inverted), and the adder circuit 8 in the subsequent stage adds the inverted output voltage and the non-inverted output voltage that is originally higher than the reference voltage (absolute value shown in FIG. 6). (Refer waveform (c) from circuit 2).
  • the comparator 3 compares a predetermined threshold voltage with the output voltage input from the absolute value circuit 2, and outputs a signal when an output voltage equal to or higher than the threshold voltage is input, as shown in FIG. A pulse signal (digital value) is obtained.
  • the absolute value circuit 2 is not a simple diode circuit, but uses two operational amplifiers 5 and 6.
  • the operational amplifier is composed of a number of transistors as shown in FIG.
  • Patent Document 1 discloses a circuit configuration in which the output voltage from the MRE bridge circuit 2 is input to the differential amplifier 5 and the amplified output voltage is input to the binarization circuit 4. Further, an output correction circuit 3 is provided, and this output correction circuit 3 is provided with an upper limit value setting comparator 6a, a lower limit value setting comparator 6b, an OR circuit 7, and the like.
  • the output correction circuit 3 is for correcting the output of the magnetic detection sensor to operate the binarization circuit 4 stably.
  • the present invention is to solve the problem in the circuit configuration of FIG. 6 described above, and in particular, provides a magnetic encoder including a signal processing circuit having a smaller number of elements than a circuit configuration including an absolute value circuit. For the purpose.
  • the present invention includes a magnetic field generating member having a magnetized surface in which N and S poles are alternately magnetized in the relative movement direction, and a position away from the magnetized surface of the magnetic field generating member.
  • a magnetic encoder including a magnetic sensor having an integrated circuit and a magnetic detection element whose electrical characteristics change, A plurality of the magnetic detection elements are provided in the magnetic sensor, and the plurality of magnetic detection elements constitute a series circuit having an output portion at a midpoint, and are used for relative movement of the magnetic field generating member with respect to the magnetic sensor.
  • a first comparator having a first threshold voltage between the high output voltage and the intermediate voltage, connected to the integrated circuit in a bifurcated manner from the output part side of the series circuit, and the low output voltage
  • a second comparator having a second threshold voltage between the intermediate voltage and the first comparator and the output side of the second comparator and an external output terminal, and obtained from the first comparator.
  • an OR circuit for combining the pulse signal obtained from the second comparator and the pulse signal obtained from the second comparator.
  • an OR circuit is used.
  • the OR circuit can be composed of several transistors, or can be composed of a so-called wired OR that does not use transistors. Therefore, the ASIC design can be facilitated as compared with the circuit configuration using the absolute value circuit, and the signal processing circuit can be downsized and the manufacturing cost can be reduced.
  • the high output voltage and the low output voltage are output a plurality of times through the intermediate voltage, so that a large number of pulse signals can be obtained. Therefore, a high-resolution magnetic encoder can be configured.
  • the output voltage is not stepped up or down to a plurality of levels, but a plurality of high output voltages or low output voltages can be obtained via an intermediate voltage, making it easy to set the threshold voltage of the comparator. .
  • the plurality of magnetic detection elements are connected in series to one side with respect to the midpoint of the series circuit and in series with the other side with respect to the midpoint.
  • the number of second magnetic detection elements is the same as the number of the first magnetic detection elements connected, and the first magnetic detection element and the second magnetic detection element are in the relative movement direction of the magnetic field generating member.
  • the magnetic detection elements are arranged in a range of one pole of N or S poles in the relative movement direction of the magnetic field generating member.
  • an amplifier circuit is provided between the output unit of the series circuit and the first comparator and the second comparator. As a result, the threshold voltage of the comparator can be set more easily.
  • the magnetic sensing element is preferably a GMR element (giant magnetoresistive element).
  • the GMR element has a large resistance change rate and detects the direction, not the magnitude of the magnetic field, so that the output voltage can be increased and the detection accuracy can be improved effectively.
  • operational amplifiers can be reduced as compared with a circuit configuration having an absolute value circuit.
  • an OR circuit is used.
  • the OR circuit can be composed of several transistors, or can be composed of a so-called wired OR that does not use transistors. Therefore, the ASIC design can be facilitated as compared with the circuit configuration using the absolute value circuit, and the signal processing circuit can be downsized and the manufacturing cost can be reduced.
  • the top view of the magnetic encoder of this embodiment Sectional drawing of the magnetic encoder shown in FIG. FIG. 1 is a configuration diagram of a magnetic sensor (magnetic detection element) in the magnetic encoder shown in FIG. 1 and a schematic diagram showing a relationship with a magnet;
  • the circuit block diagram of the magnetic sensor in this embodiment A more specific circuit configuration diagram of an integrated circuit provided in the magnetic sensor in the present embodiment, A circuit configuration diagram of a magnetic sensor having an absolute value circuit, A circuit configuration diagram of an absolute value circuit (ABS circuit), Operational amplifier circuit configuration diagram,
  • FIG. 1 is a plan view of the magnetic encoder of the present embodiment
  • FIG. 2 is a cross-sectional view of the magnetic encoder shown in FIG. 1
  • FIG. 3 is a configuration diagram of a magnetic sensor (magnetic detection element) in the magnetic encoder shown in FIG. 4 is a schematic diagram showing a relationship with a magnet
  • FIG. 4 is a circuit configuration diagram of a magnetic sensor in the present embodiment
  • FIG. 5 is a more specific circuit configuration diagram of an integrated circuit provided in the magnetic sensor in the present embodiment.
  • the magnet 11 has a ring shape as shown in FIG. 1, but in FIG. 3, the positional relationship between the magnet 11 and the magnetic detection element constituting the magnetic sensor by expanding the magnetized surface of the magnet 11 on a plane. Is shown.
  • the magnetic encoder 10 in this embodiment is a device that detects a rotation angle, a rotation direction, a rotation speed, or the like.
  • the magnetic encoder 10 includes a magnet 11 that is a magnetic field generating member, a rotating body 12 that rotatably supports the magnet 11, a housing 9 that rotatably supports the rotating body 12, a magnetic sensor 20 that includes a magnetic detection element and an integrated circuit. It is comprised.
  • the magnet 11 has a ring shape, and the outer peripheral surface of the rotating body 12 is fixed to the inner surface side thereof.
  • a plurality of magnetic poles composed of N poles and S poles are alternately magnetized on the outer peripheral surface 11A of the magnet 11 at equal intervals (equal angular intervals).
  • the magnet 11 and the rotating body 12 are arranged in a circular recess 9A provided in the housing 9. As shown in FIG. 2, a through hole 9 a is formed at the center of the housing 9. A rotating shaft 12a provided at the center of the rotating body 12 is inserted through the through hole 9a.
  • the magnet 11 is supported so as to be rotatable in the counterclockwise direction ra1 and the clockwise direction ra2 in the recess 9A with the rotation axis 12a of the rotating body 12 as an axis center. That is, in this embodiment, the magnet 11 moves relative to the magnetic sensor 20 described later in the circumferential direction.
  • the housing 9 is formed with a notch 9b in which a part of the recess 9A is notched in the outer peripheral direction.
  • the magnetic sensor 20 is fixed in the notch 9b via a substrate (silicon substrate) (not shown), and faces the outer peripheral surface 11A, which is the magnetized surface of the magnet 11, in a separated state. That is, a predetermined interval is provided between the magnetic sensor 20 and the outer peripheral surface 11A, and the magnetic sensor 20 is disposed in the vicinity of the outer peripheral surface of the outer peripheral surface 11A.
  • the magnetic sensor 20 is provided with a plurality of magnetic detection elements R11 to R23.
  • the magnetic detection element is, for example, a GMR element (giant magnetoresistive effect element), and has a basic laminated structure of antiferromagnetic layer / fixed magnetic layer / nonmagnetic layer / free magnetic layer.
  • the magnetization of the fixed magnetic layer is fixed in a tangential direction with respect to the rotation direction of the magnet 11. Note that the magnetization directions of the pinned magnetic layers in all the magnetic detection elements R11 to R23 are the same.
  • the magnetic detection elements R11 to R23 are arranged in a row in the rotational tangential direction, which is the direction along the relative movement direction of the magnet 11. As shown in FIG. 3, every other magnetic detection element R11, R12, R13 is connected in series, and every other magnetic detection element R21, R22, R23 is connected in series. ing.
  • the magnetic detection element R11 and the magnetic detection element R21 are connected via the output unit T0, whereby all the magnetic detection elements R11 to R23 are connected in series.
  • an input terminal (power supply terminal) T1 is connected to the magnetic detection element R13, and a ground terminal T2 is connected to the magnetic detection element R23.
  • all the magnetic detection elements R11 to R23 provided in the magnetic sensor 20 are arranged so as to be within the range of one pole of the N pole (or S pole) in the relative movement direction of the magnet 11. ing.
  • all the magnetic detection elements R11 are within an angular range of one pole from the rotation center of the magnet 11 to the N pole (or S pole). Contains R23.
  • FIG. 4 six magnetic detecting elements R11 to R23 having the same resistance value are connected in series between the input terminal T1 and the ground terminal T2.
  • An output unit T0 is provided at a midpoint that divides the three magnetic detection elements R11, R12, and R13 and the three magnetic detection elements R21, R22, and R23. Accordingly, the three magnetic detection elements R11, R12, and R13 connected in series between the output portion T0 and the input terminal T1, which are the midpoints of the series circuit of the six magnetic detection elements R11 to R23, are connected to the first magnetic detection element.
  • the number of magnetic detection elements is not limited to six, an even number of magnetic detection elements are provided, and an output unit T0 is provided at a midpoint that divides the magnetic detection elements into the same number.
  • the direction of the magnetic field by the magnet 11 acting on all the magnetic detection elements R11 to R23 is the same (for example, the direction along the magnetization direction of the fixed magnetic layer), and the resistance values of all the magnetic detection elements R11 to R23 are the same.
  • the initial state for example, the resistance values of all the magnetic detection elements R11 to R23 are the minimum resistance value
  • the direction of the magnetic field acting on the magnetic detection element R11 is, for example, reversed. Change. Accordingly, when the resistance value of the magnetic detection element R11 changes, the output voltage from the output unit T0 changes by an amount corresponding to the resistance change of the magnetic detection element R11.
  • the output voltage of the output unit T0 is changed from the initial state by an amount corresponding to the resistance change of the magnetic detection element R12. Change.
  • FIG. 4A shows an output voltage from the output unit T0.
  • the high output voltage H1 higher than the intermediate voltage V0 is output three times, the high output region A repeatedly output via the intermediate voltage V0, and the low output voltage L1 lower than the intermediate voltage V0 is output three times.
  • Low output regions B that are repeatedly output via the intermediate voltage V0 are alternately obtained from the output unit T0.
  • Vdd is applied as a power supply voltage between the input terminal T1 and the ground terminal T2
  • the intermediate voltage V0 is Vdd / 2.
  • Three high output voltages H1 are output to the high output region A and three low output voltages L1 are output to the low output region B because six magnetic detection elements R11 to R23 are provided in total. It is.
  • the number of the magnetic detection elements R11 to R23 is changed, the number of outputs of the high output voltage H1 and the low output voltage L1 also changes. Then, by setting so that a plurality of output voltages can be obtained in the high output region A and the low output region B and detecting the plurality of output voltages, it is possible to appropriately function as a high resolution magnetic encoder.
  • the integrated circuit 21 is provided with a differential amplifier 26, a first comparator 22, a second comparator 23, an OR circuit 24, an external output terminal 25, and the like. Note that all the magnetic detection elements R11 to R23 and the integrated circuit 21 are provided on the same substrate (silicon substrate) (not shown) and constitute the magnetic sensor 20.
  • the differential amplifier 26 which is an amplifier circuit, is connected to the output section T0 of the series circuit of the magnetic detection elements R11 to R23.
  • the output voltage is amplified by the differential amplifier 26.
  • the high output voltage H1 shown in (a) is amplified to H2, and the low output voltage L1 is amplified to L2.
  • the intermediate voltage V0 is also amplified, but for convenience, the intermediate voltage after amplification is also described as “intermediate voltage V0”.
  • the output side of the differential amplifier 26 is divided into two branches, one connected to the first comparator 22 and the other connected to the second comparator 23.
  • the first threshold voltage V1 is set between the amplified high output voltage H2 and the intermediate voltage V0.
  • the second threshold voltage V2 is set between the amplified low output voltage L2 and the intermediate voltage V0.
  • the first comparator 22 compares the input output voltage with the first threshold voltage V1, and controls to output a signal with an output voltage exceeding the first threshold voltage V1, (e) The pulse signal shown in FIG. For example, as shown in (e), when the output voltage is lower than the first threshold voltage V1, the signal is “Low” level, and when the output voltage is higher than the first threshold voltage V1, the signal of “High” level is output. Further, the second comparator 23 compares the input output voltage with the second threshold voltage V2, and controls to output a signal with an output voltage lower than the second threshold voltage V2, and (f) The pulse signal shown in FIG. As shown in (f), when the output voltage exceeds the second threshold voltage V2, a signal is output at the “Low” level, and when the output voltage is lower than the second threshold voltage V2, a signal at the “High” level is output.
  • an OR circuit 24 is connected between the output sides of the first comparator 22 and the second comparator 23 and the external output terminal 25.
  • the pulse signal generated by the first comparator 22 shown in (e) and the pulse signal generated by the second comparator 23 shown in (f) are combined by the OR circuit 24 and shown in (g), etc.
  • a continuous pulse signal is generated at intervals.
  • an absolute value circuit (ABS circuit) is not used unlike the conventional circuit configuration shown in FIG.
  • two comparators 22 and 23 are used.
  • an absolute value circuit (ABS circuit) using two operational amplifiers and a comparator are provided (see FIGS. 6 and 7).
  • one operational amplifier can be reduced compared to the conventional circuit configuration.
  • the OR circuit 24 composed of TTL needs only to use about four transistors.
  • an OR circuit is configured by a so-called wired OR that connects the output terminals of the comparators 22 and 23. In this case, a transistor is also unnecessary. Therefore, according to the signal processing circuit of this embodiment, the ASIC design can be facilitated more easily than the conventional configuration, and the signal processing circuit can be downsized and the manufacturing cost can be reduced.
  • the configuration of the magnetic detection element and the integrated circuit is, for example, the A phase.
  • the B phase having the same configuration exists.
  • one B-phase magnetic detection element is arranged between the magnetic detection elements R11 to R23 shown in FIG. 3 and one outside the magnetic detection elements R11 and R23.
  • the rotation direction of the magnet 11 can be known from the output states of the A phase pulse signal and the B phase pulse signal. it can. Further, the rotation angle and the rotation speed can be detected by the pulse signal obtained from the external output terminal 25.
  • Examples of the magnetic detection elements R11 to R23 include a Hall element and an AMR element.
  • a GMR element that has a large resistance change rate and detects a direction instead of the magnitude of the magnetic field, the output voltage can be increased and the detection accuracy can be increased. It is possible to improve.
  • a rotary magnetic encoder in which the circular magnet 11 is rotated is used.
  • a magnetic encoder in which the magnet 11 is linearly moved in a rod shape may be used.
  • the magnet may be fixed and the magnetic sensor may be moved.

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Abstract

Provided is a magnetic encoder equipped with a signal processing circuit with lower number of elements than that of circuitry equipped with an absolute value circuit. A plurality of magnetic detection elements (R11 to R23) configure a series circuit equipped with an output part (T0) in the midpoint. An output area (A) of a high output voltage (H1) higher than an intermediate voltage (V0), and an output area (B) of a low output voltage (L1) lower than the intermediate voltage (V0) are alternately obtained from the output part (T0). An integrated circuit (21) is configured by comprising a differential amplifier (26), a first comparator (22) having a first threshold voltage (V1) and a second comparator (23) having a second threshold voltage (V2), which are bifurcated and connected from the output part side of the differential amplifier (26), respectively, and an OR circuit (24) which is connected to the respective output sides of the first comparator (22) and the second comparator (23), and combines the pulse signal from the first comparator and the pulse signal from the second comparator.

Description

磁気エンコーダMagnetic encoder
 本発明は、磁気エンコーダの信号処理回路に関する。 The present invention relates to a signal processing circuit for a magnetic encoder.
 図6は、本発明者等が考えた、複数の磁気検出素子を組み合わせてなる磁気センサを用いた高分解能磁気エンコーダの信号処理回路図及び出力波形図である。なお、以下の説明において、便宜上、図6の構成を、「従来の構成」あるいは、「従来の回路構成」と呼ぶ場合がある。 FIG. 6 is a signal processing circuit diagram and an output waveform diagram of a high resolution magnetic encoder using a magnetic sensor formed by combining a plurality of magnetic detection elements, which the present inventors considered. In the following description, for the sake of convenience, the configuration in FIG. 6 may be referred to as “conventional configuration” or “conventional circuit configuration”.
 図6に示すように、複数の磁気検出素子R1~R6が直列に接続され、複数の磁気検出素子R1~R6を同数ずつに分ける中点からの出力電圧が差動増幅器1に入力される。また図6に示すように、差動増幅器1の出力側には絶対値回路(ABS回路)2が接続され、さらに絶対値回路2の出力側と出力端子4間にコンパレータ3が接続されている。 As shown in FIG. 6, a plurality of magnetic detection elements R1 to R6 are connected in series, and an output voltage from a midpoint that divides the plurality of magnetic detection elements R1 to R6 into the same number is input to the differential amplifier 1. Further, as shown in FIG. 6, an absolute value circuit (ABS circuit) 2 is connected to the output side of the differential amplifier 1, and a comparator 3 is connected between the output side of the absolute value circuit 2 and the output terminal 4. .
 図6の(a)は、複数の磁気検出素子R1~R6からの出力電圧を示す。そして(b)に示すように、出力電圧は、差動増幅器1にて増幅される。 (A) in FIG. 6 shows output voltages from the plurality of magnetic detection elements R1 to R6. The output voltage is amplified by the differential amplifier 1 as shown in FIG.
 絶対値回路2は、図7の一例に示すように、理想ダイオード回路の後段に加算回路が接続された構成である。 As shown in the example of FIG. 7, the absolute value circuit 2 has a configuration in which an adder circuit is connected to the subsequent stage of the ideal diode circuit.
 絶対値回路2の前段に設けられた理想ダイオード回路7にて、基準電圧よりも低い低出力電圧が、基準電圧を対称軸として、高出力側に反転され(ダイオードの方向により基準電圧よりも高い高出力電圧を反転させることも出来る)、後段の加算回路8にて、反転出力電圧と、元々、基準電圧よりも高出力電圧の非反転出力電圧とが加算される(図6に示す絶対値回路2からの波形図(c)を参照)。 In the ideal diode circuit 7 provided in the previous stage of the absolute value circuit 2, the low output voltage lower than the reference voltage is inverted to the high output side with the reference voltage as the axis of symmetry (higher than the reference voltage depending on the direction of the diode). The high output voltage can be inverted), and the adder circuit 8 in the subsequent stage adds the inverted output voltage and the non-inverted output voltage that is originally higher than the reference voltage (absolute value shown in FIG. 6). (Refer waveform (c) from circuit 2).
 このように絶対値回路2では、全ての出力電圧が基準電圧の高出力側か低出力側の一方に得られるように処理される。 As described above, in the absolute value circuit 2, all output voltages are processed so as to be obtained on either the high output side or the low output side of the reference voltage.
 そして、コンパレータ3では、予め定められた閾値電圧と、絶対値回路2から入力された出力電圧とを比較し、閾値電圧以上の出力電圧の入力により信号を出力させ、図6(d)に示すパルス信号(デジタル値)を得る。 The comparator 3 compares a predetermined threshold voltage with the output voltage input from the absolute value circuit 2, and outputs a signal when an output voltage equal to or higher than the threshold voltage is input, as shown in FIG. A pulse signal (digital value) is obtained.
 図7に示すように絶対値回路2は単純なダイオード回路でなく、オペアンプ5,6を2個使用する。
 オペアンプは例えば、図8のように多数のトランジスタで構成されている。
As shown in FIG. 7, the absolute value circuit 2 is not a simple diode circuit, but uses two operational amplifiers 5 and 6.
The operational amplifier is composed of a number of transistors as shown in FIG.
特開平7-183591号公報Japanese Patent Laid-Open No. 7-183591 特開平4-69986号公報JP-A-4-69986
 しかしながら絶対値回路2及びコンパレータ3により信号処理を行う従来の回路構成では、オペアンプの増加により素子数が増え、ASIC(Application Specific Integrated Circuit)設計に対する負担増大や、信号処理回路の大型化、製造コストの増大という課題が生じた。 However, in the conventional circuit configuration in which signal processing is performed by the absolute value circuit 2 and the comparator 3, the number of elements increases due to the increase in the number of operational amplifiers, the burden on ASIC (Application Specific Integrated Circuit) design increases, the size of the signal processing circuit increases, and the manufacturing cost. The problem of increasing
 特許文献1には、MREブリッジ回路2からの出力電圧が差動増幅器5に入力され、さらに増幅した出力電圧が2値化回路4に入力される回路構成が開示されている。また出力補正回路3が設けられ、この出力補正回路3には上限値設定用コンパレータ6a、下限値設定用コンパレータ6b及びOR回路7等が設けられている。 Patent Document 1 discloses a circuit configuration in which the output voltage from the MRE bridge circuit 2 is input to the differential amplifier 5 and the amplified output voltage is input to the binarization circuit 4. Further, an output correction circuit 3 is provided, and this output correction circuit 3 is provided with an upper limit value setting comparator 6a, a lower limit value setting comparator 6b, an OR circuit 7, and the like.
 前記出力補正回路3は磁気検出センサの出力を補正して2値化回路4を安定して動作させるためのものであり、差動増幅器から外部接続端子に至る波形整形のための主回路上に存在するものでない。そして、特許文献1に記載の発明は、磁気検出素子R1~R6の直列回路から得られる、基準電圧よりも高出力電圧の領域と、基準電圧よりも低出力電圧の領域とが交互に繰り返される出力電圧に対して図6(d)に示した最終波形を得ようとする信号処理を行うものでない。特許文献2についても同様である。 The output correction circuit 3 is for correcting the output of the magnetic detection sensor to operate the binarization circuit 4 stably. On the main circuit for waveform shaping from the differential amplifier to the external connection terminal. It does not exist. In the invention described in Patent Document 1, a region having a higher output voltage than the reference voltage and a region having a lower output voltage than the reference voltage, which are obtained from the series circuit of the magnetic detection elements R1 to R6, are alternately repeated. Signal processing for obtaining the final waveform shown in FIG. 6D is not performed on the output voltage. The same applies to Patent Document 2.
 そこで本発明は、上述した図6の回路構成における課題を解決するためのものであり、特に、絶対値回路を備えた回路構成に比べて素子数が少ない信号処理回路を備える磁気エンコーダを提供することを目的とする。 Therefore, the present invention is to solve the problem in the circuit configuration of FIG. 6 described above, and in particular, provides a magnetic encoder including a signal processing circuit having a smaller number of elements than a circuit configuration including an absolute value circuit. For the purpose.
 本発明は、相対移動方向に交互にN極とS極が着磁された着磁面を有する磁界発生部材と、前記磁界発生部材の前記着磁面から離れた位置に配置され、外部磁界に対して電気特性が変化する磁気検出素子及び集積回路を備えた磁気センサと、を有して構成される磁気エンコーダにおいて、
 前記磁気検出素子は、前記磁気センサに複数設けられており、複数の前記磁気検出素子は、中点に出力部を備える直列回路を構成するとともに、前記磁気センサに対する前記磁界発生部材の相対移動に伴い、中間電圧よりも高い高出力電圧が出力される高出力領域と、前記中間電圧よりも低い低出力電圧が出力される低出力領域とが交互に得られるように配置されており、
 前記集積回路には、前記直列回路の出力部側から二股に分かれて夫々接続される、前記高出力電圧と前記中間電圧間に第1の閾値電圧を有する第1のコンパレータと、前記低出力電圧と前記中間電圧間に第2の閾値電圧を有する第2のコンパレータと、前記第1のコンパレータ及び前記第2のコンパレータの各出力側と外部出力端子間に接続され、前記第1のコンパレータから得られたパルス信号と、前記第2のコンパレータから得られたパルス信号とを合成するOR回路と、を有して構成されることを特徴とするものである。
The present invention includes a magnetic field generating member having a magnetized surface in which N and S poles are alternately magnetized in the relative movement direction, and a position away from the magnetized surface of the magnetic field generating member. In contrast, a magnetic encoder including a magnetic sensor having an integrated circuit and a magnetic detection element whose electrical characteristics change,
A plurality of the magnetic detection elements are provided in the magnetic sensor, and the plurality of magnetic detection elements constitute a series circuit having an output portion at a midpoint, and are used for relative movement of the magnetic field generating member with respect to the magnetic sensor. Accordingly, a high output region where a high output voltage higher than the intermediate voltage is output and a low output region where a low output voltage lower than the intermediate voltage is output are alternately obtained,
A first comparator having a first threshold voltage between the high output voltage and the intermediate voltage, connected to the integrated circuit in a bifurcated manner from the output part side of the series circuit, and the low output voltage And a second comparator having a second threshold voltage between the intermediate voltage and the first comparator and the output side of the second comparator and an external output terminal, and obtained from the first comparator. And an OR circuit for combining the pulse signal obtained from the second comparator and the pulse signal obtained from the second comparator.
 上記した構成により、絶対値回路を備えた回路構成のものに比べて、オペアンプを1個削減できる。また、本発明では、OR回路を用いるが、そのOR回路は、数個のトランジスタで構成でき、あるいは、トランジスタを用いない、いわゆるワイヤードORにより構成することも可能である。よって、絶対値回路を用いた回路構成に比べて、ASIC設計を容易にできるとともに、信号処理回路の小型化、製造コストの低減を図ることが出来る。 With the above configuration, one operational amplifier can be reduced compared to a circuit configuration having an absolute value circuit. In the present invention, an OR circuit is used. The OR circuit can be composed of several transistors, or can be composed of a so-called wired OR that does not use transistors. Therefore, the ASIC design can be facilitated as compared with the circuit configuration using the absolute value circuit, and the signal processing circuit can be downsized and the manufacturing cost can be reduced.
 また、前記高出力領域及び前記低出力領域では、それぞれ、前記高出力電圧及び前記低出力電圧が複数回、前記中間電圧を介して出力される構成とすることで、パルス信号を多く得ることができるので、高分解能磁気エンコーダを構成できる。また、出力電圧が階段状に、複数レベルに上昇あるいは下降するものではなく、中間電圧を介して複数の高出力電圧または低出力電圧が得られるものなので、コンパレータの閾値電圧の設定が容易となる。 Further, in the high output region and the low output region, the high output voltage and the low output voltage are output a plurality of times through the intermediate voltage, so that a large number of pulse signals can be obtained. Therefore, a high-resolution magnetic encoder can be configured. In addition, the output voltage is not stepped up or down to a plurality of levels, but a plurality of high output voltages or low output voltages can be obtained via an intermediate voltage, making it easy to set the threshold voltage of the comparator. .
 この場合、本発明では、複数の前記磁気検出素子は、前記直列回路の中点に対して一方側に直列接続される複数の第1磁気検出素子と、前記中点に対して他方側に直列接続される、前記第1磁気検出素子と同数の第2磁気検出素子とで構成されており、前記第1磁気検出素子と前記第2磁気検出素子とが、前記磁界発生部材の前記相対移動方向に沿って交互に配置されるとともに、複数の前記磁気検出素子は、前記磁界発生部材の前記相対移動方向におけるN極またはS極の1極の範囲内に収められるものとしている。これにより、高出力領域及び低出力領域で、それぞれ、高出力電圧及び低出力電圧が複数回、中間電圧を介して出力される構成を、複数の磁気検出素子の配置と接続構成により、容易に得ることができる。 In this case, in the present invention, the plurality of magnetic detection elements are connected in series to one side with respect to the midpoint of the series circuit and in series with the other side with respect to the midpoint. The number of second magnetic detection elements is the same as the number of the first magnetic detection elements connected, and the first magnetic detection element and the second magnetic detection element are in the relative movement direction of the magnetic field generating member. The magnetic detection elements are arranged in a range of one pole of N or S poles in the relative movement direction of the magnetic field generating member. As a result, a configuration in which a high output voltage and a low output voltage are output a plurality of times via an intermediate voltage in a high output region and a low output region can be easily achieved by arranging and connecting a plurality of magnetic detection elements. Obtainable.
 また、本発明では、前記直列回路の出力部と、前記第1のコンパレータ及び前記第2のコンパレータとの間に増幅回路が設けられることが好ましい。これにより、コンパレータの閾値電圧の設定をより容易なものとすることが可能となる。 In the present invention, it is preferable that an amplifier circuit is provided between the output unit of the series circuit and the first comparator and the second comparator. As a result, the threshold voltage of the comparator can be set more easily.
 また、本発明では、前記磁気検出素子はGMR素子(巨大磁気抵抗効果素子)であることが好ましい。 In the present invention, the magnetic sensing element is preferably a GMR element (giant magnetoresistive element).
 GMR素子は、抵抗変化率が大きく、また、磁界の大きさではなく、方向を検出するものであるので、出力電圧を大きくでき、効果的に、検知精度を向上させることができる。 The GMR element has a large resistance change rate and detects the direction, not the magnitude of the magnetic field, so that the output voltage can be increased and the detection accuracy can be improved effectively.
 本発明の磁気エンコーダによれば、絶対値回路を備えた回路構成のものに比べて、オペアンプを削減できる。また、本発明では、OR回路を用いるが、そのOR回路は、数個のトランジスタで構成でき、あるいは、トランジスタを用いない、いわゆるワイヤードORにより構成することも可能である。よって、絶対値回路を用いた回路構成に比べて、ASIC設計を容易にできるとともに、信号処理回路の小型化、製造コストの低減を図ることが出来る。 According to the magnetic encoder of the present invention, operational amplifiers can be reduced as compared with a circuit configuration having an absolute value circuit. In the present invention, an OR circuit is used. The OR circuit can be composed of several transistors, or can be composed of a so-called wired OR that does not use transistors. Therefore, the ASIC design can be facilitated as compared with the circuit configuration using the absolute value circuit, and the signal processing circuit can be downsized and the manufacturing cost can be reduced.
本実施形態の磁気エンコーダの平面図、The top view of the magnetic encoder of this embodiment, 図1に示す磁気エンコーダの断面図、Sectional drawing of the magnetic encoder shown in FIG. 図1に示す磁気エンコーダにおける磁気センサ(磁気検出素子)の構成図及び磁石との関係を示す模式図、FIG. 1 is a configuration diagram of a magnetic sensor (magnetic detection element) in the magnetic encoder shown in FIG. 1 and a schematic diagram showing a relationship with a magnet; 本実施形態における磁気センサの回路構成図、The circuit block diagram of the magnetic sensor in this embodiment, 本実施形態における磁気センサに備えられる集積回路のより具体的な回路構成図、A more specific circuit configuration diagram of an integrated circuit provided in the magnetic sensor in the present embodiment, 絶対値回路を備えた磁気センサの回路構成図、A circuit configuration diagram of a magnetic sensor having an absolute value circuit, 絶対値回路(ABS回路)の回路構成図、A circuit configuration diagram of an absolute value circuit (ABS circuit), オペアンプの回路構成図、Operational amplifier circuit configuration diagram,
 図1は、本実施形態の磁気エンコーダの平面図、図2は、図1に示す磁気エンコーダの断面図、図3は、図1に示す磁気エンコーダにおける磁気センサ(磁気検出素子)の構成図及び磁石との関係を示す模式図、図4は、本実施形態における磁気センサの回路構成図、図5は、本実施形態における磁気センサに備えられる集積回路のより具体的な回路構成図、である。なお、磁石11は図1に示すようにこの実施形態ではリング状であるが、図3では、磁石11の着磁面を平面上に展開して磁気センサを構成する磁気検出素子との位置関係を示している。 1 is a plan view of the magnetic encoder of the present embodiment, FIG. 2 is a cross-sectional view of the magnetic encoder shown in FIG. 1, and FIG. 3 is a configuration diagram of a magnetic sensor (magnetic detection element) in the magnetic encoder shown in FIG. 4 is a schematic diagram showing a relationship with a magnet, FIG. 4 is a circuit configuration diagram of a magnetic sensor in the present embodiment, and FIG. 5 is a more specific circuit configuration diagram of an integrated circuit provided in the magnetic sensor in the present embodiment. . In this embodiment, the magnet 11 has a ring shape as shown in FIG. 1, but in FIG. 3, the positional relationship between the magnet 11 and the magnetic detection element constituting the magnetic sensor by expanding the magnetized surface of the magnet 11 on a plane. Is shown.
 本実施形態における磁気エンコーダ10は、回転角度、回転方向又は回転速度等を検出する装置である。磁気エンコーダ10は、磁界発生部材である磁石11、磁石11を回転自在に支持する回転体12、回転体12を回転自在に支持する筐体9、磁気検出素子及び集積回路を備える磁気センサ20とを有して構成される。 The magnetic encoder 10 in this embodiment is a device that detects a rotation angle, a rotation direction, a rotation speed, or the like. The magnetic encoder 10 includes a magnet 11 that is a magnetic field generating member, a rotating body 12 that rotatably supports the magnet 11, a housing 9 that rotatably supports the rotating body 12, a magnetic sensor 20 that includes a magnetic detection element and an integrated circuit. It is comprised.
 例えば磁石11はリング状であり、その内面側に回転体12の外周面が固定されている。磁石11の外周面11Aには、N極及びS極からなる複数の磁極が交互に、等間隔(等角度間隔)で着磁されている。 For example, the magnet 11 has a ring shape, and the outer peripheral surface of the rotating body 12 is fixed to the inner surface side thereof. A plurality of magnetic poles composed of N poles and S poles are alternately magnetized on the outer peripheral surface 11A of the magnet 11 at equal intervals (equal angular intervals).
 磁石11と回転体12は、筐体9に設けられた円形状の凹部9A内に配置されている。図2に示すように、筐体9の中心には、貫通孔9aが形成されている。そして回転体12の中心に設けられた回転軸12aが前記貫通孔9aに挿通されている。 The magnet 11 and the rotating body 12 are arranged in a circular recess 9A provided in the housing 9. As shown in FIG. 2, a through hole 9 a is formed at the center of the housing 9. A rotating shaft 12a provided at the center of the rotating body 12 is inserted through the through hole 9a.
 磁石11は、回転体12の回転軸12aを軸中心として、凹部9A内で反時計方向ra1、及び時計方向ra2に回転自在に支持されている。すなわち、本実施形態では、後述する磁気センサ20に対して、磁石11は、その周方向に相対移動するものである。 The magnet 11 is supported so as to be rotatable in the counterclockwise direction ra1 and the clockwise direction ra2 in the recess 9A with the rotation axis 12a of the rotating body 12 as an axis center. That is, in this embodiment, the magnet 11 moves relative to the magnetic sensor 20 described later in the circumferential direction.
 筐体9には、凹部9Aの一部を外周方向に切り欠いた切欠き部9bが形成されている。磁気センサ20は、図示せぬ基板(シリコン基板)を介して切欠き部9b内に固定され、磁石11の着磁面である外周面11Aと離間状態で対向している。すなわち、磁気センサ20と外周面11Aとの間には、所定の間隔が設けられており、磁気センサ20は、外周面11Aの外周側における近傍に配置されたものとなっている。 The housing 9 is formed with a notch 9b in which a part of the recess 9A is notched in the outer peripheral direction. The magnetic sensor 20 is fixed in the notch 9b via a substrate (silicon substrate) (not shown), and faces the outer peripheral surface 11A, which is the magnetized surface of the magnet 11, in a separated state. That is, a predetermined interval is provided between the magnetic sensor 20 and the outer peripheral surface 11A, and the magnetic sensor 20 is disposed in the vicinity of the outer peripheral surface of the outer peripheral surface 11A.
 図3に示すように磁気センサ20には、複数の磁気検出素子R11~R23が設けられる。本実施形態においては、磁気検出素子は、例えばGMR素子(巨大磁気抵抗効果素子)であり、反強磁性層/固定磁性層/非磁性層/フリー磁性層の基本積層構成を備える。例えば固定磁性層の磁化は磁石11の回転方向に対する接線方向に固定されている。なお、全ての磁気検出素子R11~R23における固定磁性層の磁化の向きは、同じ方向を向いている。 As shown in FIG. 3, the magnetic sensor 20 is provided with a plurality of magnetic detection elements R11 to R23. In the present embodiment, the magnetic detection element is, for example, a GMR element (giant magnetoresistive effect element), and has a basic laminated structure of antiferromagnetic layer / fixed magnetic layer / nonmagnetic layer / free magnetic layer. For example, the magnetization of the fixed magnetic layer is fixed in a tangential direction with respect to the rotation direction of the magnet 11. Note that the magnetization directions of the pinned magnetic layers in all the magnetic detection elements R11 to R23 are the same.
 図3に示すように各磁気検出素子R11~R23は、磁石11の相対移動方向に沿った方向である回転接線方向に向けて一列に配列されている。図3に示すように、1つ置きに配置された磁気検出素子R11,R12,R13が直列に接続され、また、1つ置きに配置された磁気検出素子R21,R22,R23が直列に接続されている。 As shown in FIG. 3, the magnetic detection elements R11 to R23 are arranged in a row in the rotational tangential direction, which is the direction along the relative movement direction of the magnet 11. As shown in FIG. 3, every other magnetic detection element R11, R12, R13 is connected in series, and every other magnetic detection element R21, R22, R23 is connected in series. ing.
 また上記した図3に示すように磁気検出素子R11と磁気検出素子R21とが出力部T0を介して接続され、これにより全ての磁気検出素子R11~R23が直列接続されている。また図3に示すように、磁気検出素子R13には入力端子(電源端子)T1が接続され、磁気検出素子R23にはグランド端子T2が接続されている。 In addition, as shown in FIG. 3 described above, the magnetic detection element R11 and the magnetic detection element R21 are connected via the output unit T0, whereby all the magnetic detection elements R11 to R23 are connected in series. As shown in FIG. 3, an input terminal (power supply terminal) T1 is connected to the magnetic detection element R13, and a ground terminal T2 is connected to the magnetic detection element R23.
 図3に示すように、磁気センサ20に設けられた全ての磁気検出素子R11~R23が、磁石11の相対移動方向におけるN極(又はS極)の1極の範囲内に収まるように配置されている。なお、本実施形態では、磁石11はリング状で、回転するものであることから、磁石11の回転中心からN極(又はS極)の1極の角度範囲内に、全ての磁気検出素子R11~R23が収められている。 As shown in FIG. 3, all the magnetic detection elements R11 to R23 provided in the magnetic sensor 20 are arranged so as to be within the range of one pole of the N pole (or S pole) in the relative movement direction of the magnet 11. ing. In this embodiment, since the magnet 11 is ring-shaped and rotates, all the magnetic detection elements R11 are within an angular range of one pole from the rotation center of the magnet 11 to the N pole (or S pole). Contains R23.
 図4に示すように、入力端子T1とグランド端子T2の間には抵抗値が同等の6個の磁気検出素子R11~R23が直列接続されている。そして3つの磁気検出素子R11,R12,R13と、3つの磁気検出素子R21,R22,R23とを分ける中点に出力部T0が設けられている。従って、6個の磁気検出素子R11~R23の直列回路の中点である出力部T0と入力端子T1との間に直列接続される3つの磁気検出素子R11,R12,R13が、第1磁気検出素子であり、出力部T0とグランド端子T2との間に直列接続される3つの磁気検出素子R21,R22,R23が、第2磁気検出素子となっている。なお、磁気検出素子の数は6個に限定されないが、磁気検出素子は偶数個設けられ、磁気検出素子を同数に分ける中点に出力部T0が設けられる。 As shown in FIG. 4, six magnetic detecting elements R11 to R23 having the same resistance value are connected in series between the input terminal T1 and the ground terminal T2. An output unit T0 is provided at a midpoint that divides the three magnetic detection elements R11, R12, and R13 and the three magnetic detection elements R21, R22, and R23. Accordingly, the three magnetic detection elements R11, R12, and R13 connected in series between the output portion T0 and the input terminal T1, which are the midpoints of the series circuit of the six magnetic detection elements R11 to R23, are connected to the first magnetic detection element. The three magnetic detection elements R21, R22, and R23, which are elements and are connected in series between the output unit T0 and the ground terminal T2, serve as second magnetic detection elements. Although the number of magnetic detection elements is not limited to six, an even number of magnetic detection elements are provided, and an output unit T0 is provided at a midpoint that divides the magnetic detection elements into the same number.
 そして、全ての磁気検出素子R11~R23に作用する磁石11による磁界の向きが同じ(例えば前記固定磁性層の磁化方向に沿った向き)で、全ての磁気検出素子R11~R23の抵抗値が同じ初期状態(例えば全ての磁気検出素子R11~R23の抵抗値が最小抵抗値)において、磁石11が例えば図3のra1方向に回転すると、磁気検出素子R11に作用する磁界の向きが例えば逆向きに変化する。これに伴って、磁気検出素子R11の抵抗値が変化すると、出力部T0からの出力電圧は磁気検出素子R11の抵抗変化に対応した分だけ変化する。続いて、磁石11が同方向に回転して、磁気検出素子R11と共に磁気検出素子R21の抵抗値が変化すると、出力部T0を中心として、磁気検出素子R11~R13側の合成抵抗値と、磁気検出素子R21~R23側の合成抵抗値とが同等の抵抗値になることで、出力部T0の出力電圧は、初期状態における出力電圧に戻る。 The direction of the magnetic field by the magnet 11 acting on all the magnetic detection elements R11 to R23 is the same (for example, the direction along the magnetization direction of the fixed magnetic layer), and the resistance values of all the magnetic detection elements R11 to R23 are the same. In the initial state (for example, the resistance values of all the magnetic detection elements R11 to R23 are the minimum resistance value), when the magnet 11 rotates, for example, in the ra1 direction of FIG. 3, the direction of the magnetic field acting on the magnetic detection element R11 is, for example, reversed. Change. Accordingly, when the resistance value of the magnetic detection element R11 changes, the output voltage from the output unit T0 changes by an amount corresponding to the resistance change of the magnetic detection element R11. Subsequently, when the magnet 11 rotates in the same direction and the resistance value of the magnetic detection element R21 changes together with the magnetic detection element R11, the combined resistance value on the magnetic detection elements R11 to R13 side with the output unit T0 as the center, As the combined resistance value on the detection elements R21 to R23 side becomes the same resistance value, the output voltage of the output unit T0 returns to the output voltage in the initial state.
 さらに、磁石11が回転して、磁気検出素子R11,R21と共に磁気検出素子R12の抵抗値が変化すると、出力部T0の出力電圧は、磁気検出素子R12の抵抗変化に対応した分だけ初期状態から変化する。 Further, when the magnet 11 rotates and the resistance value of the magnetic detection element R12 changes together with the magnetic detection elements R11 and R21, the output voltage of the output unit T0 is changed from the initial state by an amount corresponding to the resistance change of the magnetic detection element R12. Change.
 図4(a)には出力部T0からの出力電圧が示されている。図4に示すように中間電圧V0よりも高い高出力電圧H1が3回、中間電圧V0を介して繰り返し出力される高出力領域Aと、中間電圧V0よりも低い低出力電圧L1が3回、中間電圧V0を介して繰り返し出力される低出力領域Bとが交互に、出力部T0から得られる。なお、入力端子T1とグランド端子T2との間に、電源電圧としてVddが印加されたとき、中間電圧V0はVdd/2である。高出力領域Aに3回分の高出力電圧H1が出力され、低出力領域Bに3回分の低出力電圧L1が出力されるのは、磁気検出素子R11~R23が計6個設けられているからである。よって、磁気検出素子R11~R23の個数を変更すれば、高出力電圧H1及び低出力電圧L1の出力個数も変化することになる。そして、高出力領域A及び低出力領域Bに複数の出力電圧が得られるように設定して、これらの複数の出力電圧を検出することで、高分解能磁気エンコーダとして適切に機能させることが出来る。 FIG. 4A shows an output voltage from the output unit T0. As shown in FIG. 4, the high output voltage H1 higher than the intermediate voltage V0 is output three times, the high output region A repeatedly output via the intermediate voltage V0, and the low output voltage L1 lower than the intermediate voltage V0 is output three times. Low output regions B that are repeatedly output via the intermediate voltage V0 are alternately obtained from the output unit T0. When Vdd is applied as a power supply voltage between the input terminal T1 and the ground terminal T2, the intermediate voltage V0 is Vdd / 2. Three high output voltages H1 are output to the high output region A and three low output voltages L1 are output to the low output region B because six magnetic detection elements R11 to R23 are provided in total. It is. Therefore, if the number of the magnetic detection elements R11 to R23 is changed, the number of outputs of the high output voltage H1 and the low output voltage L1 also changes. Then, by setting so that a plurality of output voltages can be obtained in the high output region A and the low output region B and detecting the plurality of output voltages, it is possible to appropriately function as a high resolution magnetic encoder.
 図4に示すように集積回路21には差動増幅器26,第1のコンパレータ22,第2のコンパレータ23,OR回路24及び外部出力端子25等が設けられる。なお、全ての磁気検出素子R11~R23と集積回路21とは、図示しない同一の基板(シリコン基板)上に設けられており、磁気センサ20を構成している。 As shown in FIG. 4, the integrated circuit 21 is provided with a differential amplifier 26, a first comparator 22, a second comparator 23, an OR circuit 24, an external output terminal 25, and the like. Note that all the magnetic detection elements R11 to R23 and the integrated circuit 21 are provided on the same substrate (silicon substrate) (not shown) and constitute the magnetic sensor 20.
 図4に示すように、増幅回路である差動増幅器26は、磁気検出素子R11~R23の直列回路の出力部T0に接続されている。図4の(b)に示すように、出力電圧は差動増幅器26により増幅される。これにより、(a)に示す高出力電圧H1がH2に増幅され、低出力電圧L1がL2に増幅される。なお、このとき、中間電圧V0も増幅されるが、便宜上、増幅後の中間電圧も「中間電圧V0」と記載する。 As shown in FIG. 4, the differential amplifier 26, which is an amplifier circuit, is connected to the output section T0 of the series circuit of the magnetic detection elements R11 to R23. As shown in FIG. 4B, the output voltage is amplified by the differential amplifier 26. As a result, the high output voltage H1 shown in (a) is amplified to H2, and the low output voltage L1 is amplified to L2. At this time, the intermediate voltage V0 is also amplified, but for convenience, the intermediate voltage after amplification is also described as “intermediate voltage V0”.
 次に図4に示すように、差動増幅器26の出力側は二股に分かれて、一方が第1のコンパレータ22に接続され、他方が第2のコンパレータ23に接続される。 Next, as shown in FIG. 4, the output side of the differential amplifier 26 is divided into two branches, one connected to the first comparator 22 and the other connected to the second comparator 23.
 図4に示す第1のコンパレータ22では、(c)に示すように、増幅された高出力電圧H2と中間電圧V0間に第1の閾値電圧V1が設定されている。また第2のコンパレータ23では、(d)に示すように、増幅された低出力電圧L2と中間電圧V0間に第2の閾値電圧V2が設定されている。 In the first comparator 22 shown in FIG. 4, as shown in (c), the first threshold voltage V1 is set between the amplified high output voltage H2 and the intermediate voltage V0. In the second comparator 23, as shown in (d), the second threshold voltage V2 is set between the amplified low output voltage L2 and the intermediate voltage V0.
 そして、第1のコンパレータ22では、入力された出力電圧と、第1の閾値電圧V1とを比較し、第1の閾値電圧V1を上回る出力電圧により信号を出力するように制御し、(e)に示すパルス信号を生成する。例えば、(e)に示すように、出力電圧が第1の閾値電圧V1を下回れば「Low」レベルで、出力電圧が第1の閾値電圧V1を上回れば「High」レベルの信号を出力する。また、第2のコンパレータ23では、入力された出力電圧と、第2の閾値電圧V2とを比較し、第2の閾値電圧V2を下回る出力電圧により信号を出力するように制御し、(f)に示すパルス信号を生成する。(f)に示すように、出力電圧が第2の閾値電圧V2を上回れば、「Low」レベルで、出力電圧が第2の閾値電圧V2を下回れば「High」レベルの信号を出力する。 Then, the first comparator 22 compares the input output voltage with the first threshold voltage V1, and controls to output a signal with an output voltage exceeding the first threshold voltage V1, (e) The pulse signal shown in FIG. For example, as shown in (e), when the output voltage is lower than the first threshold voltage V1, the signal is “Low” level, and when the output voltage is higher than the first threshold voltage V1, the signal of “High” level is output. Further, the second comparator 23 compares the input output voltage with the second threshold voltage V2, and controls to output a signal with an output voltage lower than the second threshold voltage V2, and (f) The pulse signal shown in FIG. As shown in (f), when the output voltage exceeds the second threshold voltage V2, a signal is output at the “Low” level, and when the output voltage is lower than the second threshold voltage V2, a signal at the “High” level is output.
 図4に示すように、第1のコンパレータ22及び第2のコンパレータ23の出力側と外部出力端子25の間にはOR回路24が接続されている。 As shown in FIG. 4, an OR circuit 24 is connected between the output sides of the first comparator 22 and the second comparator 23 and the external output terminal 25.
 (e)に示す第1のコンパレータ22により生成されたパルス信号と、(f)に示す第2のコンパレータ23により生成されたパルス信号とが、OR回路24により合成され、(g)に示す等間隔にて連続するパルス信号が生成される。 The pulse signal generated by the first comparator 22 shown in (e) and the pulse signal generated by the second comparator 23 shown in (f) are combined by the OR circuit 24 and shown in (g), etc. A continuous pulse signal is generated at intervals.
 本実施形態では図4,図5に示す通り、図6に示した従来の回路構成のように、絶対値回路(ABS回路)を用いない。本実施形態ではコンパレータ22,23を2個使用するが、従来の構成では、オペアンプを2個使用した絶対値回路(ABS回路)とコンパレータとを設けていたため(図6,図7参照)、本実施形態ではオペアンプを従来の回路構成に比べて1個削減できる。また、TTLで構成されるOR回路24はトランジスタを4個程度使用すれば足りる。さらに、図5に示す本実施形態においては、コンパレータ22,23の出力端同士を接続する、いわゆるワイヤードORによりOR回路を構成しており、この場合には、トランジスタも不要となる。よって、本実施形態の信号処理回路によれば、従来の構成に比べてASIC設計の容易化を促進できるとともに、信号処理回路の小型化、製造コストの低減を図ることが可能になる。 In this embodiment, as shown in FIGS. 4 and 5, an absolute value circuit (ABS circuit) is not used unlike the conventional circuit configuration shown in FIG. In this embodiment, two comparators 22 and 23 are used. However, in the conventional configuration, an absolute value circuit (ABS circuit) using two operational amplifiers and a comparator are provided (see FIGS. 6 and 7). In the embodiment, one operational amplifier can be reduced compared to the conventional circuit configuration. Further, the OR circuit 24 composed of TTL needs only to use about four transistors. Further, in the present embodiment shown in FIG. 5, an OR circuit is configured by a so-called wired OR that connects the output terminals of the comparators 22 and 23. In this case, a transistor is also unnecessary. Therefore, according to the signal processing circuit of this embodiment, the ASIC design can be facilitated more easily than the conventional configuration, and the signal processing circuit can be downsized and the manufacturing cost can be reduced.
 図4,図5に示す磁気検出素子及び集積回路の構成は例えばA相であり、図示しないが、これと同じ構成のB相が存在している。ただしB相の磁気検出素子は、図3に示す磁気検出素子R11~R23の間に各1個ずつと、磁気検出素子R11,R23の一方の外側に1個配置されている。この結果、図4(e)に示すパルス信号の出力タイミングがA相とB相とでずれるため、A相のパルス信号とB相のパルス信号の出力状態より磁石11の回転方向を知ることができる。また外部出力端子25から得られるパルス信号により回転角度や回転速度を検知できる。 4 and 5, the configuration of the magnetic detection element and the integrated circuit is, for example, the A phase. Although not shown, the B phase having the same configuration exists. However, one B-phase magnetic detection element is arranged between the magnetic detection elements R11 to R23 shown in FIG. 3 and one outside the magnetic detection elements R11 and R23. As a result, since the output timing of the pulse signal shown in FIG. 4E is shifted between the A phase and the B phase, the rotation direction of the magnet 11 can be known from the output states of the A phase pulse signal and the B phase pulse signal. it can. Further, the rotation angle and the rotation speed can be detected by the pulse signal obtained from the external output terminal 25.
 磁気検出素子R11~R23としてはホール素子やAMR素子等も例示できるが、抵抗変化率が大きく、磁界の大きさではなく方向を検出するGMR素子とすることで、出力電圧を大きくでき、検出精度を向上させることが可能である。 Examples of the magnetic detection elements R11 to R23 include a Hall element and an AMR element. However, by using a GMR element that has a large resistance change rate and detects a direction instead of the magnitude of the magnetic field, the output voltage can be increased and the detection accuracy can be increased. It is possible to improve.
 なお、上記した実施形態では、円形状の磁石11が回転する回転型の磁気エンコーダであるが、例えば磁石11が棒状で直線移動する形態の磁気エンコーダでもよい。また、磁石が固定で、磁気センサが移動する形態にしてもよい。 In the above-described embodiment, a rotary magnetic encoder in which the circular magnet 11 is rotated is used. However, for example, a magnetic encoder in which the magnet 11 is linearly moved in a rod shape may be used. Further, the magnet may be fixed and the magnetic sensor may be moved.
R11~R23 磁気検出素子
T0 出力部
V0 中間電圧
V1 第1の閾値電圧
V2 第2の閾値電圧
10 磁気エンコーダ
11 磁石
12 回転体
20 磁気センサ
21 集積回路
22 第1のコンパレータ
23 第2のコンパレータ
24 OR回路
25 外部出力端子
26 差動増幅器
R11 to R23 Magnetic detection element T0 Output unit V0 Intermediate voltage V1 First threshold voltage V2 Second threshold voltage 10 Magnetic encoder 11 Magnet 12 Rotating body 20 Magnetic sensor 21 Integrated circuit 22 First comparator 23 Second comparator 24 OR Circuit 25 External output terminal 26 Differential amplifier

Claims (5)

  1.  相対移動方向に交互にN極とS極が着磁された着磁面を有する磁界発生部材と、前記磁界発生部材の前記着磁面から離れた位置に配置され、外部磁界に対して電気特性が変化する磁気検出素子及び集積回路を備えた磁気センサと、を有して構成される磁気エンコーダにおいて、
     前記磁気検出素子は、前記磁気センサに複数設けられており、複数の前記磁気検出素子は、中点に出力部を備える直列回路を構成するとともに、前記磁気センサに対する前記磁界発生部材の相対移動に伴い、中間電圧よりも高い高出力電圧が出力される高出力領域と、前記中間電圧よりも低い低出力電圧が出力される低出力領域とが交互に得られるように配置されており、
     前記集積回路には、前記直列回路の出力部側から二股に分かれて夫々接続される、前記高出力電圧と前記中間電圧間に第1の閾値電圧を有する第1のコンパレータと、前記低出力電圧と前記中間電圧間に第2の閾値電圧を有する第2のコンパレータと、前記第1のコンパレータ及び前記第2のコンパレータの各出力側と外部出力端子間に接続され、前記第1のコンパレータから得られたパルス信号と、前記第2のコンパレータから得られたパルス信号とを合成するOR回路と、を有して構成されることを特徴とする磁気エンコーダ。
    A magnetic field generating member having a magnetized surface in which N and S poles are alternately magnetized in the relative movement direction; and a magnetic field generating member disposed at a position away from the magnetized surface of the magnetic field generating member. In a magnetic encoder configured to include a magnetic detection element that changes and a magnetic sensor including an integrated circuit,
    A plurality of the magnetic detection elements are provided in the magnetic sensor, and the plurality of magnetic detection elements constitute a series circuit having an output portion at a midpoint, and are used for relative movement of the magnetic field generating member with respect to the magnetic sensor. Accordingly, a high output region where a high output voltage higher than the intermediate voltage is output and a low output region where a low output voltage lower than the intermediate voltage is output are alternately obtained,
    A first comparator having a first threshold voltage between the high output voltage and the intermediate voltage, connected to the integrated circuit in a bifurcated manner from the output part side of the series circuit, and the low output voltage And a second comparator having a second threshold voltage between the intermediate voltage and the first comparator and the output side of the second comparator and an external output terminal, and obtained from the first comparator. A magnetic encoder comprising: an OR circuit that synthesizes the obtained pulse signal and the pulse signal obtained from the second comparator.
  2.  前記高出力領域及び前記低出力領域では、それぞれ、前記高出力電圧及び前記低出力電圧が複数回、前記中間電圧を介して出力される請求項1記載の磁気エンコーダ。 The magnetic encoder according to claim 1, wherein the high output voltage and the low output voltage are output a plurality of times via the intermediate voltage in the high output region and the low output region, respectively.
  3.  複数の前記磁気検出素子は、前記直列回路の中点に対して一方側に直列接続される複数の第1磁気検出素子と、前記中点に対して他方側に直列接続される、前記第1磁気検出素子と同数の第2磁気検出素子とで構成されており、前記第1磁気検出素子と前記第2磁気検出素子とが、前記磁界発生部材の前記相対移動方向に沿って交互に配置されるとともに、複数の前記磁気検出素子は、前記磁界発生部材の前記相対移動方向におけるN極またはS極の1極の範囲内に収められている請求項2記載の磁気エンコーダ。 The plurality of magnetic detection elements are connected in series on the other side with respect to the midpoint, and a plurality of first magnetic detection elements connected in series on one side with respect to the midpoint of the series circuit. The number of second magnetic detection elements is the same as the number of magnetic detection elements, and the first magnetic detection elements and the second magnetic detection elements are alternately arranged along the relative movement direction of the magnetic field generating member. 3. The magnetic encoder according to claim 2, wherein the plurality of magnetic detection elements are housed in a range of one pole of N pole or S pole in the relative movement direction of the magnetic field generating member.
  4.  前記直列回路の出力部と、前記第1のコンパレータ及び前記第2のコンパレータとの間に増幅回路が設けられる請求項1ないし3のいずれか1項に記載の磁気エンコーダ。 4. The magnetic encoder according to claim 1, wherein an amplifier circuit is provided between the output unit of the series circuit and the first comparator and the second comparator. 5.
  5.  前記磁気検出素子はGMR素子(巨大磁気抵抗効果素子)である請求項1ないし4のいずれか1項に記載の磁気エンコーダ。 5. The magnetic encoder according to claim 1, wherein the magnetic detection element is a GMR element (giant magnetoresistive element).
PCT/JP2010/052532 2009-02-26 2010-02-19 Magnetic encoder WO2010098259A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10142313A (en) * 1996-11-07 1998-05-29 Japan Radio Co Ltd 2-bit quantization apparatus for gps receiver
JP2003106866A (en) * 2001-10-01 2003-04-09 Alps Electric Co Ltd Magnetic sensor
JP2007218610A (en) * 2006-02-14 2007-08-30 Alps Electric Co Ltd Magnetic encoder

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10142313A (en) * 1996-11-07 1998-05-29 Japan Radio Co Ltd 2-bit quantization apparatus for gps receiver
JP2003106866A (en) * 2001-10-01 2003-04-09 Alps Electric Co Ltd Magnetic sensor
JP2007218610A (en) * 2006-02-14 2007-08-30 Alps Electric Co Ltd Magnetic encoder

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