WO2010084493A1

WO2010084493A1 - Optical pixel and image sensor

Info

Publication number: WO2010084493A1
Application number: PCT/IL2010/000054
Authority: WO
Inventors: Alexander Belenky; Alexander Fish; Orly Yadid-Pecht; David Ofer
Original assignee: Elbit Systems Ltd.; Ben Gurion University Of The Negev Research And Development Authority
Priority date: 2009-01-26
Filing date: 2010-01-21
Publication date: 2010-07-29

Abstract

A photosensitive pixel includes a photosensor, an accumulation portion and a readout portion. The photosensor outputs a signal indicative of the intensity of incident light. The accumulation portion performs gated accumulation of the photosensor output signal over a sequence of time intervals. The gated accumulation timing is controlled by a gating control signal. The readout portion reads out the accumulated output. The photosensor and the accumulation portion are individually resettable in accordance with respective control signals, which are timed in accordance with the sequence of time intervals.

Description

OPTICAL PIXEL AND IMAGE SENSOR

FIELD AND BACKGROUND OF THE INVENTION

The present invention, in some embodiments thereof, relates to a light-sensitive pixel and, more particularly, but not exclusively, to a night vision system with an array of light-sensitive pixels.

Night vision systems are utilized to allow a user to see objects at relatively low visibility light levels. Vehicular night vision systems provide drivers with images of the road and surroundings at night or in low light conditions. In order to provide useful data to the driver, vehicular night vision systems should provide good quality images under all light and weather conditions which may be encountered while driving. Night vision systems typically are classified as either passive night vision systems or active night vision systems. Passive systems detect ambient infrared light emitted from the objects within a particular environment. Typically, images formed using passive night vision techniques have low video signal to noise ratio (SNR) and a relatively narrow field of view. Active systems deploy a light source and imager, such as charged coupled device

(CCD) or CMOS camera, which operate outside or inside the human visible spectral range. The light source transmits light energy, and the light's reflection is received by the imager and processed into an image. Active infrared (IR) night vision systems often operate in the near infrared (NIR) range, just beyond the visible spectrum of the human eye. Active systems typically provide improved resolution and image clarity over passive systems.

US Pat. No. 6730913 by Remillard, the contents of which are hereby incorporated herein by reference in their entirety, presents a night vision method which includes activating a light source as a sequence of light pulses. A camera is activated as a corresponding sequence of detection windows wherein each of the windows corresponds to one of the light pulses for receiving reflected light resulting from the corresponding light pulse. The time delay between each corresponding light pulse and detection window increases throughout the pulse train. The light pulse intensity or camera gain is increased throughout the pulse train, to provide a composite image in which the apparent brightness of near and far objects may be controlled.

US Pat. No. 6831689 by Yadid-Pecht and co-pending PCT appl. IL2007/001427 by Belenky et al., the contents of which are hereby incorporated herein by reference in their entirety, present a method in which the integration time of each pixel is controlled as a function of light intensity received by the individual pixel, by resetting the pixel after a predetermined threshold for the output signal, has been reached.

US Pat. Appl. 20070058038 by David Ofer, the contents of which are hereby incorporated herein by reference in their entirety, presents an imaging system in which the pulse and the gate timing are controlled for creating a sensitivity as a function of range. An imaging method includes emitting pulses to a target area with gated detection of the pulse reflections, and progressively increasing the received energy of the reflections by controlling the pulses and the timing of the gating.

SUMMARY OF THE INVENTION

Embodiments described below present a pixel having a wide dynamic range, and which is suitable for collecting reflected light pulses, and an image sensor which includes an array of such pixels. The pixel has a high SNR and wide dynamic range. Some image sensor embodiments present an active night-vision image sensor which utilizes pixels which operate in the NIR (and/or IR) frequency range. Other embodiments operate in the visible frequency range. Yet other embodiments operate in the X-ray frequency range, which is useful for X-ray three-dimensional imaging. The specific frequency range of operation is determined by the type of pixel utilized in the image sensor.

In some embodiments, imaging is performed by measuring returned light from short light pulses which are reflected by objects in the image sensor's field of view. Multiple accumulation time intervals are included in each frame, in order to improve SNR by non-accumulation of background and noise between the exposures. A pixel or pixels may be reset at intermediate points during the frame, in order to prevent pixel saturation. Some embodiments presented herein are directed at night-time use of the image sensor for collecting back-reflected light, typically at IR and/or NIR frequencies. However, in other embodiment the pixel/image sensor additionally or alternatively operates passively, meaning that the image sensor collects naturally-occurring incident light without illuminating the scene with a light source. In these embodiments the pixel gated accumulation described herein extends the pixel dynamic range because no charge is collected while the gate is off, and consequently decreasing the image sensor duty factor. An image sensor operating in passive mode may be used during the day. An example of such a daytime use is as a driving aid, to assist with problems such as driving into the sun, haze, and tunnels.

In some embodiments a mosaic filter is used to provide a color image during the day. The mosaic filter is transparent at the light source wave length, so as not to impede the collection of back-reflected light pulses at night time. An IR cut filter may be utilized during the day, and be removed at night to enable the NIR illumination. The image sensor may be adapted to global shutter operation, which exposes all the array pixels at the same time. Since a reflected light pulse arrives at the pixels simultaneously, exposing all pixels at the same time reduces image deformity when there is relative motion between the image sensor and the scene. Traditional CMOS image sensors typically employ rolling shutter operation which does not allow simultaneous integration of all pixels in the array, and may therefore provide lower quality images.

Using pulsed light allows multiple vision systems to operate simultaneously. Time division between the vision systems possibly prevents dazzling and mutual interference. In the following, the terms "accumulation" and "integration" and corresponding terms (e.g. accumulate and integrate) are used interchangeably, to indicate that the output signal is collected over the duration of one or more time intervals. For example, the charge output by a photosensor may be collected on a capacitor over the time interval(s). According to an aspect of some embodiments of the present invention there is provided a photosensitive pixel which includes a photosensor, an accumulation portion and a readout portion. The photosensor outputs a signal indicative of the intensity of incident light. The accumulation portion performs gated accumulation of the photosensor output signal over a sequence of time intervals. The gated accumulation liming is controlled by a gating control signal. The readout portion reads out the accumulated output. The photosensor and the accumulation portion are individually rcsettable in accordance with respective control signals, which are timed in accordance with the sequence of time intervals.

According to some embodiments of the invention, the gating control signal is synchronized to provide gated accumulation of a photosensor output signal in response to back-reflected light pulses from a specified distance range. According to some embodiments of the invention, the accumulation portion includes: an integration element, configured for integrating charge collected from the photosensor; and a gating switch between the photosensor and the integration element, configured for connecting and disconnecting the integration element and the photosensor in accordance with the gating control signal. According to some embodiments of the invention, the pixel is configured for full charge transfer from the photosensor to the accumulation portion. According to other embodiments of the invention, the pixel is configured for partial charge transfer from the photosensor to the accumulation portion.

According to an aspect of some embodiments of the present invention there is provided an image sensor which includes an array of photosensitive pixels, an accumulation controller and a reset logic controller. Each photosensitive pixel includes a photosensor, an accumulation portion and a readout portion. The photosensor outputs a signal indicative of the intensity of incident light. The accumulation portion performs gated accumulation of the photosensor output signal over a sequence of time intervals. The gated accumulation timing is controlled by a gating control signal. The readout portion reads out the accumulated output. The photosensor and the accumulation portion are individually resettable in accordance with respective control signals, which are timed in accordance with the sequence of time intervals. The accumulation controller is configured for controlling the gated accumulation for each of the pixels. The reset logic unit is configured for resetting a pixel accumulated output level if the pixel will saturate during the accumulation. According to some embodiments of the invention, the accumulation controller is operable to synchronize the gated accumulation for a given pixel with a sequence of transmitted light pulses, so as to accumulate a respective photosensor output over a sequence time intervals corresponding to back-reflected light pulses from a specified distance range, and to prevent the accumulation between the time intervals.

According to some embodiments of the invention, the back-reflected light pulses are reflected laser pulses.

According to some embodiments of the invention, back-reflected light pulses are reflected light-emitting diode (LED) pulses. According to some embodiments of the invention, the back-reflected light pulses are reflected arc light pulses.

According to some embodiments of the invention, the accumulation controller is further operable to reset the photosensor prior to each of the time intervals.

According to some embodiments of the invention, the reset logic unit is further operable to perform a non-destructive readout of the pixel at a sequence of time points during the accumulation, and to determine from the readout whether a pixel will saturate during the accumulation.

According to some embodiments of the invention, the reset logic unit is configured to determine if a pixel will saturate by comparing the non-destructive readout to a threshold.

According to some embodiments of the invention, the reset logic unit is operable to determine if a pixel will saturate at progressively closer time points.

According to some embodiments of the invention, the image sensor further includes a processor configured for calculating an output illumination level associated with a given pixel in accordance with a respective record of pixel accumulated output resets and a respective final pixel readout.

According to some embodiments of the invention, the processor is operable to calculate the output illumination level as a product of the final pixel readout and a scaling factor derived from the record of pixel accumulated output resets. According to an aspect of some embodiments of the present invention there is provided a method for measuring reflected light pulses. The method includes: exposing a photosensor over time intervals synchronized with a plurality of transmitted light pulses; accumulating a photosensor output over a plurality of the time intervals; determining, at a sequence of times during the accumulating, if the accumulated output is liable to saturate prior to the end of the accumulating, and resetting the accumulated output if saturation prior to the end of the accumulation is indicated; and reading out a final level of the accumulated output.

According to some embodiments of the invention, the photosensor exposure is synchronized to collect back-reflections of the light pulses from a selected distance range.

According to some embodiments of the invention, the method further includes transmitting the light pulses by pulsing a laser.

According to some embodiments of the invention, the method further includes transmitting said light pulses by pulsing an LED light source.

According to some embodiments of the invention, the method further includes transmitting said light pulses by pulsing an arc light. According to some embodiments of the invention, the method further includes preventing accumulation of photosensor output between the time intervals.

According to some embodiments of the invention, the method further includes resetting the photosensor prior to each of the time intervals.

According to some embodiments of the invention, the method further includes: determining a scaling factor from a number of resets performed during the accumulation, and adjusting the final output level in accordance with the scaling factor.

According to some embodiments of the invention, adjusting the final output level includes multiplying the final output level by the scaling factor.

According to some embodiments of the invention, determining a scaling factor includes performing a non-destructive readout of the accumulated output and comparing the accumulated output level to a threshold.

Unless otherwise defined, all technical and/or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the invention pertains. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of embodiments of the invention, exemplary methods and/or materials are described below. In case of conflict, the patent specification, including definitions, will control. In addition, the materials, methods, and examples are illustrative only and are not intended to be necessarily limiting.

Implementation of the method and/or system of embodiments of the invention can involve performing or completing selected tasks manually, automatically, or a combination thereof. Moreover, according to actual instrumentation and equipment of embodiments of the method and/or system of the invention, several selected tasks could be implemented by hardware, by software or by firmware or by a combination thereof using an operating system.

For example, hardware for performing selected tasks according to embodiments of the invention could be implemented as a chip or a circuit. As software, selected tasks according to embodiments of the invention could be implemented as a plurality of software instructions being executed by a computer using any suitable operating system. In an exemplary embodiment of the invention, one or more tasks according to exemplary embodiments of method and/or system as described herein are performed by a data processor, such as a computing platform for executing a plurality of instructions. Optionally, the data processor includes a volatile memory for storing instructions and/or data and/or a non-volatile storage, for example, a magnetic hard-disk and/or removable media, for storing instructions and/or data. Optionally, a network connection is provided as well. A display and/or a user input device such as a keyboard or mouse are optionally provided as well.

BRIEF DESCRIPTION OF THE DRAWINGS

Some embodiments of the invention are herein described, by way of example only, with reference to the accompanying drawings. With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of embodiments of the invention. In this regard, the description taken with the drawings makes apparent to those skilled in the art how embodiments of the invention may be practiced.

In the drawings: FIG. 1 is a simplified graph illustrating considerations for threshold selection;

FIG. 2 is a simplified graph illustrating a respective pixel output after processing by two comparators having different offset values; FIG. 3 is a simplified block diagram of a photosensitive pixel, according to a preferred embodiment of the present invention;

FIG. 4 is a simplified block diagram of an image sensor, according to a preferred embodiment of the present invention; FIG. 5 is a simplified block diagram of a column-parallel image sensor, according to a preferred embodiment of the present invention;

FIG. 6 is a simplified flowchart block diagram of a method for measuring reflected light pulses, according to a preferred embodiment of the present invention;

FIG. 7 is a simplified schematic diagram of a pixel with external processing circuitry and external digital memory, according to a first exemplary embodiment of the present invention;

FIG. 8 is a simplified timing diagram illustrating the operation of an exemplary embodiment of an image sensor;

FIG. 9 is a simplified graph illustrating charge sharing between the Integration Capacitor and Storage Capacitor;

FIG. 10 is an exemplary transistor embodiment of a pixel, according to a preferred embodiment of the present invention; and

FIG. 11 is a simplified schematic diagram of a pixel with external processing circuitry and external digital memory, according to a second exemplary embodiment of the present invention.

DESCRIPTION OF SPECIFIC EMBODIMENTS OF THE INVENTION

Embodiments of image sensors presented below measure the returned light from short light pulses, which are reflected by objects in the image sensor's field of view. In some embodiments, the reflected light is sensed by a pixel with gated accumulation of the output of a photosensor (also denoted herein a photosensing element). The electronic gating is preferably operated synchronously with a pulsed light source in order to expose the photosensor to light reflected from a selected distance range.

Due to the gating, the amount of reflected light that falls into a single time window is small relative to that in continuous exposure systems. In order to increase the pixel output signal, multiple exposures are performed during a single frame and the photosensor output is integrated over these multiple exposures. Sensor output integration is prevented between the exposure intervals in order to avoid integrating background and other noise between the exposures. In order to prevent pixel saturation during times of stronger lighting, the pixel output level is checked at intermediate times during the frame and the pixel is reset if it is liable to saturate before the end of the frame. A record of the resets performed on the pixel during the course of the frame is maintained. A scaling factor may be derived therefrom, in order to adjust the pixel readout signal if necessary due to pixel reset.

Some of the embodiments presented below are directed photosensors which provide a cumulative response to incident light over the exposure period. Embodiments arc possible for photosensors with electron integration, in which the voltage decreases over time. For example, in an alternate embodiment the process is implemented "in reverse" for photosensors in which the readout voltage decreases over time. The photosensor readout voltage is then compared to an appropriate sequence of thresholds, to determine whether the readout voltage is lower than the current threshold.

For purposes of better understanding some embodiments of the present invention, as illustrated in Figures 1-13 of the drawings, reference is first made to an embodiment of a method for expanding a pixel dynamic range.

In the present embodiment, the required expansion of the pixel's dynamic range is determined by a series of W-bits. The full integration time is subdivided into W time points, which are progressively closer together according to the decreasing series:

where X > 1 and T_mr represents the full integration time. At the beginning of the frame, all pixels in the image sensor are reset simultaneously to ensure global shutter operation of the image sensor (also denoted herein the imager). Then the output of each pixel in row /c is compared with an appropriate threshold, at time points given by:

T T I₁NT/

^X INT At, ,...,l_INT_ ¹INT_/

'x^γ - At₁, (2)

In the present embodiment, the photosensor is reset multiple times between each time point. Prior to each of these resets, the photosensor charge is transferred to a capacitor, which performs gated collection of the photosensor charge. During pixel readout, the pixel output level is read from the capacitor. The voltage on the capacitor is compared to a threshold voltage, and according to the result of this comparison the capacitor is or is not reset.

The comparison is performed by enabling a column shared comparator with constant threshold value V_lh to all pixels in the array, in a row-by row manner. Each comparator performs a comparison for a single pixel in the current row. The comparison is performed on all rows, one at a time. The comparison determines whether the pixel in the given column of the enabled row is going to be saturated at the next integration slot. This binary information is stored, for example in an external digital memory in a different part of the sensor.

If any of the comparisons determines that the pixel will saturate at the end of the current interval, the pixel is reset by applying a reset signal to the pixel. The pixel is then allowed to start integrating light again, but for a shorter period of time. Note that the reset may be applied simultaneously to all pixels in array for snapshot mode. This enables proper scaling of the value being read out, and enables the pixel value to be described in a floating-point representation. The pixel value is calculated as:

Value = Man (4)

where Value is the actual pixel value, Man (Mantissa) is the analog or digitized output value that has been read out at the time point T_INr , EXP is the exponent value, that is stored in the digital memory and describes the scaling factor (i.e. which part of the full integration time is actually effective.) The exponent value is retrieved from digital memory at the end of overall integration period, T_mr . Threshold selection is performed to avoid the effect of pixel saturation. As previously mentioned, the algorithm checks a threshold point after the first non-final readout period (e.g. T ^/NT — ( ^κT '^ω ' Ix ' ^ ' ), and makes a decision whether it is anticipated that the pixel will be saturated at the end of the integration period. Therefore, the γ intrinsic threshold value "'-' is preferably chosen so that the pixel voltage will not descend below the threshold value before TINT- The intrinsic threshold is the threshold for the theoretical case in which ^{k ~} and the comparator has no offset.

In the preferred embodiment, the charging of the pixel is modeled as a straight line from V_tesel (photodiode reset voltage) at zero time to threshold voltage V_lh . at T₁

(the first sub -integration period). FIG. 1 illustrates that the threshold is preferably selected so that the line does not cross voltage V_ial before T_INT . V _{1 m} is a maximum pixel voltage swing, or, in other words, the difference between V_mel and V_sal values.

The equation of the straight line 100 is given by:

To find the value of the intrinsic threshold voltage V_lh , , T_1N , -(T_]NI /Z¹) is substituted into the line equation, resulting in the Eqn. 6:

V. v_{ιh ι} ≤v_m - pixel _Dn

(θ)

Z¹

In real designs each comparator has its own offset voltage. Therefore, for two different comparators having two different offset voltages the comparison will be performed at different points even the same threshold voltage V_{lh (} was set. FIG. 2 shows an example of two pixels charging at the same illumination level, and being processed using two comparators having different offset values. The same V_th , was applied for both cases.

As can be seen, there is immunity to the change in comparator offsets, since in both cases the final results are the same. In the first case (line 200), the pixel value did not pass the threshold voltage V₁₁₁ , and therefore the pixel was not reset at the first check. In the second case (dashed line 210), the pixel value did pass the threshold voltage V_{111 t} + V_φel , and therefore the pixel was reset at the first check.

Nonetheless, the final results (see Eqn. 4) remain similar for both cases. However, in the second case, the SNR of the pixel is reduced since the integration time was reduced. Alternately, the comparator's offset voltage may be taken in account when the threshold voltage is calculated. The threshold voltage V_lh may then be given by:

v_A =v_rt_,-|K^| (7)

Before explaining at least one embodiment of the invention in detail, it is to be understood that the invention is not necessarily limited in its application to the details of construction and the arrangement of the components and/or methods set forth in the following description and/or illustrated in the drawings and/or the Examples. The invention is capable of other embodiments or of being practiced or carried out in various ways.

In the following, parts that are the same as those in previous figures are given the same reference numerals and are not described again except as necessary for an understanding of the present embodiment.

Some of the embodiments presented below are directed at a photosensor with electron integration, in which the voltage increases over time. Embodiments are possible for different types of photosensors, which provide a cumulative response to incident light over the exposure period. For example, in an alternate embodiment the process is implemented "in reverse" for photosensors in which the readout voltage decreases over time. The photosensor readout voltage may then compared to an appropriate sequence of thresholds, to determine whether the readout voltage is lower than the current threshold.

The embodiments of a photosensitive pixel described below present a pixel architecture which peimits accumulating signals generated by the incoming light pulses while ensuring that the pixel does not saturate under strong lighting conditions. Referring now to the drawings, FIG. 3 is a simplified block diagram of a photosensitive pixel, according to a preferred embodiment of the present invention. Photosensitive pixel 300 includes photosensor 310, accumulation portion 320 and readout portion 330. Photosensor 310 and accumulation portion 320 are individually rcsettable in accordance with respective control signals.

Photosensor 310 outputs a signal indicative of an intensity of incident light. Photosensor 310 is reset by inputting the appropriate photosensor reset control signal. Some embodiments of photosensor 310 utilize a photodiode with voltage sharing or charge transfer, or a photogate, or a pinned photodiode, as discussed in more detail below, however other types of photosensors may be used. The following types of photosensors may be used: photodiodes, phologates, metal-oxide semiconductor (MOS) capacitors, posilive-intrinsic-negative (PIN) photodiodes, a pinned photodiodes, avalanche pholodiodes or any other suitable photosensitive element. Some types of photosensors may lequire changes in the pixel structure. In some embodiments, an IR cut-off filter is used to restrict the wavelengths of the incident light arriving at photosensor 310. In other embodiments, IR cut-off filter is not used.

Accumulation portion 320 performs gated accumulation of the photosensor output signal over a sequence of time intervals. The accumulated output level is reset by inputting a pixel reset signal into accumulation portion 320. The timing of the accumulation time intervals is controlled by a gating control signal, as described below.

In the following, "pixel reset" and corresponding terms indicate that the accumulated output level is reset, and do not refer to resetting the photosensor or readout portion. The terms "gating switch" and "gating control signal" and corresponding terms relate to the gated accumulation within the pixel.

The photosensor reset control signal and gating control signal may be synchronized with transmitted light pulses, so that accumulation portion 320 integrates photosensor charge only during the arrival of back-reflected light pulses from a particular distance range.

In some embodiments the back-reflected light pulses are reflected laser pulses. In other embodiments the back-reflected light pulses are reflected light-emitting diode (LED) pulses. In yet other embodiments the back-reflected light pulses are reflected arc light pulses. In one embodiment accumulation portion 320 includes integration element 322 which integrates charge collected from photosensor 310, and gating switch 324 which is located between photosensor 310 and integration element 322 (e.g. an integration capacitor). Gating switch 324 connects and disconnects integration element 322 and photosensor 310 in accordance with the gating control signal. In the preferred embodiment, the pixel is configured for full charge transfer from photosensor 310 to integration element 322. In other embodiments the pixel is configured for partial charge transfer from photosensor 310 to integration element 322, which may affect pixel performance.

Readout portion 330 serves to read out the pixel output signal. Readout portion 330 is reset by inputting the appropriate readout reset control signal.

The above-described pixel with flag may be formed into an array, and incorporated into an image sensor. Reference is now made to FIG. 4, which is a simplified block diagram of an image sensor, according to a preferred embodiment of the present invention. Image sensor 400 includes pixel array 410, accumulation controller 420, and reset logic unit 430. Each pixel in pixel array 410 may be reset independently. Additionally, photosensor reset, gating switch timing, and nondestructive readout may be performed for each of the pixels independently.

Pixel array 410 includes multiple pixels. In some embodiments, each pixel in pixel array 410 includes a photosensor, accumulation portion and readout portion, substantially as described above. In other embodiments, pixels outside a specified portion or portions of the pixel array portion may have a simpler (or different) configuration. The following discussion is directed to an image sensor in which all pixels have the architecture of pixel 300 described above. It is to be understood that pixel array 410 may be a portion of a larger array formed of pixels with differing architectures. In the embodiment of Fig. 4, pixel array 410 is illustrated as an NxM array of pixels 41O.xy. In other embodiments the multiple pixels in the array may be organized in a non-rectangular configuration.

Accumulation controller 420 controls the gated accumulation of each of the pixels. Accumulation controller 420 provides photosensor reset control signal and gating control signal to the array pixels. The control signals may be provided to the array pixels on a row-by-row basis.

In some embodiments, accumulation controller 420 synchronizes the gated accumulation with transmitted light pulses by providing appropriately timed gating control signals, so that accumulation is performed over a sequence time intervals corresponding to back-reflected light pulses from a specified distance range.

The photosensor output is preferably not accumulated between these intervals. In one embodiment, accumulation controller 420 resets the pixel's photosensor immediately prior to the beginning of each time interval (i.e. gate). At the end of each interval, the pixel's gating switch is closed to permit charge transfer (or charge sharing) to the pixel's integration element.

Accumulation controller 420 may also control light pulse generator 440, in order to transmit the required light pulse sequence. Embodiments of light pulse generator 440 include an NIR laser. Other embodiments of light pulse generator 440 include an LED light source or arc light.

Reset logic unit 430 resets the pixels in the array as needed, to prevent pixel saturation during the accumulation (i.e. within a frame). Reset ^"logic unit 430 provides pixel reset control signals to the array pixels.

In one embodiment, reset logic unit 430 performs a non-destructive readout of the current accumulated output level of each of the array pixels, at a sequence of time points during the accumulation. Reset logic unit 430 then determines from each readout level whether the respective pixel will saturate during the accumulation. The determination may be made by comparing the current readout to a threshold. If the threshold was crossed and the pixel was reset in the preceding interval, reset logic unit 430 resets the pixel. Otherwise the pixel is not reset. Preferably reset logic unit 430 determines if each of the pixels will saturate at progressively closer time points, as described above. In some embodiments, reset logic unit 430 includes one or more comparator units 435, which serve for comparing the pixel readout level to the threshold.

In some embodiment, image sensor 400 includes processor 450 which calculates each pixel's illumination level based on the final pixel readout and a record of the resets which were performed on the pixel's accumulated output level during the course of the frame. In one embodiment, the processor derives a scaling factor based on the number of pixel resets performed, and calculates the pixel's illumination level by multiplying the final pixel readout and the scaling factor.

In the preferred embodiment, the image sensor is organized in column-parallel architecture, which enables sharing the processing circuits among the pixels in a column.

Reference is now made to FIG. 5, which is a simplified block diagram of a column-parallel image sensor, according to a preferred embodiment of the present invention. In this architecture, pixel array 510, memory array 560, and processing elements 550 are separated. The overall image sensor architecture shown in FIG. 5 is similar to the architecture described in O. Yadid-Pecht, R. Ginosar and Y. Shacham- Diamand, "A random access photodiode array for intelligent image capture", IEEE Trans. on Elec. Dev., Vol. 38, No. 8, pp. 1772 - 1781, Aug.1991 (denoted herein Yadid- Pecht et al), which is hereby incorporated herein by reference in its entirety. However, the pixel architecture and functionality, as well as the overall image sensor control, are significantly different from the Yadid-Pecht et al architecture, due to the accumulated gating that is performed within the pixel as described herein. The image sensor includes pixel array 510, one row (vertical) decoder 520 with row logic, two column (horizontal) decoders 530.1 and 530.2, column readout circuits

540, processing elements 550, and external memory array 560.

Each pixel in pixel array 510 includes a photosensor, accumulation portion and readout portion. The photosensor and accumulation portion (i.e. gating) are individually rescttable in accordance with respective control signals. Each pixel in the pixel array may be reset al any time point, and nondestructive readout of each pixel may be performed at any time during the integration period.

Processing elements 550 contain the saturation detection circuitry that is shared by all pixels in a column. Because of this column parallel architecture, the pixel array contains a minimum amount of additional circuitry and there is a little sacrifice in a fill factor compared with existing high dynamic range systems.

Reference is now made to FIG. 6, which is a simplified flowchart of a method for measuring reflected light pulses, according to a preferred embodiment of the present invention. If the integration time is divided into multiple intervals, steps 620-650 are repeated for each interval. At the end of the frame, a final readout of the accumulated output level is performed. The accumulated output level is reset, and the process is repeated for subsequent frames if required.

In 610, a pixel photosensor is exposed to light over time intervals synchronized with a plurality of transmitted light pulses. The time intervals are preferably selected so that the photosensor is exposed to back-reflections of the transmitted light pulses from a selected distance range. In an embodiment, the method includes the further step of transmitting the light pulses, for example by pulsing a laser, LED light source or arc light.

In 620, the photosensor output is accumulated over multiple time intervals. Preferably, the accumulation is prevented between the time intervals, to avoid collecting background and other noise. In an embodiment, the method includes the further step of resetting the photosensor prior to each of the time intervals. A non-destructive readout of the pixel is performed at 630, at the end of a single interval. After the non-destructive readout, it is determined if the pixel will saturate prior to the end of the frame. Preferably the determination is made by comparing the readout level to an appropriate threshold. If the pixel is liable to saturate, the pixel is reset 640. Otherwise, accumulation the pixel is not reset. If the integration time is not finished 650, steps 620-650 are repeated until the end of the frame.

If the integration time is finished, a readout of the final level of the accumulated output is performed 660. In the preferred embodiment, the readout is performed on the pixel array on a row by row basis. The pixel array rows are enabled in turn, and the output levels of the pixels in the enabled row are read out.

In some embodiments the method includes the further step of calculating the pixel illumination level at the end of the frame. In some embodiments, a scaling factor is derived, based upon the resets which were performed during the frame. The final output level is adjusted in accordance with the scaling factor, for example by multiplying the final output level by the scaling factor.

In some embodiments the method includes the further step of transmitting the light pulse, for example by pulsing a laser. Thus the laser timing and the pixel reset and control signal timing may be easily synchronized.

The abovedescribed embodiments present an image sensor which may be synchronized with an external active pulsed light source, and an embodiment for a pixel for the image sensor pixel array. A method for measuring illumination suitable for a pixel with the proposed structure is also presented. Some embodiments of the image sensor provide a low-light, high-responsivity night vision system, with high SNR and a wide dynamic range. Exemplary embodiments of the image sensor utilize global multi- shuttering, suitable for the automotive market. The wide dynamic range reduces imager saturation due to oncoming headlights, retro-reflectors and mirror dazzling, possibly reducing image quality degradation and object vanishing. It is expected that during the life of a patent maturing from this application many relevant photosensors, image sensors, imagers, pixels, memories, and readout modes will be developed and the scope of the term photosensor, image sensor, imager, pixel, memory, and readout mode is intended to include all such new technologies a priori.

The terms "comprises", "comprising", "includes", "including", "having" and their conjugates mean "including but not limited to". The term "consisting of means "including and limited to".

The term "consisting essentially of" means that the composition, method or structure may include additional ingredients, steps and/or parts, but only if the additional ingredients, steps and/or parts do not materially alter the basic and novel characteristics of the claimed composition, method or structure. Throughout this application, various embodiments of this invention may be presented in a range format. It should be understood that the description in range format is merely for convenience and brevity and should not be construed as an inflexible limitation on the scope of the invention. Accordingly, the description of a range should be considered to have specifically disclosed all the possible subranges as well as individual numerical values within that range. For example, description of a range such as from 1 to 6 should be considered to have specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6 etc., as well as individual numbers within that range, for example, 1, 2, 3, 4, 5, and 6. This applies regardless of the bieadth of the range. It is appreciated that certain features of the invention, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination or as suitable in any other described embodiment of the invention. Certain features described in the context of various embodiments are not to be considered essential features of those embodiments, unless the embodiment is inoperative without those elements.

Various embodiments and aspects of the present invention as delineated hereinabove and as claimed in the claims section below find support in the following examples. EXAMPLES

Reference is now made to the following examples, which together with the above descriptions illustrate some embodiments of the invention in a non-limiting fashion. Reference is now made to FIG. 7, which is a general schematic of a single pixel according to an exemplary embodiment of the present invention, along with corresponding processing circuitry and a digital memory. Both the processing circuitry 770 and digital memory 780 are located in the pixel periphery. Note, that both processing circuit 770 and pixel 700 may be designed in different ways, while still implementing the described algorithm.

Pixel 700 includes Photosensing element 710 (i.e. photosensor) and Integration c

Capacitor ^m 715, which are connected through Gating Switch 720. Gating Switch

720 may be opened and closed (with the appropriate control signal), enabling full or partial charge transfer from Photosensing element 710 to Integration Capacitor 715. Gating Switch 720 may be operated synchronously with the pulsed laser, so that the back-reflected light is integrated only when it comes from the imaged distance inteival. Then, during the laser "off period, Photosensing element 710 is reset through Photosensing element Reset Switch 725. This allows contrast improvement due to non- integration of background and noise between the exposures. Integration Capacitor 715 is reset by Integration Capacitor Reset Switch 730, which is controlled by the output of AND gate 760.

Each of the switches shown in FIG. 7 is controlled by a respective control signal, which is not shown on the figure. c

Storage Capacitor ^sl 735 is incorporated within pixel 700, in order to allow reading the signal during the accumulation process (i.e. at intermediate points within the frame) by disconnecting Storage Switch 740. Storage Capacitor Reset Switch resets Storage Capacitor 735.

Pixel Amplifier 750 is used for analog signal readout. Row Select Switch 755 permits the selection of the specific row for readout (when the pixel is incorporated into an array). All switches in the pixel except Row Select Switch 755 and Integration Capacitor Reset Switch 730 are typically operated globally for all the pixels in the pixel array. Row Select Switch 755 is operated separately for each row. The "Row Reset" signal (that along with the logic signal from Processing circuit 770 operates Integration Capacitor Reset Switch 730) may be applied either simultaneously to all rows or separately to each row.

Processing circuit 770 consists of one AND gate 771, two OR gates 772/773, and Latch 774. In addition, analog comparator 775 is employed to compare the pixel output to the predefined threshold voltage at each time point, in order to determine if a pixel will saturate before the end of the frame.

The circuit presented in FIG. 7 may be incorporated into an image sensor which operates as described below. Signal timing is illustrated in FIG. 8.

The Reset Phase r At the beginning of the frame, Integration Capacitor ^mι 715 is reset to the

VRST voltage, by globally applying "Row Reset" = ¹I¹ and "Global Rcset"=T simultaneously to all the pixels in array. Storage Switch 740 is "off" during the reset period. The Reset Phase is stopped by applying "Row Reset" = '0', and the Initial Integration Phase starts.

The Initial Integration Phase

Photosensing element 710 starts producing charge carriers, according to the energy of the back-reflected laser pulses. When each of the back-reflected laser pulses ends, the Gating Switch 720 is momentary closed, and the accumulated charge is fully transferred to ^IN1 715. Photosensing element Reset Switch 725 is then closed to avoid charge generation during the background period and to reset the Photosensing element 710. This operation is repeated continuously.

During this period, the "Global Reset"='O'. Before reaching the first time point

(^{Ti = T}'^{NI ~}(^T'^Nl '^X 0, the Storage Capacitor ^C« 735 capacitor is reset to VRST by

Q closing Storage Capacitor Reset Switch. Once Storage Capacitor ^•" 735 reset is completed, Storage Switch 740 is switched "on", to allow charge sharing between

C C

Integration Capacitor ^INr 715 and Storage Capacitor "' 735. The voltage on the

Integration Capacitor 715 at the end of the charge sharing is similar to the voltage that could be achieved by charging the Integration and Storage capacitances connected together from the beginning of the integration, as shown in FIG. 9.

The Initial Decision Phase

At the first time point Ti, Photosensing element 710 is disconnected from ^INT

715 and Storage Capacitor C ^sl 735 (that now act as a single capacitance C ^mτ--^st ) by

C V opening Gating Switch 720. The voltage on ^INT-^Sl ( ""-" ) represents the signal that

was integrated until

V the ""-^« voltage is read out using the analog buffer and is compared with an appropriate threshold "' . The comparator result is transmitted directly to the input of in-pixel AND gate 760 and to the external digital memory 780 associated with the pixel ("First bit"='l' is applied), and "Row Reset" signal is activated specifically for current row. If

V >V, ""-" , meaning that the pixel will saturate at the end of the integration time, digital

C v V <V memory 780 is loaded with 1' and ^m'-" is reset to ^»' . Otherwise, (if *"-" "' ) the pixel will not saturate at the end of the integration time, and digital memory 780 is loaded with '0' and the pixel is not reset. The described process is then sequentially repeated for each row.

The ^k is a short time associated with row ^ and given as:

^k - k ^'TdecLύon' Ic =l,2,...,N

(8)

where T *•^■<-'•^«"«« is the decision time and N is the number of array rows. The Integration Phase

The Integration Phase differs from Initial Integration Phase only by the state of Storage Switch 740 which is "on". Storage Switch 740 remains "on" till the end of the integration time T ^IN1 .

The Initial Decision Phase

T = T — (T /X²) At time point ^{2 INI} \ ^INI ' J _^ the Initial Decision Phase is repeated, with the only difference being that the binary information of whether or not a reset was applied pievious time point is retrieved from the corresponding digital memory. The binary information is input into Latch 774, and "AND"ed with the result of the pixel voltage comparison with "' ("First bit"='O' is applied). If ""--' "' and the retrieved digital data is '1' (meaning that pixel was reset at the previous time point), the external

V >V, memory is loaded with '1' and the pixel is reset again. If ""-^« ' but the retrieved digital data is '0' (meaning that the pixel was not reset at the previous time point), the external memory is loaded with '0' and the pixel continues integration without reset.

V <V Finally, if ""-^« "' , independent of the retrieved data, the external memory is loaded with '0' and the pixel will continue integration without reset.

The Readout phase At the end of the full integration time T ^im , Storage capacitor C ^st 735 is disconnected from Integration Capacitor ^mi 715 by turning "off Storage Switch 740. Once charge transfer has been completed, Photosensing element 710 is able to begin a new frame exposure (i.e. reset phase and integration phase), and the charge on Storage

Capacitor ^s( 735 is held there until it is read out at its assigned time in a row-by-row readout sequence through the output chain.

In order to determine the illumination level (see Eqn. 4), the value of the readout signal is associated with the analog value Man. The scaling factor is derived from the information stored in the digital memory at this time. Note that the data from the image sensor may be read out at the same time as a Reset and Initial Integration Phases occur. The Decision and the Readout Phases are repeated performed then for all

remaining time points

Transistor implementation of the proposed pixel FIG. 10 shows an exemplary transistor embodiment implementation of pixel 700.

Each of the switches is implemented as a single MOS transistor. The "AND" gate is realized as a two serially connected MOS transistors. The pixel amplifier is implemented as a source follower structure, where the load transistor is located out of the pixel (one per column). The Integration Capacitor is associated with the parasitic capacitances of the Gating, Integration Capacitor Reset and Storage Switches drains. The Storage Capacitor is associated with the parasitic capacitances of the Storage Capacitor Switch transistor drain, the Storage Switch transistor source and Source Follower transistor gate.

I) Readout speed embodiments

As previously mentioned, the Initial Integration Phase starts at the beginning of

T - T — (T I X^\ the frame and ends at the first time check point ( ^{] /Λ/y} I ^IN1 ' /). χh_e readout phase is pei formed during the same time, affecting a lower boundary for this time interval. The row readout process usually consists of two steps. The first step, a "copy" step, occurs when the sensor data from the selected row is copied simultaneously (for all columns) into a sampling capacitor bank at the bottom of the columns. The time this step takes is T_copy , typically equal to 0.5 μsec. The second step, a readout scanning step, occurs when the capacitor bank is then scanned sequentially for readout, which takes a T_scmι peiiod of time, typically equal 0.05 μsec per pixel. The next row is then selected and the procedure is repeated.

If there are M pixels in a row (i.e. M columns), then the total time for row readout, T₁₁₀ , is T₁₁₀ - T_copy +MT_κβn . The total time to read out a frame with N rows is

NT₁₁₁₁ =N[T_uψy +MT_scm) . Hence for a 640x480 resolution, the expected CMOS sensor readout time is 15 msec. Some embodiments include one or more of the following features, which may serve to boost readout speed:

1) Column-parallel A/D converters are incorporated in the readout circuitry

2) Multiple column readout is used for one column of pixels 3) The digital output and the analog output are separated by adding additional circuitry (see for example FIG. 13).

II) Decision Phase Time

The system dynamic range (e.g. the number of possible bits in the exponent) is dependant upon the Decision Phase time, since the Decision Phase limits the time

interval between the last sample time, T ^w =τ ^]m' ~( ^τ lx^w\ > , and the beginning of the next frame. In order to improve performance, ^k should be kept as small as possible, and therefore a small T ^(fccWmi is desired. As previously mentioned, T ^fa™"^» is the time, required to decide whether each pixel in the specific row is going to be saturated at the

T next integration slot. ^tfec"'°" may be described as:

T decision = T mem __ read + T comp +T mem __ write ( V9^s) '

where T_{man ιead} is the time required to retrieve the digital information from the memory during the decision process (since the algorithm relies on previous stored information), T_ump is the time required to accomplish the digital processing and pixel voltage comparison, and T_{mm mil(!} is the time required to write the digital information into the memory.

One factor that affects T_decakm is memory size. In an exemplary embodiment described above, each pixel may have W reset points. In order to hold all digital data, the memory array size in a straightforward design consists of M x N x W memory cells. Reducing the memory size may reduce T_deciilgn , consequently improving dynamic range.

Some embodiments include one or both of the following features, which may serve to increase dynamic range: 1) A dual-port memory is used Io reduce the time required to retrieve the digital information during the decision phase

2) The W resets are represented as binary numbers (or in any other more compact format), leading to a decreased memory size of M x N x Iog₂(w) for binary representation.

Although the invention has been described in conjunction with specific embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art. Accordingly, it is intended to embrace all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims.

All publications, patents and patent applications mentioned in this specification are herein incorporated in their entirety by reference into the specification, to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated herein by reference. In addition, citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present invention. To the extent that section headings are used, they should not be construed as necessarily limiting.

Claims

WHAT IS CLAIMED IS:

1. A photosensitive pixel comprising: a photosensor, configured for outputting a signal indicative of an intensity of incident light; an accumulation portion associated with said photosensor, configured for performing gated accumulation of said photosensor output signal over a sequence of time intervals in accordance with a gating control signal for contiolling the timing of said gated accumulation; and a readout portion associated with said accumulation portion, configured for reading out said accumulated output signal; wherein said photosensor and said accumulation portion are individually resettable in accordance with respective control signals timed in accordance with said sequence of time intervals.

2. A photosensitive pixel according to claim 1, wherein said gating control signal is synchronized to provide gated accumulation of a photosensor output signal in response to back-reflected light pulses from a specified distance range.

3. A photosensitive pixel according to claim 1, wherein said accumulation portion comprises: an integration element, configured for integrating charge collected from said photosensor; and a gating switch between said photosensor and said integration element, configured for connecting and disconnecting said integration element and said photosensor in accordance with said gating control signal.

4. A photosensitive pixel according to claim 1, wherein said pixel is configured for full charge transfer from said photosensor to said accumulation portion.

5. A photosensitive pixel according to claim 1, wherein said pixel is configured for partial charge transfer from said photosensor to said accumulation portion.

6. An image sensor comprising: an array comprising a plurality of photosensitive pixels according to claim 1; an accumulation controller configured for controlling said gated accumulation for each of said pixels; and a reset logic unit, configured for resetting a pixel accumulated output level if said pixel will saturate during said accumulation.

7. An image sensor according to claim 6, wherein said accumulation controller is operable to synchronize said gated accumulation for a given pixel with a sequence of transmitted light pulses, so as to accumulate a respective photosensor output over a sequence time intervals corresponding to back-reflected light pulses from a specified distance range, and to prevent said accumulation between said time intervals.

8. An image sensor according to claim 7, wherein said back-reflected light pulses comprise reflected laser pulses.

9. An image sensor according to claim 7, wherein said back-reflected light pulses comprise reflected light-emitting diode (LED) pulses.

10. An image sensor according to claim 7, wherein said back-reflected light pulses comprise reflected ARC pulses.

11. An image sensor according to claim 7, wherein said accumulation controller is further operable to reset said photosensor prior to each of said time intervals.

12. An image sensor according to claim 6, wherein said reset logic unit is further operable to perform a non-destructive readout of said pixel at a sequence of time points during said accumulation, and to determine from said readout whether a pixel will saturate during said accumulation.

13. An image sensor according to claim 12, wherein said reset logic unit is configured to determine if a pixel will saturate by comparing said non-destructive readout to a threshold.

14. An image sensor according to claim 6, wherein said reset logic unit is operable to determine if a pixel will saturate at progressively closer time points.

15. An image sensor according to claim 6, further comprising a processor configured for calculating an output illumination level associated with a given pixel in accordance with a respective record of pixel accumulated output resets and a respective final pixel readout.

16. An image sensor according to claim 15, wherein said processor is operable to calculate said output illumination level as a product of said final pixel readout and a scaling factor derived from said record of pixel accumulated output resets.

17. A method for measuring reflected light pulse intensity, comprising: exposing a photosensor over time intervals synchronized with a plurality of transmitted light pulses; accumulating a photosensor output over a plurality of said time intervals; determining, at a sequence of times during said accumulating, if said accumulated output is liable to saturate prior to the end of said accumulation, and resetting said accumulated output if saturation prior to the end of said accumulation is indicated; and reading out a final level of said accumulated output.

18. A method in accordance with claim 17, wherein exposing is synchronized to collect back-reflections of said light pulses from a selected distance range.

19. A method in accordance with claim 17, further comprising transmitting said light pulses by pulsing a laser.

20. A method in accordance with claim 17, further comprising transmitting said light pulses by pulsing an LED light source.

21. A method in accordance with claim 17, further comprising transmitting said light pulses by pulsing an arc light.

22. A method in accordance with claim 17, further comprising preventing accumulation of photosensor output between said time intervals.

23. A method in accordance with claim 17, further comprising resetting said photosensor prior to each of said time intervals.

24. A method in accordance with claim 17, further comprising: determining a scaling factor from a number of resets performed during said accumulation; and adjusting said final output level in accordance with said scaling factor.

25. A method in accordance with claim 24, wherein said adjusting comprises multiplying said final output level by said scaling factor.

26. A method in accordance with claim 17, wherein said determining comprises performing a non-destructive readout of said accumulated output and comparing said accumulated output level to a threshold.