WO2010084444A2 - Low power consumption in standby mode - Google Patents

Low power consumption in standby mode Download PDF

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Publication number
WO2010084444A2
WO2010084444A2 PCT/IB2010/050207 IB2010050207W WO2010084444A2 WO 2010084444 A2 WO2010084444 A2 WO 2010084444A2 IB 2010050207 W IB2010050207 W IB 2010050207W WO 2010084444 A2 WO2010084444 A2 WO 2010084444A2
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WO
WIPO (PCT)
Prior art keywords
circuit
switch
current
voltage
swl
Prior art date
Application number
PCT/IB2010/050207
Other languages
French (fr)
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WO2010084444A3 (en
Inventor
Carsten Deppe
Georg Sauerländer
Original Assignee
Koninklijke Philips Electronics N.V.
Philips Intellectual Property & Standards Gmbh
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Application filed by Koninklijke Philips Electronics N.V., Philips Intellectual Property & Standards Gmbh filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2010084444A2 publication Critical patent/WO2010084444A2/en
Publication of WO2010084444A3 publication Critical patent/WO2010084444A3/en

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/005Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting using a power saving mode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/005Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting using a power saving mode
    • H02J9/007Detection of the absence of a load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0032Control circuits allowing low power mode operation, e.g. in standby mode
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/30Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S20/00Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
    • Y04S20/20End-user application control systems

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  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Direct Current Feeding And Distribution (AREA)

Abstract

A disconnecting circuit (SW1, RS, COM, CO) for a power converter (1) supplies power to a load device (LO; 2). The disconnecting circuit (SW1, RS, COM, CO) comprises a switch (SW1) arranged in series with the power converter (1) to disconnect a supply of power to the load device (LO, 2). A sense circuit (RS) supplies a sensed value indicating an operation mode of the load device (LO, 2). A controller (CO, COM) receives the sensed value to control the switch (SW1) to disconnect the supply of the power from the load device (LO, 2) when the sensed value drops below a reference level indicating a standby mode of the load device (LO, 2).

Description

Low power consumption in standby mode
FIELD OF THE INVENTION
The invention relates to a disconnecting circuit for a power converter, a power converter comprising such a disconnecting circuit, and a system comprising the power converter and a load device comprising a rechargeable battery.
BACKGROUND OF THE INVENTION
EP 1231698 discloses a power supply system with a standby mode wherein the power consumption is extremely low. During the standby mode, a mechanical latching relay disconnects the power converter of the power supply system from the mains. The energy stored in a supercapacitor is used by a switch-on circuit to activate the relay for connecting the power converter to the mains when is detected at signal inputs that the normal mode should be started.
Although this approach leads to very low power consumption during standby, the restart of the circuit may not work in all conditions. Additional drawbacks are the size and costs of some of the required components such as the relay and the supercapacitor.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a disconnecting circuit which disconnects the supply of power to the load during the standby mode and has a reliable switch-on behavior when the normal mode has to be resumed.
A first aspect of the invention provides a disconnecting circuit as claimed in claim 1. A second aspect of the invention provides a power converter as claimed in claim 13. A third aspect of the invention provides a system comprising the power converter as claimed in claim 14. Advantageous embodiments are defined in the dependent claims. The switch-mode power converter transfers the AC-mains voltage into a DC- voltage suitable for a load device to supply power to the load device. Such a switch-mode power converter (further also referred to as power converter) is well known in the art and comprises an inductance and a periodically opening and closing switch to convert the AC- mains voltage into the suitably low DC voltage. Usually, the inductor is a mains-isolated transformer. The load device may comprise a rechargeable battery.
The disconnecting circuit comprises a controllable switch arranged to disconnect the supply of power to the load device during the standby mode. For example, during the standby mode, the disconnecting circuit disconnects the power converter from the mains or disconnects the load device from the power converter. This results in very low power consumption during the standby mode. A sense circuit senses the operation mode of the load device and supplies a sensed value which indicates whether the operation mode is a standby mode. For example, the sense circuit may be a current sense circuit which senses a current supplied by the power converter to the load device and supplies the sensed value indicating this current. Alternatively, any other signal indicating the standby mode may be used, for example, an error signal in the stabilizing loop of the power converter may indicate that the power supplied by the power converter dropped below a particular level. A controller receives the sensed value and controls the switch to disconnect the supply of power to the load device when the sensed value indicates a standby mode of the load device, for example by dropping below a reference level. It has to be noted that the switch for disconnecting the supply of power to the load device is not the periodically opening and closing switch of the power converter.
The disconnecting circuit reliably determines whether to enter the standby- mode wherein the supply of power to the load has to be disconnected because it uses information on the standby mode of the load device. For example, if the current drawn by the load device is below the reference level, the load device is in the standby mode and the switch should disconnect the supply of power to the load device.
In an embodiment, the switch is arranged in-between the load device and the output of the power converter, which output supplies the current to the load device. In this embodiment, the load device is detached from the power converter when is detected that the standby mode is entered, for example because the current drawn by the load device drops below the reference level. The power dissipation in the power converter will be further reduced because the low current drawn by the load device in the standby-mode need not be supplied. Again, instead of sensing the current supplied to the load device any other signal indicating the standby mode may be used to control the disconnection of the load device from the power converter.
In an embodiment, the current sense circuit comprises a resistor arranged between the output and the load device to sense the current to the load device. In an embodiment, the controller periodically closes the switch to check whether the sensed value is still below or above the reference level. The controller keeps the switch closed if the sensed value is above the reference level or opens the switch if the sensed value is below the reference level. In an embodiment, a further switch is arranged between the input of the power converter and the mains. The controller opens the further switch when is detected that the current supplied to the load device drops below a further reference level and the voltage across a capacitor at the output of the power converter is above a particular voltage level sufficiently high to power circuits which have to close the first mentioned switch if is detected that the current requested by the load is above the reference level or during the periods in time when is checked whether the sensed value is above the reference level . When the particular voltage level drops too much, the further switch has to be closed to recharge the capacitor at the output of the power converter. The power dissipation is minimized by further disconnecting the power converter from the mains as long as possible. The further reference level may be equal to the reference level.
In an embodiment, the controller controls the further switch to close when is detected that the sensed value rises above the further reference level or when the voltage across the capacitor drops below a further particular voltage level being lower than the particular voltage level. As long as the voltage across the capacitor is sufficiently high, it is possible to periodically close the first mentioned switch and to sense the amount of current drawn by the load device.
In an embodiment, the switch for disconnecting the supply of power to the load is arranged at the input of the power converter to disconnect the power converter from the mains. Now the power consumption from the mains will be the lowest possible. In an embodiment, the power converter has a mains-isolated transformer which divides the power converter in a primary side and a secondary side. If the switch for disconnecting the supply of power to the load is arranged at the primary side and the current sense circuit is arranged at the secondary side, the disconnecting circuit needs to comprise a mains isolation circuit to transfer information to the primary side. If the controller, which is the circuit analyzing whether the power converter needs to operate, is at the primary side, the mains isolation circuit has to transfer the sensed value to the primary side. If the controller is at the secondary side, the mains isolation circuit has to transfer a control signal for controlling the switch to the primary side. In an embodiment, the circuit for sensing the standby mode (for example the current sense circuit) is arranged at the secondary side and the controller is arranged at the primary side of the power converter. The disconnecting circuit further comprises a pulse generating circuit for converting the sensed value into a pulse signal. The presence of the pulse in the pulse signal indicates that the current sensed is below the reference level and also indicates that the secondary side is operational. If no pulse is present, either the current sensed is above the reference level or the voltage at the secondary side is too low. In both cases, the switch should be closed to connect the power converter to the mains. If the pulse generator at the secondary side stops operating because the voltage across the capacitor at the output of the converter decreases to a too low level, no pulses can be generated and the switch at the primary side will be closed. Consequently, the charging of the capacitor at the output of the converter is automatically taken care of. The mains isolation circuit is now arranged for transferring this pulse signal to the primary side. By using a pulse signal, the power dissipation in the mains isolation circuit is minimized. This is in particular true if the mains isolation is an opto-coupler. Although the current through the opto-diode of the opto- coupler is relatively high during the pulse, the average current may be relatively low with respect to a continuous current required through the opto-diode to reliably determine the sensed current from the opto -transistor of the opto-coupler.
In an embodiment, the controller closes the switch for disconnecting the supply of power to the load if is detected that a voltage at the output of the power converter drops below a particular voltage level. Thus, before the voltage across a capacitor at the output of the power converter drops to a level insufficient to operate the circuits at the secondary side, the power converter recharges this capacitor. This approach allows the switch to be open as long as possible without causing a situation wherein it would be impossible to close the switch if required. It should be noted that this is an optional feature because, as elucidated earlier, the switch for disconnecting the supply of power to the load will be closed automatically when the voltage at the output of the converter drops to a too low value and no pulses can be generated. On the other hand, this approach has the advantage that the lowest level of the voltage at the output can be selected at will. In an embodiment, the current sense circuit comprises a variable resistor through which the current to be sensed flows. A control circuit has an input for sensing a voltage across the variable resistor and supplies a control signal to the variable resistor to control a resistance of the variable resistor such that the voltage across the variable resistor is kept constant independent on a value of the current. The control circuit deducts the sensed value from the control signal. This approach has the advantage that the current can be sensed over a very large range with a low dissipation. It is not required to have a lot of resistors and switches which select the correct resistor combination fitting the actual value of the current to be sensed without an excessive dissipation or with an expensive circuit able to sense very small voltages.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.
BRIEF DESCRIPTION OF THE DRAWINGS In the drawings:
Fig. 1 schematically shows a basic block diagram of a power supply system with very low power consumption in the standby mode,
Fig. 2 schematically shows a circuit diagram of an embodiment of such a power supply system with additional circuitry to act as a charger, Fig. 3 schematically shows another circuit diagram of an embodiment of such a power supply system,
Fig. 4 schematically shows a block diagram of another embodiment of such a power supply system,
Fig. 5 schematically shows a block diagram of a circuit for a power efficient current measurement over a large range of currents, and
Fig. 6 schematically shows a circuit diagram of an embodiment of such a circuit to accurately sense current over a large range.
It should be noted that items which have the same reference numbers in different Figures, have the same structural features and the same functions, or are the same signals. Where the function and/or structure of such an item has been explained, there is no necessity for repeated explanation thereof in the detailed description.
DETAILED DESCRIPTION
Fig. 1 schematically shows a basic block diagram of a power supply system with very low power consumption in the standby mode.
A rectifier circuit REC receives the mains voltage VM to supply a rectified mains voltage VR. The rectifier circuit REC may have any suitable construction. For example, a single diode Dl may be used, as shown. Alternatively, for example, a rectifier bridge may be used. A DC-DC converter CON receives the rectified mains voltage VR and supplies an output voltage VO to a load LO. The DC-DC converter CON, which is further also referred to as the power converter CON or as the converter CON, has mains isolation and thereby divides the system in a primary side PR which is not mains isolated and a secondary side SE which is mains isolated. A smoothing capacitor Ci is coupled between the input terminals of the converter CON to smooth the rectified mains voltage VR. A controllable switch SWl is arranged in the input circuit at the primary side PR to connect or disconnect the input of the converter CON from the mains. As shown in Fig. 1, the switch SWl may be arranged between an output of the rectifier REC and an input of the converter CON.
A current sense circuit RS senses the output current IO supplied by the converter CON to the load LO. If a smoothing capacitor is arranged in parallel with the load, the current sense circuit RS senses the current through this parallel arrangement which is now considered to be the load. The current sense circuit RS may be a resistor, a current transformer or any other suitable circuit for sensing a current. The comparing circuit COM compares the sensed current with a threshold value REF to obtain a comparator output signal CS which is transferred via a mains isolation circuit MI to the primary side PR of the system. For example, the mains isolation circuit MI may be an optocoupler or a transformer if the comparator output signal is a pulse signal. The controller CO receives the output signal CS' of the mains isolation circuit
MI and controls the open/close state of the switch SWl. The switch SWl has a high impedance (is non-conductive) in the open state and has a low impedance (is conductive) in the closed state. As is shown, the controller CO may be arranged on the primary side. Alternatively, the controller CO may be arranged on the secondary side to switch the switch SWl via the mains isolation circuit MI.
Alternatively to what is shown in Fig. 1, the switch SWl may be arranged between the mains and the rectifier REC, between the capacitor Ci and the converter CON, between the converter CON and the current sense circuit RS, or between the converter CON and the load LO. The switch SWl may be a switch of the rectifier REC if a controllable rectifier element is used, or may be a switch inside the converter CON. For example, if the converter CON has a first stage acting as PFC (Power Factor Corrector) and the second stage is the usual power converter, the switch may be the switch used in the PFC or may be arranged between the PFC and the usual power converter. What counts is that the switch SWl opens the power loop from mains to the load LO. Although a single switch is shown, it is possible to disconnect the converter CON from the mains with a switch in both connections between the rectifier REC and the converter CON, or in both connections between the mains and the rectifier REC. Also in the other positions mentioned, the switch SWl may be a double switch. The switch SWl may be any suitable semiconductor switch, such as for example a MOSFET, a bipolar transistor, a thyristor or a triac.
In a first embodiment, during the standby mode wherein the load LO does not consume power or consumes a low amount of power only, the converter CON is active during relatively short periods in time only. If during such a short period in time, which is also referred to as the test period, the sensed output current IO is larger than a particular threshold value, the switch SWl will be closed. If during the test period the output current is smaller than a further threshold value, which may be equal or smaller than the particular threshold value, the switch SWl is opened. During the time the converter CON is inactive, the relatively small power drawn by the comparing circuit COM and the controller CO is supplied by a storage capacitor connected in parallel with the output of the converter CON. The switch SWl is also closed when the voltage across the storage capacitor drops below a threshold value to recharge the storage capacitor. This first embodiment is further detailed with respect to Fig. 2.
In a second embodiment, the switch SWl is closed as long as is detected that the output current IO is above the threshold value REF. The switch SWl is opened when is detected that the output current IO drops below the threshold value REF. Thus, if the load LO is not connected to or is disconnected from the converter CON, or if the power consumed by the load LO drops below a particular value, the converter CON is disconnected from the mains and consequently the power consumption of the system will be very low. The controller CO has to receive a supply voltage VS from the mains voltage VM or the rectified mains voltage VR to be able to close the switch SWl when the output current increases to above the threshold value REF or the secondary circuits do not have sufficient energy to send the information of the current being below the threshold. The secondary circuits receive their power from the secondary side of the converter CON. As discussed in the foregoing, a single threshold value REF may be used. Alternatively, a hysteretic behavior may be introduced by using different threshold values: the switch is opened when the output current IO drops below a first threshold value and closes when the output current rises above a second threshold value which is larger than the first threshold value. This second embodiment is discussed in more detail with respect to Figs. 3 and 4. An embodiment of a current sense circuit suitable in both the first and the second embodiment is discussed with respect to Figs. 5 and 6. The use of this current sense circuit is not limited to the first and second embodiment and may be used in any application wherein a current has to be sensed. Fig. 2 schematically shows a circuit diagram of an embodiment of a power supply system. The power supply system 1 generates a supply voltage VU between its output terminals for charging a battery of a mobile device 2 (or any other rechargeable device) when connected.
The power supply system 1 comprises the DC-DC converter CON which is connected to the mains via the switch SW2 to receive the mains voltage VM. The switch SW2 is used to disconnect the complete circuitry from the mains and enables a power consumption during the standby mode of less than ImW. The switch SW2 may be a bistable relais or a "normally on" semiconductor switch. Instead of between the mains and the rectifying circuit (which in Fig. 2 is thought to be in the converter CON), the switch SW2 may be implemented as shown in Fig. 1 between the rectifying circuit REC and the converter CON. The output voltage VO of the converter CON is smoothed by the capacitor Cl which acts as a charge storage buffer. The capacitor Cl buffers the energy required for operation of the circuit during standby and may for example comprise an electrolytic capacitor or a so- called supercapacitor. A series arrangement of the current sense resistor RS and the switch SWl is arranged between the ground electrode of the capacitor Cl and one of the output terminals of the power supply system 1. The other one of the output terminals of the power supply system 1 is connected to the positive electrode of the capacitor Cl. Alternatively, the current sense resistor RS and the switch SWl may be arranged between the positive terminal of the capacitor Cl and the other one of the output terminals of the power supply system 1. The comparing circuit COM comprises the operational amplifier (further also referred to as opamp) Ul and the resistors R3, R4 and R5 and is able to sense a small voltage at the current sense resistor RS thereby allowing a low impedance of the current sense resistor RS and thus minimizing losses therein.
The controller CO receives a signal from the output of the opamp Ul which represents the sensed current through the sense resistor RS and supplies a first switching signal FSl to the switch SW2 via the mains isolating circuit MI, and a second switching signal FS2 to the switch SWl. In the standby mode, the controller CO receives its power from the capacitor Cl. The controller CO controls the switch SWl to be closed (conductive) as long as the current through the current sense resistor RS is above a first particular value, for example 10 rnA. This mode is called the normal mode. The controller CO controls the switch SWl to be on and off, wherein the on-time is relatively short with respect to the off- time if the current through the current sense resistor RS drops below a second particular level equal to or lower than the first particular level. In an embodiment, the second level may be ImA. This mode is called the pulse-mode. In an embodiment, the pulse has an on-time of lms and an off-time of 5 seconds. If during or at the end of the pulse the current through the current sense resistor RS reaches the first particular value, the controller CO leaves the pulse mode and changes into the normal mode during which the switch SWl is controlled to be continuously on until the current sensed drops below the second particular value and the pulse mode is entered again.
Thus, after is detected that the current to be supplied to the load 2 is below the second particular value, the load 2 is disconnected from the capacitor Cl for most of the time. During the pulse mode when the switch SWl connects the power supply system 1 to the load 2, it is checked whether the current requested by the load 2 is above the first particular value. If not, the power supply system 1 stays in the pulse mode, if yes, the power supply system 1 changes into the normal mode. By disconnecting the load 2 from the converter CON if the current drawn by the load 2 drops below the second particular value, the capacitor Cl is minimally discharged by the load 2 and thus can be maximally used to power the controller CO and the comparing circuit COM. This results in a minimal power to be supplied by the converter CON. As an alternative to the direct current sensing with the current sense resistor RS, a voltage fluctuation resulting from a current flow may be detected. For example, an error signal in a controller of the converter CON (not shown) for regulating the output voltage VO may be used.
The power drawn by the converter CON can be further minimized by opening the switch SW2 or by electronically deactivating the converter CON. The controller CO controls the switch SW2 to be closed during the normal operating mode. During the standby mode, when the output voltage VO across the capacitor C 1 reaches a maximum level, the switch SW2 is opened. The power for the controller CO and the comparing circuit COM is now supplied by the capacitor Cl. When the voltage VO reaches a minimum value, the switch SW2 is closed and the capacitor Cl is charged to the maximum level. The minimum value is determined by the voltage required for operation of the controller CO such that the switch SW2 can be closed. In an embodiment, the minimum value may be 1/3 of the nominal value of the voltage VO. When during the pulse mode is detected that the current through the sense resistor RS rises above the first particular level, the controller CO may directly switch on the switch SW2 to minimize the voltage ripple on the capacitor Cl .
By way of example, if both the switches SWl and the optional switch SW2 are used, the current drawn during the pulses of the pulse mode is ImA, and the duty cycle of the on and off periods of the pulses is larger than 1000, the average current drawn from the capacitor Cl is below IuA during the standby mode. If the voltage VO varies between 2.7V and 5.5V and the capacitor Cl is 0.33F, the converter CON has to be switched on by closing the switch SW2 approximately once per 25 hours. Thus, if the switch SW2 is a relay, it has to be switched on only once per day and consequently the disturbance caused by the click produced is very limited. In this application, an approximately one hour cycle time for the converter CON is obtained with a capacitor Cl of lO.OOOμF. Instead of a relay, a suitable solid state switching element may be used.
The mobile device 2 may have a well known construction comprising a diode DlO, a capacitor ClO, a charge manager CM, a rechargeable battery BA and the application functionality AF which is powered by the rechargeably battery BA. The protection diode DlO protects the mobile device 2 from receiving a voltage with the wrong polarity. The capacitor ClO filters the voltage supplied via the diode DlO to obtain a filtered input voltage for the charge manager CM. The charge manager CM controls the charging of the rechargeable battery BA. In accordance with the present invention the resistor R20 and the MOSFET's
M2 and M3 have been added to the mobile device 2. MOSFET M2 has a main current path arranged between the diode DlO and the capacitor ClO and a control input connected to the node Nl . The resistor R20 is arranged between the node Nl and the one of the terminals at which the mobile device 2 receives its power supply voltage from the power supply system 1. The MOSFET M3 has a main current path arranged between the node Nl and the other terminal at which the mobile device 2 receives its power supply voltage and has a control input which receives a control signal from the charge manager CM. As long as the rechargeable battery BA is not fully charged, the MOSFET M2 is activated via the resistor R20 to connect the input of the charge manager CM to the power supply system 1. If the rechargeable battery BA is fully charged, the charge manager CM activates the MOSFET M3 and the MOSFET M2 is deactivated. Now, the remaining current flow into the mobile device 2 is determined by the resistor R20 only and is forced to be below the first particular value at which the power supply system 1 detects that it should enter the standby mode. Fig. 3 schematically shows another circuit diagram of an embodiment of a power supply system. The rectifier circuit REC of Fig. 1 now comprises the diodes Dl to D4 which act as a rectifier bridge to rectify the mains voltage VM. The rectifier bridge is connected to the mains via the resistor Rl which limits the inrush current. The capacitor Cl connected across the mains limits high frequency disturbance from entering into the mains. The rectified voltage VR supplied by the rectifier bridge is smoothed by the capacitor C2. The capacitor Ci acts as the smoothing capacitor at the inputs of the converter CON. The rectified voltage VR is supplied to the two inputs of the converter CON via the inductor Ll and via the switch SWl, respectively. The outputs of the converter CON are connected to the smoothing circuit formed by the capacitors C4, C5 and the inductor L2 to supply the output voltage VO. The current sense resistor RS is arranged between the capacitors C4 and C5 to sense the current supplied by the converter CON. The current sense resistor RS may have another position than the one actually shown in Fig. 1, as long as it acts to generate a voltage indicating a current supplied by the converter CON or a current drawn by the load LO (see Fig. 1).
The comparing circuit COM (see also Fig. 1) comprises the resistors R5 to RlO, the amplifiers U4 and U5, and the zenerdiode D6. The mains isolation circuit MI is an optocoupler comprising a light emitting diode and a light sensitive transistor. The controller CO comprises the AND Al, the amplifiers U2 and U3, the resistors R3, Rl 1 to R14, the zenerdiode D5 and the capacitor C7.
The series arrangement of the resistor R2 and the capacitor C8 and the diodes D7 and D8 supplies a rectified mains voltage as the power supply voltage VS to the controller CO. The resistor R2 prevents current peaks due to mains spikes. The impedance of the resistor R2 should be as low as the peak current capabilities of D7 and D8 allow, usually 1...10kΩ for 10OmA diodes. To limit the power loss caused, the required high impedance is obtained by C8, which is for example less than InF. The capacitor C6 is charged to a voltage level defined by the zenerdiode D5 and the voltage drop across the resistor R3. The voltage drop across the resistor R3 triggers the comparator formed by the amplifier U3. The capacitor C7 is charged via the resistor Rl 1 and sets the comparator formed by the amplifier U2. Once both comparators U2 and U3 are set, the switch SWl is closed via the AND Al . This construction prevents the switch SWl to be closed before the voltage VS is sufficient to switch the SWl completely.
The amplifier U5 of the comparing circuit COM amplifies the voltage across the resistor RS. The amplifier U4 compares the output voltage of the amplifier U5 with a reference level determined by the resistors R8 and RlO. If the current through the current sense resistor RS drops below this reference level, the amplifier U4 activates the light emitting diode of the optocoupler MI via the zenerdiode D6 and the resistor R9. The activation of the optocoupler diode leads to a short circuit of the capacitor C7 and turns off the switch SWl via the comparator U2 and the AND Al . Now, the converter CON is disconnected from the mains and the power consumption is very low. This off mode is kept as long as the output voltage VO is sufficiently high such that a sufficient high current flows through the series arrangement of the zenerdiode D6 and the optocoupler diode to keep the capacitor C7 discharged by the optocoupler transistor. If the resistor values of R9 and Rl 1 are selected such that the capacitor C5 is minimally discharged, the converter CON will be in the off mode as long as possible.
As soon as the output voltage VO drops below a level suitable to keep the capacitor C7 discharged by the optocoupler transistor, the capacitor C7 is charged via the resistor RI l and the switch SWl is switched on. The converter CON starts operating and charges the capacitors C4 and C5. As soon as the voltage across capacitor C5 is sufficiently high and the current through the current sense resistor RS is sufficiently low, the optocoupler diode will be activated and the off mode is resumed. The current through the current sense resistor RS is determined by the charge current of the capacitor C5 and the current drawn by the load LO. Thus, the off mode can only be resumed after the capacitor C5 is charged sufficiently and the load draws a small or no current. For example, if the no load current on the secondary side is 7μA, the output capacitance is 2200μF and the ripple on the output voltage is 3 V, the converter CON will be disconnected by the switch SWl from the mains for about 15 minutes. After this period, the switch SWl has to close during a very short period wherein the converter CON is active to recharge the output capacitance. Thus, for the large majority of time, the converter CON is disconnected from the mains and consequently, the power consumption due to the converter CON is minimal.
A potential limitation in the reduction of the power consumption drawn from the mains is caused by the requirement to prevent users from an electric shock if they touch the electrical contacts of the mains plug of the power supply system when pulled out of the mains socket. Consequently, the capacitors Cl and C8 have to discharge within 1 second. A first solution to this problem is to design the circuit such that the values of the capacitors Cl and C 8 are so small that the energy of the discharge is not harmful. Another option is to discharge the capacitors Cl and C8 through the converter CON. If a stabilized output voltage VO is required, the converter CON should comprise a feedback circuit to sense the output voltage VO and to control a switching element in the converter CON such that the output voltage VO is stabilized. The switching element and the inductance required in the converter CON are not shown. An example of such circuitry is shown within the block CON. The resistors Rl 5 and Rl 6 generate a tapped in output voltage VO to control the voltage reference U7 (for example, a TL431). As soon as the voltage on the control electrode reaches a reference value (usually 1.2V), current between anode and cathode starts to flow, thus activating the LED of the optocoupler U6.
A drawback of this feedback circuit is that it draws about 1 to 1OmA current during the standby mode. This drawback can be circumvented by connecting the node of voltage reference U7 and the resistor R15 to the output of the comparator U4 instead to ground. As long as the converter CON is active and current is drawn from its output, the output of comparator U4 is at ground level and the feedback circuit operates as shown in Fig. 4. In standby mode, the output of the comparator U4 changes to high level to activate the optocoupler diode of optocoupler Ul . The current through the feedback circuit is now minimized, which is not a problem because in the standby mode when the load is drawing no or a minimal current, the converter is switched off and stabilization of the output voltage VO is not an issue.
It has to be noted that the present invention is not limited to the particular embodiment shown in Fig. 3. The rectifier circuit REC may be a single sided rectifier, the inductors Ll and L2 are optional. Instead of the two capacitors C4 and C5 a single capacitor may be used. The low impedance resistor Rl and the capacitor Cl are optional, or other components might be required to fulfill standards or additional requirements. The switch SWl may be arranged anywhere in the primary circuit as long as it functions to connect or disconnect the mains and the rectifier circuit REC, or to connect or disconnect the rectified voltage and the inputs of the converter CON.
Fig. 4 schematically shows a block diagram of another embodiment of such a power supply system. Only the differeneces with respect to Fig. 3 will be discussed. The switch SWl receives the power from the mains to enable to switch on the switch SWl without energy being transferred from the secondary side of the power supply system. The capacitive supply of power via the capacitor C8 as shown in Fig. 3 can easily be designed to limit the power consumption of the controller CO and the switch SWl to below 0.5mW. Alternatively, as shown in Fig. 4 a resistive divider including the resistors R21 and R3 may be used to supply power to the controller CO and the switch SWl. The components required for the capacitive power supply are now superfluous. However, the power consumption may now rise to about 1OmW. As discussed earlier, in both embodiments, the off-command for the switch SWl is generated by the secondary logic by monitoring the output current and the output voltage. The communication between the secondary side and the primary side of the power supply system is realized by using the optocoupler. In the Fig. 3 embodiment, the optocoupler is used in a linear mode. Experiments with sensitive optocouplers have shown that signals can be reliably transferred using a current of 5μA through the optocoupler diode. For example, the optocoupler IL30 of Vishay may be used. This power consumption can even be lowered if the optocoupler is used in a pulsed mode. For example a 1 : 1000 duty cycle (on:off) with very short 19OuA pulses results in the same signal to noise ratio as a continuous current of 5μA while the average current drops to 0.19μA. However, the pulse generator adds some additional power consumption which is less than lμA using state of the art technology. In the pulse mode, a pulse transformer may be used instead of the optocoupler.
The pulse generator comprises the resistors Rl 5 to Rl 9, the capacitor C9, the diode D9 and the comparator U6. The pulse generator as such is well known and its operation is not described in detail.
Fig. 5 schematically shows a block diagram of a circuit for a power efficient current measurement over a large range of currents. Usually current sensors comprise a resistor through which a current causes a voltage to be sensed. A relatively high resistance value of this resistor is required to obtain a high enough voltage across it due to a very small current flowing there through. However, a very high dissipation results if a relatively high current has to be sensed with the same resistor. US6, 150,797 discloses a series arrangement of two current sensing resistors. A switching element is connected in parallel with one of the resistors to short circuit this resistor at high currents.
The current sensing circuit of Fig. 5 has a shunt control circuit SC which controls a variable resistor SR such that the voltage across the variable resistor SR due to the load current IL is constant. The shunt control circuit SC supplies an output signal SO which is related to a value of the variable resistor SR or to a signal controlling this value and thus indicates the level of the load current IL. The voltage source VB provides the supply voltages for the shunt control circuit SC and the load IL. Thus, in accordance with the present invention, a feedback loop is used which keeps the voltage across the variable resistor SR constant over a large range of load currents IL. The variable resistor SR has a high impedance for relatively small currents and a low impedance for relatively large currents, and thus enables to accurately sense currents over a large range without excessive dissipation.
Fig. 6 schematically shows a circuit diagram of an embodiment of such a circuit to accurately sense current over a large range. The variable resistor SR is created by the main current path of a transistor Ml which by way of example is shown to be a MOSFET which main current path is arranged in parallel with a fixed resistor R40 and a schottky diode D40. The optional schottky diode D40 limits peak voltages during fast current transients. The optional resistor R40 determines the maximum shunt resistance.
The amplifier U40 has an input to receive the voltage at the variable resistor SR via the resistor R41, an input to receive a first reference voltage determined by the resistors R42, R43 and R44 and an output to control the transistor Ml via a resistor R45. If the voltage drop across the variable resistor SR exceeds the first reference voltage (about 23mV in this example), the amplifier U40 increases the control voltage for the transistor Ml and thus lowers the impedance of the variable resistor SR. The amplifier U41 detects the voltage on the control electrode (gate) of the transistor Ml and supplies a detection signal SO indicating whether the current IL sensed is above or below a particular threshold value. In the embodiment shown in Fig. 6, the amplifier U41 compares the voltage at the gate of the transistor Ml with a reference voltage of 0.5V, which is slightly below the threshold voltage of the gate of Ml. Thus, the detection signal SO changes to a high level as soon as any current is flowing through the transistor M 1.
The capacitor C40 acts as filter for high frequency components in the current. The values shown in Fig. 6 should be interpreted as an example of an implementation only and thus may differ for other implementations. In the example shown, the first reference voltage is set to 23mV. Using state of the art low power devices for the amplifiers U40 and U41 the total power consumption of the circuit is only 2 μA. Assuming a standard current shunt design, for example if the peak current is IA and 0.25 V voltage across the current sense resistor, the power consumption is more than 10 times that of the current sense circuit in accordance with the invention. On the other hand if this state of the art current sense circuit has to sense 0.1mA, high precision operational amplifiers would be required to detect the resulting voltage drop of 25μV. Such high precision operational amplifiers are expensive and consume a lot of energy.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims

CLAIMS:
1. A disconnecting circuit (SWl, RS, COM, CO) for a switched-mode power converter (1) comprising an input for receiving a mains voltage and an output for supplying power to a load device (LO; 2), the disconnecting circuit (SWl, RS, COM, CO) comprising: a switch (SWl) arranged in series with the switched-mode power converter (1) for disconnecting the supplying of power to the load device (LO, 2), a sense circuit (RS) for supplying a sensed value indicating an operation mode of the load device (LO, 2), and a controller (CO, COM) for receiving the sensed value to control the switch (SWl) to disconnect the supplying of the power to the load device (LO, 2) when the sensed value drops below a reference level indicating a standby mode of the load device (LO, X).
2. A disconnecting circuit as claimed in claim 1, wherein the sense circuit (RS) comprises a current sense circuit (RS) for supplying the sensed value indicating a current supplied to the load device (LO, 2).
3. A disconnecting circuit as claimed in claim 2, wherein the current sense circuit (RS) comprises a resistor arranged between the output of the power converter (1) and the load device (LO; 2).
4. A disconnecting circuit as claimed in claim 1, wherein the switch (SWl) is arranged in-between the load device (LO; 2) and the output of the power converter (1).
5. A disconnecting circuit as claimed in claim 4, wherein the controller (CO,
COM) is constructed for periodically closing the switch (SWl) to check whether the sensed value is above or below the reference level to keep the switch (SWl) closed if the sensed value is above the reference level or to open the switch (SWl) if the sensed value is below the reference level.
6. A disconnecting circuit as claimed in claim 4, comprising a further switch (S W2) arranged between the input of the power converter (1) and the mains, wherein the controller (CO, COM) is constructed for controlling the further switch (SW2) to open when is detected that the sensed value drops below a further reference level and the voltage across a capacitor at the output is above a particular voltage level.
7. A disconnecting circuit as claimed in claim 6, wherein the controller (CO, COM) is further constructed for controlling the further switch (SW2) to close when is detected that the sensed value rises above the further reference level or when the voltage across the capacitor drops below a further particular voltage level being lower than the particular voltage level.
8. A disconnecting circuit as claimed in claim 1, wherein the switch (SWl) is arranged at the input of the power converter (1) for disconnecting the power converter (1) from the mains.
9. A disconnecting circuit as claimed in claim 8 further comprising a mains isolation circuit (MI), wherein the power converter (1) has a mains isolation between a primary side (PR) and a secondary side (SE), the switch (SWl) being arranged at the primary side (PR), the current sense circuit (RS) being arranged at the secondary side, and the mains isolation circuit (MI) being arranged to transfer the sensed value to the controller (CO, COM) if the controller (CO, COM) is at the primary side (PR), or to transfer a control signal for the switch (SWl) if the controller (CO, COM) is at the secondary side (SE).
10. A disconnecting circuit as claimed in claim 9, wherein the current sense circuit is arranged at the secondary side (SE) and the controller (CO, COM) is arranged at the primary side (PR), the disconnecting circuit further comprises a pulse generating circuit for converting the sensed value into a pulse signal the presence of which indicates that the current sensed is below the reference level, the mains isolation circuit (MI) being arranged for transferring the pulse signal to the primary side (PR).
11. A disconnecting circuit as claimed in claim 9, wherein the controller (CO,
COM) is constructed for closing the switch (SWl) if is detected that a voltage at the output of the power converter (1) drops below a particular voltage level.
12. A disconnection circuit as claimed in claim 1, wherein the current sense circuit (RS) comprises: a variable resistor (SR) arranged to sense the current (IL) supplied to the load device (LO, 2), and a control circuit having an input for sensing a voltage across the variable resistor (SR), a controller (SC) for supplying a control signal to the variable resistor (SR) to control a resistance of the variable resistor (SR) to keep the voltage across the variable resistor (SR) constant independent on a value of the current (IL) supplied to the load device (LO, 2), and for supplying the sensed value in response to the control signal.
13. A power converter comprising the disconnecting circuit as claimed in any of the preceding claims.
14. A system comprising the power converter as claimed in claim 13, and a load device comprising a rechargeable battery.
PCT/IB2010/050207 2009-01-23 2010-01-18 Low power consumption in standby mode WO2010084444A2 (en)

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EP09151188 2009-01-23

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EP3618248A1 (en) * 2018-08-31 2020-03-04 Nxp B.V. Recycling capacitance energy from active mode to low power mode
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US9065429B2 (en) 2011-04-18 2015-06-23 Koninklijke Philips N.V. Semiconductor switch with reliable blackout behavior and low control power
EP2654385B1 (en) * 2012-04-17 2017-11-08 Helvar Oy Ab An apparatus, a method, an arrangement and a computer program for controlling operation of a power supply circuit
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US11571534B2 (en) 2016-05-11 2023-02-07 ResMed Pty Ltd Power supply for respiratory therapy device
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US11658571B2 (en) 2020-04-01 2023-05-23 Analog Devices International Unlimited Company Low power regulator circuit

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