WO2010055528A2

WO2010055528A2 - Economic and durable ballast circuit arrangement with low harmonics

Info

Publication number: WO2010055528A2
Application number: PCT/IN2009/000189
Authority: WO
Inventors: Kartik Prafull Bakeri
Original assignee: Kartik Prafull Bakeri
Priority date: 2008-11-14
Filing date: 2009-03-23
Publication date: 2010-05-20
Also published as: WO2010055528A3

Abstract

The present invention relates to an electronic Ballast circuit arrangement with High Power Factor, High Efficiency, Low Harmonics, Low Lamp Current Crest Factor and Low Electromagnetic Interference (EMI)/ Radio frequency interference (RFI), to operate discharge lamps including fluorescent lamps, but not limited there to. The invention of the electronic ballast circuit has brought about THD not only less than 10 %, but even less than 5 %, Power Factor > 0.98, Lamp Current Crest Factor < 1.7, EMI/RFI within permissible limits of EN 55015, durability of the circuit against abnormal conditions like end of tube life, neutral fault and high Mains voltages, improvement in efficiency and all this at an affordable cost.

Description

ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS

The present invention, Economic and Durable Ballast circuit arrangement with High Power Factor, High Efficiency, Low Harmonics, Low Lamp Current Crest Factor and Low Electromagnetic Interference (EMI)/ Radio frequency interference (RFI), relates to an electronic circuit to operate discharge lamps including fluorescent lamps, but not limited there to.

Discharge lamps include conventionally known fluorescent lamps, T5 lamps, Compact Fluorescent lamps (CFL) etc. To operate the lamps, ballast is needed. In modern times, electronic ballast is quite popular due to the fact that it saves energy, as compared to electromagnetic ballasts. But Electronic Ballasts have their own set of problems, which are stated as under :-

1 ) High cost

2) High Harmonics ,

3) Low Power Factor (ideal is unity)

4) High EMI/RFI

5) High Lamp Current Crest Factor (ideally it should be < 1.7)

6) Vulnerability to high voltages, neutral faults and "end of tube life"

7) Limitation to Energy Efficiency

Harmonics is the deviation in the shape of the supply current waveform, from the ideal sinusoidal waveform. Harmonics negatively affect the power supply of the premises, adds to wastage of energy, heats up the common neutral wire, loads the distribution transformer and corrupts data in computer systems. With electromagnetic chokes. Harmonics was limited to about 10%, even with a very low Power Factor. Whereas, with electronic ballasts, even with a high power factor > 0.95. THD (Total Harmonic Distortion), has been decreased to 30% or 20% at best, in prior art. The need is to limit the THD of the electronic ballast to < 10% (as in case of electromagnetic ballasts), even with a high Power Factor nearing unity. Active Power Factor Control Circuits as a prior art, are available to achieve THD < 10%, but these circuits are quite expensive. Passive Power Factor Control circuits are also bulky and expensive, with THD about 20%, and with high Lamp Current Crest Factor and also with high EMI/RFI, all which is undesirable.

Lamp current Crest Factor is the ratio of the peak lamp current and RMS lamp current. The lower the Lamp current Crest Factor, longer the life of the lamp. Hence it should be < 1.7

EMI/RFI is the interference conducted on the Mains by the ballast and also the interference radiated by the ballast to the environment through air.

The problems in electronic ballast are so inter-related that improving the harmonics and Power Factor, results in deterioration in lamp current crest factor, especially in passive power factor control circuits. Also, electronic ballasts are vulnerable to abnormal conditions like high voltages that may occur during neutral fault. Electronic Ballasts are also vulnerable to an abnormal condition in which life of lamp has expired with filaments still intact. The circuits to protect against high voltages or the end of "tube life protection circuit", in prior art, are themselves vulnerable to neutral fault.

Thus, the need is for an electronic ballast that solves all the above stated problems in the present invented ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS, that matches to IEC 1000-3-2 standards and IS 13021 standards derived from it, and also THD < 10%, with all protection facilities and also it should match EMI/RFI specifications of IS 6842 / EN 55015.

The objective of the present invention is an electronic ballast circuit that is economical with low THD < 10%. High Power Factor > 0.98, low lamp current crest factor < 1.7 and low EMI/RFI. is also durable against high voltage spikes and continuous neutral fault and also is more energy efficient than conventional electronic ballast, thus solving all the stated problems in present invented circuit arrangement.

The present invention is a circuit that contains EMI/RFI filters in the first stage, Bridge rectifier in the second stage, voltage boost circuit along with valley fill Power Factor control circuit in the third stage and the half bridge inverter circuit as the fourth stage, resonance & load circuit as the final stage & also a protection stage.

The first stage where AC Mains Voltage has to be applied is the EMI/RFI filter stage, which contains two inductors and capacitor/s. The EMI/RFI filters not only block the EMI/RFI but also reduce Harmonics (THD) by a great extent. The output of the EMI/RFI filter stage is applied to the AC to DC rectifier, which is known as the bridge circuit. This rectifier presents a DC voltage output, which is the input to the voltage boost diode and the Valley fill circuit. The valley fill circuit consists of two Storage capacitors and four diodes. Two of these diodes are in series with each other. The voltage boost circuit contains a single diode and two capacitors. The diode is connected to the positive output of the rectifier. An additional voltage boost diode can be placed at rectifier negative output, also known as ground, but is not necessary and hence not shown in this circuit. The final DC output after the voltage boost diode is known as Bus Bar. A capacitor connects both the Bus Bar & the ground. The Bus Bar & the ground is applied to the half bridge inverter circuit. The inverter circuit drives a minimum of one lamp, and comprises of two transistors and associated circuit components. The transistors oscillate in turn at high frequency and thus drive the lamp to produce light output. Two diodes are connected in parallel to each filament of the lamp and both the diodes are in parallel to each other also, but in reverse polarity. The objective of the diodes is that watt loss in the filaments is minimized when the lamp is in running condition and also allows filament warming during the lamp starting. The diodes also improve the lamp current crest factor and circuit efficiency. Another objective of the diodes is that if there is any loose contact in one of the contacts of any lamp holder, or if the filaments are broken, with lamp life still intact, then the circuit will still drive the lamp with the same electrical parameters in objective, as before.

One of the lamp junctions is connected to the junction between two series diodes of the valley fill circuit. An inductor is placed to connect the inverter output & the junction between the two series diodes of the valley fill circuit. The objective of the valley-fill circuit, the inductor, the voltage boost components, the diodes in parallel to lamp filaments, along with the EMI/RFI filter & capacitor connecting Busbar & ground, is to provide THD < 10%, Power Factor > 0.98, Lamp Current Crest Factor < 1.7, EMI/RFI < than permissible limits of EN 55015 or IS 6842. The objective of the diodes in parallel to the filaments, along with the torroid components of the half bridge rectifier circuit is also to improve efficiency. Lamp Current Crest Factor. The capacitors connecting the collector and emitter of transistors Ql and Q2, improve the safety of the circuit against high voltage spikes and also helps to reduce the EMI/RFI that is radiated by the switching of the transistors to the environment through air. Now, in the present circuit arrangement, if the ballast circuit is switched ON, without the lamp connected, then also the Half Bridge circuit will face a closed circuit, since the diodes, meant to be in parallel to lamp filaments, are connected to the output of the Half Bridge circuit. This will damage the Ballast circuit. Therefore, to protect against this damage, a switching circuit, which incorporates multiple SCRs and their associated components, has been added. Another objective of this SCR circuit is to protect against damage due to End of Lamp Life, and also to protect against high Mains Voltage or Neutral fault condition. The secondary winding of the choke at the output of the high bridge circuit senses the end of tube life condition or the open circuit condition (lamp absent), whereas, the resistive network starting from the Bus Bar or rectifier positive output, senses the over voltage or neutral fault condition.

The present invention is described with specific and greater clarity with reference to following drawings.

Fig. 1 represents one exemplary embodiment of the invention, showing the full circuit diagram.

Fig. 2 represents another exemplary embodiment of the invention, showing the full circuit diagram.

Inductors L6, L7 and Capacitor Cl in Fig. 1 , form part of the EMI/RFI filter circuit, that also acts as a harmonic filter. L6 and L7 are connected to the Mains Line and are preferably in close vicinity, and starting from Phase & neutral, the winding of the two coils are preferably in opposite direction & position is adjusted for best EMI/RFI filtration. They maybe wound in the same direction with only a little effect on Harmonics, but is not preferable since conducted EMI/RFI will increase. The two inductors maybe wound on the same core or separate cores. One end of C l is connected to the input end (Mains side) of one inductor, while the other end is connected to the output end (Ballast rectifier side) of the other inductor. The output of the two inductors is connected to the bridge circuit which is the ballast rectifier. The two outputs of the Bridge are a positive output and the negative output, which will be referred to as ground.

The positive output is connected to the anode of voltage boost diode Dl . The cathode of Dl leads to the positive Bus Bar called B, where the valley- fill circuit is also connected, which comprises of storage capacitors C7, C8 and diodes D2, D3, D4, D5. Positive terminal of C7 is connected to the positive Bus Bar. The negative terminal of C7 connects to cathode of D2, whose anode is connected to ground. The negative terminal of C7 is also connected to diodes D4 and D5 which are in series with each other. The cathode of D5 is further connected to positive terminal of C8. whose negative terminal is connected to ground and the positive terminal is also connected to anode of D3, whose cathode is connected to B. The junction between D4 and D5 is also the junction between voltage boost capacitors C2 and C3. The other end of C2 is connected to the positive output of the bridge while the other end of C3 is connected to Ground, referred to as G. In the conventional circuit arrangement, the value of voltage boost capacitors is 33nf and above, while in the present invention, the value of the voltage boost capacitors C2 and C3 is limited to 22nf and below. Capacitor C 12 is connected between cathode of voltage boost diode Dl , i.e. Bus Bar B & ground. The half bridge oscillator circuit comprising of transistors Ql & Q2, torroid & associated components, is also connected between Bus Bar B & ground. The half bridge circuit along-with the resonance components L4 & C5, drives the lamp through junctions Jl. J2, J3 & J4. Lamp junction J4 is connected to the junction of C2 and C3. Inductor L8 connects the inverter output to the junction of C2 & C3, which is also the junction between the two series diodes of the valley fill circuit. An additional coupling capacitor maybe added in series with inductor L8 to isolate the DC potential difference between inverter output & junction of C2 & C3. The voltage boost diode Dl, inductor L8, capacitor C 12, the filter circuit components Ll, L7 and Cl, the valley-fill circuit components C7, C8, D2, D3, D4, D5 and the value of C2, C3 as described above, are the main components that enable the circuit to operate at THD < 10%. The filter circuit components L6, L 7 and Cl also minimize the conducted EMI/RFI, and additionally, they also protect the ballast from voltage spikes & high voltage transients.

The half bridge circuit comprises of transistors Ql and Q2 and associated components. Rl and R2 maybe replaced by diodes. Capacitors C4,C11 and diodes D9,D10, across transistors Ql and Q2 respectively, are for the purpose of protection of the circuit from high voltage spikes and also for minimizing radiated RFI. Cl 1 can be removed without much effect on the performance. There are many versions of half -bridge circuit and minor changes in the half bridge circuit of the present invention will not have significant effect on the performance of the circuit. The number of turns of coils Ll, L2, L3 of the torroid and their positioning will depend on the type of torroid used. Ll senses the lamp current and subsequently, induced current in L2 and L3 drive the transistors Ql and Q2 respectively. In the half bridge circuit of the present invention, Ll, L2 & L3 are of 3 to 4 turns.

The high frequency output of the half-bridge inverter circuit is routed through the torroid Coil Ll and resonance inductor L4, to the lamp junction Jl, and thus drives the lamp. Filaments of the lamp are connected between the ballast junctions Jl and J2, and J3 and J4. Resonance capacitor C5 is connected between junctions J2 and J3. A pair of diodes DI l , Dl 3 are connected in parallel to one filament and in reverse polarity with each other. Likewise, another pair of diodes Dl 2, D 14 are connected in parallel to other filament and in reverse polarity to each other. These diodes Dl 1, D13, Dl 2, D14 improve the efficiency of the circuit and also improve the Lamp Current Crest Factor. These diodes also allow the ballast to operate the lamp, even if the filaments are broken but end of tube life is not reached. Even if the lamp is not making contact with one of the contacts of the lamp holders, then also the present invention will operate the lamp with the same electrical parameters.

Another resonance capacitor maybe connected across junctions Jl and J4, but would not have any significant effect on the performance of the present invented circuit. Likewise, a coupling capacitor may also be connected between positive Bus Bar B and other junctions, or in the series path between half -bridge inverter output and lamp, or in series with L8, or in series with the load, but none of these would have any significantly beneficial impact on the performance of the present invented circuit. A capacitor in parallel to the filaments will negatively impact the circuit since it will not allow preheat current to flow through filaments during starting. An additional capacitor resistor network across the filaments may be used but this is also not of much benefit to the present invented circuit.

A secondary winding L5 across choke inductance L4, along with diode D 17, resistors RlO, R9 & capacitor C9, acts as a sensor for end of lamp life condition or no lamp condition. A resistive network of Rl 3, Rl 2 and R 14, along with diode D 18, capacitor ClO, that takes voltage from the positive output of rectifier bridge circuit or from the Bus Bar, acts as a sensor that senses over voltage condition or neutral fault condition. Both these sensors on sensing a fault condition, fire the Diac 2, which further triggers the SCRs. As the SCRs turn ON, they draw current from the driver circuit of one of the transistors of the Half-Bridge, due to which, the half-bridge circuit stops oscillating, and thus the ballast circuit is switched off. A resistive network sensor can also be used to sense the end of lamp life condition or no lamp condition. Additional diac can also be used for better isolation of the two sensors mentioned above in this para. Other minor changes can also be added to replicate the circuit. The use of two or more SCRs in series with each other, enables to protect themselves from neutral fault. One of the SCRs may be removed to bring almost same performance, but in that case, required capacity of single SCR is of minimum 600 VDC, for safety against neutral fault.

In another embodiment as shown in fig. 2, minor changes have been made & explained as under (see fig. 2):

Capacitor C13 is added to the output of the two inductors L6 & L7. Diac 1 is triggered by voltage at the junction between R8 and SCRl . Base of Q2 rather than Ql is used to drop down the torroid output to shut off the circuit with the help of the protection circuit. To effectively bring about complete protection whenever required, the base of Q2 is connected through coil L9 and diode D16 to the source of SCR2. The coil L9 is wound on the torroid & in such a way that the flux produced by L9 during protection period, opposes the flux produced by coil L3, thus further nullifying the output of L3. Dl 6 is preferably a low voltage drop diode. Resistance Rl 5 is connected in series with Diac2, to prevent heavy inrush of current.

The invention of the ballast circuit presented here has been explained in full details with respect to fig. 1 & fig. 2. Explanation has also been given for the novel changes made in the invention, that has brought about THD not only less than 10% but even less than 5%, Power Factor > 0.98, Lamp Current Crest Factor < 1.7, EMI/RF1 within permissible limits of IS 6842 or EN 55015, durability of the circuit against abnormal conditions like end of tube life, neutral fault and high Mains voltages, improvement in efficiency and all this at an affordable cost. Various changes and modification may be made within the scope of the invention.

Claims

I claim :

1) ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS to drive at least one lamp comprising EMI/RFI circuit, bridge circuit, valley-fill circuit, half - bridge inverter circuit, resonance components, diodes and protection circuit wherein

EMI/RFI circuit comprising of inductor L6 and L7 connected with capacitor Cl and/or C 13;

bridge rectifier comprising of four diodes and having one positive output and one negative output called ground ;

valley-fill circuit comprising of storage capacitors C7 & C8, diodes D2, D3, D4 & D5;

voltage boost components diode D2, capacitors C2, C3 and C 12;

half - bridge inverter circuit components, i.e. transistors Ql & Q2, torroid coils Ll, L2 & L3 which drive the transistors Ql, Q2 through their base; capacitors C4 & CI l , diodes D7. D8. D9 & DlO and other associated components of the inverter, & having junctions Jl, J2, J3, J4 to connect with lamp ;

connection between lamp junction J4 & junction between voltage boost capacitors C2 & C3, additional connection of inverter output to the junction between C2 & C3 through inductor L8 ;

resonance components, inductor L4 connected between half bridge inventor circuit and lamps of the circuit and capacitor C5 connected across lamp filament junctions; diodes Dl 1, D13, D12, D14 in parallel to lamp filaments ;

protection circuit components L5 which is a secondary coil wound on the same ferrite as that of resonance inductor L4, other protection components, namely SCRs SCRl and SCR2. resistors R7, R8, R9, Rl O, RI l . R 12. R 13, R 14, R 15. coil L9. electrolytic capacitors C9, ClO, diodes D16, D17, D18 and D1AC2.

2. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein anode of voltage boost diode Dl is connected to positive output of the bridge rectifier circuit and cathode of Dl is connected to the Bus Bar.

3. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein voltage boost capacitor C2, limited to a value of maximum 22nf, is connected between junction of D4, D5 and bridge positive output,

capacitor C3, also limited to a value of maximum 22nf, is connected between junction of D4, D5 and ground,

capacitor Cl 2 is connected between cathode of voltage boost diode Dl & ground,

the junction of D4 & D5 is directly connected to lamp junction J4 & also connected to inverter output through inductor L8.

4. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein filter components comprising of inductors L6, L 7 , Capacitor Cl , C 13, are so connected such that one of the inductors is connected to the Mains Line and the other is connected to the Mains neutral and one end of C 1 is connected to the input end one of the inductors, while the other end of C 1 is connected to the output end of the other inductor, while C 13 connects the output of L6 & L7.

5. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein Load current passing through the Ll coil of three or four turns brings about induction in coils L2 and L3 of three or four turns each.

6. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein C4 and CI l are connected across Ql and Q2 respectively.

7. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein diodes DI l and D13 are connected in parallel to one of the lamp filaments, but in reverse polarity to each other, while diodes D12 and Dl 4 are connected in parallel to the other lamp filament, but in reverse polarity to each other.

8. ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 wherein the protection circuit comprising of a 600VoIt SCR or two SCRs connected in series, and secondary coil L5 output and resistive network output of R7, R9, RlO, Rl L R12, R13, R14 along with diodes Dl 7, D 18, Electrolytic capacitors C9. ClO, is fed to the DIAC 2 which is connected to the gate of one of the SCRs and base of one of the transistors connected to SCR source through coil L9 & diode D 16.

9. ECONOMIC and DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS as claimed in claim 1 to 8, is substantially described in forgoing drawings and complete specification.