WO2010049988A1 - Decoding device, reception device, communication system, decoding method, and reception method - Google Patents

Abstract

A decoding unit (111) executes an error correction encoding on each of data obtained by a block division. A pre-stage detection unit (112) detects an error in each data subjected to the error correction decoding by the decoding unit (111). If an error is detected by the pre-stage detection unit (112), a repetition control unit (113) causes the decoding unit (111) to repeat the error correction decoding. If no error is detected, the repetition control unit (113) outputs each of the data which has been subjected to the error correction decoding. A coupling unit (114) block-connects the respective data outputted by the repetition control unit (113). A post-stage detection unit (115) detects an error in the data block-connected by the coupling unit (114). If an error is detected by the post-stage detection unit (115), a re-repetition control unit (116) causes the decoding unit (111) to repeat the error correction decoding. If no error is detected, the re-repetition control unit (116) outputs the block-connected data outside.

Description

Decoding device, receiving device, communication system, decoding method and receiving method

The present invention relates to a decoding device, a receiving device, a communication system, a decoding method, and a receiving method for error correction decoding of data.

In mobile communications, researches are being actively conducted to detect or correct signal errors caused by interference and noise caused by the transmission path environment. Particularly in digital mobile communications, error control techniques for correcting errors are widely used. Error control technology is divided into ARQ (Automatic Repeat reQuest) and FEC (Forward Error Correction).

In ARQ, the transmission side transmits data obtained by performing error detection coding on information bits. Then, the receiving side performs error detection processing on the received data, and when an error is detected, a retransmission request is fed back to the transmitting side. On the other hand, the transmitting side transmits information bits to the receiving side by performing retransmission processing of information bits.

In contrast, in FEC, the transmission side transmits data obtained by performing error correction coding. The receiving side corrects the data error by performing error correction decoding on the received data. Since FEC does not perform feedback or retransmission processing like ARQ, it is particularly effective in a communication system that does not allow communication delay.

Also, in recent mobile communication systems, a system using both ARQ and FEC is often employed in order to achieve reliable information transmission and minimum communication delay. This method is also used in 3GPP (3rd Generation Partnership Project: a project for creating specifications for third-generation mobile phone systems).

As an error detection code used in ARQ, CRC (Cyclic Redundancy Check) is known. In CRC, the transmission side transmits data with redundant bits generated by applying a cyclic generator polynomial to the data. The receiving side generates redundant bits from the received data using the same generator polynomial, and detects an error by comparing with the received redundant bits.

Also, turbo coding is known as an error correction code used in FEC. Turbo coding is attracting attention as a code approaching the Shannon limit, which is the theoretical limit of the transmission rate at which information can be transmitted without error, and is also adopted in 3GPP. As a decoding method for turbo encoding, iterative decoding is known in which error correction capability is improved by repeatedly performing error correction decoding processing (see, for example, Patent Document 1 below).

For example, turbo decoding is performed on the received data by a turbo decoder, and error detection is performed on the data subjected to turbo decoding by CRC check. When an error in the data is detected, turbo decoding by the turbo decoder is performed again. This series of iterative decoding processes is repeatedly performed until no error is detected in the CRC check.

In addition, in order to prevent the iterative decoding process from being performed indefinitely, if the maximum number of repetitions is set in advance and an error is detected even if the number of repetitions of the iterative decoding process exceeds the maximum value, it is determined that decoding has failed. To do. In this case, the iterative decoding process is terminated, and the retransmission process is performed by the above ARQ.

Here, focusing on error detection by CRC inspection, it is known that the CRC inspection itself has a detection limit for errors. Therefore, even if a CRC check is performed, an error cannot be detected correctly under all conditions. In error detection, even though an error is actually included, determining that there is no error is called “missing error”.

Generally, the smaller the number of repetitions of the iterative decoding process, the more errors are missed in the CRC check (see, for example, FIGS. 11 and 12). If an overlook error occurs in the CRC check, the iterative decoding process by the turbo decoder is stopped despite the occurrence of the error, so that the quality of the data output from the decoding apparatus is greatly deteriorated.

On the other hand, in the prior art, an overlooked error is avoided by setting the number of repeated restraints. Here, the number of repetition constraint is the number of repetitions of repeated decoding processing even if it is determined that there is no error by CRC check. For example, if the number of repetitions is more than 3, the number of missed errors is expected to decrease (see, for example, FIGS. 11 and 12), and the number of repetition restraints is set to 3 or more.

JP 2002-171175 A

However, the above-described conventional technique has a problem that the amount of decoding processing increases because unnecessary decoding processing is repeatedly performed for the number of times of restraint even when no overlooked error has occurred in error detection. The iterative decoding process by turbo decoding has a large correction capability, but the processing amount is enormous, so that the power consumption increases greatly as the number of repetitions increases.

Especially in mobile terminals, the size of the battery is severely limited because it is required to be small and thin. In recent years, there is a high demand for environmentally-friendly low power consumption products. For this reason, how to reduce power consumption is an important issue. Further, when the amount of decoding processing increases, it takes time to complete the receiving operation. On the other hand, if the number of repetitive restraints is reduced or eliminated, there is a problem that overlooked errors increase and communication quality deteriorates.

The disclosed decoding device, receiving device, communication system, decoding method, and receiving method are intended to solve the above-described problems and to improve communication quality and reduce the processing amount.

In order to solve the above-described problems and achieve the object, the disclosed technology performs error correction decoding on each piece of data obtained by block division, and performs error detection on each piece of error correction decoded data, thereby detecting an error. Error correction decoding is performed again, and if no error is detected, the error correction decoded data is output, the output data is block-coupled, and the error of the block-coupled data is output. It is necessary to perform detection and to perform error correction decoding again when an error is detected, and to output the block-combined data to the outside when no error is detected.

According to the above configuration, an overlooked error in error detection of each data obtained by dividing the block can be detected by error detection of data obtained by block-connecting each data.

According to the disclosed decoding device, receiving device, communication system, decoding method, and receiving method, it is possible to improve the communication quality and reduce the processing amount.

FIG. 1 is a block diagram showing an outline of the configuration of the decoding apparatus. FIG. 2 is a block diagram of a configuration of the wireless communication system according to the first embodiment. FIG. 3 is a block diagram showing a specific example of the encoding unit shown in FIG. FIG. 4 is a diagram illustrating encoding by the encoding unit illustrated in FIG. 3. FIG. 5 is a block diagram showing a specific example of the turbo encoding unit shown in FIG. FIG. 6 is a block diagram illustrating a specific example of the decoding processing unit illustrated in FIG. FIG. 7 is a block diagram showing a specific example of the decoding apparatus shown in FIG. FIG. 8 is a block diagram showing a specific example of a part of the repetition control unit shown in FIG. FIG. 9 is a flowchart of an example (part 1) of the operation of the decoding apparatus according to the first embodiment. FIG. 10 is a flowchart of an example (part 2) of the operation of the decoding apparatus according to the first embodiment. FIG. 11 is a diagram illustrating an example of the number of missed errors and the BER for each number of repetitions. FIG. 12 is a diagram illustrating the number of errors and the number of missed errors for each number of repetitions. FIG. 13 is a diagram illustrating BLER for each number of repetitions. FIG. 14 is a diagram illustrating an example of comparison of the number of repeated decoding. FIG. 15 is a block diagram of a specific example of part of the repetitive control unit according to the second embodiment. FIG. 16 is a flowchart of an example of the operation of the decoding device according to the second embodiment. FIG. 17 is a block diagram of a configuration of the decoding apparatus according to the third embodiment. FIG. 18 is a block diagram of a specific example of a part of the repetitive control unit according to the third embodiment. FIG. 19 is a diagram illustrating an example of information stored in the repetition count storage unit illustrated in FIG. 18. FIG. 20 is a flowchart of an example of operation (part 1) of the decoding apparatus according to the third embodiment. FIG. 21 is a flowchart of an example of the operation (part 2) of the decoding apparatus according to the third embodiment.

Explanation of symbols

200 Wireless Communication System 214, 221 Antenna 421 Code Block 510, 530 Encoder 511, 513, 515, 517 Adder 512, 514, 516 Delay

Hereinafter, preferred embodiments of the decoding device, the receiving device, the communication system, the decoding method, and the receiving method will be described in detail with reference to the accompanying drawings. The decoding device, the receiving device, the communication system, the decoding method, and the receiving method perform turbo decoding until no error is detected for each block-divided data, and combine the data determined to be error-free By further detecting errors in data, it is possible to reduce missed errors and improve communication quality.

(Outline of decoding device)
FIG. 1 is a block diagram showing an outline of the configuration of the decoding apparatus. A decoding device 100 illustrated in FIG. 1 is a decoding device provided in a reception device that receives data transmitted from a transmission device. The data transmitted from the transmission device to the reception device is divided into error detection coded data blocks, each block divided data is subjected to error detection coding, each error detection coded data is subjected to error correction coding, and error correction coding is performed. This is data obtained by combining blocks of data.

In FIG. 1, the solid line arrows indicate the flow of received data. Also, the dotted arrows indicate the flow of control signals other than the received data (the same applies to the following block diagrams). Each data (hereinafter simply referred to as “each data”) obtained by dividing the data received from the transmission device into blocks is input to the decoding device 100.

The decoding apparatus 100 includes a decoding unit 111, a pre-stage detection unit 112, a repetition control unit 113, a combination unit 114, a post-stage detection unit 115, and a re-repetition control unit 116. The decoding unit 111 performs error correction decoding on each input data, and outputs each data subjected to error correction decoding to each of the upstream detection unit 112 and the repetition control unit 113.

Also, the decoding unit 111 holds each data subjected to error correction decoding, and repeatedly performs error correction decoding on each data in accordance with control from the repetition control unit 113. The error correction decoding performed by the decoding unit 111 is iterative decoding in which the error correction accuracy of data improves as the decoding process is repeated. For example, error correction decoding performed by the decoding unit 111 is turbo decoding.

The upstream detection unit 112 performs error detection on each data output from the decoding unit 111. Then, the upstream detection unit 112 repeatedly outputs an error detection result of each data to the control unit 113. The error detection result that the upstream detection unit 112 repeatedly outputs to the control unit 113 includes, for example, information indicating “with error” or “no error” for each data, or any of the data with “error” ".

The error detection method by the upstream detection unit 112 is a method corresponding to the error detection coding performed on each data block-divided on the transmission side. For example, when each piece of data divided into blocks on the transmission side is CRC-encoded, the upstream detection unit 112 detects an error in each data by performing a CRC check on each piece of data.

The iterative control unit 113 is a iterative control unit that causes the decoding unit 111 to perform error correction decoding again when an error is detected by the upstream detection unit 112. Specifically, the iterative control unit 113 controls the decoding unit 111 so that error correction decoding is performed again on the data in which the error is detected by the upstream detection unit 112 of each data.

When the error correction decoding is performed again by the decoding unit 111 in accordance with the control of the repetition control unit 113, each data subjected to the error correction decoding again is output to the upstream detection unit 112 and the repetition control unit 113. The iterative control unit 113 repeatedly performs error correction decoding by the decoding unit 111 until no error is detected by the upstream detection unit 112 for all the data.

When no error is detected by the upstream detection unit 112 for all of the data, the iterative control unit 113 outputs the data that is output from the decoding unit 111 and no error is detected by the upstream detection unit 112 to the combining unit 114. . Note that data in which an error is detected by the upstream detection unit 112 in the process of repeatedly performing error correction decoding is not necessary because the same content data that has been error correction decoded again is output from the decoding unit 111 again. For this reason, the repetition control unit 113 may discard the data in which the error is detected by the upstream detection unit 112.

The combination unit 114 performs block combination of the data output from the repetition control unit 113. The combining unit 114 outputs the block combined data to the subsequent detection unit 115 and the repeat control unit 116, respectively. The block combination method by the combining unit 114 is a method corresponding to the block division performed in the preceding stage of the decoding device 100.

The post-stage detection unit 115 detects an error in the data output from the combining unit 114. Then, the downstream detection unit 115 outputs the data error detection result to the re-repetition control unit 116. The error detection result output by the post-detection unit 115 is information indicating “error” or “no error” in the data output from the combining unit 114, for example.

The error detection method by the post-detection unit 115 is a method corresponding to the error detection coding performed on the data before block division on the transmission side. For example, when data before block division is CRC-encoded on the transmission side, the upstream detection unit 112 detects a data error by performing a CRC check. Further, the error detection method by the subsequent detection unit 115 may be the same as or different from the error detection method by the previous detection unit 112.

The re-repetition control unit 116 causes the decoding unit 111 to perform error correction decoding of each data again when a data error is detected by the subsequent detection unit 115. When the error correction decoding by the decoding unit 111 is performed again by the control of the re-repetition control unit 116, the error detection by the preceding detection unit 112 and the control by the repetition control unit 113 are performed again.

Then, each piece of data in which no error is detected by the upstream detection unit 112 is block-connected by the combining unit 114, and the combined data is error-detected by the subsequent detection unit 115. The re-repetition control unit 116 repeatedly performs error correction decoding by the decoding unit 111 until no error is detected by the post-stage detection unit 115. Note that the object that the re-repetition control unit 116 performs the error correction decoding again is, for example, all of each data.

Alternatively, the object for which the re-repetition control unit 116 performs error correction decoding again may be a part of each data (see FIGS. 17 to 19). When no error is detected by the subsequent detection unit 115, the re-repetition control unit 116 outputs the data output from the combining unit 114 and no error detected by the subsequent detection unit 115 to the outside (upper layer) of the decoding apparatus 100. To do. The outside of the decoding device 100 is, for example, an information processing device that is provided in a subsequent stage of the decoding device 100 and processes data output from the decoding device 100.

In addition, although the structure which outputs each data to each of the front | former stage detection part 112 and the repetition control part 113 whenever each data was error-correction-decoded by the decoding part 111 was demonstrated, it is not restricted to such a structure. That is, the repetition control unit 113 only needs to acquire at least data for which no error has been detected by the upstream detection unit 112. For example, the repetition control unit 113 may acquire only data for which no error has been detected by the upstream detection unit 112 from the decoding unit 111 or the upstream detection unit 112.

In addition, although a configuration has been described in which data obtained by block combination is output to each of the subsequent detection unit 115 and the re-repetition control unit 116 each time the data is combined by the combining unit 114, the present invention is not limited to such a configuration. That is, the re-repetition control unit 116 may acquire at least data for which no error is detected by the subsequent detection unit 115. For example, the re-repetition control unit 116 may acquire data from which no error has been detected by the subsequent detection unit 115 from the combining unit 114 or the subsequent detection unit 115.

(Embodiment 1)
FIG. 2 is a block diagram of a configuration of the wireless communication system according to the first embodiment. As illustrated in FIG. 2, the wireless communication system 200 according to the first embodiment includes a wireless transmission device 210 and a wireless reception device 220. The wireless communication system 200 is a system that transmits information bits from a wireless transmission device 210 to a wireless reception device 220 by wireless communication. Although details will be described later, the decoding device 100 of FIG. 1 is provided in the wireless reception device 220.

The wireless transmission device 210 divides the error detection encoded data into blocks, performs error detection encoding on each of the block divided data, performs error correction encoding on the error detection encoded data, and blocks each error correction encoded data. It is a transmission device that transmits combined data. Specifically, the wireless transmission device 210 includes an encoding unit 211, a modulation unit 212, a wireless transmission unit 213, and an antenna 214.

The encoding unit 211 encodes information bits input from an information source (not shown), and outputs the data obtained by encoding to the modulation unit 212. A specific configuration of the encoding unit 211 will be described later (see FIG. 3). Modulation section 212 modulates the data output from encoding section 211 and outputs a signal obtained by the modulation to radio transmission section 213. The wireless transmission unit 213 wirelessly transmits the signal output from the modulation unit 212 to the wireless reception device 220 via the antenna 214.

The wireless reception device 220 receives a signal wirelessly transmitted from the wireless transmission device 210 and decodes the received signal. Specifically, the wireless reception device 220 includes an antenna 221, a wireless reception unit 222, a demodulation unit 223, and a decoding processing unit 224. The wireless reception unit 222 receives a signal wirelessly transmitted from the wireless transmission device 210 via the antenna 221. Then, the wireless reception unit 222 outputs the received signal to the demodulation unit 223.

The demodulator 223 demodulates the signal output from the wireless receiver 222 and outputs the data obtained by the demodulation to the decoding processor 224. The decoding processing unit 224 performs decoding processing on the data output from the demodulation unit 223, and outputs information bits obtained by the decoding processing to a subsequent device (not shown). Details of the decoding processing by the decoding processing unit 224 will be described later (see FIG. 6).

FIG. 3 is a block diagram showing a specific example of the encoding unit shown in FIG. Here, the encoding unit 211 shown in FIG. 2 is configured based on, for example, the specification (TS36.212 V8.3.0) of LTE (Long Term Evolution) system that is being standardized in 3GPP.

Hereinafter, as an example, the configuration of the encoding unit 211 based on the specifications of the LTE system will be described. As shown in FIG. 3, the encoding unit 211 includes a transport block CRC adding unit 311, a code block dividing unit 312, a code block CRC adding unit 313, a turbo encoding unit 314, a rate matching unit 315, A code block coupling unit 316.

2 is input to the transport block CRC adding unit 311 as a transport block. The transport block CRC adding unit 311 performs CRC encoding on the input transport block, and outputs the transport block obtained by CRC encoding to the code block dividing unit 312.

The code block dividing unit 312 divides the transport block output from the transport block CRC adding unit 311 into code block units of a predetermined size. The code block dividing unit 312 outputs each code block obtained by the block division to the code block CRC adding unit 313. The code block CRC adding unit 313 performs CRC encoding on each code block output from the code block dividing unit 312, and outputs each code block obtained by the CRC encoding to the turbo encoding unit 314.

Turbo coding section 314 turbo-codes each code block output from code block CRC adding section 313 and outputs each code block obtained by turbo coding to rate matching section 315. The rate matching unit 315 performs rate matching on each code block output from the turbo encoding unit 314, and outputs each code block on which the rate matching has been performed to the code block combining unit 316.

Rate matching is an operation of matching the size of each code block with the transmission rate of the radio frame by repeating (repetition) or decimating (puncturing) the code block. The code block combining unit 316 combines the code blocks output from the rate matching unit 315. Then, the code block combining unit 316 outputs the transport block obtained by combining to the modulation unit 212 (see FIG. 2).

FIG. 4 is a diagram showing encoding by the encoding unit shown in FIG. In FIG. 4, reference numeral 410 indicates an image of a transport block that is CRC-encoded by the transport block CRC adding unit 311 (see FIG. 3). As indicated by reference numeral 410, the transport block CRC adding unit 311 adds a CRC code 412 calculated from the input transport block 411 to the transport block 411.

Reference numeral 420 indicates an image of each code block divided by the code block dividing unit 312. As indicated by reference numeral 420, the code block dividing unit 312 divides the data including the transport block 411 and the CRC code 412 indicated by reference numeral 410 into code blocks 421 (code blocks # 1 to #n) having a predetermined size. To do. When the size of data indicated by reference numeral 410 is equal to or smaller than a predetermined size, the code block dividing unit 312 outputs the data indicated by reference numeral 410 to the code block CRC adding unit 313 without dividing the data.

Reference numeral 430 represents an image of a code block that is CRC-encoded by the code block CRC adding unit 313. As indicated by reference numeral 430, the code block CRC adding unit 313 adds a CRC code 431 calculated from the code block 421 to the code block 421 for each of the code blocks 421 indicated by the reference numeral 420. When the code block dividing unit 312 does not divide the data indicated by the reference numeral 410, the code block CRC adding unit 313 does not add a CRC code.

FIG. 5 is a block diagram showing a specific example of the turbo encoding unit shown in FIG. As illustrated in FIG. 5, the turbo encoding unit 314 (see FIG. 3) includes an encoder 510, an interleaver 520, and an encoder 530. The code block input to the turbo encoding unit 314 is input to each of the encoder 510 and the interleaver 520, and is output as it is to the rate matching unit 315 (see FIG. 3) as an encoded sequence x.

The encoder 510 performs recursive systematic convolutional coding on the input code block. Specifically, the encoder 510 includes adders 511, 513, 515, and 517, and delay units 512, 514, and 516 (D: shift register). Adder 511 adds the data input to encoder 510 and the data output from adder 515, and outputs the added data to each of delay unit 512 and adder 513.

The delay unit 512 delays the data output from the adder 511, and outputs the delayed data to each of the adder 513 and the delay unit 514. The adder 513 adds the data output from the adder 511 and the data output from the delay unit 512, and outputs the added data to the adder 517. Delay device 514 delays the data output from delay device 512, and outputs the delayed data to adder 515 and delay device 516, respectively.

The adder 515 adds the data output from the delay unit 514 and the data output from the delay unit 516, and outputs the added data to the adder 511. Delay device 516 delays the data output from delay device 514, and outputs the delayed data to adder 515 and adder 517, respectively. The adder 517 adds the data output from the adder 513 and the data output from the delay unit 516, and outputs the added data to the rate matching unit 315 (see FIG. 3) as an encoded sequence z1. .

Interleaver 520 agitates the input data and outputs it to encoder 530. The encoder 530 performs recursive systematic convolutional coding on the code block output from the interleaver 520. The configuration of the encoder 530 is the same as the configuration of the encoder 510, and thus the same reference numerals are given and description thereof is omitted. The adder 517 of the encoder 530 outputs the added data to the rate matching unit 315 (see FIG. 3) as an encoded sequence z2.

In the configuration described here, the turbo encoding unit 314 sequentially turbo-codes each code block output from the code block CRC adding unit 313 by time division. On the other hand, a turbo encoding unit 314 may be provided for each code block output from the code block CRC adding unit 313, and each code block may be turbo encoded in parallel.

FIG. 6 is a block diagram showing a specific example of the decryption processing unit shown in FIG. As illustrated in FIG. 6, the decoding processing unit 224 (see FIG. 2) included in the wireless reception device 220 includes a code block dividing unit 611, a derate matching unit 612, and a decoding device 613. A transport block is input from the demodulator 223 to the code block divider 611.

The code block division unit 611 divides the input transport block into blocks, and outputs each code block obtained by the block division to the derate matching unit 612. The derate matching unit 612 performs derate matching on each code block output from the code block dividing unit 611. The derate matching unit 612 outputs each code block subjected to derate matching to the decoding device 613.

The derate matching method performed by the derate matching unit 612 is a method corresponding to the rate matching by the rate matching unit 315 shown in FIG. The decoding device 613 has a configuration corresponding to the decoding device 100 shown in FIG. The decoding device 613 decodes each code block output from the derate matching unit 612 and outputs the decoded code block to the outside of the wireless reception device 220. The detailed configuration of the decoding device 613 will be described later (see FIG. 7).

FIG. 7 is a block diagram showing a specific example of the decoding apparatus shown in FIG. Here, it is assumed that the transport block is divided into n code blocks # 1 to #n in the code block dividing unit 312 shown in FIG. Here, a case where the decoding apparatus 613 processes n code blocks in parallel by n code block processing units will be described.

As shown in FIG. 7, the decoding device 613 includes n code block processing units # 71 to # 7n, a code block combining unit 714, a transport block CRC checking unit 715, and a re-repetition control unit 716. I have. Code blocks # 1 to #n are input to code block processing units # 71 to # 7n, respectively. As described in FIG. 5, each of code blocks # 1 to #n includes encoded sequences x, z1, and z2.

For example, the coded sequence x, z1, z2 of the code block # 1 is input to the code block processing unit # 71. The code blocks # 1 to #n input to the code block processing units # 71 to # 7n are the same as the code blocks 421 to which the CRC code 431 indicated by the reference numeral 430 in FIG. 4 is added. However, the code blocks # 1 to #n may include an error that has occurred in the transmission path between the wireless transmission device 210 and the wireless reception device 220.

Each of the code block processing units # 71 to # 7n includes a turbo decoding unit 711, a code block CRC checking unit 712, and an iterative control unit 713. Each turbo decoding unit 711 of the code block processing units # 71 to # 7n has a configuration corresponding to the decoding unit 111 of FIG. Each code block CRC checking unit 712 of the code block processing units # 71 to # 7n has a configuration corresponding to the upstream detection unit 112 of FIG. Each repetition control unit 713 of the code block processing units # 71 to # 7n has a configuration corresponding to the repetition control unit 113 in FIG.

Here, the turbo decoding unit 711, the code block CRC checking unit 712, and the repetition control unit 713 of the code block processing unit # 71 will be described. The turbo decoding unit 711 performs error correction decoding on the input code block # 1, and outputs the error corrected decoded code block # 1 to the code block CRC check unit 712 and the repetition control unit 713, respectively.

Also, the turbo decoding unit 711 holds the code block # 1 subjected to error correction decoding, and performs error correction decoding of the code block # 1 again when a repetition control signal is output from the repetition control unit 713. The turbo decoding unit 711 outputs the code block # 1 subjected to error correction decoding again to the code block CRC checking unit 712 and the repetition control unit 713.

As the turbo decoding performed by the turbo decoding unit 711, various decoding techniques such as MAP decoding (Maximum A Posteriori Probability Decoding) and SOVA (Soft Output Viterbi Algorithm: Soft Output Viterbi Algorithm) can be used. .

The code block CRC checking unit 712 performs error detection by performing CRC check on the code block # 1 output from the turbo decoding unit 711, and repeatedly outputs the error detection result to the control unit 713. The iterative control unit 713 outputs a repetitive control signal to the turbo decoding unit 711 when the code block CRC checking unit 712 detects an error in the code block # 1. The iterative control unit 713 also outputs the iterative control signal to the turbo decoding unit 711 even when the iterative control signal is output from the iterative control unit 716.

When a repetitive control signal is output from the repetitive control unit 713 to the turbo decoding unit 711, the code block # 1 is subjected to error correction decoding again by the turbo decoding unit 711, and an error is detected by the code block CRC checking unit 712. In addition, when the code block CRC checking unit 712 does not detect an error in the code block # 1, the repetition control unit 713 outputs the code block # 1 in which no error is detected to the code block combining unit 714.

Also, in the repetition control unit 713, a maximum value of the number of repetitions of error correction decoding (hereinafter referred to as “maximum number of repetitions”) is set in advance. Even when an error in code block # 1 is detected, repetition control section 713 does not output a repetition control signal if the number of repetitions of error correction decoding exceeds the maximum number of repetitions. In this case, the repetition control unit 713 outputs a decoded NG signal indicating that decoding has failed to the re-repetition control unit 716.

The code block processing units # 72 to # 7n also perform the same processing as the processing of the code block processing unit # 71 described above on the input code blocks # 2 to #n, respectively. Thus, code blocks # 1 to #n that have been subjected to error correction decoding until no error is detected in code block processing units # 71 to # 7n are input to code block combining unit 714.

Alternatively, when the number of times error correction decoding is repeated exceeds the maximum number of repetitions in any of code block processing units # 71 to # 7n, a decoded NG signal is output to re-repetition control unit 716. Here, it is assumed that in all of the code block processing units # 71 to # 7n, no error is detected by error correction decoding within the maximum number of repetitions, and the code blocks # 1 to #n are input to the code block combining unit 714.

The code blocks # 1 to #n input to the code block combining unit 714 are the same as the code blocks 421 indicated by reference numeral 420 in FIG. However, the code blocks # 1 to #n may include an overlooked error by the code block CRC check unit 712. When all the code blocks # 1 to #n output from the code block processing units # 71 to # 7n are input, the code block combining unit 714 blocks the code blocks # 1 to #n.

The transport block obtained by block combination by the code block combining unit 714 is the same as the data indicated by reference numeral 410 in FIG. 4 (transport block 411 to which the CRC code 412 is added). However, the transport block obtained by combining the blocks may include an overlooked error by the code block CRC checking unit 712. The code block combining unit 714 outputs the block combined transport block to the transport block CRC checking unit 715 and the repeat control unit 716.

The transport block CRC check unit 715 performs error detection by performing CRC check on the transport block output from the code block combining unit 714, and outputs the error detection result to the repeat control unit 716. When the transport block CRC checking unit 715 detects a transport block error, the repeat control unit 716 outputs a repeat control signal to each of the code block processing units # 71 to # 7n.

Thus, the code blocks # 1 to #n are again subjected to error correction decoding by the code block processing units # 71 to # 7n, respectively. Then, the above-described processing of the code block processing units # 71 to # 7n is performed again, and the block combination of the code blocks # 1 to #n by the code block combining unit 714 and the CRC check by the transport block CRC checking unit 715 are performed again. Is called. The repeat control unit 716 outputs a repeat control signal until no error is detected by the transport block CRC check unit 715.

In addition, when no error is detected by the transport block CRC checking unit 715, the re-repetition control unit 716 outputs a transport block in which no error is detected to the outside of the decoding device 613. Further, the repeat control section 716 stops the repeat control when the decoded NG signal is output from any of the code block processing sections # 71 to # 7n. In this case, for example, the repeat control unit 716 performs code block retransmission processing by requesting the upper layer to transmit a retransmission request signal to the wireless transmission device 210.

Each of the code block processing units # 71 to # 7n described above can be realized by, for example, n DSPs (Digital Signal Processors). Further, the code block combining unit 714, the transport block CRC checking unit 715, and the repeat control unit 716 can also be realized by a CPU, for example.

In addition, although the structure which the decoding apparatus 613 processes n code blocks in parallel by n code block process parts was demonstrated here, it is not restricted to such a structure. For example, one code block processing unit may be provided and n code blocks may be time-division processed by one code block processing unit.

In addition, each turbo decoding unit 711 of the code block processing units # 71 to # 7n includes a memory (not shown) that holds the code blocks # 1 to #n, respectively, in order to perform error correction decoding again. The code block combining unit 714 includes a memory (not shown) that holds each code block until the code blocks # 1 to #n are prepared.

FIG. 8 is a block diagram showing a specific example of a part of the repetitive control unit shown in FIG. As illustrated in FIG. 8, the repetition control unit 713 includes a determination unit 811 and a repetition number counter 812. The determination unit 811 initializes the iteration count counter 812 (for example, sets the count to “1”) each time a new code block group is input to the decoding device 613.

Also, the determination unit 811 increments the repeat count counter 812 when a detection result indicating that an error is detected is output from the code block CRC check unit 712. As described above, the repeat control unit 713 outputs a repeat control signal even when a repeat control signal is input, but the illustration of the function is omitted here.

Then, the determination unit 811 refers to the iteration count counter 812, and outputs an iteration control signal to the turbo decoding unit 711 when the iteration count of the iteration count counter 812 is within the maximum iteration count. On the other hand, when the number of repetitions of the repetition number counter 812 exceeds the maximum number of repetitions, the determination unit 811 outputs a decoded NG signal to the repetition control unit 716 without outputting the repetition control signal to the turbo decoding unit 711. (Error handling).

FIG. 9 is a flowchart of an example (part 1) of the operation of the decoding apparatus according to the first embodiment. Although the operation of the code block processing unit # 71 will be described here, the operation of the code block processing units # 72 to # 7n is the same. First, the determination unit 811 of the repetition control unit 713 initializes the repetition number counter 812 (step S901). Next, the turbo decoding unit 711 performs error correction decoding on the code block # 1 (step S902).

Next, the code block CRC checker 712 performs a CRC check on the code block # 1 that has been subjected to error correction decoding in step S902 (step S903). Next, the iterative control unit 713 determines whether or not an error in the code block # 1 is detected in step S903 (step S904). If no error is detected (step S904: No), the code block # 1 that has been subjected to error correction decoding in step S902 is output to the code block combining unit 714 (step S905), and the series of processing ends.

When an error is detected in step S904 (step S904: Yes), the determination unit 811 of the repetition control unit 713 increments the repetition number counter 812 (step S906). Next, the determination unit 811 determines whether or not the number of repetitions of the repetition number counter 812 incremented in step S906 is within a preset maximum number of repetitions (step S907).

If it is determined in step S907 that the number of repetitions counter 812 is within the maximum number of repetitions (step S907: Yes), the process returns to step S902, and error correction decoding is performed again on the code block # 1, and the process is continued. If the number of repetitions counter 812 is not within the maximum number of repetitions (step S907: No), the decoded NG signal is output to the re-repetition control unit 716 (step S908), and the series of operations is terminated.

The above steps are similarly performed for the code blocks # 2 to #n by the code block processing units # 72 to # 7n. Further, each of the code block processing units # 71 to # 7n performs steps S901 to S908 again when the re-repetition control signal is output from the re-repetition control unit 716. As a result, each iteration number counter 812 of the code block processing units # 71 to # 7n is initialized, and error correction decoding is performed again.

Alternatively, each of the code block processing units # 71 to # 7n may perform Steps S902 to S908 again when a repeat control signal is output from the repeat control unit 716. In this case, even if a re-repetition control signal is output, error correction decoding is performed again without the repetition counter 812 being initialized.

FIG. 10 is a flowchart of an example (part 2) of the operation of the decoding apparatus according to the first embodiment. Here, operations of the code block combining unit 714, the transport block CRC checking unit 715, and the repeat control unit 716 will be described. First, the code block combining unit 714 determines whether all the code blocks # 1 to #n have been input (step S1001) and waits until they are input (step S1001: No loop).

When all the code blocks # 1 to #n are input in step S1001, the code block combining unit 714 performs block combination of the code blocks # 1 to #n (each code block) (step S1002). Next, the transport block CRC checking unit 715 performs CRC check on the transport block obtained by the block combination in step S1002 (step S1003).

Next, the repeat control unit 716 determines whether an error in the transport block has been detected in step S1003 (step S1004). If no error is detected (step S1004: No), the transport block obtained in step S1002 is output to the outside (step S1005), and the series of processing ends.

If an error is detected in step S1004 (step S1004: Yes), the control signal is output again to each of the code block processing units # 71 to # 7n (step S1006). Next, the process returns to step S1001, waits until all the code blocks # 1 to #n are input again, and the processing is continued. In addition, when a decoded NG signal is output from any of code block processing units # 71 to # 7n, re-repetition control unit 716 stops the operation shown in FIG. 10 and performs code block retransmission processing.

(Examination of reduction in the number of iterations)
Next, as compared with the conventional decoding device, the stochastic reduction amount of the number of repeated decoding processes when the decoding device 613 is used will be examined. Here, as an example, a comparison with the decoding device described in Patent Document 1 is performed. Here, it is assumed that the transport block CRC check unit 715 does not cause an oversight error.

Actually, the transport block CRC check unit 715 may cause an oversight error. However, the code blocks # 1 to #n input to the transport block CRC check unit 715 are obtained by combining the data in which no error was detected in the code block processing units # 71 to # 7n, so there are few errors. . For this reason, the probability of a miss in the transport block CRC checker 715 is extremely low.

Also in the decoding device described in the above-mentioned Patent Document 1, it is the same as the decoding device 613 that an overlook error can occur in the CRC check of the transport block. For this reason, even if it is assumed in the transport block CRC check unit 715 that no oversight error occurs, it is considered that the following examination results are not affected.

FIG. 11 is a diagram showing an example of the number of missed errors and the BER for each number of repetitions. A table 1100 shown in FIG. 11 shows the number of repetitions of the decoding process for the number of error bits 1110, the BER 1120 (Bit Error Rate), and the number of missed errors 1130 in the decoding apparatus described in Patent Document 1. Each 1140 is shown.

The error bit number 1110 and the BER 1120 indicate the error bit number and the BER calculated by turbo-decoding the code block and CRC checking the turbo-decoded code block, respectively. The number of missed errors 1130 indicates the number of missed errors that occurred when the turbo-decoded code block was CRC checked.

Table 1100 shows that in turbo decoding, the number of error bits 1110, BER 1120, and number of missed errors 1130 decreases as the number of repetitions 1140 of the decoding process increases. Here, it is assumed that the number of repetitions 1140 of the decoding process in the decoding apparatus described in Patent Document 1 is set to 6 which is the minimum number of times that the number of missed errors 1130 is zero. In order to match the conditions with the above-mentioned Patent Document 1, the size of one code block (the predetermined size c + 8 bits of the CRC code) is set to 648 bits.

FIG. 12 is a diagram showing the number of errors and the number of missed errors for each number of repetitions. In FIG. 12, the same parts as those shown in FIG. The table 1200 shown in FIG. 12 shows the number of error detection codes 1210 that actually have errors, the number of missed errors 1130, and the ratio 1220 of the number of missed errors 1130 to the number of error detection codes 1210, and the number of repetitions of decoding processing. Each 1140 is shown.

Here, the BLER (BLock Error Rate: probability that an error is included in one code block) with respect to the number of iterations 1140 of the decoding process is theoretically derived from the BER 1120. BLER can be obtained by subtracting from 1 the probability that no error occurs in the code block. Therefore, BLER can be expressed by the following equation (1).

BLER (n) = (1- (1-Ber (n)) ^ z) ... (1)

In the above equation (1), n indicates the number of repetitions 1140 of the decoding process. Ber (n) indicates the BER 1120 with respect to the number of decoding processing iterations 1140. z indicates the number of bits of one code block (here, 648 bits).

FIG. 13 is a diagram showing BLER for each number of repetitions. A table 1300 shown in FIG. 13 shows the BLER 1310 and the missed error rate 1320 for each iteration 140 of the decoding process. The BLER 1310 is a BLER calculated based on the above equation (1) and the BER 1120 for each number of repetitions 1140 shown in the table 1100 of FIG.

The missed error rate 1320 is a missed error rate in the CRC inspection for each repetition count n. Assuming that the missed error rate 1320 is β (n), β (n) can be obtained by multiplying the ratio 1220 (assumed to be q (n)) of Table 1200 and BLER 1310 (assumed to be BLER (n)). it can. Therefore, β (n) can be expressed by the following equation (2).

Β (n) = q (n) · BLER (n) (2)

Next, an expected value E1 of the number of repetitions of the decoding process in the decoding device described in Patent Document 1 is obtained. First, the probability P (n) that the error detection result by the CRC check is error free (including a case of an overlooked error) is obtained for every n repetition times of the decoding process. If the probability P1 (n) that the error detection result by the CRC check is not error before the number n of the decoding process iteration n is (n−1), the CRC check is performed at the decoding process iteration number n. The probability P (n) that the error detection result is error-free can be expressed by the following equation (3).

P (n) = P1 (n) · {1-BLER (n)} ∵n ≧ 1 (3)

In the above equation (3), P1 (n) is the probability that an error is detected in all n-1 error detections, so P1 (n) can be expressed by the following equation (4).

The expected value E1 of the number of repetitions of the decoding process in the decoding apparatus described in Patent Document 1 is obtained by multiplying the probability P (n) expressed by the above equation (3) by the number of repetitions for the number of code blocks. Therefore, the expected value E1 can be expressed by the following equation (5).

In the above equation (5), the number of repeated restraints R is 6 as described above. j is the maximum number of repetitions. Here, j = 8 as described in Patent Document 1 above. k is the number of code blocks. The calculation result of the expected value E1 will be described later (see FIG. 14).

Next, an expected value E2 of the number of repetitions of the decoding process in the decoding device 613 is calculated. The probability P (n) that the error detection result by the CRC check is error-free at the number of repetitions n can be expressed as P1 (n) + P2. Here, the probability P1 (n) is the probability P1 (n) that no error occurs until the previous number of repetitions (n−1). About P1 (n), it is the same as that of the said patent document 1, and P1 (n) can be shown by said (3) Formula.

The probability P2 is a probability when a miss error occurs in another code block and the decoding process is repeated again under the control of the repetition control unit 716. Since the probability P2 is a probability that an overlooked error will occur regardless of the number of repetitions n, the probability that the error detection result by the CRC check was erroneous up to the number of repetitions n−1 and the cumulative value of the product of β (n) Can be expressed as Therefore, the probability P2 can be expressed by the following equation (6).

In the above equation (6), when j = 8 and the values of BLER (m−1) and β (n) are substituted based on the table 1300, the probability P2 = 0.888874759 is obtained. For this reason, since the expected value E2 of the number of repetitions of the decoding process in the decoding device 613 can be expressed by multiplying the number of repetitions by the number of code blocks, it can be expressed by the following equation (7).

FIG. 14 is a diagram showing an example of comparison of the number of repeated decoding. Table 1400 shows an expected value E1 of the number of repetitions of the decoding process in the decoding apparatus described in Patent Document 1 (Patent Document 1) and an expected value E2 of the number of repetitions of the decoding process in decoding apparatus 613 (this embodiment). The reduction rate [%] of the expected value E2 with respect to the expected value E1 is shown for each code block number k.

As shown in Table 1400, the decoding device 613 can reduce the number of times the decoding process is repeated with respect to the decoding device described in Patent Document 1. In particular, the smaller the number k of code blocks, the greater the effect of reducing the number of repetitions of decoding processing by the decoding device 613. For example, when the number of code blocks k = 1, the reduction rate of the expected value E2 of the decoding process of the decoding device 613 with respect to the expected value E1 of the decoding device described in Patent Document 1 is 33.6 [%].

As described above, according to the decoding apparatus 613 according to the first embodiment, an oversight error in error detection of each data obtained by dividing a block is detected by error detection of data obtained by block-combining each data. When a missed error is detected in data error detection, error correction decoding can be performed again to correct the error.

For this reason, it is possible to improve the communication quality without setting the number of times of restriction of the decoding process. Further, since it is possible to improve communication quality without setting the number of times of restriction of decoding processing, it is possible to reduce the amount of processing by reducing the number of times of decoding processing when no error occurs. For this reason, shortening of processing time and reduction of power consumption can be aimed at.

Also, the configuration may be such that the number of times of restriction of the decoding process is set. Also in this case, if an overlook error occurs in error detection of each data, the decoding process can be performed again, so that the communication quality can be maintained even if the number of times of setting the decoding process is reduced. For this reason, it is possible to reduce the amount of processing by reducing the number of times of restriction of the decoding process to be set.

Further, according to the wireless reception device 220 (reception device) including the decoding device 613 according to the first embodiment, it is possible to improve communication quality and reduce the processing amount. Further, according to the wireless communication system 200 (communication system) including the wireless transmission device 210 and the wireless reception device 220, it is possible to improve the communication quality and reduce the processing amount.

(Embodiment 2)
Since the basic configuration of the wireless communication system 200 according to the second embodiment is the same as the configuration described in the first embodiment, the description thereof is omitted. In the decoding apparatus 613 according to the second embodiment, a maximum value of the number of re-repetitions of error correction decoding under the control of the re-repetition control unit 716 (hereinafter referred to as “maximum number of re-repetitions”) is set in advance.

If an error is detected by the code block CRC check unit 712 even if the number of times that the error correction decoding is performed again by the control of the repeat control unit 716 exceeds the maximum repeat number, the repeat control unit 716 Process. In this case, the repeat control unit 716 does not cause the code block processing units # 71 to # 7n to perform error correction decoding again.

FIG. 15 is a block diagram of a specific example of a part of the repeat control unit according to the second embodiment. As illustrated in FIG. 15, the repeat control unit 716 includes a determination unit 1511 and a repeat count counter 1512. The determination unit 1511 initializes the repeat count counter 1512 each time a new code block group is input to the decoding device 613. Also, the determination unit 1511 increments the repeat count counter 1512 when a detection result indicating that an error has been detected is output from the transport block CRC check unit 715.

Then, the determination unit 1511 outputs a repeat control signal to each of the code block processing units # 71 to # 7n when the repeat number of the repeat number counter 1512 is within the maximum repeat number. On the other hand, when the number of re-repetitions of the re-repetition number counter 1512 exceeds the maximum number of re-repetitions, the determination unit 1511 does not output a re-repetition control signal to the code block processing units # 71 to # 7n, and performs retransmission processing (error Process).

As described above, when the decoded NG signal is output from any of the code block processing units # 71 to # 7n, the repeat control unit 716 stops the operation shown in FIG. Although retransmission processing is performed, illustration of the function is omitted here.

FIG. 16 is a flowchart of an example of the operation of the decoding apparatus according to the second embodiment. The operations of the code block processing units # 71 to # 7n are the same as the steps shown in FIG. Here, operations of the code block combining unit 714, the transport block CRC checking unit 715, and the repeat control unit 716 will be described.

First, the determination unit 1511 of the repeat control unit 716 initializes the repeat count counter 1512 (step S1601). Steps S1602 to S1606 are the same as steps S1001 to S1005 shown in FIG. If an error is detected in step S1605 (step S1605: Yes), the determination unit 1511 increments the repeat count counter 1512 (step S1607).

Next, the determination unit 1511 determines whether or not the repeat count of the repeat count counter 1512 is within the maximum repeat count (step S1608). If the number of repetitions is not within the maximum number of repetitions (step S1608: No), the repetition control unit 716 performs code block retransmission processing (step S1609), and the series of processing ends.

In step S1608, when the number of repetitions of the repeat number counter 1512 is within the maximum number of repeat times (step S1608: Yes), the determination unit 1511 goes to the code block processing units # 71 to # 7n (each code block processing unit). A repeat control signal is output (step S1610). Next, the process returns to step S1602, waits until all the code blocks # 1 to #n are input again, and the processing is continued.

As described above, according to the decoding device 613 according to the second embodiment, if an error is detected even if the number of times that the error correction decoding is performed again by the re-repetition control unit 716 exceeds the maximum number of repetitions, an error is detected. Error processing is performed without performing correction decoding again. As a result, the effects of the decoding device 613 according to the first embodiment can be obtained, and it is possible to avoid an increase in the processing amount by repeating error correction decoding when an error that is difficult to correct occurs.

For example, in a system where real-time performance is not required, an increase in power consumption due to turbo decoding re-repetition can be avoided by setting the maximum number of re-repetition times small. Further, by adjusting the combination of the maximum number of repetitions set in the repetition control unit 713 and the maximum number of repetitions set in the repetition control unit 716, the number of error corrections can be limited by the encoding method and transmission. It can be set flexibly according to the characteristics of the road.

(Embodiment 3)
Since the basic configuration of the wireless communication system 200 according to the third embodiment is the same as the configuration described in the first or second embodiment, the description thereof is omitted. The decoding device 613 according to the third embodiment stores the number of repetitions of error correction decoding of each block-divided data, and causes error correction decoding to be performed again on the data selected based on the stored number of times. Thereby, the processing amount can be reduced as compared with the case where error correction decoding is performed again on all data.

FIG. 17 is a block diagram of a configuration of the decoding apparatus according to the third embodiment. In FIG. 17, the same components as those shown in FIG. As shown in FIG. 17, each iteration control unit 713 of code block processing units # 71 to # 7n repeats error correction decoding performed by turbo decoding unit 711 on the code block output to code block combining unit 714. Is sent to the repeat control unit 716 again.

The re-repetition control unit 716 stores the number of repetitions of error correction decoding of the code blocks # 1 to #n notified from the code block processing units # 71 to # 7n. Then, when the code block CRC checking unit 712 detects an error, the re-repetition control unit 716 selects a part of the code blocks # 1 to #n based on the stored number of repetitions. The code block selection method will be described later (see FIGS. 18 and 19).

The repeat control unit 716 outputs a repeat control signal to the code block processing unit that has output the code block selected from the code block processing units # 71 to # 7n. As a result, the code block selected by the re-repetition control unit 716 is subjected to error correction decoding again by the turbo decoding unit 711. Then, the code block that has been subjected to error correction decoding again among the code blocks # 1 to #n is output to the code block combining unit 714.

The code block combining unit 714 performs block combination of code blocks # 1 to #n including code blocks that have been subjected to error correction decoding again. At this time, the code block combining unit 714 selects, for example, the code block combining unit 714 for code blocks that have not been subjected to error correction decoding again (not selected by the re-repetition control unit 716) among the code blocks # 1 to #n. Block concatenation is performed using what is held in a memory (not shown) included in.

Alternatively, the re-repetition control unit 716 may perform control so that the code block processing unit that outputs the code block that is not selected from the code blocks # 1 to #n re-outputs the code block. As a result, among the code blocks # 1 to #n, the code block that has not been subjected to error correction decoding is also output to the code block combining unit 714, and the code block combining unit 714 performs block combination of the code blocks # 1 to #n. Can do.

FIG. 18 is a block diagram of a specific example of a part of the repeat control unit according to the third embodiment. 18, the same components as those illustrated in FIG. 15 are denoted by the same reference numerals, and description thereof is omitted. As shown in FIG. 18, the repeat control unit 716 includes a repeat count storage unit 1811 and a selection unit 1812 in addition to the configuration shown in FIG. The repetition count storage unit 1811 stores the number of repetitions of error correction decoding for each code block # 1 to #n notified from the code block processing units # 71 to # 7n.

The determination unit 1511 outputs a control signal to the selection unit 1812 when the re-repetition number of the re-repetition number counter 1512 is within the maximum re-repetition number. When the determination unit 1511 outputs a control signal, the selection unit 1812 selects some code blocks of the code blocks # 1 to #n based on the number of repetitions stored in the repetition number storage unit 1811. The selection unit 1812 outputs a repeat control signal to the code block processing unit that has output the code block selected from the code block processing units # 71 to # 7n.

As described above, when the decoded NG signal is output from any of the code block processing units # 71 to # 7n, the repeat control unit 716 stops the operation shown in FIG. Although retransmission processing is performed, illustration of the function is omitted here.

FIG. 19 is a diagram illustrating an example of information stored in the repetition count storage unit illustrated in FIG. The repetition count storage unit 1811 stores, for example, a table 1900 shown in FIG. In the table 1900, the number of error correction decoding iterations 1920 is associated with each code block number 1910 and stored. “1” to “n” of the code block number 1910 indicate code blocks # 1 to #n, respectively.

The selection unit 1812 preferentially selects a code block having a small number of repetitions 1920 among the code blocks # 1 to #n. That is, the code block selected by the selection unit 1812 among the code blocks # 1 to #n is set to have a smaller number of repetitions 1920 than the code block not selected by the selection unit 1812.

Here, for the sake of convenience, description will be made assuming that there are no code blocks # 4 to # n-1. For example, the selection unit 1812 selects a code block having the smallest number of repetitions 1920 among the code blocks # 1, # 2, # 3, and #n. In this case, the selection unit 1812 selects the smallest code block # 3 having a repetition count 1920 of “1”.

Also, the selection unit 1812 may select a plurality of code blocks. For example, the selection unit 1812 may select a predetermined number of code blocks in order from the code block # 1, # 2, # 3, #n having the smallest number of repetitions 1920. For example, when the predetermined number is “2”, the selection unit 1812 has the code block # 3 having the smallest number of repetitions 1920 in the code blocks # 1, # 2, # 3, and #n, and the number of repetitions 1920 is 2. The second smallest code block # 2 is selected.

Alternatively, the selection unit 1812 may select code blocks in which the number of repetitions 1920 among the code blocks # 1 to #n is a predetermined number or less. For example, if the predetermined number of times is “2”, the selection unit 1812 selects code block # 2 and code block # 3 whose number of repetitions 1920 is “2” or less.

FIG. 20 is a flowchart of an example of the operation (part 1) of the decoding apparatus according to the third embodiment. Here, the operation of the code block processing unit # 71 will be described. Steps S2001 to S2005 shown in FIG. 20 are the same as steps S901 to S905 shown in FIG. When the code block # 1 is output in step S2005, the repetition control unit 713 notifies the repetition number of the repetition number counter 812 to the repetition control unit 716 (step S2006), and the series of processing ends.

Since steps S2007 to S2009 shown in FIG. 20 are the same as steps S906 to S908 shown in FIG. The above steps are similarly performed for the code blocks # 2 to #n by the code block processing units # 72 to # 7n. Further, each of the code block processing units # 71 to # 7n performs steps S2001 to S2009 again when a re-repetition control signal is output from the re-repetition control unit 716.

FIG. 21 is a flowchart of an example of the operation (part 2) of the decoding apparatus according to the third embodiment. Here, as in FIG. 16, operations of the code block combining unit 714, the transport block CRC checking unit 715, and the repeat control unit 716 will be described. Steps S2101 to S2109 shown in FIG. 21 are the same as steps S1601 to S1609 shown in FIG.

If it is determined in step S2108 that the number of repetitions is within the maximum number of repetitions, the selection unit 1812 selects a code block having the smallest number of repetitions from among code blocks # 1 to #n (step S2110). In step S2110, the selection unit 1812 selects a code block based on the number of repetitions for each code block # 1 to #n notified in step S2006 of FIG.

Next, the selection unit 1812 outputs a repeat control signal to the code block processing unit corresponding to the code block selected in step S2110 (step S2111). Next, the process returns to step S2102, and the code block combining unit 714 waits until all the code blocks # 1 to #n are input again, and the processing is continued.

As described above, according to the decoding apparatus 613 according to the third embodiment, the number of repetitions of error correction decoding in each block-divided data is stored, and error correction decoding is performed again on the data selected based on the stored number of times. Let it be done. As a result, the effects of the decoding device 613 according to the second embodiment can be obtained, and the processing amount can be reduced as compared with the case where all data is subjected to error correction decoding again when an error in the transport block is detected.

Further, as shown in FIG. 12, when the number of repetitions of error correction decoding is small, the rate of occurrence of missed errors is high. For this reason, the probability that the missed error is corrected is increased by preferentially selecting and performing error correction decoding among the code blocks # 1 to #n with a small number of error correction decoding iterations. Therefore, the effects of the decoding device 613 according to the second embodiment can be obtained, and the processing amount of error correction decoding can be further reduced.

In addition, although the structure of the decoding apparatus 613 of Embodiment 3 was demonstrated here on the assumption of the structure of the decoding apparatus 613 concerning Embodiment 2, the decoding apparatus 613 of Embodiment 3 is not restricted to such a structure. . For example, in the decoding device 613 according to the first embodiment, the number of repetitions of error correction decoding in each block-divided data is stored, and error correction decoding is performed again on data selected based on the stored number of times. Also good.

As described above, according to the disclosed decoding device, receiving device, communication system, decoding method, and receiving method, it is possible to improve the communication quality and reduce the processing amount. In each of the above-described embodiments, the configuration in which the decoding device 613 is applied to the wireless reception device 220 has been described. However, the application range of the decoding device 613 is not limited to the wireless reception device 220. For example, the decoding device 613 can be applied to an optical receiving device of an optical communication system.

Claims (7)

1. Decoding means for error correction decoding each data obtained by dividing the data into a plurality of blocks,
   Pre-stage detection means for performing error detection of each data error-corrected and decoded by the decoding means;
   It repeats error correction decoding by the decoding means when an error is detected by the upstream detection means, and outputs each data corrected by the error correction when no error is detected by the upstream detection means Control means;
   Combining means for combining the data output by the repeat control means;
   Subsequent detection means for performing error detection of the data combined by the combining means;
   Re-repetition control means for causing error correction decoding by the decoding means to be performed again when an error is detected by the latter-stage detection means, and for outputting the combined data when no error is detected by the latter-stage detection means When,
   A decoding apparatus comprising:
2. If the error is detected by the subsequent detection means even if the number of times that the error correction decoding by the decoding means is performed again exceeds a preset maximum number of repetitions, the re-repeat control means The decoding apparatus according to claim 1, wherein error processing is performed without performing the error correction decoding according to the above.
3. Storage means for storing the number of repetitions of error correction decoding by the decoding means in each data,
   The re-repetition control means causes the error correction decoding by the decoding means to be performed again on the data selected based on the number of times stored by the storage means among the respective data. Decoding device.
4. Receiving means for receiving the transmitted data;
   Dividing means for dividing the data received by the receiving means into a plurality of blocks;
   A decoding device according to any one of claims 1 to 3,
   The receiving apparatus, wherein the decoding means performs error correction decoding on each data obtained by dividing by the dividing means.
5. The error detection encoded data is divided into a plurality of blocks, each of the data obtained by the division is error detection encoded, each error detection encoded data is error correction encoded, and each error correction encoded data is A transmitting device for transmitting the combined data;
   A receiving device according to claim 4,
   The communication system characterized in that the reception means receives data transmitted by the transmission device.
6. A decoding step for error correction decoding each data obtained by dividing the data into a plurality of blocks;
   A pre-detection step for performing error detection of each data error-corrected and decoded by the decoding step;
   It repeats error correction decoding by the decoding step when an error is detected by the previous detection step, and outputs each data corrected by the error correction when no error is detected by the previous detection step Control process;
   A combining step of combining the data output by the repetitive control step;
   A post-stage detection step of performing error detection of the data combined by the combining step;
   A re-repetition control step of causing error correction decoding by the decoding step to be performed again when an error is detected by the post-stage detection step and outputting the combined data when an error is not detected by the post-step detection step When,
   The decoding method characterized by including.
7. A receiving step for receiving the transmitted data;
   A dividing step of dividing the data received by the receiving step into a plurality of blocks;
   And a decoding method according to claim 6,
   In the decoding step, each data obtained by the division in the division step is subjected to error correction decoding.

Images