WO2010020046A1 - Doped dielectric layers and method for formation thereof - Google Patents

Doped dielectric layers and method for formation thereof Download PDF

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Publication number
WO2010020046A1
WO2010020046A1 PCT/CA2009/001157 CA2009001157W WO2010020046A1 WO 2010020046 A1 WO2010020046 A1 WO 2010020046A1 CA 2009001157 W CA2009001157 W CA 2009001157W WO 2010020046 A1 WO2010020046 A1 WO 2010020046A1
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layer
silicon
rare
dielectric layer
ion implantation
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PCT/CA2009/001157
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French (fr)
Inventor
Andrew P. Knights
Matthew Halsall
Russell Mark Gwilliam
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Mcmaster University
The University Of Manchester
University Of Surrey
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Publication of WO2010020046A1 publication Critical patent/WO2010020046A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28229—Making the insulator by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H01L21/31155—Doping the insulating layers by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/34—Materials of the light emitting region containing only elements of Group IV of the Periodic Table
    • H01L33/343—Materials of the light emitting region containing only elements of Group IV of the Periodic Table characterised by the doping materials

Definitions

  • the present invention relates to dielectric layers doped with rare-earth elements, to semiconductor structures comprising these dielectric layers and to processes for the preparation of such layers.
  • Silicon has been for five decades, and is likely to remain for the foreseeable future, the dominant semiconductor material for microelectronic applications.
  • Such devices would find applications in a number of fields - for example solid state lasers, light emitting diodes, optical amplifiers and optical wavelength converters.
  • solid state lasers For example solid state lasers, light emitting diodes, optical amplifiers and optical wavelength converters.
  • optical amplifiers Of importance to any solid state light emitting device is:
  • erbium doped silicon and silicon dioxide have been dedicated to erbium doped silicon and silicon dioxide, for example, as described by L Pavesi and D J Lockwood, Silicon Photonics (Springer Berlin 2004) .
  • erbium When erbium is embedded into a dielectric host it can be optically activated such that when it is excited it may emit light at the technologically important wavelength of 1540nm (and wavelengths within a few tens of nanometers of 1540nm) via an intra 4f transition.
  • Other de-excitation mechanisms limit the viability of erbium doped silicon as a route to an efficient optical emitter.
  • erbium doped silicon dioxide has been shown to be a relatively efficient emitter of light at a wavelength at and around 1540nm.
  • this emission is significantly enhanced in intensity when the erbium is sensitized using defects in the silicon dioxide films such as silicon nano-crystals or irregularities in the silicon dioxide matrix such as silicon or oxygen vacancies, as described by M Wojdak et al . , Phys . Rev. B., 69, 233315 (2004) .
  • the doping of silicon dioxide may be performed in a variety of ways including plasma enhanced chemical vapour deposition (PECVD), as described in A Podhorodecki et al . , JnI. of Luminescence, 121, 230 (2006) , sputtering, as described in N Daldosso et al . , Appl . Phys. Letts., 86, 261103 (2005) , and ion implantation, as described in C Maurizio et al . , Phys. Rev. B., 74, 205248 (2006) .
  • PECVD plasma enhanced chemical vapour deposition
  • deposition and sputtering techniques allows the introduction of the dopant during the growth of the silicon dioxide film. This tends to result in difficulties with regard to the control of the doping concentration and uniformity across multiple depositions over the course of time. Such repeatability of process is often important to the success of manufacturability of commercial devices that depend on doped dielectrics. Further, for deposition and sputtering techniques, no attempt is made to remove unwanted contaminants from the doping source material (such as the precursor gas in the PECVD technique and the target material or sputtering gas in the sputtering technique) .
  • the doping source material such as the precursor gas in the PECVD technique and the target material or sputtering gas in the sputtering technique
  • ion implantation introduces dopant after the growth of the silicon dioxide layer. This permits extremely controllable formation of the silicon dioxide layer and a uniformity of concentration across a single deposition and between multiple depositions. Indeed, the ability of ion implantation to provide this repeatability is one reason as to why microelectronic devices can be fabricated in large volumes. Also, ion implantation performs a precise selection of the dopant to be introduced to the silicon dioxide layer and thus virtually no unwanted contaminant is introduced during the ion implantation process. For these reasons, ion implantation is often preferred as the means to introduce dopant into a silicon- based material .
  • the implantation process as described above does possess two principal disadvantages: (i) the profile of the dopant as a function of depth measured from the sample surface is limited by the implanted ion range and standard deviation; and (ii) the implantation process creates atomic damage in the silicon dioxide which must be repaired using a high temperature thermal annealing step, which may not remove all of the damage while simultaneously optically activating the rare-earth dopant.
  • a doped dielectric layer comprising: (a) a group IV oxide layer substantially free of ion implantation damage; and (b) from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the oxide layer.
  • the group IV oxide layer comprises silicon dioxide.
  • the group IV oxide layer has a thickness from about lnm to about 100 Onm.
  • the one or more rare-earth elements comprise at least one of : erbium, cerium, neodymium, ytterbium, terbium, europium, and holmium.
  • a doped dielectric layer comprising: (a) a group IV oxynitride layer substantially free of ion implantation damage; and (b) from about 0.01 to about 20 atomic per cent of one or more rare- earth elements, distributed throughout the oxynitride layer.
  • the group IV oxynitride layer has an oxygen: nitrogen ratio ranging from about 1x1 O 6 to about 1.
  • the group IV oxynitride layer comprises silicon oxynitride.
  • the group IV oxynitride layer has a thickness from about lnm to about lOOOnm. According to yet another aspect of the present invention, there is provided a semiconductor structure comprising a substrate on which a rare-earth doped dielectric layer according to one of the above aspects of the present invention is formed.
  • the substrate comprises any one of: crystalline silicon, polycrystalline silicon, silica, zinc oxide, gallium nitride, sapphire, silicon carbide, silicon nitride, silicon oxynitride and quartz.
  • the semiconductor structure comprises more than one dielectric layer.
  • the semiconductor structure includes a sensitizing layer.
  • the sensitizing layer has a thickness between about lnm and about lOOOnm.
  • the semiconductor structure includes sensitizing centres within the rare-earth doped dielectric layer.
  • a process for preparing a doped dielectric layer comprising: (a) formation of a silicon layer on a substrate; (b) ion implantation of the silicon layer with a dopant comprising one or more rare- earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy that places more than about 90% of the dopant in the silicon layer; and (c) thermal oxidation of the rare-earth doped silicon layer at a temperature in the range of about 800 to about 1100 0 C in an oxidizing ambient.
  • the ion implantation energy of the dopant is in the range of about 0. lkeV to about 4MeV.
  • thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
  • a process for preparing a doped dielectric layer comprising: (a) ion implantation of a silicon substrate with one or more rare- earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy in the range about 0. lkeV to about 4MeV; and (b) thermal oxidation of the rare- earth doped silicon substrate at a temperature in the range of about 800 to about 1100 0 C in an oxidizing ambient.
  • thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
  • a process for preparing a doped dielectric layer comprising: (a) formation of a silicon layer on a substrate; (b) ion implantation of the silicon layer with one or more rare-earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy which places more than about 90% of the dopant in the silicon layer; (c) ion implantation of nitrogen to a dose which results in a concentration of about IxIO 16 Cm "3 to about 5xl0 22 cm “3 of nitrogen in the rare-earth doped silicon layer; and (d) thermal oxidation of the nitrogen and rare-earth doped silicon layer at a temperature in the range of about 800 to about HOO 0 C in an oxidizing ambient .
  • the ion implantation energy of the dopant is in the range about 0. IkeV to about 4MeV.
  • thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
  • a process for preparing a doped dielectric layer comprising: (a) ion implantation of a silicon substrate with one or more rare- earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy in the range about 0. lkeV to about 4MeV; (b) ion implantation of nitrogen to a dose which results in a concentration of about IxIO 16 Cm "3 to about 5xl0 22 cnrf 3 of nitrogen in a layer of the silicon substrate; and (c) thermal oxidation of the layer of the silicon substrate at a temperature in the range of about 800 to about 1100 0 C in an oxidizing ambient.
  • thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
  • the present invention provides a doped silicon dioxide layer, the layer comprising (a) a silicon dioxide layer which is substantially free of ion implantation damage (b) doped with from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the silicon dioxide layer.
  • the present invention provides a doped silicon oxide/nitride layer, the layer comprising (a) a silicon oxide/nitride (with ratio of oxygen: nitrogen varying from about IxIO 6 to about 1) layer which is substantially free of ion implantation damage (b) doped with from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the silicon dioxide layer.
  • the present invention provides a semiconductor structure comprising a semiconductor or insulating substrate, on which substrate is introduced the doped silicon dioxide or silicon oxide/nitride layer described above.
  • the present invention provides a process for preparing a doped silicon dioxide layer, the process comprising: (a) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into a silicon substrate; (b) thermal growth on the silicon substrate of silicon dioxide to a thickness at least 3 times that of the depth of the rare-earth dopant in the silicon.
  • the present invention provides a process for preparing a doped silicon oxide/nitride layer, the process comprising: (a) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into a silicon substrate; (b) ion implantation of the same silicon substrate with nitrogen to an atomic concentration up to 33 atomic percent; (c) thermal growth of silicon dioxide on the silicon substrate to a thickness at least 3 times that of the depth of the rare-earth dopant in the silicon.
  • the present invention provides a process for preparing a doped silicon dioxide layer on a semiconductor or insulator substrate, the process comprising: (a) deposition of an amorphous silicon layer on the semiconductor or insulator substrate to a thickness up to l ⁇ m; (b) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into the deposited silicon film; (c) thermal growth on the silicon film of silicon dioxide to a thickness such that all or part of the silicon film is reacted with the oxygen in the formation of the silicon dioxide film.
  • the present invention provides a process for preparing a doped silicon oxide/nitride layer on a semiconductor of insulator substrate, the process comprising: (a) deposition of an amorphous silicon layer on the semiconductor or insulator substrate to a thickness up to l ⁇ m; (b) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into the deposited silicon film;
  • Figure 1 is a diagram of a semiconductor structure comprising a silicon substrate, a rare-earth doped dielectric film and a carrier injection layer according to an embodiment of the present invention
  • Figure 2 is a diagram of a semiconductor structure comprising a silicon substrate, a rare-earth doped dielectric film, a thin film containing sensitizing centres and a carrier injection layer according to an embodiment of the present invention
  • Figure 3 is a diagram of a semiconductor structure comprising a silicon substrate and a rare-earth doped dielectric film which also contains sensitizing centres, and a carrier injection layer according to an embodiment of the present invention
  • Figure 4 is a diagram of a semiconductor structure comprising a light emitting semiconductor substrate and a rare-earth doped dielectric film according to an embodiment of the present invention
  • Figure 5 is a diagram of a semiconductor structure comprising a light emitting semiconductor substrate, a rare- earth doped dielectric film and a thin film containing sensitizing centres according to an embodiment of the present invention
  • Figure 6 is a diagram of a semiconductor structure comprising a light emitting semiconductor substrate and a rare-earth doped dielectric film which also contains sensitizing centres according to an embodiment of the present invention
  • Figure 7 is a plot of an example erbium profile formed according to an embodiment of the present invention.
  • Figure 8 is a plot of an example spectrum of light emitted from a dielectric film fabricated according to an embodiment of the present invention.
  • the doped dielectric layer comprises a silicon dioxide or silicon oxynitride layer doped with one or more rare-earth elements such that silicon dioxide or silicon oxynitride layer is substantially free of ion implantation damage and the one or more rare-earth elements are distributed throughout the dielectric layer.
  • Semiconductor structures comprising the above dielectric layer are also provided.
  • One embodiment of the present invention provides a doped dielectric layer that includes a group IV based oxide or a group IV based oxide/nitride (with the ratio of the oxygen: nitrogen varying from about 1x1 O 6 to about 1) .
  • the group IV element used to prepare the layer is silicon.
  • the doped dielectric layer may have a thickness between lnm and lOOOnm.
  • the one or more rare-earth element that is used as the dopant may be selected from elements such as erbium, cerium, neodymium, ytterbium, terbium, europium, or holmium.
  • the one or more rare-earth element is present in the group IV dielectric layer in a concentration ranging from about 0.01 to about 20 atomic percent. Activation of high concentrations of rare-earth elements in silicon dioxide appears to be greater when introduced into thermally grown silicon dioxide, as opposed to dielectric layers grown by plasma enhanced chemical vapour deposition.
  • Figure 1 is a diagram of a semiconductor structure 10 that includes a silicon substrate 12, a rare-earth doped dielectric film 14 and a carrier injection layer 16.
  • a voltage source 11 is connected between the carrier injection layer 16 and the substrate 12.
  • the voltage source 11 may be any device or element which allows an electrical potential difference to be applied between two positions of the semiconductor structure.
  • the substrate 12 on which the doped dielectric layer is formed is selected such that it is capable of withstanding temperatures up to 1000 0 C or, in some cases, 1100 0 C. Examples of suitable substrates are single crystal silicon or poly-crystalline silicon, fused silica, zinc oxide, gallium nitride, sapphire, silicon carbide and quartz.
  • the thickness of the substrate is not critical to successful and useful operation of the device .
  • the semiconductor structure includes a layer which may act as a sensitizer for the rare- earth doped dielectric layer.
  • a sensitizing layer 18 is located between the rare-earth doped dielectric film 14 and the carrier injection layer 16 of the semiconductor structure 30.
  • the thickness of the sensitizing layer 18 is between lnm and lOOOnm.
  • the semiconductor structure includes sensitizing centres which are incorporated into the doped dielectric layer.
  • sensitizing centres 20 are located in a layer between layers of the rare-earth doped dielectric film 14.
  • the sensitizing centres are located within the dielectric layer itself, rather than present in a layer between layers of the dielectric layer, as illustrated in Figure 3.
  • the concentration of the sensitizing centres is between about
  • the sensitizing centres 20 may be introduced into the doped dielectric film 14 during its formation, or subsequent to the formation of the doped dielectric film for example via ion implantation with or without a subsequent high temperature annealing step in the temperature range 400 to 1000 0 C.
  • sensitizing layer (s) or centres for example, defects or irregularities in the doped dielectric film can potentially make the rare- earth dopants more susceptible to being excited via optical or electrical pumping, and thus can significantly improve the light output of some embodiments of the present invention.
  • the semiconductor structures 10, 30, 40 have a current injection layer 16 placed on the surface of the semiconductor structure.
  • this current injection layer could be Indium Tin Oxide which is generally optically transparent in the wavelength range 400nm to 1700nm.
  • the Indium Tin Oxide layer has a thickness of 50nm to 300nm in some embodiments.
  • the doped dielectric layer is excited by carrier injection and subsequently emits light at a wavelength dictated by the doping species contained in the dielectric film.
  • the semiconductor structure 50 shown in figure 4 is of the rare-earth doped dielectric layer 14 formed on a light emitting substrate 22.
  • This substrate 22 may be, for example, gallium nitride or a sapphire substrate with a gallium nitride layer on its surface.
  • the light emitting substrate 22 may be excited by current injection and emit light at a wavelength in the range 200nm- lOOOnm. This light then excites the doped dielectric layer 14 which subsequently emits light at a wavelength dictated by the doping species contained in the dielectric film.
  • the semiconductor structure 50 which is formed on a light emitting substrate 22 and is described above and shown in figure 4 includes a layer 18 which acts as a sensitizer for the rare-earth doped dielectric layer 14.
  • a layer 18 which acts as a sensitizer for the rare-earth doped dielectric layer 14.
  • the sensitizing layer is located on the surface of the rare-earth doped dielectric layer 14.
  • the thickness of the sensitizing layer 18 is between lnm and lOOOnm.
  • the semiconductor structure 50 which is formed on a light emitting substrate 22 and is described above and shown in figure 4 includes sensitizing centres 20 which are incorporated into the doped dielectric layer 14. Such a structure 70 is shown in figure 6.
  • the concentration of the sensitizing centres is between about 0.01 and about 20 atomic percent.
  • the sensitizing centres 20 may be introduced into the doped dielectric film during its formation, or subsequent to the formation of the doped dielectric film for example via ion implantation with or without a subsequent high temperature annealing step in the temperature range 400 to HOO 0 C .
  • Ion implantation is used for the introduction of dopant to electronic devices. It has significant advantages compared to other doping technologies, as described in Chapter 8 in J D Plummer et al . , Silicon VLSI Technology (Prentice-Hall New Jersey 2000) .
  • Ion implantation introduces pure dopant material with the unintentional introduction of other impurities limited to levels which are almost undetectable. This high purity doping is achieved using ion implantation's highly selective mass selection. Further, the concentration profile of dopant introduced via ion implantation is relatively highly controlled compared to other doping techniques. This is because the concentration profile is dependent on the energy of the ion implantation which in turn can be controlled in a relatively highly stable manner. Further, the concentration of dopant introduced via ion implantation can also be controlled to a level within 1% of the doping required. Further, the uniformity of the dopant introduced via ion implantation is uniform to within 1% across an implantation area of 300mmx300mm.
  • ion implantation does not require the source of the dopant species to be in the gaseous form, such as is the case for in-situ doping using plasma enhanced chemical vapour deposition.
  • the controlled introduction of different concentrations of more than one dopant in the same dielectric substrate is easily achieved using multiple ion implantation steps.
  • the controlled introduction of multiple species is difficult to achieve in a repeatable manner using other doping technologies such as plasma enhanced chemical vapour deposition and sputtering.
  • the thermal oxidation of silicon has been used to form a high quality dielectric thin film in the fabrication of electronic devices for five decades, as described in Chapter 6 in J D Plummer et al . , Silicon VLSI Technology (Prentice-Hall New Jersey 2000) . It requires the substrate which is either silicon or which has silicon as a surface layer, to be placed in a furnace and heated to a temperature in the range 700-1100 0 C.
  • the gaseous ambient during this high temperature step contains oxygen in the form, for example of oxygen gas or water vapour, and the oxygen reacts with the silicon surface which is exposed to the ambient. As the substrate remains at high temperature in the oxygen containing ambient, more of the silicon reacts with the oxygen forming an ever increasing thickness of silicon oxide. If the silicon which reacts with the oxygen contains dopant such as rare-earth elements or nitrogen, these dopants are incorporated into the dielectric film.
  • Thermal oxidation of semiconductor substrates in the manner described above provides control of thickness and uniformity across an area up to 300mm x 300mm of the dielectric film to within 1% of that required.
  • Preparation of a doped dielectric layer in accordance with an embodiment of the present invention includes the following four general steps.
  • the formation of the silicon layer can be achieved by the deposition of an amorphous layer of silicon using common fabrication techniques such as chemical vapour deposition, sputtering, low pressure chemical vapour deposition, thermal evaporation, laser assisted deposition, or plasma enhanced chemical vapor deposition.
  • the thickness of the deposited silicon layer is between IOnm and lOOOnm.
  • the energy of implantation is between 0. lkeV and 4MeV, using a dose such that the final concentration of the dopant is between about 0.01 and about 20 atomic percent.
  • the implantation energy may be selected in a range such that more than about 90% of the implanted dopant is placed in the layer of amorphous silicon.
  • the energy of implantation is between about 0. IkeV and about 400keV.
  • the energy of implantation that is used is implementation specific and may depend, for example, on the mass of the rare-earth dopant ions that are to be implanted. Typically the larger the mass of the ions to be implanted, the larger the energy of implantation.
  • the doped dielectric is composed of a mixture of silicon oxide/nitride (with the ratio of the oxygen: nitrogen varying from about IxIO 6 to about 1)
  • nitrogen is ion implanted to a dose which results in a concentration of about IxIO 16 Cm "3 to about 5xl0 22 cm “3 of nitrogen in the silicon layer which had previously been implanted with the rare-earth ions as described in step (b) above.
  • the implantation energy may be selected in a range such that more than about 90% of the implanted nitrogen is placed in the layer of amorphous silicon.
  • oxidation takes place in a furnace at a temperature in the range of about 800 to about 1100 0 C.
  • the oxidizing species can be oxygen (dry oxidation) or H 2 O (wet oxidation) or any species or combination of species which causes the reaction of oxygen and the silicon which has been implanted with the rare-earth dopant species in order to form a silicon dioxide layer.
  • the rare-earth dopant, and the nitrogen in the case where step (c) has been used is incorporated into the dielectric film.
  • the final result is a dielectric film with high optical and electrical quality relative to those dielectric films prepared using deposition techniques such as plasma enhanced chemical vapour deposition or sputtering.
  • the damage usually associated with the introduction of dopant in dielectric thin films is avoided because the implantation step takes place before the dielectric film is formed.
  • the dopant redistributes in the dielectric film during the thermal oxidation step, a redistribution which depends on the dopant segregation coefficient for silicon dioxide and silicon.
  • Figure 7 shows a measurement of erbium concentration in a dielectric film which has been prepared using steps (a), (b) and (d) above. The emission of light from an erbium-doped dielectric film prepared using steps (a) , (b) and (d) above, has been observed. A photoluminescence measurement of light at a wavelength around 1540nm from such a film is shown in figure 8.
  • the device elements and circuits are connected to each other as shown in the figures, for the sake of simplicity.
  • devices, elements, circuits, etc. may be connected or coupled directly to each other.
  • devices, elements, circuits etc. may be connected or coupled indirectly to each other through other devices, elements, circuits, etc., as necessary for operation.

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Abstract

A doped dielectric layer and a method for forming the doped dielectric layer are provided. The doped dielectric layer comprises (a) a silicon dioxide or silicon oxynitride layer (b) doped with from about 0.01 to about 20 atomic percent of one or more rare-earth elements, the one or more rare-earth element being distributed throughout the dielectric layer. Semiconductor structures comprising the above dielectric layer are also provided.

Description

DOPED DIELECTRIC LAYERS AND METHOD FOR FORMATION THEREOF
Field of the Invention
The present invention relates to dielectric layers doped with rare-earth elements, to semiconductor structures comprising these dielectric layers and to processes for the preparation of such layers.
Background of the Invention
Silicon has been for five decades, and is likely to remain for the foreseeable future, the dominant semiconductor material for microelectronic applications.
This dominance though has not transferred to optoelectronic applications because silicon is a relatively poor emitter of light, a result of its indirect bandgap . In the past three decades there have been many attempts to fabricate structures based on silicon which emit light efficiently.
Such devices would find applications in a number of fields - for example solid state lasers, light emitting diodes, optical amplifiers and optical wavelength converters. Of importance to any solid state light emitting device is:
1. The wavelength of emission which must be of some technological relevance;
2. The intensity of emission; and
3. The compatibility of fabrication with manufacturing standards.
A relatively large volume of work has been dedicated to erbium doped silicon and silicon dioxide, for example, as described by L Pavesi and D J Lockwood, Silicon Photonics (Springer Berlin 2004) . When erbium is embedded into a dielectric host it can be optically activated such that when it is excited it may emit light at the technologically important wavelength of 1540nm (and wavelengths within a few tens of nanometers of 1540nm) via an intra 4f transition. Other de-excitation mechanisms limit the viability of erbium doped silicon as a route to an efficient optical emitter. However, erbium doped silicon dioxide has been shown to be a relatively efficient emitter of light at a wavelength at and around 1540nm. Further, this emission is significantly enhanced in intensity when the erbium is sensitized using defects in the silicon dioxide films such as silicon nano-crystals or irregularities in the silicon dioxide matrix such as silicon or oxygen vacancies, as described by M Wojdak et al . , Phys . Rev. B., 69, 233315 (2004) .
The doping of silicon dioxide may be performed in a variety of ways including plasma enhanced chemical vapour deposition (PECVD), as described in A Podhorodecki et al . , JnI. of Luminescence, 121, 230 (2006) , sputtering, as described in N Daldosso et al . , Appl . Phys. Letts., 86, 261103 (2005) , and ion implantation, as described in C Maurizio et al . , Phys. Rev. B., 74, 205248 (2006) .
The use of deposition and sputtering techniques allows the introduction of the dopant during the growth of the silicon dioxide film. This tends to result in difficulties with regard to the control of the doping concentration and uniformity across multiple depositions over the course of time. Such repeatability of process is often important to the success of manufacturability of commercial devices that depend on doped dielectrics. Further, for deposition and sputtering techniques, no attempt is made to remove unwanted contaminants from the doping source material (such as the precursor gas in the PECVD technique and the target material or sputtering gas in the sputtering technique) .
In contrast, ion implantation introduces dopant after the growth of the silicon dioxide layer. This permits extremely controllable formation of the silicon dioxide layer and a uniformity of concentration across a single deposition and between multiple depositions. Indeed, the ability of ion implantation to provide this repeatability is one reason as to why microelectronic devices can be fabricated in large volumes. Also, ion implantation performs a precise selection of the dopant to be introduced to the silicon dioxide layer and thus virtually no unwanted contaminant is introduced during the ion implantation process. For these reasons, ion implantation is often preferred as the means to introduce dopant into a silicon- based material .
Although the uniformity and repeatability of the ion implantation process is typically superior to deposition techniques, the implantation process as described above does possess two principal disadvantages: (i) the profile of the dopant as a function of depth measured from the sample surface is limited by the implanted ion range and standard deviation; and (ii) the implantation process creates atomic damage in the silicon dioxide which must be repaired using a high temperature thermal annealing step, which may not remove all of the damage while simultaneously optically activating the rare-earth dopant. Summary of the Invention
According to one aspect of the present invention, there is provided a doped dielectric layer, the layer comprising: (a) a group IV oxide layer substantially free of ion implantation damage; and (b) from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the oxide layer.
In some embodiments, the group IV oxide layer comprises silicon dioxide.
In some embodiments, the group IV oxide layer has a thickness from about lnm to about 100 Onm.
In some embodiments, the one or more rare-earth elements comprise at least one of : erbium, cerium, neodymium, ytterbium, terbium, europium, and holmium.
According to another aspect of the present invention, there is provided a doped dielectric layer, the layer comprising: (a) a group IV oxynitride layer substantially free of ion implantation damage; and (b) from about 0.01 to about 20 atomic per cent of one or more rare- earth elements, distributed throughout the oxynitride layer.
In some embodiments, the group IV oxynitride layer has an oxygen: nitrogen ratio ranging from about 1x1 O6 to about 1.
In some embodiments, the group IV oxynitride layer comprises silicon oxynitride.
In some embodiments, the group IV oxynitride layer has a thickness from about lnm to about lOOOnm. According to yet another aspect of the present invention, there is provided a semiconductor structure comprising a substrate on which a rare-earth doped dielectric layer according to one of the above aspects of the present invention is formed.
In some embodiments, the substrate comprises any one of: crystalline silicon, polycrystalline silicon, silica, zinc oxide, gallium nitride, sapphire, silicon carbide, silicon nitride, silicon oxynitride and quartz.
In some embodiments, the semiconductor structure comprises more than one dielectric layer.
In some embodiments, the semiconductor structure includes a sensitizing layer.
In some embodiments, the sensitizing layer has a thickness between about lnm and about lOOOnm.
In some embodiments, wherein the semiconductor structure includes sensitizing centres within the rare-earth doped dielectric layer.
According to still another aspect of the present invention, there is provided a process for preparing a doped dielectric layer, the process comprising: (a) formation of a silicon layer on a substrate; (b) ion implantation of the silicon layer with a dopant comprising one or more rare- earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy that places more than about 90% of the dopant in the silicon layer; and (c) thermal oxidation of the rare-earth doped silicon layer at a temperature in the range of about 800 to about 11000C in an oxidizing ambient.
In some embodiments, the ion implantation energy of the dopant is in the range of about 0. lkeV to about 4MeV.
In some embodiments, thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
According to a further aspect of the present invention, there is provided a process for preparing a doped dielectric layer, the process comprising: (a) ion implantation of a silicon substrate with one or more rare- earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy in the range about 0. lkeV to about 4MeV; and (b) thermal oxidation of the rare- earth doped silicon substrate at a temperature in the range of about 800 to about 11000C in an oxidizing ambient.
In some embodiments, thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
According to still a further aspect of the present invention, there is provided a process for preparing a doped dielectric layer, the process comprising: (a) formation of a silicon layer on a substrate; (b) ion implantation of the silicon layer with one or more rare-earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy which places more than about 90% of the dopant in the silicon layer; (c) ion implantation of nitrogen to a dose which results in a concentration of about IxIO16Cm"3 to about 5xl022cm"3 of nitrogen in the rare-earth doped silicon layer; and (d) thermal oxidation of the nitrogen and rare-earth doped silicon layer at a temperature in the range of about 800 to about HOO0C in an oxidizing ambient .
In some embodiments, the ion implantation energy of the dopant is in the range about 0. IkeV to about 4MeV.
In some embodiments, thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
According to yet a further aspect of the present invention, there is provided a process for preparing a doped dielectric layer, the process comprising: (a) ion implantation of a silicon substrate with one or more rare- earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy in the range about 0. lkeV to about 4MeV; (b) ion implantation of nitrogen to a dose which results in a concentration of about IxIO16Cm"3 to about 5xl022cnrf3 of nitrogen in a layer of the silicon substrate; and (c) thermal oxidation of the layer of the silicon substrate at a temperature in the range of about 800 to about 11000C in an oxidizing ambient.
In some embodiments, thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
In another aspect the present invention provides a doped silicon dioxide layer, the layer comprising (a) a silicon dioxide layer which is substantially free of ion implantation damage (b) doped with from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the silicon dioxide layer.
In another aspect the present invention provides a doped silicon oxide/nitride layer, the layer comprising (a) a silicon oxide/nitride (with ratio of oxygen: nitrogen varying from about IxIO6 to about 1) layer which is substantially free of ion implantation damage (b) doped with from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the silicon dioxide layer.
In another aspect the present invention provides a semiconductor structure comprising a semiconductor or insulating substrate, on which substrate is introduced the doped silicon dioxide or silicon oxide/nitride layer described above.
In another aspect the present invention provides a process for preparing a doped silicon dioxide layer, the process comprising: (a) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into a silicon substrate; (b) thermal growth on the silicon substrate of silicon dioxide to a thickness at least 3 times that of the depth of the rare-earth dopant in the silicon.
In another aspect the present invention provides a process for preparing a doped silicon oxide/nitride layer, the process comprising: (a) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into a silicon substrate; (b) ion implantation of the same silicon substrate with nitrogen to an atomic concentration up to 33 atomic percent; (c) thermal growth of silicon dioxide on the silicon substrate to a thickness at least 3 times that of the depth of the rare-earth dopant in the silicon. In another aspect the present invention provides a process for preparing a doped silicon dioxide layer on a semiconductor or insulator substrate, the process comprising: (a) deposition of an amorphous silicon layer on the semiconductor or insulator substrate to a thickness up to lμm; (b) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into the deposited silicon film; (c) thermal growth on the silicon film of silicon dioxide to a thickness such that all or part of the silicon film is reacted with the oxygen in the formation of the silicon dioxide film.
In another aspect the present invention provides a process for preparing a doped silicon oxide/nitride layer on a semiconductor of insulator substrate, the process comprising: (a) deposition of an amorphous silicon layer on the semiconductor or insulator substrate to a thickness up to lμm; (b) ion implantation of one or more rare-earth elements to an atomic concentration of between about 0.01 to about 20 atomic per cent into the deposited silicon film;
(c) ion implantation of the same silicon film with nitrogen to an atomic concentration up to 33 atomic percent; (d) thermal growth on the silicon film of silicon dioxide to a thickness such that all or part of the silicon film is reacted with the oxygen in the formation of the silicon oxide/nitride film.
Other aspects and features of embodiments of the present invention will become apparent, to those ordinarily skilled in the art, upon review of the following description of the specific embodiments of the invention. Brief Description of the Drawings
Embodiments of the invention will now be described in greater detail with reference to the accompanying diagrams, in which:
Figure 1 is a diagram of a semiconductor structure comprising a silicon substrate, a rare-earth doped dielectric film and a carrier injection layer according to an embodiment of the present invention;
Figure 2 is a diagram of a semiconductor structure comprising a silicon substrate, a rare-earth doped dielectric film, a thin film containing sensitizing centres and a carrier injection layer according to an embodiment of the present invention;
Figure 3 is a diagram of a semiconductor structure comprising a silicon substrate and a rare-earth doped dielectric film which also contains sensitizing centres, and a carrier injection layer according to an embodiment of the present invention;
Figure 4 is a diagram of a semiconductor structure comprising a light emitting semiconductor substrate and a rare-earth doped dielectric film according to an embodiment of the present invention;
Figure 5 is a diagram of a semiconductor structure comprising a light emitting semiconductor substrate, a rare- earth doped dielectric film and a thin film containing sensitizing centres according to an embodiment of the present invention; Figure 6 is a diagram of a semiconductor structure comprising a light emitting semiconductor substrate and a rare-earth doped dielectric film which also contains sensitizing centres according to an embodiment of the present invention;
Figure 7 is a plot of an example erbium profile formed according to an embodiment of the present invention; and
Figure 8 is a plot of an example spectrum of light emitted from a dielectric film fabricated according to an embodiment of the present invention.
In the drawings, the same reference characters have been used throughout the drawings to identify the same or similar elements.
Detailed Description
In the following detailed description of sample embodiments of the invention, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific sample embodiments in which aspects of the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical, electrical, and other changes may be made without departing from the scope of the invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope is defined by the appended claims. A doped dielectric layer and a method for forming the doped dielectric layer are provided. The doped dielectric layer comprises a silicon dioxide or silicon oxynitride layer doped with one or more rare-earth elements such that silicon dioxide or silicon oxynitride layer is substantially free of ion implantation damage and the one or more rare-earth elements are distributed throughout the dielectric layer. Semiconductor structures comprising the above dielectric layer are also provided.
Doped Dielectric Layer
One embodiment of the present invention provides a doped dielectric layer that includes a group IV based oxide or a group IV based oxide/nitride (with the ratio of the oxygen: nitrogen varying from about 1x1 O6 to about 1) . In some embodiments, the group IV element used to prepare the layer is silicon. The doped dielectric layer may have a thickness between lnm and lOOOnm. The one or more rare-earth element that is used as the dopant may be selected from elements such as erbium, cerium, neodymium, ytterbium, terbium, europium, or holmium. In some embodiments, the one or more rare-earth element is present in the group IV dielectric layer in a concentration ranging from about 0.01 to about 20 atomic percent. Activation of high concentrations of rare-earth elements in silicon dioxide appears to be greater when introduced into thermally grown silicon dioxide, as opposed to dielectric layers grown by plasma enhanced chemical vapour deposition.
Semiconductor Structure Using the doped dielectric layer described above, a multitude of semiconductor structures can be prepared. Examples of semiconductor structures in accordance with embodiments of the present invention will now be discussed with reference to Figures 1 to 6.
Figure 1 is a diagram of a semiconductor structure 10 that includes a silicon substrate 12, a rare-earth doped dielectric film 14 and a carrier injection layer 16. A voltage source 11 is connected between the carrier injection layer 16 and the substrate 12. In general, the voltage source 11 may be any device or element which allows an electrical potential difference to be applied between two positions of the semiconductor structure. The substrate 12 on which the doped dielectric layer is formed is selected such that it is capable of withstanding temperatures up to 10000C or, in some cases, 11000C. Examples of suitable substrates are single crystal silicon or poly-crystalline silicon, fused silica, zinc oxide, gallium nitride, sapphire, silicon carbide and quartz. The thickness of the substrate is not critical to successful and useful operation of the device .
In some embodiments, the semiconductor structure includes a layer which may act as a sensitizer for the rare- earth doped dielectric layer. Such a structure 30 is shown in Figure 2. In Figure 2, a sensitizing layer 18 is located between the rare-earth doped dielectric film 14 and the carrier injection layer 16 of the semiconductor structure 30. In some embodiments, the thickness of the sensitizing layer 18 is between lnm and lOOOnm. In some embodiments, the semiconductor structure includes sensitizing centres which are incorporated into the doped dielectric layer. Such a structure 40 is shown in Figure 3. In Figure 3, sensitizing centres 20 are located in a layer between layers of the rare-earth doped dielectric film 14. In some embodiments, the sensitizing centres are located within the dielectric layer itself, rather than present in a layer between layers of the dielectric layer, as illustrated in Figure 3. In some embodiments, the concentration of the sensitizing centres is between about
0.01 and about 20 atomic percent. The sensitizing centres 20 may be introduced into the doped dielectric film 14 during its formation, or subsequent to the formation of the doped dielectric film for example via ion implantation with or without a subsequent high temperature annealing step in the temperature range 400 to 10000C. As noted above, sensitizing layer (s) or centres, for example, defects or irregularities in the doped dielectric film can potentially make the rare- earth dopants more susceptible to being excited via optical or electrical pumping, and thus can significantly improve the light output of some embodiments of the present invention.
In the examples described above and illustrated in figures 1, 2 and 3, the semiconductor structures 10, 30, 40 have a current injection layer 16 placed on the surface of the semiconductor structure. For example, this current injection layer could be Indium Tin Oxide which is generally optically transparent in the wavelength range 400nm to 1700nm. The Indium Tin Oxide layer has a thickness of 50nm to 300nm in some embodiments. In these cases, the doped dielectric layer is excited by carrier injection and subsequently emits light at a wavelength dictated by the doping species contained in the dielectric film.
The semiconductor structure 50 shown in figure 4 is of the rare-earth doped dielectric layer 14 formed on a light emitting substrate 22. This substrate 22 may be, for example, gallium nitride or a sapphire substrate with a gallium nitride layer on its surface. In this case, the light emitting substrate 22 may be excited by current injection and emit light at a wavelength in the range 200nm- lOOOnm. This light then excites the doped dielectric layer 14 which subsequently emits light at a wavelength dictated by the doping species contained in the dielectric film.
In some embodiments, the semiconductor structure 50 which is formed on a light emitting substrate 22 and is described above and shown in figure 4 includes a layer 18 which acts as a sensitizer for the rare-earth doped dielectric layer 14. Such a structure 60 is shown in figure 5. In Figure 5, the sensitizing layer is located on the surface of the rare-earth doped dielectric layer 14. In some embodiments, the thickness of the sensitizing layer 18 is between lnm and lOOOnm.
In some embodiments, the semiconductor structure 50 which is formed on a light emitting substrate 22 and is described above and shown in figure 4 includes sensitizing centres 20 which are incorporated into the doped dielectric layer 14. Such a structure 70 is shown in figure 6. In some embodiments, the concentration of the sensitizing centres is between about 0.01 and about 20 atomic percent. The sensitizing centres 20 may be introduced into the doped dielectric film during its formation, or subsequent to the formation of the doped dielectric film for example via ion implantation with or without a subsequent high temperature annealing step in the temperature range 400 to HOO0C .
Ion Implantation
Ion implantation is used for the introduction of dopant to electronic devices. It has significant advantages compared to other doping technologies, as described in Chapter 8 in J D Plummer et al . , Silicon VLSI Technology (Prentice-Hall New Jersey 2000) .
Ion implantation introduces pure dopant material with the unintentional introduction of other impurities limited to levels which are almost undetectable. This high purity doping is achieved using ion implantation's highly selective mass selection. Further, the concentration profile of dopant introduced via ion implantation is relatively highly controlled compared to other doping techniques. This is because the concentration profile is dependent on the energy of the ion implantation which in turn can be controlled in a relatively highly stable manner. Further, the concentration of dopant introduced via ion implantation can also be controlled to a level within 1% of the doping required. Further, the uniformity of the dopant introduced via ion implantation is uniform to within 1% across an implantation area of 300mmx300mm. Further, ion implantation does not require the source of the dopant species to be in the gaseous form, such as is the case for in-situ doping using plasma enhanced chemical vapour deposition. Further, the controlled introduction of different concentrations of more than one dopant in the same dielectric substrate is easily achieved using multiple ion implantation steps. The controlled introduction of multiple species is difficult to achieve in a repeatable manner using other doping technologies such as plasma enhanced chemical vapour deposition and sputtering.
In summary, the demands of the microelectronics industry in the last few decades has resulted in ion implantation having dopant introduction capabilities such as high control of dopant purity, high control of concentration profile, high control of dopant concentration and high control of dopant uniformity across the largest substrate areas used in the semiconductor industry. Exploitation of any technology which requires the controlled introduction of dopant requires the use of ion implantation if repeatability of devices is to be achieved both inter- and intra- substrate.
Thermal Oxidation of Silicon
The thermal oxidation of silicon has been used to form a high quality dielectric thin film in the fabrication of electronic devices for five decades, as described in Chapter 6 in J D Plummer et al . , Silicon VLSI Technology (Prentice-Hall New Jersey 2000) . It requires the substrate which is either silicon or which has silicon as a surface layer, to be placed in a furnace and heated to a temperature in the range 700-11000C. The gaseous ambient during this high temperature step contains oxygen in the form, for example of oxygen gas or water vapour, and the oxygen reacts with the silicon surface which is exposed to the ambient. As the substrate remains at high temperature in the oxygen containing ambient, more of the silicon reacts with the oxygen forming an ever increasing thickness of silicon oxide. If the silicon which reacts with the oxygen contains dopant such as rare-earth elements or nitrogen, these dopants are incorporated into the dielectric film.
Thermal oxidation of semiconductor substrates in the manner described above provides control of thickness and uniformity across an area up to 300mm x 300mm of the dielectric film to within 1% of that required.
Exploitation of any technology which requires the well -controlled growth of a dielectric layer requires the use of thermal oxidation if repeatability of devices is to be achieved both inter- and intra-substrate .
Preparation of the Doped Dielectric Layer
Preparation of a doped dielectric layer in accordance with an embodiment of the present invention includes the following four general steps.
a) Formation of a silicon layer on a substrate
In the case where the substrate is silicon this step is redundant. In the case where the substrate is not silicon, or in the case where the substrate is silicon with a surface layer present which is not silicon, the formation of the silicon layer can be achieved by the deposition of an amorphous layer of silicon using common fabrication techniques such as chemical vapour deposition, sputtering, low pressure chemical vapour deposition, thermal evaporation, laser assisted deposition, or plasma enhanced chemical vapor deposition. In some embodiments, the thickness of the deposited silicon layer is between IOnm and lOOOnm. (b) Ion implantation of one or more rare-earth element dopant
In some embodiments, the energy of implantation is between 0. lkeV and 4MeV, using a dose such that the final concentration of the dopant is between about 0.01 and about 20 atomic percent. In the case where a layer of amorphous silicon has been formed on a substrate which is not silicon or in the case where the substrate is silicon with a surface layer present which is not silicon, the implantation energy may be selected in a range such that more than about 90% of the implanted dopant is placed in the layer of amorphous silicon.
In some embodiments, the energy of implantation is between about 0. IkeV and about 400keV. In general, the energy of implantation that is used is implementation specific and may depend, for example, on the mass of the rare-earth dopant ions that are to be implanted. Typically the larger the mass of the ions to be implanted, the larger the energy of implantation.
(c) Ion implantation of nitrogen
In the case where it is desired that the doped dielectric is composed of a mixture of silicon oxide/nitride (with the ratio of the oxygen: nitrogen varying from about IxIO6 to about 1) , nitrogen is ion implanted to a dose which results in a concentration of about IxIO16Cm"3 to about 5xl022cm"3 of nitrogen in the silicon layer which had previously been implanted with the rare-earth ions as described in step (b) above. In the case where a layer of amorphous silicon has been formed on a substrate which is not silicon or in the case where the substrate is silicon with a surface layer present which is not silicon, the implantation energy may be selected in a range such that more than about 90% of the implanted nitrogen is placed in the layer of amorphous silicon.
(d) Thermal oxidation of the silicon substrate or the silicon layer deposited on the substrate
Typically, oxidation takes place in a furnace at a temperature in the range of about 800 to about 11000C. The oxidizing species can be oxygen (dry oxidation) or H2O (wet oxidation) or any species or combination of species which causes the reaction of oxygen and the silicon which has been implanted with the rare-earth dopant species in order to form a silicon dioxide layer.
During the oxidation step, the rare-earth dopant, and the nitrogen in the case where step (c) has been used, is incorporated into the dielectric film. The final result is a dielectric film with high optical and electrical quality relative to those dielectric films prepared using deposition techniques such as plasma enhanced chemical vapour deposition or sputtering. Further, the damage usually associated with the introduction of dopant in dielectric thin films is avoided because the implantation step takes place before the dielectric film is formed. Further, the dopant redistributes in the dielectric film during the thermal oxidation step, a redistribution which depends on the dopant segregation coefficient for silicon dioxide and silicon. This means that the dopant is present in a volume which is much greater than if the dopant were ion implanted directly into a dielectric film already in place. Figure 7 shows a measurement of erbium concentration in a dielectric film which has been prepared using steps (a), (b) and (d) above. The emission of light from an erbium-doped dielectric film prepared using steps (a) , (b) and (d) above, has been observed. A photoluminescence measurement of light at a wavelength around 1540nm from such a film is shown in figure 8.
The plots shown in Figures 7 and 8 represent observations under particular conditions. Actual results for other embodiments and/or under different conditions may vary.
In the embodiments described above, the device elements and circuits are connected to each other as shown in the figures, for the sake of simplicity. In practical applications of the invention, devices, elements, circuits, etc. may be connected or coupled directly to each other. As well, devices, elements, circuits etc. may be connected or coupled indirectly to each other through other devices, elements, circuits, etc., as necessary for operation.
The above-described embodiments of the present invention are intended to be examples only. Alterations, modifications and variations may be effected to the particular embodiments by those of skill in the art without departing from the scope of the invention, which is defined solely by the claims appended hereto.

Claims

Claims
1. A doped dielectric layer, the layer comprising:
(a) a group IV oxide layer substantially free of ion implantation damage; and
(b) from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the oxide layer.
2. A doped dielectric layer according to claim 1, wherein the group IV oxide layer comprises silicon dioxide.
3. A doped dielectric layer according to claim 1 or 2, wherein the group IV oxide layer has a thickness from about lnm to about lOOOnm.
4. A doped dielectric layer according to any one of claims 1 to 3 , wherein the one or more rare-earth elements comprise at least one of: erbium, cerium, neodymium, ytterbium, terbium, europium, and holmium.
5. A doped dielectric layer, the layer comprising:
(a) a group IV oxynitride layer substantially free of ion implantation damage; and
(b) from about 0.01 to about 20 atomic per cent of one or more rare-earth elements, distributed throughout the oxynitride layer.
6. A doped dielectric layer according to claim 5, wherein the group IV oxynitride layer has an oxygen: nitrogen ratio ranging from about IxIO6 to about 1.
7. A doped dielectric layer according to claim 5 or 6, wherein the group IV oxynitride layer comprises silicon oxynitride .
8. A doped dielectric layer according to any one of claim 5 to 7, wherein the group IV oxynitride layer has a thickness from about lnm to about lOOOnm.
9. A semiconductor structure comprising a substrate on which a rare-earth doped dielectric layer according to any one of claims 1 to 8 is formed.
10. A semiconductor structure according to claim 9, wherein the substrate comprises any one of: crystalline silicon, polycrystalline silicon, silica, zinc oxide, gallium nitride, sapphire, silicon carbide, silicon nitride, silicon oxynitride and quartz.
11. A semiconductor structure according to claim 9 or
10. wherein the semiconductor structure comprises more than one dielectric layer.
12. A semiconductor structure according to any one of claims 9 to 11, wherein the semiconductor structure includes a sensitizing layer.
13. A semiconductor structure according to claim 12, wherein the sensitizing layer has a thickness between about lnm and about lOOOnm.
14. A semiconductor structure according to any one of claims 9 to 11, wherein the semiconductor structure includes sensitizing centres within the rare-earth doped dielectric layer.
15. A process for preparing a doped dielectric layer, the process comprising:
(a) formation of a silicon layer on a substrate;
(b) ion implantation of the silicon layer with a dopant comprising one or more rare-earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy that places more than about 90% of the dopant in the silicon layer; and
(c) thermal oxidation of the rare-earth doped silicon layer at a temperature in the range of about 800 to about 11000C in an oxidizing ambient.
16. A process according to claim 15, wherein the ion implantation energy of the dopant is in the range of about O.lkeV to about 4MeV.
17. A process according to claim 15 or 16, wherein thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
18. A process for preparing a doped dielectric layer, the process comprising:
(a) ion implantation of a silicon substrate with one or more rare-earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy in the range about 0. lkeV to about 4MeV; and
(b) thermal oxidation of the rare-earth doped silicon substrate at a temperature in the range of about 800 to about 11000C in an oxidizing ambient.
19. A process according to claim 18, wherein thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
20. A process for preparing a doped dielectric layer, the process comprising:
(a) formation of a silicon layer on a substrate;
(b) ion implantation of the silicon layer with one or more rare-earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy which places more than about 90% of the dopant in the silicon layer;
(c) ion implantation of nitrogen to a dose which results in a concentration of about IxIO16Cm"3 to about 5xl022cm~3 of nitrogen in the rare-earth doped silicon layer; and
(d) thermal oxidation of the nitrogen and rare-earth doped silicon layer at a temperature in the range of about 800 to about 11000C in an oxidizing ambient.
21. A process according to claim 20, wherein the ion implantation energy of the dopant is in the range about O.lkeV to about 4MeV.
22. A process according to claim 20 or 21, wherein thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
23. A process for preparing a doped dielectric layer, the process comprising: (a) ion implantation of a silicon substrate with one or more rare-earth ions to a concentration of between about 0.01 and about 20 atomic per cent at an energy in the range about 0. lkeV to about 4MeV;
(b) ion implantation of nitrogen to a dose which results in a concentration of about lxlθ16cπf3 to about 5xl022cnrf3 of nitrogen in a layer of the silicon substrate; and
(c) thermal oxidation of the layer of the silicon substrate at a temperature in the range of about 800 to about HOO0C in an oxidizing ambient.
24. A process according to claim 23, wherein thermal oxidation comprises at least one of: dry oxidation and wet oxidation.
PCT/CA2009/001157 2008-08-20 2009-08-20 Doped dielectric layers and method for formation thereof WO2010020046A1 (en)

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