WO2010001344A2

WO2010001344A2 - Integrating and optimizing different functional components on a single substrate having layer in common

Info

Publication number: WO2010001344A2
Application number: PCT/IB2009/052847
Authority: WO
Inventors: Mareike Klee; Christina Adriana Renders; Pieter Lok; Aarnoud Laurens Roest; Arnoldus Den Dekker; Klaus Reimann; Peter Gerard Steeneken; Olaf Wunnicke
Original assignee: Nxp B.V.
Priority date: 2008-07-01
Filing date: 2009-06-30
Publication date: 2010-01-07
Also published as: WO2010001344A3

Abstract

The invention relates to a method of manufacturing a monolithic device comprising multiple process steps. The monolithic device comprises at least two different electrical or electromechanical functional components (GS, CS, TC1, TC2, HKC, BW, BWM, FBAR). Each respective electromechanical functional component is formed by a respective functional stack (FS1, FS2) comprising a plurality of layers. The at least two 5 functional components (GS...FBAR) have a first layer in common (DL, E1, E2, E3). The method comprises a step of: providing a first ranking of the functional components (GS...FBAR) for the first layer (DL, E1, E2, E3) which is based on a plurality of respective performance indicators for each respective one of the functional. The multiple process steps comprise a step of manufacturing the first layer (DL, E1, E2, E3) such that it is physically 10 and/or geometrically optimized for at least a single one of the functional components selected on the basis of a highest rank in the first ranking. The method in accordance with the invention provides for a monolithic integration of different functional components (GS...FBAR). In this method layers of the functional stack are reused, which saves process steps, and optimized for optimal performance of at least one of the functional components 15 (GS...FBAR) without jeopardizing the performance of the monolithic device to unacceptable levels. The invention further relates to a monolithic device which features a wider applicability than the known monolithic devices because the tunable and/or high-k dielectric layer in respective functional stacks can be better shared between the functional components.

Description

Integrating and optimizing different functional components on a single substrate having layer in common

FIELD OF THE INVENTION

The invention relates to a method of manufacturing a monolithic device comprising multiple process steps, wherein the monolithic device comprises at least two different electrical or electromechanical functional components on a substrate (). The invention also relates to such a monolithic device. The invention further relates to a base station comprising such monolithic device and to a hand-held device comprising such monolithic device.

BACKGROUND OF THE INVENTION Multi-band, multi-mode communication systems require front-end modules, which operate at various frequencies. Here RF front-end modules are needed that comprise switches to switch between the different frequency bands, as well as between receive- and transmit bands are needed. Other basic components in the RF front-end modules are bandpass filters for band selection of the various frequency bands. In today's RF front-end modules semiconductor switches such as pin diodes or high-electron mobility transistors (p- type HEMT's) are typically used as switches. Band-pass filters, and in particular surface acoustic wave filters, are typically mounted as discrete components. These discrete components, i.e. switches and filters, are relatively bulky. Due to the numerous bands, which need to be served in next generation communication systems, more than 4 filters will be needed next to numerous switches. Building up RF front-end modules with discrete switches and filters which serve the numerous frequency bands, will require a lot of board space.

In US2007/0188049A1 a monolithic solution to this problem has been reported which relies on the integration of a filter and a switch onto a single substrate wherein there is a piezoelectric layer, in respective functional stacks of the filter and the switch, in common. In other words, this document provides a monolithic solution instead of the former multi-die solutions in RF circuits. This saves process steps, but also increases packing density. Further savings are achieved by the sharing of the particular layer in common. The problem with the known monolithic approach having the piezoelectric layer sharing is that it is impossible to optimize the piezoelectric layer for optimal performance of both components at the same time. This requires separate optimization of the piezoelectric layer for each of the filter and the switch, which renders layer sharing in fact impossible, and thus costs more manufacturing steps.

SUMMARY OF THE INVENTION

It is an object of the invention to provide a method of manufacturing a monolithic device of the kind set forth in the opening paragraph in which the above-described contradiction is at least partially resolved.

The invention is defined by the independent claims. The dependent claims define advantageous embodiments.

In a first aspect, the invention relates to a method of manufacturing a monolithic device comprising multiple process steps, wherein the monolithic device comprises at least two different electrical or electromechanical functional components on a substrate, wherein each respective one of the functional components is formed by a respective functional stack comprising a respective plurality of layers, wherein the at least two functional components have a first layer in common. The method comprises steps of: providing a first ranking of the functional components for the first layer which is based on a plurality of respective performance indicators for each respective one of the functional components in operational use of the monolithic device, wherein the plurality of respective performance indicators depends on respective physical and geometrical properties of the first layer according to respective dependencies; providing the substrate, and - forming the at least two functional components on the substrate, wherein the multiple process steps comprise a step of manufacturing the first layer such that it is physically and/or geometrically optimized for at least a single one of the functional components selected on the basis of a highest rank in the first ranking.

The effect of the features of the method in accordance with the invention is as follows. For each of the respective functional components a respective performance indicator is selected which is the most important for the component. The performance indicators may be ranked from high importance to low importance in as far as their influence on the overall performance of the monolithic device. When doing so effectively the functional components are also ranked, because the respective performance indicators depend on the physical and geometrical properties of the first layer in common. The advantage of ranking the functional components in this way is that during manufacturing of the monolithic device the first layer in common may be optimized for the functional component having the highest ranking. This means that the first layer in common is physically and/or geometrically designed such that the physical and geometrical properties correspond with an optimum in respective dependency of the respective performance indicator. Consequently, this leads to the best performance of the respective functional component. Moreover, this also leads to a best overall performance of the monolithic device, because the respective performance indicator of the highest ranked functional component has the most influence on this overall performance. It is inevitable that the consequence of the method in accordance with the invention is that the first common layer is not physically and/or geometrically optimized for best performance of all functional components. However, the inventors have realized that with the above-described method a monolithic device can be obtained which still works satisfactorily, despite a possible sub-optimal design of the first layer in common for one of the functional components. The ranking features that any such sub-optimal design of the first layer in common has little or no impact on the overall performance of the monolithic device. In other words, the earlier described contradiction of the known method is at least partially resolved.

In an embodiment of the method in accordance with the invention in the step of manufacturing the first layer, the first layer is co-optimized for at least two of the functional components selected on the basis of highest ranks in the first ranking. This embodiment of the method is advantageous in case of, for example, two different functional components having respective performance indicators which have equal importance in as far as their influence on the overall performance of the monolithic device. In such situation the first layer in common, in accordance with this embodiment, is co-optimized respective functional components simultaneously. This may result in a sub-optimal solution for both functional components if the respective dependencies of the respective performance indicators on the physical and/or geometrical properties of the first layer are different and lead to different optimal physical and/or geometrical properties of the first layer. In an embodiment of the method in accordance with the invention the at least two functional components have a second layer in common, and the method comprises a step of: providing a second ranking of the functional components for the second layer which is based on a further plurality of respective performance indicators for each respective one of the functional components in operational use of the monolithic device, wherein the further plurality of respective performance indicators depend on respective physical and geometrical properties of the second layer according to further respective dependencies, and the multiple process steps further comprise a further step of manufacturing the second layer such that it is physically and/or geometrically optimized for at least a further single one of the functional components selected on the basis of a further highest rank in the second priority ranking. Whereas in the main invention a first layer is "shared / reused" (in common) in two functional stacks of two different functional components, a further improvement is obtained when the functional components are manufactured with a second layer in common. While doing so this embodiment of the method provides that the second layer in common is optimized. This optimization in this embodiment is according to a second ranking respective component wherein, consequently, respective physical and/or geometrical properties of the second layer are optimal for a respective performance indicator. This may be the same functional component as for the first layer in common, but it may also be a different one. It falls within the scope of the invention to manufacture multiple different functional components having three or more layers in common, each respective layer in common being optimized according to a further ranking of the functional components.

In an embodiment of the method in accordance with the invention the functional components form part of an RF-circuit, and comprising a further step of forming the RF circuit.

In an embodiment of the method in accordance with the invention the functional components to be formed are selected from a group comprising: a capacitive switch, a tunable capacitor, a high-k capacitor, a bulk acoustic resonator, a bulk acoustic resonator with mass loading, a film bulk acoustic resonator, a stacked capacitor, and a coil. The functional components mentioned in this embodiment, which are typical components in a RF-circuit, may all be designed such that respective functional stacks are very similar which renders layer "reuse" easier. Such a similarity is visible from the fact that all the above-mentioned functional components have at least a sub-set out of a functional stack comprising: a bottom electrode layer, a sacrificial layer (partially etched to form a gap), a center electrode layer, a dielectric layer, and a top electrode layer. Even though some layers may not be needed in some of the functional components, a designer is free to leave the layer in the functional stack, provided that the performance of the respective functional component is not significantly hampered by the respective layer. In an embodiment of the method in accordance with the invention the first layer is a dielectric layer. The dielectric layer has an important impact on respective performance indicators of the functional components. Sharing the dielectric layer in the sense of the invention is therefore particularly attractive as that eases ranking and thus optimization of the first layer in common.

In an embodiment of the method in accordance with the invention the dielectric layer is a tunable layer and/or a high-k layer. These dielectric materials have the advantage of having applications in various different functional components, which eases layer sharing/reuse. In an embodiment of the method in accordance with the invention i) respective weighting factors have been assigned to respective ones of the functional components indicative for their relative importance, ii) the first ranking is determined by a magnitude of the respective weighting factors, and iii) the highest rank is associated with the respective component having the highest weighting factor. Assigning weighting factors in the manner of this embodiment is convenient as the ranking of at least two randomly selected functional components out of a list or table of functional components is simply obtained by searching the component having the highest weighting factor.

In an embodiment of the method in accordance with the invention the respective weighting factors are defined as follows: - the bulk acoustic resonator has a first weighting factor; the bulk acoustic resonator with mass loading has the first weighting factor; the film bulk acoustic resonator has the first weighting factor; the tunable capacitor has a second weighting factor; the galvanic switch has a third weighting factor; - the capacitive switch has a fourth weighting factor; the high-k capacitor has the fourth weighting factor; the stacked capacitor has a fifth weighting factor, and the coil has the fifth weighting factor, wherein the respective weighting factors are ranked from high to low as follows: 1) the first weighting factor, 2) the second weighting factor, 3) the third weighting factor, 4) the fourth weighting factor, 5) the fifth weighting factor.

In an embodiment of the method in accordance with the invention the second layer is an electrode layer. The electrode layers have an important impact on respective performance indicators of the functional components. Sharing (at least one of) the electrode layers in the sense of the invention is therefore particularly attractive as that eases ranking and thus optimization of the second layer in common.

In an embodiment of the method in accordance with the invention i) respective further weighting factors have been assigned to respective ones of the functional components indicative for their relative importance, ii) the second ranking is determined by a magnitude of the respective further weighting factors, and iii) the further highest rank is associated with the respective component having the highest further weighting factor. Assigning weighting factors in the manner of this embodiment is convenient as the ranking of at least two randomly selected functional components out of a list or table of functional components is simply obtained by searching the component having the highest weighting factor.

In an embodiment of the method in accordance with the invention the respective further weighting factors are defined as follows: the galvanic switch has a first further weighting factor; the bulk acoustic resonator has a second further weighting factor; - the film bulk acoustic resonator has the second further weighting factor; the bulk acoustic resonator with mass loading has a third further weighting factor; the capacitive switch has the third further weighting factor; the tunable capacitor has a fourth further weighting factor; - the high-k capacitor has the fourth further weighting factor; the coil has the fourth further weighting factor, and the stacked capacitor has a fifth further weighting factor, wherein the respective further weighting factors are ranked from high to low as follows: 1) the first further weighting factor, 2) the second further weighting factor, 3) the third further weighting factor, 4) the fourth further weighting factor, 5) the fifth further weighting factor.

A monolithic device is known from US2007/0188049Al. This document discloses a monolithic radio frequency (RF) circuit. The monolithic RF circuit includes: a base substrate; a filter part including first and second support layers formed on the base substrate, a first air gap formed between the first and second support layers, a first electrode formed on the second support layer and the first air gap, a first piezoelectric layer formed on the first support layer and the first electrode, and a second electrode formed on the first piezoelectric layer; and a switch part including a third support layer adjacent to the second support layer, a second air gap formed between the second and third support layers, a first switch electrode formed on the second air gap and the third support layer, and a second piezoelectric layer formed on the first switch electrode. The second piezoelectric layer is formed along with the first piezoelectric layer in a process of forming the first piezoelectric layer.

A problem with the known monolithic RF circuit is that the piezoelectric layer is not by definition suitable for being shared between functional components of other kinds, for example a tunable capacitor.

It is an object of the invention to provide a monolithic device having a dielectric layer which is suitable for being shared between more different functional components of an RF-circuit. In a second aspect, the invention relates to a monolithic device comprising at least two different electrical or electromechanical functional components on a substrate, wherein each respective one of the functional components comprises a respective functional stack with a respective plurality of layers, wherein the functional components are selected from a group comprising: a capacitive switch, a tunable capacitor, a high-k capacitor, a bulk acoustic resonator, a bulk acoustic resonator with mass loading, and a film bulk acoustic resonator, wherein the respective functional stack of the at least two functional components have a tunable and/or high-k dielectric layer in common. The effect of the features of the monolithic device in accordance with the invention is as follows. The integration of at least two different functional components selected out of the above-mentioned list on a single substrate provides a monolithic solution wherein respective functional stacks of the functional components show great similarity. The tunable and/or high-k dielectric layer in respective functional stacks can be better shared (then the piezoelectric layer in the prior art) between the functional components because not all piezoelectric materials are tunable and/or high-k and thus not suitable for functional components of other kinds which require a dielectric layer with these properties.

In an embodiment of the monolithic device in accordance with the invention the tunable and/or high-k dielectric layer is both tunable and high-k. An advantage of this embodiment is that a dielectric layer which is both tunable and high-k is applicable for a larger variety of functional components. A consequence of this is that such dielectric layer may be shared between respective functional stacks of more different functional components.

In an embodiment of the monolithic device in accordance with the invention the tunable and/or high-k dielectric layer comprises a ferroelectric material. Ferroelectric materials are a sub-set out of the group of materials which is both tunable and high-k. The advantage of these ferroelectric materials is that they are also able to exhibit piezoelectric characteristics. In view of the previously discussed embodiment the applicability of this class of materials is thus even higher (maybe used for more different functional components).

In an embodiment of the monolithic device in accordance with the invention, the monolithic device comprises at least three different electrical or electromechanical functional components on a substrate, and each respective one of the functional components comprises a respective functional stack with a respective plurality of layers, and the functional components are selected from a group comprising: a capacitive switch, a tunable capacitor, a high-k capacitor, a bulk acoustic resonator, a bulk acoustic resonator with mass loading, and a film bulk acoustic resonator, and the respective functional stack of the at least three functional components have a tunable and/or high-k dielectric layer in common. Integrating three different electrical or electromechanical functional components monolithically is an effect which is particularly possible because of the specific choice of dielectric materials in accordance with the invention. Especially the ferroelectric materials are very advantageous in this embodiment, because of their widest applicability in different functional components.

In an embodiment of the monolithic device in accordance with the invention the functional components comprise the tunable capacitor and the capacitive switch, and the dielectric layer comprises material selected from a group comprising: perovskite material such as PZT dielectric material, BST dielectric material, and BZN dielectric material, and wherein the dielectric layer has a thickness in a range between 50 and lOOOnm, and preferably between 200nm and 500nm.

In an embodiment of the monolithic device in accordance with the invention the functional components comprise at least one of the acoustic resonators, and comprise at least one of a capacitive switch and a tunable capacitor, wherein the dielectric layer comprises material selected from a group comprising: perovskite material such as PZT dielectric material, BST dielectric material, and BZN dielectric material, and wherein the dielectric layer has a thickness in a range between 50 and lOOOnm, and preferably between 200nm and 500nm.

In a third aspect, the invention relates to base station for a communication system, wherein the base station comprises the monolithic device in accordance with the invention.

In a fourth aspect, the invention relates to a hand-held apparatus for a communication system, wherein the hand-held apparatus comprises the monolithic device in accordance with the invention. In a fifth aspect, the invention relates to an electronic system comprising the monolithic device in accordance with the invention, wherein the electronic system is selected from a group comprising: a high-power communication device, a near-field communication device, an RF-ID device. These applications may also benefit from the monolithic solution and layer sharing in accordance with the invention.

In an embodiment of the monolithic device in accordance with the invention the first layer has been physically and/or geometrically optimized for a respective performance indicator of at least a single one of the functional components in operational use of the monolithic device. In an embodiment of the monolithic device in accordance with the invention the second layer has been physically and/or geometrically optimized for a respective performance indicator of at least a single one of the functional components in operational use of the monolithic device.

These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:

Fig. 1 shows a possible classification of dielectric materials and selections there from in accordance with an aspect of the invention;

Fig. 2 shows a first embodiment of the monolithic device in accordance with a second aspect of the invention;

Fig. 3 shows a second embodiment of the monolithic device in accordance with the second aspect of the invention; Fig. 4 shows a third embodiment of the monolithic device in accordance with the second aspect of the invention, and

Fig. 5 illustrates an optimization table of a monolithic device in accordance with the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The invention provides for an optimization technique in the manufacture of a monolithic device. The monolithic device comprises at least two different electrical or electromechanical functional components which have respective functional stacks. Even though the prior art shows a monolithic solution of a switch and a filter it does not say anything about optimization of layers. It is the insight of the inventors that such solution has severe drawbacks. Additionally, the invention provides for effective re-use of the layer in common. The invention features the integration of very diverse functional components in terms of their most important performance indicators (which depend on physical and geometrical properties of the layer in common) are to be integrated onto a single substrate. The prior art is completely silent on this. A more detailed discussion of the method in accordance with the invention is given in the description of Fig. 5.

The invention further provides a monolithic device comprising at least two different electrical or electromechanical functional components on a substrate, wherein the functional component have respective functional stacks. The prior art teaches to use provide a monolithic circuit having a switch and a filter, wherein the switch and the filter have a piezoelectric layer in common. The prior art is completely silent about a monolithic circuit with other functional components having other respective functional stacks. In such scenario a piezoelectric layer as such may not be shared (manufactured at the same time) amongst the different functional components, because it does not necessarily have the right properties which are required for the functional components. It is the insight of the inventors that choosing a high-k and/or tunable dielectric materials opens up more possibilities of layer sharing. In particular materials, which are both high-k and tunable are of interest. A sub-set of these materials is the ferroelectric materials which are known to have piezoelectric properties next to being tunable and high-k. Applying ferroelectric materials in the functional stacks has thus the advantage that any of the three properties may be used by a particular functional component.

In order to facilitate the discussion of the detailed embodiments a few expressions are defined hereinafter. Throughout this description the term "functional component" or "electrical or electromechanical functional component" refers to a component at electronic circuit level which has a specific function in the electronic circuit, and in particular an RF-circuit. Examples of such functional components are: a capacitive switch, a tunable capacitor, a high- k capacitor, a bulk acoustic resonator, a bulk acoustic resonator with mass loading, a film bulk acoustic resonator, a stacked capacitor, and a coil. The full details of the implementation and the operation of these devices is not discussed in this description. There are many textbooks dealing with this, for example:

REF. 1 : "PIEZOELECTRIC MATERIALS IN DEVICES" N. Setter, Ceramics Laboratory, EPFL Swiss federal institute of technology, Lausanne 1015, Switzerland, www.electroceramics.ch, 2002, ISBN 2-9700346-0-3. Note: chapter 12 deals with piezoswitches, chapter 14 deals with tunable capacitors, and chapter 15 deals with bulk acoustic resonators. - REF. 2: ELECTROCERAMIC-BASED MEMS (2005), 325-359.

Editor(s): Setter, Nava, Publisher: Springer, New York, N. Y.

REF. 3: RF MEMS: THEORY, DESIGN, AND TECHNOLOGY. Gabriel M. Rebeiz, Wiley & Sons, 2003.

Wherever it is mentioned "different functional components" or "different electrical or electromechanical functional components" is meant that the respective components are functionally different or structurally different or both.

Throughout this description the term "functional stack" refers to a stack of layers which is characteristic for performing a specific function. For example, a functional stack of a capacitive switch comprises: a first electrode layer, a dielectric layer, sacrificial layer etched to form an airgap, and a second electrode layer. Connections to the electrode layers, such as metal extensions, bondpads, and contacts/vias are not considered as part of the functional stack.

Throughout this description the term "layer in common" in respective functional stacks refers to a layer that has the same physical and geometrical properties in all indicated functional stacks, and that is manufactured simultaneously. This situation is in this description also being referred to as "a shared layer". Both ways of describing this feature are used interchangeably. With "geometry" in this application is meant parameters like: layer thickness, layer width, layer length, and layer layout.

Throughout this description the term "performance indicator" refers to a quantity which gives an indication of the performance of the functional component when used in a device. For example, a performance indicator of a tunable capacitor is the tuning ratio (maximum capacitance divided by the minimum capacitance). Another performance indicator, which is often relevant in functional components, is the chip area.

Throughout this description the term "optimizing" in "optimizing a layer" refers to choosing the physical and geometrical properties of the layer such that a respective performance indicator reaches an optimal value for the monolithic device in operation use. Physical properties are "layer material, defects, impurities and dopants". Geometrical properties are the layer dimensions (thickness, width, length). An example of optimizing a layer is the following. Optimizing a dielectric layer for the performance indicator "chip area" of a tunable capacitor, means that the chip area (capacitor plate area) may kept smaller by choosing a dielectric material having a higher k-value.

Throughout this description the term "co-optimizing" in "co -optimizing a plurality of layers" refers to either optimizing the plurality of layers to a sub-optimal level (because of contradictory requirements) or optimizing the plurality of layer to an optimal level (because there are no contradictory requirements).

Throughout this description the term "high-k dielectric" means a dielectric material having a relative dielectric constant higher than 50. Most materials have a relative dielectric constant in a range between 50 -5000. Throughout this description the term "tunable dielectric" means a dielectric material having a relative dielectric constant that is tunable. The tunability may be achieved by applying an electric field over the material or by changing the temperature of the dielectric material.

Throughout this description the term "interconnect layer" should be considered as synonym to "conductive layer", "metallization layer" or "metal layer". Both terms are used interchangeably and have to be interpreted as the layer comprising conductors (any conducting material including doped semiconductors), the insulating layer in which the conductors are embedded, and any vias (=contacts) to underlying layers. These terms are well-known to the person skilled in the art of semiconductor technology. Throughout this description the term "substrate" should be interpreted broadly.

The substrate may comprise in an active layer at its front-side elements, e.g. transistors, capacitors, resistors, diodes, and inductors, which form the components of an electronic circuit. The substrate may further comprise interconnections between the elements which may be laid out in one or more interconnect layers. In the Figures, the elements have been left out in order to facilitate the understanding of the invention. The active layer in which the elements are formed may also be called a semiconductor body. The semiconductor body may comprise any one of the following semiconductor materials and compositions such as silicon (Si), germanium (Ge), silicon germanium (SiGe), gallium- arsenide (GaAs) and other III-V compounds such as indium-phosphide (InP), cadmium sulfide (CdS) and other II-VI compounds, or combinations of these materials and compositions. The active elements together may form an electronic circuit. In any case, connection of the active elements is done via interconnect layers. These interconnect layers have parasitic capacitances which are defined by the dielectric constant of surrounding materials. The semiconductor body may even comprise contacts to lower layers (e.g. diffusion regions at the surface of an active region).

Where in this description the word "MEMS" (micro-electromechanical systems) is used, this should also be construed to include NEMS (nano-electromechanical systems). Wherein this description the word deep-submicron process technology is used, this should also be construed to include nanotechnology.

PZT material or PZT dielectric material stands for Lead Zirconate Titanate. BST material or BST dielectric material stands for Barium Strontium Titanate. BZN material or BZN dielectric material stands for Bismuth Zinc Niobate. Referring back to the second paragraph of the section "Detailed description of the preferred embodiment", Fig. 1 shows a possible classification of dielectric materials and selections there from in accordance with an aspect of the invention. The main properties of interest for dielectric materials in a monolithic device are tunability Tn, high-k value Hk, and piezoelectric behavior Pi. The materials which exhibit all three properties are the ferroelectric materials. As mentioned in the second paragraph, the inventors have realized that the tunable class Tn and the higk-k class Hk are of much more interest in monolithic solutions than the piezoelectric area Pi, because of their wider applicability (i.e. in micro devices). In the following table the classification is further illustrated on the basis of example materials which fall in the respective classes and sub-classes.

Table 1: Possible dielectric layer materials, properties, and examples

For the invention, areas 1 to 6 are of interest, more particularly areas 1 and 4, and even more particularly area 4 (the ferroelectric materials). This statement is valid for all embodiments illustrated in this description, including the ones derivable from Fig. 5.

In order to miniaturize next generation multi band RF front-ends and to overcome the above-mentioned problems, switches with tunable filters may be integrated, wherein the filters support more than one frequency band. This enables miniaturization of multi-band RF front-end modules. The invention features the integration of capacitive switches of small size and having low charging. Next to the capacitive switches, tunable filters and other functions such as adaptive impedance matching circuits, coupling capacitors and through-vias may be integrated on the same substrate. High-ohmic silicon substrates, but also other substrates, such as glass- or ceramic substrates, such as aluminum oxide (A12O3), or single crystal substrates, such as sapphire, can be used.

Fig. 2 shows a first embodiment of the monolithic device in accordance with a second aspect of the invention. This embodiment of the monolithic device comprises a single substrate Sub with an adhesion layer Adhl provided thereon. A tunable capacitor TC and a capacitive switch CS (also called a capacitive MEMS switch) are both integrated on the same substrate Sub. The tunable capacitor TC comprises a first functional stack FSl having: a first electrode layer El, a dielectric layer DL, and a further electrode layer E3, respectively. The capacitive switch CS comprises a second functional stack FS2 having: a first electrode layer El, an airgap GP (formed by selectively removing a sacrificial layer SL), a dielectric layer DL, and a further electrode layer E3, respectively. On top of the respective further electrode layers E3 a cover layer CO is provided. At the location of the capacitive switch CS the cover layer CL is patterned such that the dielectric layer DL and the further electrode layer E3 are mechanically suspended above the airgap GP. Optionally, the sacrificial layer SL at the location of the capacitive switch CS may intentionally not be completely removed during a step of forming the airgap GP. In that case, the sacrificial layer SL also fulfills the function of mechanical suspension of the switch. For the sake of clarity contact openings CO in the cover layer CL have been illustrated in Fig. 2. Such contact holes serve the purpose of contacting the respective functional components TC, CS using interconnect technology. Interconnect technology is considered as known to the person skilled in the art. Additional interconnecting layers (not shown) may be added to the structure for the purpose of interconnecting the structures. Alternatively, existing layers such as the electrode layers El, E3 themselves may be used for this purpose (for example in other planes than the plane of the cross-sectional view of Fig. 2.

In Fig. 2, the functional components are, in this example, put on a high-ohmic silicon substrate. The advantage of a high-ohmic substrate is reduced capacitive coupling to the substrate and lower losses. The electrode layers El, E3 may comprise materials such as: aluminum, copper, platinum, gold, tungsten, titanium, IrO₂, RuO₂, SrRuO, Pd, TiN, Ni(Si) and alloys. Aluminum and tungsten are preferably not to be used before ferroelectric material processing (due to high temperature, oxygen environment), but they can be used for all metal layers after the ferroelectric layer has been provided. The dielectric layer DL may comprise a high dielectric constant thin film, for example (Ba_xSri__x)Tiθ3, wherein O≤x≤l. This dielectric material, also called perovskite material, is a ferroelectric material and falls within "area 4" in Fig. 1. This dielectric materials is tunable (relative dielectric constant may be varied) by applying an external electric DC field or by setting a temperature of the material. Furthermore, this dielectric material has piezoelectric properties.

The high dielectric constant (Ba,Sr)Tiθ3 thin film makes it possible to keep dimensions of the capacitive switch CS small. On the other hand, the dielectric layer DL based on perovskite material shows higher leakage currents compared to the conventionally used low dielectric constant materials, such as silicon nitride (SiN). In this way charging of the switches, due to numerous switching cycles, is reduced and consequently the reliability of the switches is improved. Another special feature of the (Ba,Sr)Tiθ3 thin film material is that it shows a high relative permittivity, and non-linear behavior in terms of the relative permittivity behavior. This provides for a high tuning when an external DC field is applied. Furthermore the material can be optimized to achieve low dielectric losses.

The above mentioned combination of properties make it possible to advantageously integrated the capacitive switch CS with a tunable capacitor TC on a single substrate, making use of the same (Ba,Sr)Tiθ3 thin film and, optionally, also the electrode layers El, E3. The functional components in Fig. 2, show great resemblance in terms of their respective functional stacks FSl, FS2. This has the advantage that layers in those functional stacks may be shared / manufactured simultaneously. In the example of Fig. 2 this comprises the electrode layers El, E3 and the dielectric layers DL. An important advantage of sharing layers between different structures/components is that, in the manufacturing process, process steps are saved. On the other hand, sharing layers between different structures also implies that the layer is physically and geometrically substantially the same (at least as far as the layer thickness is concerned). A consequence of that is that physically and geometrical properties of the shared layer may not be optimal for both functional components. The inventors have realized that it is often possible to optimize the layer for only one of the functional components, without severely deteriorating performance of the other. The embodiment illustrated in Fig. 2 is just an example of such optimization. More information about the optimization for the embodiment in Fig. 2 is given in the next paragraphs.

Two devices, a tunable capacitor, and a capacitive switch are to be integrated with a single ferroelectric layer. The monolithic integration of a tunable capacitor TC and a capacitive switch CS is particularly useful for high-frequency applications because less switches are need to provide enough intermediate states between the maximum on/off ratio of the switch. . The maximum capacitance of the capacitive switch determines the lower operating frequency of the switch, depending on the impedance of the application. Most RF applications operate with impedance close to 50 Ohm The maximum capacitance in the closed state of the capacitive switch CS is mainly determined by a small residual air or dielectric gap between the dielectric layer DL and the bottom electrode layer El.

A good performance for the switch CS is achieved, if the on/off capacitance ratio is large. For this the dielectric layer DL should have a high dielectric constant. However, a small air gap, even in the closed state due to surface roughness, will have a strong influence under the following circumstance: t_air > tf_erro/ε_r, wherein t_air is the effective thickness of the air gap in the closed state, and tf_erro is the thickness of the ferroelectric layer with a dielectric constant of ε_r, respectively.

From the above formula it can be derived that for an effective air gap thickness of IOnm or higher (which is easily the case in the closed state), with a relative dielectric constant of 100 for the dielectric layer DL, the thickness of the dielectric layer may reach up to lOOOnm before its capacitance starts to dominate over the air gap.

Typical dielectric layers DL for tunable capacitors TC have a thickness well below lOOOnm in order to reach a high tuning ratio with moderate operating voltage. Thus, the dielectric layer DL can be optimized (in terms of thickness, materials (dielectric constant) or both) for the tunable capacitor, e.g. to achieve high tunability (high tuning ratio) and low loss. The low loss will be advantageous for the capacitive switch CS as well, but is not mandatory as long as the dielectric constant is high enough. A good performance can be reached for both functional components: a good on/off capacitance ratio of the capacitive switch CS and a good tunability and low loss for the tunable capacitor TC. In view of the above, a typical thickness of the dielectric layer is: 50nm to lOOOnm, and preferably between 200nm and 500nm. The dielectric layer DL comprises perovskite materials such as: PZT materials (i.e. PbZri__xT I_xOs), BST materials (i.e. such as Bai__xSr_xTiθ3), and BZN materials, (i.e. BiZnNbOs), all of these materials being doped or undoped. The skilled person may easily find more materials suitable for this purpose, for example in WO02/075780. This document is hereby incorporated by reference._Furthermore, the dielectric layer DL may have been annealed between 400⁰C and 800⁰C. The highest dielectric constant of the here listed materials is obtained when using PZT material, and in particular PbZri__xTi_xθ3, as dielectric material. If this material is doped with for example lanthanum (La) this also leads to lower leakage current. The lowest loss is obtained when using Bai__xSr_xTiθ3 (BST) as dielectric material. In any case for the dielectric layer DL all ferroelectric materials may be used. EP 1,043, 741A2 (M. Klee) contains a longer list of ferroelectric materials and is hereby incorporated by reference. The choice of dielectric materials and dimensions here may be applied to all other embodiments as well. Typical dimensions of the tunable capacitor TC are in the range of 2μm*2μm to 100μm*100μm. The tunable capacitor may be square, round or have any other shape. The capacitive switch CS may have dimensions, which are typically in the order of 20μmx20μm to lOOOμmxlOOOμm. Many variations in the implementation are possible. The person skilled in the art may consult the earlier mentioned references on this matter.

In a further extension of the embodiment of Fig. 2 the capacitive switch CS is also part of a tunable filter or matching network. Such circuits comprise, next to tunable capacitors, inductors (not shown). The inductors can be discrete inductors, which can be mounted, e.g., as SMD components on top of the die close to the capacitive switch CS and the tunable capacitors TC. Alternatively the inductor can be a soldering on an interconnect PCB. Alternatively, the inductors may be integrated on the same substrate Sub as the tunable capacitor TC and the capacitive switch CS. In such integration scheme use can be made of the electrode layers El, E3. Yet, in another alternative a special high conductivity layer could be added to realize the integrated inductors. In other extensions and variations of the invention also other dielectric materials such as PZT, PLZT, and composite materials comprising multiple oxide stacks can be used. The right choice of dielectric material may give high tuning ratio, low hysteresis, large dielectric constant and low loss. Fig. 3 shows a second embodiment of the monolithic device in accordance with the second aspect of the invention. This embodiment of the monolithic device will be discussed in as far as it differs from the previous embodiment. In this embodiment a bulk acoustic resonator BW and a galvanic switch GS are both integrated on the same substrate Sub. The bulk acoustic resonator BW comprises a first functional stack FSl having: a reflector stack RS, a sacrificial layer SL, a second electrode layer E2, a dielectric layer DL, and a third electrode layer E3. The reflector stack RS comprises in this particular example a stack of platinum Pt and silicon oxide layers SiO₂ arranged in an alternating fashion. The function of the reflector stack RS is to reflect the acoustic waves that tend to travel from the bulk acoustic resonator into the substrate Sub. The galvanic switch comprises a second functional stack FS2 comprising: a first electrode layer El, an airgap GP (formed by selectively removing a sacrificial layer SL), a second electrode layer E2, a dielectric layer DL, and a third electrode layer E3.

On top of the respective third electrode layers E3 a cover layer CO is provided. At the location of the galvanic switch GS the cover layer CL is patterned such that the second electrode layer E2, the dielectric layer DL and the third electrode layer E3 are mechanically suspended above the airgap GP. Optionally, the sacrificial layer SL at the location of the galvanic switch GS may intentionally not be completely removed during a step of forming the airgap GP. In that case, the sacrificial layer SL also fulfills the function of mechanical suspension of the galvanic switch. For the sake of clarity contact openings CO in the cover layer CL have been illustrated in Fig. 3. Such contact holes serve the purpose of contacting the respective functional components TC, CS using interconnect technology.

The functional stacks FSl, FS2 in Fig. 3 show great resemblance. Despite the fact that the galvanic switch GS does not need a reflector stack RS, in this embodiment it has been provided with it. A first advantage of this is that the reflector stack RS may be shared amongst both functional components. A second advantage is that the first electrode layer El of the galvanic switch GS can be manufactured in an upper platinum layer Pt of the reflector stack RS. Nevertheless, this is optional. A separate electrode layer may be deposited on the reflector stack RS. In the embodiment of Fig. 2, for the dielectric layer DL a (Ba_xSr i__x)Tiθ3 material was suggested, wherein O≤x≤l. In the embodiment of Fig. 2, the piezoelectric properties of the dielectric material are not used. In contrast thereto, in Fig. 3, the bulk acoustic resonator BW requires such material in order to facilitate the acoustic resonance mode of the component. In other words, in this embodiment of the invention, the claimed combination of tunable and high-k dielectric material (which means ferroelectric materials being also piezoelectric) is particularly advantageous. Bulk-acoustic resonators may now be integrated with practically any kind of functional component. The material choice for the electrode layers and the cover layer may be similar to that of Fig. 2.

A very advantageous embodiment of the invention is obtained if the dielectric layer DL comprises a material which is tunable. This features the manufacturing of a tunable acoustic resonator.

The functional components in Fig. 3, show great resemblance in terms of their respective functional stacks FSl, FS2. The advantages of this aspect have already been discussed in the description of Fig. 2. Typical dimensions of the tunable capacitor TC are in the range of 2μm*2μm to 100μm*100μm. The tunable capacitor may be square, round or have any other shape. The galvanic switch GS may have dimensions, which are typically in the order of 20μmx20μm to lOOOμmxlOOOμm. Many variations in the implementation are possible. The person skilled in the art may consult the earlier mentioned references on this matter. Fig. 4 shows a third embodiment of the monolithic device in accordance with the second aspect of the invention. In this embodiment a bulk acoustic resonator BW and a tunable capacitor TC are integrated on a single substrate Sub. The reflector stack RS of the bulk acoustic resonator BW has been replaced by an airgap GP (formed by selectively removing a sacrificial layer SL), which serves the same purpose. The tunable capacitor TC differs from the tunable capacitor TC of Fig. 2 in that the capacitor is now formed between a second electrode layer E2 and a third electrode layer E3, instead of between a first electrode layer El and a third electrode layer E3. This measure makes the functional stack FS2 of the tunable capacitor TC look more similar to that of the bulk acoustic resonator BW. In order to make it even more similar a sacrificial layer SL is provided underneath the lower electrode layer E2 of the tunable capacitor TC. This layer coincides with the gap GP of the bulk acoustic resonator BW. The material choice for the dielectric layer DL, the electrode layers E2, E3, and the cover layer CL can be in line with that of Figs. 2 and 3.

The functional components in Fig. 4, show great resemblance in terms of their respective functional stacks FSl, FS2. The advantages of this aspect have already been discussed in the description of Fig. 2.

Typical dimensions of the tunable capacitor TC are in the range of 2μm*2μm to 100μm*100μm. The tunable capacitor may be square, round or have any other shape. The bulk acoustic resonator BW may have dimensions, which are typically in the order of 20μmx20μm to lOOOμmxlOOOμm. Many variations in the implementation are possible. The person skilled in the art may consult the earlier mentioned references on this matter.

The embodiments of the monolithic device as illustrated in Figs. 2 to 4 may be manufactured using process technologies having process steps which are well-known to the person skilled in the art. For the manufacturing of those embodiments explicitly mentioned and the ones not explicitly mentioned a generic flow may be given, which may be adapted in case of specific combinations of functional components.

In a first stage of the manufacturing method the substrate Sub is provided with the adhesion layer Adhl deposited thereon. Adhesion layers are known to the person skilled in the art of process technology. In another stage of the manufacturing method the reflector stack RS may be provided. The provision of the reflector stack RS comprises depositing a plurality of platinum layers Pt and a plurality of silicon oxide layers SiO₂ in an alternating fashion. After these steps, the respective reflector stack RS may be patterned. It is not essential that the reflector stack is removed at the location of the functional components which do not require a reflector stack.

In another stage of the manufacturing method the first electrode layer El is deposited and patterned.

In another stage of the manufacturing method the sacrificial layer SL is deposited and patterned. In another stage of the manufacturing method the second electrode layer E2 is deposited and patterned.

In another stage of the manufacturing method the dielectric layer DL is deposited and patterned. In another stage of the manufacturing method the third electrode layer E3 is deposited and patterned.

In another stage of the manufacturing method the cover layer CL is deposited and patterned.

In another stage of the manufacturing method the sacrificial layer SL is selectively etching in order to release respective mechanical structures of the functional components.

Deposition of layers is a technique which is well-known to the person skilled in the art. It may comprise techniques such as: (plasma enhanced or low pressure) chemical vapor deposition ((PE or LP)-CVD), physical vapor deposition (PVD), molecular vapor deposition (MOVCD), atomic layer deposition (ALD), sol-gel deposition combined with high-temperature (RTA) annealing, etc. Patterning of layers is a technique which is well- known to the person skilled in the art. It may be done using lithography and etching steps.

With the generic flow described above, respective layers may be manufactured for the respective functional components simultaneously, or one after another. The flow features the manufacturing of all kinds of functional components together (including the ones explicitly mentioned in this description). In case of a more restrictive selection of the functional components, the flow may be simplified (skipping of processing steps). The person skilled in the art is capable of modifying the generic flow accordingly. It is also possible to modify the sequence of the process steps within the process stages or even to modify the sequence of the process stages, for example to exchange the deposition of the dielectric layer and the sacrificial layer. The sequence of the process steps in the generic flow may be altered, which is in particular true for the patterning steps. Multiple layers may be patterned in a single step, or, alternatively, in a sequence of different subsequent steps each using its own mask. Fig. 5 illustrates an optimization table of a monolithic device in accordance with the invention. In the embodiments of Figs. 2 to 4 only three specific combinations of two different functional components have been illustrated. However, there are many more combinations possible. Also it is possible to combine more than two different functional components. The table of Fig. 5 is meant to illustrate all the possible combinations considering the following functional components: a galvanic switch GS, a capacitive switch CS, a first variant of a tunable capacitor TCl, a second variant of a tunable capacitor TC2, a high-k capacitor HKC, a bulk acoustic resonator BW, a bulk acoustic resonator with mass loading BWM, a film bulk acoustic resonator FBAR, a stacked capacitor SC, and a coil Co. The first column in the table of Fig. 5 specifies respective layer numbers No.

The second column in the table of Fig. 5 illustrates a generic functional stack of layers Lyr comprising of: a substrate Sub, a reflector stack RS, a first electrode layer ELl, a sacrificial layer SL or air gap GP, a second electrode layer EL2, a dielectric layer DL, a third electrode layer EL3, and a cover layer CL. The patterned cells in the table indicate which of these layers are essential for the respective functional component. When the cell has no pattern this means that the respective layer is not essential, but may be left in the functional stack. Alternatively, this layer may be removed, if necessary.

The third column in the table of Fig. 5 specifies possible materials Mat for the respective layers. The substrate Sub may comprise, for example, a silicon body Si with a siliconoxide layer SiO₂ thereon and an (optional) adhesion layer Adhl on the siliconoxide layer SiO₂. However, it can be any kind of substrate as mentioned earlier in this description. Other materials which are mentioned in the third column are: platinum Pt, gold Au, aluminum Al, high-k dielectric material HK, tunable dielectric material Tn, silicon nitride SiN. It must be noted that the invention is not limited to the materials mentioned in Fig. 5. The materials suggested merely serve to illustrate possible embodiments rather than exhaustively listing all possibilities.

The fourth column indicate possible ranges for respective thicknesses of the respective layers. The ranges suggested merely serve to illustrate possible embodiments rather than exhaustively listing all possibilities. The last two rows of the table of Fig. 5 form respective rankings of the functional components. The before last row gives a first ranking Rnkl, which ranks the functional components according to the relevance of the dielectric layer DL for optimal value of a respective performance of the respective functional component. The last row gives a second ranking Rnk2, which ranks the functional components according to the relevance of the electrode layers ELl, EL2, EL3 for optimal performance of the respective functional component. As a matter of fact, both rows show respective weighing factors for each of the functional components.

The rankings may be obtained by comparing respective weighting factors of a selected sub-set of the functional components mentioned in the table. For example, when the bulk acoustic resonator with mass loading BWM is to be mono lit hically integrated with a high-k capacitor HKC, the weighting factors of the first ranking Rnkl are 5 and 2 for the resonator BWM and the capacitor HKC, respectively. This gives the resonator BWM the highest rank in the first ranking Rnkl for the dielectric layer DL, which means that the dielectric layer should be physically and geometrically optimized for the bulk acoustic resonator BWM. Acoustic resonators are demanding functional components. These functional components must be electrically as well as mechanically perform well. Therefore these functional components have the highest optimization priority for that respective layer. Next to the dielectric layer DL, also the electrode layers ELl, EL2, EL3 (or at least the ones used thereof) have an impact on some performance indicators of the functional components. It is observed from Fig. 5 that the respective weighting factors for these layers are different. For example, when a galvanic switch GS is to be integrated with a tunable capacitor of the first variant TCl, the weighing factors of the second ranking Rnk2 are 5 and 2 for the switch GS and the tunable capacitor TCl, respectively. This gives the galvanic switch GS the highest rank in the second ranking Rnk2 for the electrode layers ELl, EL2, EL3(or at least the ones used thereof), which means that the respective electrode layers should be physically and geometrically optimized for the galvanic switch GS. In the case of the galvanic switches the galvanic contact of the electrodes is the most demanding, which dictates the choice of possible materials and geometry. Therefore this functional component has the highest optimization priority for that respective layer.

In order to obtain a ranking of the functional components, important performance indicators per functional component and per respective layer have been identified by the inventors as follows (but this does also depend on the application): all functional components: chip area and cost, wherein: 1) dielectric layer -> loss; 2) electrode layers -> loss; high-k capacitor: 1) dielectric layer -> permittivity / relative dielectric constant; tunable capacitor: 1) dielectric layer -> tuning ratio; electrostatically actuated switch: 1) dielectric layer -> mechanical wear, permittivity; piezoelectrically actuated switch: 1) dielectric layer -> mechanical properties (Youngs modulus), piezoelectric constant; 2) electrode layers: good contact (low resistance, low corrosion, low wear), and acoustic resonators: 1) dielectric: coupling coefficient, loss; 2) electrode layers: low mechanical loss, suitable mechanical impedance.

In the table of Fig. 5 adhesion layers between respective layer Lyr are not explicitely mentioned. It is considered as known to the person skilled in the art when such layers are required.

Also, in the same table, weighting factors of a same value means co- optimization of both layers. This might result in sub-optimal performance of both functional components in case the optimal requirements are contradictory.

In the reflective stack RS which is mentioned in Fig. 5, a parameter n is mentioned which specifies the number of repetitions N of each of the platinum layer and the silicon oxide layer SiO₂. In the column for the bulk acoustic resonator BW, it is illustrated that the sacrificial layer SL may be formed out of the first reflector layer FRL (which is an silicon oxide layer in an embodiment). The first electrode layer ELl may be formed out of the ssecond reflector layer SRL, whereas the reflector stack RS may be formed out of the other reflector layers ORL. It must be noted that what is described in this paragraph is optional. In variations of this description, the respective layers SL, ELl are added to the layers which form the reflector stack RS.

In the columns of the table in Fig. 5 that illustrate functional stacks of the galvanic switch GS, the capacitive switch CS, and the thin film acoustic resonator FBAR, it is specified that the sacrificial layer needs to be (at least partially) removed for forming a gap GP.

The table in Fig. 5 is a tool which helps in the method of manufacturing a monolithic device in accordance with the invention. Even though there are various manufacturing steps required to obtain a monolithic device, an important part of the method comprises the provision of a ranking of the functional components to be integrated and the manufacturing of the layers in common wherein the respective layer is optimized for at least one of the functional components having the highest ranking. The multiple process steps in the method of the invention comprise photolithographic processing steps and deposition steps. The invention thus provides a method of manufacturing a monolithic device comprising multiple process steps. The monolithic device comprises at least two different electrical or electromechanical functional components. Each respective electromechanical functional component is formed by a respective functional stack comprising a plurality of layers. The at least two functional components have a first layer in common. The method in accordance with the invention provides for a monolithic integration of different functional components. In this method layers of the functional stack are reused, which saves process steps, and optimized for optimal performance of at least one of the functional components without jeopardizing the performance of the monolithic device to unacceptable levels. The invention further provides a monolithic device comprising at least two different electrical or electromechanical functional components on a substrate, wherein each respective one of the functional components comprises a respective functional stack with a respective plurality of layers, wherein the functional components are selected from a group comprising: a capacitive switch, a tunable capacitor, a high-k capacitor, a bulk acoustic resonator, a bulk acoustic resonator with mass loading, a film bulk acoustic resonator, a stacked capacitor, and a coil, wherein the respective functional stack of the at least two functional components have a tunable and/or high-k dielectric layer in common. The monolithic device in accordance with the invention features a wider applicability than the known monolithic device because the tunable and/or high-k dielectric layer in respective functional stacks can be better shared between the functional components. Not all piezoelectric materials are tunable and/or high-k and thus not suitable for functional components of other kinds which require a dielectric layer with these properties.

The invention may be applied in a wide variety of application areas, for example in RF-circuit, and in particular in reconfϊgurable front-ends of RF-circuits. A reconfϊgurable RF front-end generally comprises switches, matching networks and bandpass filters. A bandpass filter comprises an LC filter. The invention provides a monolithic device wherein all required functional components are integrated on the same substrate. There are many more application areas where the invention may be used. The invention may be applied in circuitry having one or more band pass filters for band selection of various frequency bands. Also, it may be applied in circuitry having one or more tunable capacitors with one or more inductors to form a multi-pole tunable LC filter or matching network.

Various variations of the device and method in accordance with the invention are possible and do not depart from the scope of the invention as claimed. These variations for example relate to material choice, layer thickness, spatial arrangement of the elements, etc. Also, in the method of manufacturing the monolithic device in accordance with an embodiment of the method of the invention, many alterations are possible. Such alterations fall within the normal routine of the person skilled in the art and do not deviate from the inventive concept here disclosed. The substrate mentioned in this description may also be provided with so- called through-vias or through-substrate vias. Such a feature enables interconnect functional components on different substrates which are stacked. Also, the substrate mentioned in this description may comprise a high ohmic Si substrate, a glass substrate, a ceramic substrates (such as AI2O3), a single crystal substrate (such as sapphire), or combinations thereof.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Throughout the Figures, similar or corresponding features are indicated by same reference numerals or labels.

Claims

CLAIMS:

1. A method of manufacturing a monolithic device comprising multiple process steps, wherein the monolithic device comprises at least two different electrical or electromechanical functional components (GS, CS, TCl, TC2, HKC, BW, BWM, FBAR) on a substrate (Sub), wherein each respective one of the functional components (GS...FBAR) is formed by a respective functional stack (FSl, FS2) comprising a respective plurality of layers, wherein the at least two functional components (GS... FB AR) have a first layer (DL, El, E2, E3) in common, the method comprising steps of: providing a first ranking of the functional components (GS...FBAR) for the first layer (DL, El, E2, E3) which is based on a plurality of respective performance indicators for each respective one of the functional components (GS...FBAR) in operational use of the monolithic device, wherein the plurality of respective performance indicators depends on respective physical and geometrical properties of the first layer (DL, El, E2, E3) according to respective dependencies; providing the substrate (Sub), and - forming the at least two functional components (GS... FB AR) on the substrate

(Sub), wherein the multiple process steps comprise a step of manufacturing the first layer (DL, El, E2, E3) such that it is physically and/or geometrically optimized for at least a single one of the functional components (GS... FB AR) selected on the basis of a highest rank in the first ranking.

2. The method as claimed in claim 1, wherein the at least two functional components have a second layer (DL, El, E2, E3) in common, the method further comprising a step of: - providing a second ranking of the functional components (GS...FBAR) for the second layer (DL, El, E2, E3) which is based on a further plurality of respective performance indicators for each respective one of the functional components (GS...FBAR) in operational use of the monolithic device, wherein the further plurality of respective performance indicators depend on respective physical and geometrical properties of the second layer (DL, El, E2, E3) according to further respective dependencies; wherein the multiple process steps further comprise a further step of manufacturing the second layer (DL, El, E2, E3) such that it is physically and/or geometrically optimized for at least a further single one of the functional components (GS...FBAR) selected on the basis of a further highest rank in the second priority ranking.

3. The method as claimed in claim 1 or 2, wherein the at least two functional components to be formed are selected from a group comprising: a capacitive switch (CS), a tunable capacitor (TCl, TC2), a high-k capacitor (HKC), a bulk acoustic resonator (BW), a bulk acoustic resonator (BWM) with mass loading, a film bulk acoustic resonator (FBAR), a stacked capacitor (SC), and a coil (Co).

4. The method as claimed in any one of the preceding claims, wherein the first layer (DL) is a dielectric layer.

5. The method as claimed in claim 4, wherein: i) respective weighting factors have been assigned to respective ones of the functional components indicative for their relative importance, ii) the first ranking is determined by a magnitude of the respective weighting factors, and iii) the highest rank is associated with the respective component having the highest weighting factor.

6. The method as claimed in any one of the preceding claims, wherein the second layer (El, E2, E3) is an electrode layer.

7. The method as claimed in claim 6, wherein: i) respective further weighting factors have been assigned to respective ones of the functional components indicative for their relative importance, ii) the second ranking is determined by a magnitude of the respective further weighting factors, and iii) the further highest rank is associated with the respective component having the highest further weighting factor.

8. A monolithic device comprising at least two different electrical or electromechanical functional components (GS, CS, TCl, TC2, HKC, BW, BWM, FBAR) on a substrate (Sub), wherein each respective one of the functional components comprises a respective functional stack (FSl, FS2) with a respective plurality of layers, wherein the at least two functional components are selected from a group comprising: a capacitive switch (CS), a tunable capacitor (TCl, TC2), a high-k capacitor (HKC), a bulk acoustic resonator (BW), a bulk acoustic resonator (BWM) with mass loading, and a film bulk acoustic resonator (FBAR), wherein the respective functional stack of the at least two functional components () have a tunable and/or high-k dielectric layer () in common.

9. The monolithic device as claimed in claim 8, wherein the tunable and/or high- k dielectric layer (DL) is both tunable and high-k.

10. The monolithic device as claimed in claim 9, wherein the tunable and/or high- k dielectric layer (DL) comprises a ferroelectric material.

11. The monolithic device as claimed in any one of claims 8 to 10, wherein the functional components comprise the tunable capacitor (TCl, TC2) and the capacitive switch (CS), wherein the dielectric layer (DL) comprises material selected from a group comprising: perovskite material such as PZT dielectric material, BST dielectric material, and BZN dielectric material, and wherein the dielectric layer () has a thickness in a range between 50 and lOOOnm, and preferably between 200nm and 500nm.

12. The monolithic device as claimed in any one of claims 8 to 10, wherein the functional components comprise at least one of the acoustic resonators (BW, BWM, FBAR), and further comprises at least one of a capacitive switch (CS) and a tunable capacitor (TCl, TC2), wherein the dielectric layer (DL) comprises material selected from a group comprising: perovskite material such as PZT dielectric material, BST dielectric material, and BZN dielectric material, and wherein the dielectric layer () has a thickness in a range between 50 and lOOOnm, and preferably between 200nm and 500nm.

13. A base station for a communication system, the base station comprising the monolithic device as claimed in any one of claims 8 to 12.

14. A hand-held apparatus for a communication system, the hand-held apparatus comprising the monolithic device as claimed in any one of claims 8 to 12.