WO2009145458A9 - Concertisseur de commutation relié en parallèle utilisant le partage de charge - Google Patents

Concertisseur de commutation relié en parallèle utilisant le partage de charge Download PDF

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WO2009145458A9
WO2009145458A9 PCT/KR2009/001663 KR2009001663W WO2009145458A9 WO 2009145458 A9 WO2009145458 A9 WO 2009145458A9 KR 2009001663 W KR2009001663 W KR 2009001663W WO 2009145458 A9 WO2009145458 A9 WO 2009145458A9
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Prior art keywords
converter
switching
capacitor
voltage
switching control
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PCT/KR2009/001663
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English (en)
Korean (ko)
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WO2009145458A3 (fr
WO2009145458A2 (fr
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김동희
김정원
이재훈
최석문
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주식회사 실리콘마이터스
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Publication of WO2009145458A2 publication Critical patent/WO2009145458A2/fr
Publication of WO2009145458A3 publication Critical patent/WO2009145458A3/fr
Publication of WO2009145458A9 publication Critical patent/WO2009145458A9/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Definitions

  • the present invention relates to a switching converter, and in particular, by using a charge sharing method, continuous conduction is controlled by controlling the paralleled converters to operate in a discontinuous conduction mode (DCM) while maintaining a constant phase difference between the paralleled converters.
  • DCM discontinuous conduction mode
  • the present invention relates to a parallel-connected switching converter suitable for solving a problem in which switching loss and switching noise increase due to a reverse recovery phenomenon when operating in a mode).
  • Converters are generally known as step-up converters, step-down converters or inverse converters. These converters can be classified as Buck converters, Boost converters, Buck-Boost converters, etc., and are used for boost converters and single-ended primary inductance converters (SEPICs). Topologies are generally known in pulsed power supplies.
  • Converters are often designed and used to connect large numbers of them in parallel to provide large power.
  • the present invention provides a charge / discharge circuit as compared to the synchronization signal generator of US 5,905,369.
  • FIG. 1 is a block diagram of a conventional interleaved switching converter, showing the configuration of US 5,905,369.
  • the above-described US 5,905,369 invention corresponds to an interleaved switching converter having a variable switching frequency.
  • the first driving signal having a predetermined duty ratio with the first switching means SW1 and 12 is provided.
  • a first switching converter (10) having an output and a first control driver (14) for driving said first switching means (SW1, 12); Outputting a second driving signal having a predetermined on-period and second switching means (SW2, 22) connected in parallel with the first switching converter (10), and driving the second switching means (SW2, 22).
  • a second switching converter 20 having a second control driver 24; First and second capacitors (not shown); The second capacitor is discharged when the first capacitor is charged and discharged while the first capacitor is charged and discharged when the first driving signal is started. The second capacitor is charged when the first capacitor is discharged. It is composed of a charge and discharge circuit (not shown in the drawing), the output of the second drive signal of the second control driver 24 compares the voltages of the first and second capacitors by the inversion of the positive voltage difference It is an interleaved switching converter provided at the same time and provided with means for discharging to near zero voltage or near zero voltage within a period from the detection of inversion of the positive voltage difference to the start of charging at the time of discharging the first and second capacitors.
  • DC (1) is an input voltage
  • Co (2) is an output capacitor
  • Load (3) is a load
  • Voltage detector 4 is a voltage detector.
  • L1, L2 and L3 are inductors made of choke coils
  • SW1 and SW2 (12 and 22) are switches made of transistors
  • D1 and D2 (12 and 22) are diodes
  • CS1 and CS2. 15 and 25 are current detection units.
  • FIG. 2 is a detailed configuration diagram of the second control driver in FIG. 1, wherein reference numeral 24-1 is a D flip-flop, 24-2 is an inverter, 24-3, 24-4 is a transistor, and 24-5 is a Logical AND, 24-6 is a transistor, 24-7 is an inverter, 24-8 is a negative logic device, 24-9, 24-10, 24-11 is a transistor, 24-12 is a comparator, 24-13 is an inverter, 24-14 is an EX_NOR device, 24-15 is a comparator, and 24-16 is an RS flip-flop.
  • 24-1 is a D flip-flop
  • 24-2 is an inverter
  • 24-3, 24-4 is a transistor
  • 24-5 is a Logical AND
  • 24-6 is a transistor
  • 24-7 is an inverter
  • 24-8 is a negative logic device
  • 24-11 is a transistor
  • 24-12 is a comparator
  • 24-13 is an inverter
  • 24-14 is an EX_NOR device
  • Boost 1 the first switching converter 10, switches on when the L1 current becomes zero and detects the SW1 current.
  • the control signal Vdr1 is turned off.
  • Boost 2 which is the second switching converter 20, receives SW1 control signal Vdr1 of Boost 1 and turns on SW2 by 180 degrees out of phase with Vdr1 using a charge / discharge circuit. Generate a control signal Vdr2 to turn off.
  • Figure 3 is a waveform diagram showing the operation of each part in Figures 1 and 2
  • Figure 4 is an operational waveform diagram showing a problem of the conventional interleaved switching converter.
  • Vdr1 is a waveform of the first drive signal output from the first control driver 14
  • Vc1 and (3) Vc2 are waveforms showing charge and discharge
  • Vdr2 is The waveform of the second drive signal output from the second control driver 24,
  • Ii1 is the waveform of the input current input to the first control driver 14
  • Ii2 is the waveform of the second control driver 24 This is the waveform of the input current.
  • the control driver # 2 receives a Vdr1 signal and receives a current source.
  • C1 and C2 are charged and discharged using I1, I2, I3, and I4 to generate a Vdr2 signal that turns on SW2 at the point where Vc1 and Vc2 are equal. Therefore, according to the aforementioned US 5,905,369, when two converters are connected in parallel, when I1, I2, I3, and I4 are the same and C1 and C2 are the same, Vdr1 and Vdr2 are 180 degrees as shown in the waveform diagram shown in FIG. The phase difference can be maintained.
  • Boost2 does not detect the point where the current of L2 becomes zero unlike Boost1. If the device value of L2 is larger than L1, the slope of the current is lowered so that L2 SW2 is turned on before the current becomes zero, and it operates as CCM as shown in the waveform diagram of FIG. 4. In the case of operating as CCM, switching loss and switching noise of SW2 increases due to the reverse recovery of D2. Will be.
  • boost2 also needs a circuit that detects the point where the L2 current becomes zero. If SW2 is turned on at the point where L2 current becomes zero even under conditions where L1 and L2 are not equal, the period of boost1 and boost2 will not match. Therefore, a problem arises in that the ripple of the input current and the output current increases, and a circuit for controlling the period and phase of Vdr1 and Vdr2 is required to be the same.
  • the present invention has been proposed to solve the above-mentioned general problems.
  • the present invention is a charge sharing method using both of the parallel connected converters while maintaining a constant phase difference of the parallel connected converter DCM (discontinuous conduction mode)
  • the main technical problem is to provide a parallel-connected switching converter that can solve the problem that switching loss and switching noise increase due to reverse recovery phenomenon when operating in continuous conduction mode (CCM) by controlling to operate at the same time. .
  • a parallel-connected switching converter that adjusts off to maintain a constant phase difference between converters, comprising: a first switching controller for generating a first switching control signal for controlling the turn-on and turn-off of the first converter; A first capacitor and a second capacitor, and conducting charge sharing between the first capacitor and the second capacitor by conducting the first capacitor and the second capacitor according to the first switching control signal of the first switching controller.
  • a synchronization signal generator for adjusting a voltage of the first capacitor and generating a synchronization signal having a predetermined phase difference in synchronization with the first switching control signal using the voltage of the first capacitor; And a second switching controller for generating a second switching control signal according to the synchronization signal generated by the synchronization signal generator and controlling the turn-on and turn-off of the second converter.
  • the synchronization signal generator is more specifically, a first capacitor; A second capacitor connected to the first capacitor through a switch element and connected to enable charge sharing with the first capacitor by being closed (ON) of the switch element; A comparator configured to generate a synchronization signal by comparing the voltage of the first capacitor with a reference voltage; And a charge / discharge unit connected to the first capacitor to charge or discharge the first capacitor by the synchronization signal and the first switching control signal. More preferably, the synchronization signal is generated.
  • the unit may further include a short pulse generator for receiving the first switching control signal and converting the short switching pulse into a short pulse having a shorter HIGH period than the first switching control signal.
  • the present invention as described above may further include a technical configuration for matching the period of the synchronization signal and the second switching control signal generated as described above, for this purpose, the second switching control unit, the second switching control A phase comparator for receiving a feedback signal and comparing a phase of the sync signal generated by the sync signal generator with a phase of the second switching control signal to output a phase error according to a phase difference; A control voltage adjusting unit which generates a driving control voltage by adjusting a reference control voltage according to the phase error output from the phase comparing unit; And a switching control signal generator configured to generate a second switching control signal by using the driving control voltage generated by the control voltage regulator.
  • the reference control voltage used in the control voltage adjusting unit as described above it is preferable to use a voltage adjusted so that the detected voltage is equal to the reference voltage based on the voltage detected by the voltage detector installed in the output terminal.
  • a current mode pulse width modulation (PWM) method for controlling the converter switching time by detecting a current flowing through the converter or using a reference voltage source The voltage mode PWM method of controlling the switching time point by comparing the driving control voltage can be used. That is, in the present invention, the switching control signal generation unit compares the driving control voltage generated by the control voltage generation unit with the voltage applied to the switching sensing resistor by the current passing through the converter switch included in the second converter.
  • a current mode PWM method for generating a switching control signal, or further includes a ramp generator for generating a ramp waveform, and compares the driving control voltage generated by the control voltage generator with the ramp voltage to generate a second switching control signal. It is also possible to apply a voltage mode PWM method to generate.
  • the first zero current detector for detecting whether the current flowing into the first converter is zero; And a second zero current detector for detecting whether the current flowing into the second converter becomes zero, wherein the first and second switching controllers respectively supply inflow currents from the first and second zero current detectors.
  • the first and second switching controllers respectively supply inflow currents from the first and second zero current detectors.
  • the parallel-connected converters are controlled to operate in a discontinuous conduction mode (CCM) while maintaining the phase difference of the parallel-connected converters constant. It is possible to solve the problem that the switching loss and the switching noise are increased by the reverse recovery phenomenon that occurs when operating in the).
  • CCM discontinuous conduction mode
  • FIG. 1 is a block diagram of a conventional interleaved switching converter.
  • FIG. 2 is a detailed configuration diagram of the second control driver in FIG. 1.
  • FIGS. 3 is a waveform diagram showing the operation of each part in FIGS.
  • FIG. 4 is an operation waveform diagram showing a problem of a conventional switching converter.
  • FIG. 5 is a block diagram of a switching converter according to an embodiment of the present invention.
  • FIG. 6 is a detailed configuration diagram of the first switching control unit in FIG. 5.
  • FIG. 7 is a detailed configuration diagram of the voltage detector in FIG. 5.
  • FIG. 8 is a detailed configuration diagram of the second switching control unit in FIG. 5.
  • FIG. 9 is a detailed configuration diagram of a synchronization signal generator in FIG. 8.
  • FIG. 10 is a timing chart of the waveform of each signal in the second switching controller of the present invention.
  • FIG. 11A is a detailed configuration diagram showing another configuration example of the synchronization signal generator in FIG. 8, and FIG. 11B includes a synchronization signal generator implemented as in FIG. A timing chart of the waveforms of the signals in the second switching controller.
  • FIG. 12 is a block diagram of a switching converter according to another embodiment of the present invention.
  • FIG. 13 is a detailed configuration diagram of the first switching control unit in FIG. 12.
  • FIG. 14 is a detailed configuration diagram of the second switching control unit in FIG. 12.
  • 15 is a block diagram illustrating a parallel-connected switching converter when two or more converters are connected in parallel according to another embodiment of the present invention.
  • FIG. 16 is a timing chart for the waveform of each signal in the embodiment shown in FIG.
  • 17 is a block diagram illustrating a parallel-connected switching converter when two or more converters are connected in parallel according to another embodiment of the present invention.
  • FIG. 18 is a timing chart for the waveform of each signal in the embodiment shown in FIG.
  • FIG. 19 is a block diagram showing a parallel-connected switching converter using an AC power supply and a current mode PWM according to another embodiment of the present invention.
  • FIG. 20 is a block diagram illustrating a parallel-connected switching converter using an AC power supply and a voltage mode PWM according to another embodiment of the present invention.
  • first switching control unit 200 second converter
  • control voltage regulator 247 switching control signal generator
  • 5 to 13 show a first embodiment of the parallel-connected switching converter of the present invention, which is supplied with DC power as the converter input voltage, uses current mode PWM, An example of using a converter is shown.
  • FIG. 5 is a block diagram of a parallel-connected switching converter using a current mode PWM according to an embodiment of the present invention.
  • the parallel-connected switching converter provided by the present invention is basically a power input 101. It can be seen that a plurality of converters including the first converter 100 and the second converter 200 are connected in parallel.
  • the converter exemplifies a boost converter which is a kind of a switching mode power supply (SMPS) having a boost circuit so as to obtain a large output voltage compared to an input voltage.
  • SMPS switching mode power supply
  • Other types of converters can be applied without particular limitations.
  • the first converter 100 and the second converter 200 are basically inductors L1 and L2, diodes D1 and D2, switches 120 and 220, and filter capacitors.
  • C0 C0
  • MOSFETs may be most preferably used as the switch 120 and 220 elements.
  • other types of transistor elements such as BJT and IGBT may be used in some cases.
  • the present invention relates to a technique for reducing the ripple of the input current and the output current by allowing a plurality of converters connected in parallel as described above to have a switching operation with a constant phase difference, the present invention as described above
  • the most important technical feature is to apply a method of charge sharing to generate a control signal having a constant phase difference even when the switching frequency is varied.
  • the present invention includes a synchronization signal generator 244 which generates a synchronization signal having a predetermined phase difference while synchronizing with the first switching control signal Vdr1 of the first converter by charge sharing.
  • the generating unit 244 basically includes a first capacitor C1 and a second capacitor C2, and the first capacitor C1 and the first capacitor C1 according to the first switching signal Vdr1 of the first switching controller 140.
  • the second capacitor C2 conducts to regulate the voltage of the first capacitor through charge sharing between the first capacitor and the second capacitor, and the voltage Vc1 of the adjusted first capacitor C1 is adjusted as described above. Is synchronized with the first switching control signal Vdr1 to generate a synchronization signal having a constant phase difference.
  • the synchronization signal generator 244 is a first capacitor connected in parallel Charge and discharge unit (244-10) connected to (C1) and the second capacitor (C2), the first capacitor (C1) to charge / discharge the first capacitor (C1) and / or the second capacitor (C2), And a comparator 244-1 generating the synchronization signal Sync by comparing the voltage of the first capacitor C1 with a reference voltage.
  • the first capacitor (C1) and the second capacitor (C2) is configured to be selectively connected by an external control signal by being connected through the switch element 244-6 as shown, wherein the first The switch element 244-6 connecting the first capacitor C1 and the second capacitor C2 is turned on / off by the first switching control signal Vdr1 of the first control driver 110 for a predetermined time. It is possible to control the voltage of the first capacitor C1 by sharing charge.
  • the short pulse generator 244-2 adjusts the duty ratio of the first switching control signal Vdr1 to high. It is more preferable in terms of phase difference control because it is possible to arbitrarily control the charging time and the amount of charge of the second capacitor C2 when converting to a short pulse SP having a short duration of HIGH.
  • the voltage Vc1 applied to the first capacitor C1 and the predetermined reference voltage Vref are applied. Is compared through the comparator 244-1 to generate a synchronization signal Sync when the signal level becomes HIGH when the two voltages are the same, and outputs it as a signal for adjusting the second switching control signal Vdr2.
  • the sync signal Sync generated as described above may be input to the charge / discharge unit 244-10 to be used as a signal for controlling charge / discharge operations of the capacitors C1 and C2.
  • the charge / discharge unit 244-10 is connected to one end of the first capacitor C1 in the synchronization signal generator 244 of the present invention as shown in FIG. It is a component to charge and discharge electric charges to the two capacitors (C2).
  • the charging and discharging unit 244-10 may operate, for example, as the charging current power source I1 and the discharging current power source I2 and the charging and discharging current power sources I1 and I2 as in the illustrated embodiment.
  • an RS flip-flop 244-3 for controlling the charge / discharge unit 244-10.
  • the charge / discharge unit 244-10 is converted into a sync signal and a short pulse generated by the comparator 244-1.
  • the charging / discharging operation can be controlled by the first switching control signal SP.
  • the synchronization signal generator 244 is illustrated in a form included in a circuit of the second switching controller 240 without separately configuring a circuit for simplifying the circuit. It is also possible to implement as a circuit separate from the two switching control unit 240 separately.
  • the second converter 200 when controlling the turn-on and turn-off of the second converter 200, the second converter 200 also detects a time when the current Ii2 flowing in the second inductor L2 becomes zero. And a second zero current detector 210 for turning on and then turning on after the inflow current becomes zero, so that the second converter 200 performs DCM operation similarly to the first converter 100.
  • the first switching controller 140 included in the first converter 100 electromagnetically couples the first inductor L1 element generally provided at the power input terminal of the boost circuit.
  • the first induction coil L3 is further provided to constitute a first zero current detector 110 capable of detecting an inflow current by the voltage Vzcd1 induced in the first induction coil L3.
  • the first switching controller 140 receives the Vzcd1 signal, compares it with a predetermined reference voltage Vth, and at the moment when the Vzcd1 signal falls below the reference voltage Vth.
  • the converter switch is turned on by determining that the inflow current is zero and making the first switching control signal (hereinafter, Vdr1 signal) high.
  • the first switching controller 140 outputs the voltage Vi1 applied to the switching sensing resistor CS1 by the turn-on of the converter switch and the voltage detector 104 installed at the power output terminal.
  • the converter switch is turned off by making the Vdr1 signal low when the Vi1 voltage rises above the Ve voltage in response to the reference control voltage Ve.
  • the voltage detector 104 detects the output voltage V0 using the resistor dividers R1 and R2 as shown in FIG. 7, and the reference control voltage Ve so that the detected voltage becomes the reference voltage Vo_Ref.
  • the feedback is supplied to the first switching controller 140 and the second switching controller 240 by adjusting.
  • the second switching controller 240 the voltage is induced by the second induction coil L4 of the second zero current detector 210.
  • the second switching control signal hereinafter referred to as the 'Vdr2 signal'
  • the switch sensing voltage Vi2 caused by the current passing through the converter switch is greater than or equal to the drive control voltage Vc.
  • the Vdr2 signal goes low.
  • the present invention when turning on the second converter, unlike the conventional parallel-connected switching converter detects the time when the current becomes zero in the second converter 200 as well as the first converter 100. When the zero current is detected, the converter switch is turned on so that both the first converter and the second converter operate as DCM. Also, in the present invention, when the current of the second converter becomes zero, the first switching control signal Vdr1 controls the operation of the first converter 100 in the case where the periods between the converters are not matched by turning on the switch.
  • an operation process of controlling the second converter by the synchronization signal generator 244 and the synchronization signal generated by the synchronization signal generator 244 is the most characteristic configuration of the present invention. Referring to 10 in more detail as follows.
  • the synchronization signal generator 244 receives a Vdr1 signal and converts it into a short pulse SP having a short HIGH period through the short pulse generator 244-2.
  • the Vdr1 signal (that is, the SP signal) converted into the short pulse as described above turns on the switch 244-6 connecting the first capacitor C1 and the second capacitor C2, and at the same time, the RS flip-flop S44-. 3) the charging switch 244-4 connected to the reset terminal of the charging current source I1 and the first capacitor C1 is turned on, and the switch 244-5 connected to the discharge current source I2 is turned off. .
  • capacitor switch 244-6 goes OFF and switch 244-4 remains ON because the output of RS flip-flop 244-3 does not change. Therefore, in this state, the charging current source I1 continuously charges only the first capacitor C1, so that the voltage Vc1 applied to the first capacitor C1 continues to rise, and the second capacitor C2 stops charging by turning off the capacitor switch 244-6. The final voltage at the moment the switch is broken is maintained. (Section 'b' in the waveform diagram of Fig. 10)
  • the comparator CMP1 signal becomes HIGH and the synchronization signal (hereinafter referred to as a 'sync signal') is made high.
  • the Sync signal generated as described above is output to the phase comparator 245 to be described later and input to the SET terminal of the flip-flop 244-3. Accordingly, the charge switch 244-4 is turned off and the discharge switch 244-5 is turned off. Will light up. As described above, when the discharge switch 244-5 is turned on, the discharge current source I2 discharges C1. As a result, the Vc1 voltage continuously decreases and the Sync signal falls back to LOW. ('C' section in the waveform diagram of Figure 10)
  • Vdr1 and Sync have a phase difference of 180 degrees, and by adjusting I1 and I2, C1 and C2, the phase difference can be freely adjusted to an arbitrary value. .
  • FIG. 11 illustrates another implementation manner of the synchronization signal generator 244 of the present invention as described above.
  • the terminal and the terminal of the RS flip-flop are switched so that the charge switch 244-4 is turned on by the sync signal to start charging to the first capacitor C1, and the discharge switch 244 is performed by the short pulse SP.
  • the charge switch 244-4 is turned on by the sync signal to start charging to the first capacitor C1
  • the discharge switch 244 is performed by the short pulse SP.
  • -5 is turned on to discharge C1.
  • FIG. 11B shows signal waveforms for the respective parts of the parallel-connected switching converter shown in FIG. 11A, and each waveform shown in FIG. 11B is shown in FIG. In comparison with, it can be seen that the waveforms of (1) Vc2, (2) Vc1 and (3) Vref are inverted only up and down in the waveform of FIG.
  • the sync signal generated by the sync signal generator 244 has a phase difference of 180 degrees with the switching control signal Vdr1 of the first converter, and once such a sync signal (Sync) is secured, the second sync signal is used.
  • Controlling the switching control signal Vdr2 of the converter to generate a signal having a constant phase difference from Vdr1 can be relatively easily implemented at the level of those skilled in the art.
  • a circuit for synchronizing the period of Vdr2 to the Sync signal using phase comparison will be described as an example of the circuit for controlling the Sync signal and Vdr2 to be synchronized.
  • the sync signal generated by the sync signal generator 244 is input to the phase comparator 245 to control the Vdr2 signal to be synchronized with the sync signal. That is, the phase comparator 245 receives the second switching control signal Vdr2 as a feedback input as shown in FIG. 8, and compares the phases of the sync signal and the Vdr2 signal input from the sync signal generator 244 to Vdr2. Phase error signal is generated and output depending on whether the signal is in phase lag or phase lead.
  • the phase comparison unit functions similar to the 74HC4046 phase lock loop (PLL).
  • phase error generated by the phase comparator 245 is input to the control voltage controller 246, and the control voltage controller 246 is supplied from the phase comparator 245 to match the phase of Vdr2 and Sync. Based on the input phase error, the predetermined reference control voltage Ve is adjusted to generate a new driving control voltage Vc.
  • the control voltage controller 246 lowers the Vc voltage by adjusting the Ve voltage in response to the phase delay signal in order to increase the frequency.
  • the Vc voltage is increased by adjusting the Ve voltage to decrease the frequency.
  • the reference control voltage Ve used in the control voltage adjusting unit 246 may preferably be a voltage output from the voltage detecting unit 104 connected to the power output terminal. Referring to FIG. Since the above description has been made, repeated descriptions will be omitted.
  • the switching control signal generation unit 247 of FIG. 8 the second switching control for driving the switch of the second converter 200 based on the driving control voltage Vc generated by the control voltage adjusting unit 246 as described above. Generate the signal Vdr2.
  • the switching control signal generator 247 compares the driving control voltage Vc input from the control voltage adjusting unit 246 with a predetermined turn-off reference voltage Vi2 to generate an RS flip-flop 243. ) To turn off the second converter switch SW2 by making the Vdr2 signal low.
  • Vdr2 is compared to the Sync signal by phase comparison between the Sync signal following the Vdr1 signal and the second switching control signal Vdr2.
  • the period of V2 rises as soon as the same as Vc, resulting in a shorter period of Vdr2.
  • the voltage of Vc is higher because Vdr2 is faster in phase than the Sync signal, The point at which Vc becomes equal to Vc is delayed, and the period of Vdr2 becomes longer, thereby automatically synchronizing with Vdr1.
  • the first switching controller 140 may provide a ramp signal. It is provided with a ramp generator 144 that generates, and compares the output voltage Vr signal of the ramp generator 144 and the voltage detector voltage Ve instead of the switching sensing voltage Vi1 to determine the time to make the Vdr1 signal from HIGH to LOW Able to know.
  • the second switching controller 240 compares the output voltage Vr signal of the ramp generator 248 with the driving control voltage Vc instead of Vi2 to determine a time point at which the Vdr2 signal is made from HIGH to LOW. .
  • the other parts operate as in the case of Figs. 5 to 11 using the current mode PWM, and the repetitive description thereof will be omitted.
  • the present invention is not limited thereto, and in the case where three or more converters are connected in parallel, the phase difference between the converters can be controlled in a similar manner.
  • 15 to 18 show an example using three or more converters 100 to 300 as compared with the first embodiment described above.
  • the second switching controller 240 is not configured as a separate circuit to simplify the circuit in configuring the second synchronization signal generator and the third synchronization signal generator.
  • the second synchronous signal generator and the third synchronous signal generator are shown in the drawings. Not shown separately.
  • the basic circuits of the second switching controller 240 and the second synchronous signal generator are two converters as described above. Is the same as when connected in parallel, and in the same circuit as shown in FIG. 10 in the synchronizing signal generation unit (included in the second switching control unit), if I1 is doubled to I2, the second converter as shown in the waveform of FIG. Is operated while maintaining a 120 degree phase difference with the first converter.
  • the third switching controller 340 when the third switching controller 340 also receives the Vdr2 signal and operates in the same manner, the third converter 300 operates while maintaining a 120 degree phase difference from the second converter 200. As a result, the three converters The module operates while maintaining a 120 degree phase difference.
  • a k-synchronous signal generation unit including a first capacitor and a second capacitor and generating a synchronization signal by charge sharing as described above for the control driving of the k-th converter, the k-synchronous signal generation
  • the controller shares the charges of the first capacitor and the second capacitor with the k-1 switching control signal for a predetermined time to adjust the voltage of the first capacitor and the synchronization signal based on the voltage of the first capacitor. It is configured to generate.
  • the k-1 th when the N converters are connected in parallel, the k-1 th based on the k-1 switching control signal of the adjacent k-1 switching control unit in generating the synchronization signal in each converter
  • the technical feature is that the k-th synchronizing signal having a predetermined phase difference with the switching control signal is generated and the signal for synchronizing control of the k-th converter is generated using the k-th synchronizing signal.
  • 17 and 18 show an example implemented in a somewhat different manner from the third embodiment shown in FIG. 15 in the case where three converters are connected in parallel.
  • the circuit of the second switching controller 240 is basically the same as that of FIG. 15, but the third synchronization signal generator included in the third switching controller 340 is different from the case of FIG. 15.
  • the signal of Vdr1 is input and generates a signal having synchronization with the first converter 100 while having a constant phase difference.
  • the second synchronous signal generator makes I1 twice the I2
  • the third synchronous signal generator makes I2 twice the I11
  • the second converter makes a 120 degree phase difference from the first converter.
  • the third converter operates while maintaining a phase difference of 240 degrees with the first converter. In this way, the three modules operate with a 120-degree phase shift.
  • the above method may be applied even when three or more N converters are connected in parallel.
  • a k-synchronous signal generation unit including a first capacitor and a second capacitor and generating a synchronization signal by charge sharing as described above for the control driving of the k-th converter, the k-synchronous signal generation The unit is configured to receive the first switching control signal Vdr1 of the first switching control unit to adjust the voltage of the first capacitor based on the Vdr1 signal and generate the synchronization signal based on the voltage of the first capacitor in generating the synchronization signal.
  • the first switching control signal Vdr1 of the first switching control unit is commonly received in generating the synchronization signal in each converter, and the synchronization signal is based on the Vdr1 signal.
  • the technical characteristics of the method are to generate the N, and according to this method, the N converter modules can operate while maintaining a constant phase difference from each other.
  • the converter input voltage is a DC voltage, and the same may be controlled in the case of an AC power source.
  • an input voltage is changed from a DC power source to an AC power source, and a BD (bridge diode) 105 is added as a DC power supply unit for converting an AC power source to a DC power source, that is, a power factor.
  • BD bridge diode
  • the input voltage described above is exactly the same as for direct current.
  • a buck or other type of switching mode power supply (SMPS) topology generates a synchronization signal using charge sharing as described above and controls a plurality of converters using the same. By applying this, the switching phase difference of each paralleled converter can be kept constant.
  • SMPS switching mode power supply
  • the present invention can be suitably applied to a switching mode power supply using a plurality of converters connected in parallel to secure a large output.
  • the switching mode power supply to which the present invention is applied has an advantage in that all of the parallel-connected converters operate in a discontinuous conduction mode (DCM), thereby effectively preventing the generation of switching loss and switching noise caused by reverse recovery.
  • DCM discontinuous conduction mode

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

La présente invention concerne un convertisseur de commutation relié en parallèle dans lequel les opérations de mise sous tension et de mise hors tension d'une pluralité de convertisseurs reliés en parallèle les uns avec les autres sont commandées pour maintenir constante la différence de phase entre les convertisseurs. Le convertisseur de commutation relié en parallèle de la présente invention comprend: une première unité de commande de commutation pour générer un premier signal de commande de commutation en vue de commander les opérations de mise sous tension et de mise hors tension d'un premier convertisseur; une unité de génération de signal synchrone présentant un premier condensateur et un second condensateur, reliant le premier condensateur et le second condensateur conformément à un premier signal de commande de commutation émis à partir de la première unité de commande de commutation pour commander la tension du premier condensateur par partage de charge entre le premier condensateur et le second condensateur, et générant un signal synchrone, qui est synchrone avec le premier signal de commande de commutation et présentant une différence de phase prédéterminée, à l'aide de la tension du premier condensateur; et une seconde unité de commande de commutation pour générer un second signal de commande de commutation conformément au signal synchrone émis à partir de l'unité de génération de signal synchrone en vue de commander les opérations de mise sous tension et de mise hors tension du second convertisseur. Le convertisseur de commutation relié en parallèle de la présente invention maintient constante la différence de phase entre les convertisseurs reliés en parallèle pour fonctionner dans un DCM (mode de conduction discontinue), pouvant ainsi empêcher une augmentation de perte de commutation et de bruit de commutation provoquée par une récupération inverse résultant de leur fonctionnement dans un CCM (mode de conduction continnue).
PCT/KR2009/001663 2008-04-01 2009-04-01 Concertisseur de commutation relié en parallèle utilisant le partage de charge WO2009145458A2 (fr)

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KR1020080030559A KR20090105229A (ko) 2008-04-02 2008-04-02 전하공유를 이용한 병렬 연결 스위칭 컨버터

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KR102166955B1 (ko) * 2018-12-12 2020-10-19 한국에너지기술연구원 병렬로 동작하는 복수의 컨버터 모듈을 포함하는 컨버터 장치의 스위칭 노이즈 저감

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US5905369A (en) * 1996-10-17 1999-05-18 Matsushita Electric Industrial Co., Ltd. Variable frequency switching of synchronized interleaved switching converters
US6091233A (en) * 1999-01-14 2000-07-18 Micro Linear Corporation Interleaved zero current switching in a power factor correction boost converter
US6239584B1 (en) * 2000-06-20 2001-05-29 Delta Electronics, Inc. Two-inductor boost converter

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