WO2009140707A1 - Architecture inter-domaine de système-sur-puce pour applications intégrées fiables - Google Patents

Architecture inter-domaine de système-sur-puce pour applications intégrées fiables Download PDF

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Publication number
WO2009140707A1
WO2009140707A1 PCT/AT2009/000207 AT2009000207W WO2009140707A1 WO 2009140707 A1 WO2009140707 A1 WO 2009140707A1 AT 2009000207 W AT2009000207 W AT 2009000207W WO 2009140707 A1 WO2009140707 A1 WO 2009140707A1
Authority
WO
WIPO (PCT)
Prior art keywords
core
soc
cores
noc
chip
Prior art date
Application number
PCT/AT2009/000207
Other languages
English (en)
Inventor
Christian El Salloum
Bernhard Huber
Hermann Kopetz
Roman Obermaisser
Roberto Zafalon
Valentin Gherman
Klaus Kronloef
Heikki Waris
Eric Lenormand
Philippe Millet
Michael Borth
Chantal Couvreur
Neeraj Suri
Sergio Campos
Eila Ovaska
Kari Tiensyrjä
Michael Goedecke
Knut Hufeld
Mohammad-Reza Tazari
Antonio Perez Berdud
Juan Martin Perez Cerrolaza
Original Assignee
Technische Universität Wien
Interuniversitair Micro-Electronica Centrum Vzw Party's
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Technische Universität Wien, Interuniversitair Micro-Electronica Centrum Vzw Party's filed Critical Technische Universität Wien
Publication of WO2009140707A1 publication Critical patent/WO2009140707A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3636—Software debugging by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7825—Globally asynchronous, locally synchronous, e.g. network on chip

Abstract

La présente invention concerne une architecture d'ordinateur pour des systèmes distribués intégrés fiables. Cette architecture comporte une pluralité d'unités de calcul qui sont interconnectées par une hiérarchie de réseaux de communication hétérogènes. Au niveau le plus bas, une ou plusieurs unités fonctionnelles, au moins une unité de diagnostic, et au moins une unité de sécurité sont affectées à un seul système-sur-puce multiprocesseur de façon à assurer le fonctionnement fiable. Ces unités sont en interaction par l'intermédiaire d'un réseau-sur-puce déterministique. L'intégration unique dans un seul système-sur-puce déterministique des sujets concernant les fonctionnalités, la fiabilité et la sécurité constitue un aspect innovant important de cette nouvelle architecture.
PCT/AT2009/000207 2008-05-21 2009-05-20 Architecture inter-domaine de système-sur-puce pour applications intégrées fiables WO2009140707A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AT8192008 2008-05-21
ATA819/2008 2008-05-21

Publications (1)

Publication Number Publication Date
WO2009140707A1 true WO2009140707A1 (fr) 2009-11-26

Family

ID=41100462

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/AT2009/000207 WO2009140707A1 (fr) 2008-05-21 2009-05-20 Architecture inter-domaine de système-sur-puce pour applications intégrées fiables

Country Status (1)

Country Link
WO (1) WO2009140707A1 (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080152129A1 (en) * 2006-12-25 2008-06-26 Via Technologies, Inc. Data-securing method of program tool
CN102387080A (zh) * 2011-10-21 2012-03-21 上海交通大学 片上网络虫洞路由容错方法
US9553762B1 (en) * 2014-06-26 2017-01-24 Altera Corporation Network-on-chip with fixed and configurable functions
CN107942174A (zh) * 2017-12-18 2018-04-20 中国电子产品可靠性与环境试验研究所 大气中子诱发的fpga器件失效率检测方法和系统
CN108133731A (zh) * 2017-12-18 2018-06-08 中国电子产品可靠性与环境试验研究所 大气中子诱发的sram器件失效率检测方法和系统
US10599537B2 (en) 2017-09-13 2020-03-24 Hyundai Motor Company Failure diagnosis apparatus and method for in-vehicle control unit
CN111859472A (zh) * 2014-12-19 2020-10-30 英特尔公司 用于片上系统平台的安全插件
CN112311701A (zh) * 2019-07-29 2021-02-02 奥塔索克技术有限公司 在片上网络中模拟广播
EP4064644A3 (fr) * 2021-03-25 2023-02-22 Airbus Defence and Space GmbH Procédé de communication dans un réseau sur puce

Citations (2)

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US4569015A (en) * 1983-02-09 1986-02-04 International Business Machines Corporation Method for achieving multiple processor agreement optimized for no faults
US7200837B2 (en) * 2003-08-21 2007-04-03 Qst Holdings, Llc System, method and software for static and dynamic programming and configuration of an adaptive computing architecture

Patent Citations (2)

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US4569015A (en) * 1983-02-09 1986-02-04 International Business Machines Corporation Method for achieving multiple processor agreement optimized for no faults
US7200837B2 (en) * 2003-08-21 2007-04-03 Qst Holdings, Llc System, method and software for static and dynamic programming and configuration of an adaptive computing architecture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
OBERMAISSER R; KRAUT H; SALLOUM C ED - ANONYMOUS: "A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR", DEPENDABLE COMPUTING CONFERENCE, 2008. EDCC 2008. SEVENTH EUROPEAN, IEEE, PISCATAWAY, NJ, USA, 7 May 2008 (2008-05-07), pages 123 - 134, XP031281062, ISBN: 9780769531380 *

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080152129A1 (en) * 2006-12-25 2008-06-26 Via Technologies, Inc. Data-securing method of program tool
US8209546B2 (en) * 2006-12-25 2012-06-26 Via Technologies, Inc. Data-securing method of program tool
CN102387080A (zh) * 2011-10-21 2012-03-21 上海交通大学 片上网络虫洞路由容错方法
US10367745B1 (en) 2014-06-26 2019-07-30 Altera Corporation Network-on-chip with fixed and configurable functions
US9553762B1 (en) * 2014-06-26 2017-01-24 Altera Corporation Network-on-chip with fixed and configurable functions
CN111859472A (zh) * 2014-12-19 2020-10-30 英特尔公司 用于片上系统平台的安全插件
CN111859472B (zh) * 2014-12-19 2024-01-16 英特尔公司 用于片上系统平台的安全插件
US10599537B2 (en) 2017-09-13 2020-03-24 Hyundai Motor Company Failure diagnosis apparatus and method for in-vehicle control unit
CN107942174A (zh) * 2017-12-18 2018-04-20 中国电子产品可靠性与环境试验研究所 大气中子诱发的fpga器件失效率检测方法和系统
CN108133731A (zh) * 2017-12-18 2018-06-08 中国电子产品可靠性与环境试验研究所 大气中子诱发的sram器件失效率检测方法和系统
CN112311701A (zh) * 2019-07-29 2021-02-02 奥塔索克技术有限公司 在片上网络中模拟广播
CN112311701B (zh) * 2019-07-29 2024-03-19 西门子工业软件有限公司 在片上网络中模拟广播
EP4064644A3 (fr) * 2021-03-25 2023-02-22 Airbus Defence and Space GmbH Procédé de communication dans un réseau sur puce

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