WO2009133589A1

WO2009133589A1 - Manufacturing method of plasma display panel

Info

Publication number: WO2009133589A1
Application number: PCT/JP2008/001126
Authority: WO
Inventors: 金江達利; 佐々木孝
Original assignee: 株式会社日立製作所
Priority date: 2008-04-30
Filing date: 2008-04-30
Publication date: 2009-11-05

Abstract

A plasma display panel (PDP) includes first and second substrates facing to each other. For example, the PDP is assembled through a virtual alignment coordinate calculation process, an alignment process and a sealing process. In the virtual alignment coordinate calculation process, a difference between a distance between first alignment marks provided on the first substrate and a distance between second alignment marks provided on the second substrate is calculated as a difference between quantities of expansion/contraction of the first and second substrates that have occurred during a process before the alignment process. A virtual alignment coordinate is then calculated for the first substrate based on the difference between the quantities of expansion/contraction and coordinates of the first alignment marks. In the alignment process, by aligning the first alignment coordinate and the second alignment marks, positions of the first and second substrates are aligned to each other. As a result, accuracy in the alignment between the first and second substrates may be improved.

Description

Method for manufacturing plasma display panel

The present invention relates to a method for manufacturing a plasma display panel.

A plasma display panel (PDP) is composed of two glass substrates (a front substrate and a back substrate) bonded together, and generates a discharge in a space (discharge space) formed between the glass substrates. Display an image. The cells corresponding to the pixels in the image are self-luminous, and are coated with phosphors that generate red, green, and blue visible light in response to ultraviolet rays generated by discharge. One pixel is composed of three cells that generate visible light of red, green, and blue.

For example, a three-electrode PDP displays an image by generating a sustain discharge between the X electrode and the Y electrode. A cell that generates a sustain discharge (a cell to be lit) is selected by, for example, selectively generating an address discharge between the Y electrode and the address electrode.

In a general PDP, the X electrode and the Y electrode are disposed on the front substrate, and the address electrode is disposed on the rear substrate. In addition, the rear substrate is provided with partition walls for partitioning the discharge space. For example, the front substrate and the rear substrate are disposed to face each other so that the relative positions of the electrodes (X electrode, Y electrode, etc.) of the front substrate and the partition walls of the rear substrate are in a correct positional relationship. . For example, in order to assemble the PDP with the positional relationship between the electrodes of the front substrate and the partition walls of the rear substrate being correct, the alignment marks for aligning the positions of the front substrate and the rear substrate are the four corners of the front substrate and the rear substrate. Are provided respectively at the four corners (see, for example, Patent Document 1).
JP 2005-216699 A

In the PDP manufacturing method of Patent Document 1, alignment is performed so that the alignment mark provided on the front substrate fits within the alignment mark provided on the rear substrate while recognizing an image within one field of view using a camera. In a general PDP, a front substrate and a back substrate are bonded to each other through different baking processes. For this reason, the amount of thermal shrinkage due to the firing process differs between the front substrate and the back substrate, and the amount of misalignment between the alignment marks before and after the firing process differs between the front substrate and the back substrate.

For example, in the PDP manufacturing method of Patent Document 1, due to the influence of thermal shrinkage due to the baking process, the alignment marks provided at the four corners of the front substrate do not fit within the alignment marks provided at the four corners of the back substrate. In this case, it is difficult to accurately align the positions of the front substrate and the rear substrate. In this case, for example, the PDP may be assembled in a state where the relative positions of the electrodes on the front substrate and the partition walls on the rear substrate are shifted from the correct positional relationship. In a configuration in which the relative positions of the electrodes on the front substrate and the partition walls on the rear substrate are shifted, it is difficult to generate the discharge correctly.

An object of the present invention is to improve the alignment accuracy when aligning the positions of the front substrate and the rear substrate.

The plasma display panel (PDP) has a first substrate and a second substrate that face each other through a discharge space. A plurality of first alignment marks are provided on the first substrate. The second substrate is provided with a plurality of second alignment marks at positions corresponding to the first alignment marks. For example, the PDP is assembled through a virtual alignment coordinate calculation process, a positioning process, and a sealing process.

For example, in the virtual alignment coordinate calculation step, the difference between the distance between the first alignment marks and the distance between the second alignment marks when the first and second substrates are bonded together is determined by bonding the first and second substrates to each other. It is calculated as the difference between the expansion and contraction amounts of the first and second substrates generated in the process before the alignment. And the virtual alignment coordinate in a 1st board | substrate is calculated based on the difference of expansion-contraction amount and the coordinate of a 1st alignment mark. In the alignment step, the positions of the first substrate and the second substrate are aligned with each other by aligning the virtual alignment coordinates and the second alignment mark. In the sealing step, the first and second substrates whose positions are aligned are bonded to each other.

In the present invention, it is possible to improve the alignment accuracy when aligning the positions of the front substrate and the rear substrate.

It is a figure which shows the outline | summary of PDP in one Embodiment. It is a figure which shows the principal part of PDP shown in FIG. It is a figure which shows an example of the manufacturing method of PDP shown in FIG. It is a figure which shows an example of the process implemented at the virtual alignment coordinate calculation process and alignment process shown in FIG. It is a figure which shows the outline | summary of the virtual alignment coordinate calculation process and alignment process shown in FIG. It is a figure which shows an example of the plasma display apparatus comprised using PDP shown in FIG. It is a figure which shows the modification of PDP shown in FIG. It is a figure which shows an example of the process implemented at the virtual alignment coordinate calculation process in the manufacturing method of PDP shown in FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows an outline of a PDP in an embodiment of the present invention. An arrow D1 in the figure indicates the first direction D1, and an arrow D2 indicates the second direction D2 orthogonal to the first direction D1 in a plane parallel to the image display surface 16. The plasma display panel 10 (hereinafter also referred to as “PDP”) has a front substrate portion 12 (first substrate) and a rear substrate portion 14 (second substrate) having a square plate shape. The front substrate portion 12 and the rear substrate portion 14 are arranged to face each other via the discharge space DS, and are bonded to each other by a seal (not shown). That is, the discharge space DS is formed between the front substrate portion 12 and the rear substrate portion 14 (more specifically, the recess of the rear substrate portion 14).

The front substrate unit 12 has a plurality of first alignment marks MK1 for aligning the positions of the front substrate unit 12 and the back substrate unit 14 when the front substrate unit 12 and the back substrate unit 14 are bonded to each other. For example, the first alignment mark MK1 is provided at each of the three corners of a region where the front substrate portion 12 and the rear substrate portion 14 overlap each other (region surrounded by a broken line in the drawing). The virtual alignment coordinate AC shown on the front substrate portion 12 is the position of the virtual alignment mark calculated based on the first alignment mark MK1 and the second alignment mark MK2. Therefore, in this embodiment, the virtual alignment coordinate AC is not actually formed on the front substrate portion 12. Details of the method of calculating the virtual alignment coordinate AC will be described with reference to FIG.

The rear substrate portion 14 includes partition walls BR for partitioning the discharge space DS, exhaust holes EH penetrating from the exhaust space ES to the outer surface of the rear substrate portion 14 (the lower side in the figure), and first alignment marks MK1 corresponding to the first alignment marks MK1. 2 alignment mark MK2. The front substrate portion 12 and the rear substrate portion 14 are arranged to face each other via the discharge space DS so that the virtual alignment coordinate AC and the second alignment mark MK2 overlap each other. That is, in this embodiment, the positions of the front substrate portion 12 and the rear substrate portion 14 are aligned with each other by matching the virtual alignment coordinate AC and the second alignment mark MK2. Thereby, in this embodiment, for example, even when a difference occurs in the amount of expansion / contraction between the front substrate portion 12 and the back substrate portion 14 in the step before the front substrate portion 12 and the back substrate portion 14 are bonded to each other, the front substrate portion The alignment accuracy when the 12 and the back substrate part 14 are bonded to each other can be improved.

FIG. 2 shows details of the main part of the PDP 10 shown in FIG. The meanings of the arrows in the figure are the same as those in FIG.

The front substrate portion 12 is provided extending in the first direction D1 on the surface of the glass substrate FS that faces the glass substrate RS (the lower side in the figure), and a plurality of Xs arranged at intervals from each other. A bus electrode Xb and a Y bus electrode Yb are provided. The X bus electrode Xb is connected with an X transparent electrode Xt extending in the second direction D2 from the X bus electrode Xb to the Y bus electrode Yb. A Y transparent electrode Yt extending in the second direction D2 from the Y bus electrode Yb to the X bus electrode Xb is connected to the Y bus electrode Yb.

For example, the X bus electrode Xb and the Y bus electrode Yb are opaque electrodes formed of a metal material or the like, and the X transparent electrode Xt and the Y transparent electrode Yt are transparent that transmit visible light formed of an ITO film or the like. Electrode. The X electrode XE (sustain electrode) is composed of the X bus electrode Xb and the X transparent electrode Xt, and the Y electrode YE (scanning electrode) is composed of the Y bus electrode Yb and the Y transparent electrode Yt. Paired. Then, a discharge is repeatedly generated between the X electrode XE and the Y electrode YE that are paired with each other.

The transparent electrodes Xt and Yt may be disposed on the entire surface between the bus electrodes Xb and Yb to which the transparent electrodes Xt and Yt are connected and the glass substrate FS. Further, an electrode integral with the bus electrodes Xb and Yb may be formed in place of the transparent electrodes Xt and Yt by the same material (metal material or the like) as the bus electrodes Xb and Yb.

The electrodes Xb, Xt, Yb, Yt are covered with the dielectric layer DL. A plurality of address electrodes AE extending in a direction orthogonal to the bus electrodes Xb and Yb (second direction D2) are provided on the dielectric layer DL (lower side in the figure). Thus, the front substrate part 12 has a plurality of electrodes XE, YE extending in the first direction D1 and a plurality of address electrodes AE extending in the second direction D2.

The address electrode AE and the dielectric layer DL are covered with a protective layer PL. For example, the protective layer PL is formed of an MgO film having high secondary electron emission characteristics due to cation collision in order to easily generate discharge.

The rear substrate portion 14 is formed in parallel with each other on the glass substrate RS (on the surface facing the glass substrate FS) and extends in a direction (second direction D2) perpendicular to the bus electrodes Xb and Yb ( Barrier rib) BR is included. The discharge space DS is formed between the adjacent barrier ribs BR. For example, the discharge space DS is formed by directly carving the glass substrate RS by a sandblast method or the like.

The side wall of the cell is constituted by the partition wall BR. Further, visible light of red (R), green (G), and blue (B) is generated on the side surface of the partition wall BR and the glass substrate RS between the adjacent partition walls BR by being excited by ultraviolet rays. Phosphors PHr, PHg, and PHb are respectively applied.

One pixel of the PDP 10 is composed of three cells that generate red, green, and blue light. Here, one cell (one color pixel) is formed, for example, in a region surrounded by the bus electrodes Xb and Yb and the partition wall BR. As described above, the PDP 10 is configured by arranging cells in a matrix to display a color image and alternately arranging a plurality of types of cells that generate light of different colors. Although not particularly illustrated, a display line is constituted by cells formed along the bus electrodes Xb and Yb.

The PDP 10 is configured by bonding the front substrate portion 12 and the rear substrate portion 14 so that the protective layer PL and the partition wall BR are in contact with each other, and enclosing a discharge gas such as Ne or Xe in the discharge space DS. For example, the discharge gas is enclosed in the discharge space DS of the assembled PDP through the exhaust hole EH and the exhaust space ES shown in FIG.

FIG. 3 shows an example of a manufacturing method of the PDP shown in FIG. For example, the steps 100-140 for manufacturing the front substrate portion 12 and the steps 200-220 for manufacturing the rear substrate portion 14 are performed independently of each other.

In the step of forming the front substrate portion 12, first, in step 100, the transparent electrodes Xt and Yt are formed on the glass substrate FS. For example, the transparent electrodes Xt and Yt are formed in the patterns of the transparent electrodes Xt and Yt, respectively, by using an etching process after forming an ITO film on the surface of the glass substrate FS by sputtering or the like.

In step 110, bus electrodes Xb and Yb are formed on the glass substrate FS and the transparent electrodes Xt and Yt. For example, the bus electrodes Xb and Yb are formed by depositing metal fine particles on the surfaces of the glass substrate FS and the transparent electrodes Xt and Yt by sputtering or the like (for example, stacking chromium, copper and chromium in this order) and then using an etching process. It is formed in the pattern of bus electrodes Xb and Yb, respectively.

Here, for example, when forming the bus electrodes Xb and Yb (step 110), the first alignment marks MK1 are formed at the three corners of the glass substrate FS with the same material as the bus electrodes Xb and Yb. The first alignment marks MK1 may be formed at the three corners of the glass substrate FS with the same material as the transparent electrodes Xt and Yt when forming the transparent electrodes Xt and Yt (step 100).

In step 120, a dielectric layer DL covering the electrodes Xb, Xt, Yb, Yt is formed on the glass substrate FS. For example, the dielectric layer DL is formed by applying paste-like low-melting glass on the glass substrate FS and then baking it. When the low melting point glass is baked, thermal shrinkage occurs in the glass substrate FS. The position of the first alignment mark MK1 after firing is the position of the first alignment mark MK1 before firing due to the heat shrinkage of the glass substrate FS (design value when the first alignment mark MK1 is provided on the glass substrate FS). Deviate.

In step 130, an address electrode AE is formed on the dielectric layer DL. For example, the address electrode AE is formed in the pattern of the address electrode AE using an etching process after metal fine particles are adhered to the surface of the dielectric layer DL by sputtering or the like (for example, chromium, copper and chromium are stacked in this order). The

In step 140, a protective layer PL covering the address electrode AE is formed on the dielectric layer DL. For example, the protective layer PL is formed by depositing MgO on the surfaces of the dielectric layer DL and the address electrode AE by vapor deposition or the like.

In the step of forming the back substrate part 14, first, in step 200, the partition wall BR is formed on the glass substrate RS. For example, a photoresist having a pattern of the barrier ribs BR is formed on the glass substrate RS. Then, a portion of the glass substrate RS that is not covered with the photoresist (for example, a region where the discharge space DS is formed) is removed by sandblasting or the like. Thereafter, the photoresist is removed, and the barrier ribs BR are formed.

Thus, in this embodiment, the partition wall BR is formed integrally with the glass substrate RS by selectively removing the glass substrate RS. Moreover, in this embodiment, since the baking process for forming the partition BR is not required, heat shrinkage does not occur in the glass substrate RS. Here, for example, the second alignment mark MK2 is formed at the three corners of the glass substrate RS when the partition wall BR is formed.

For example, when the photoresist having the pattern of the barrier ribs BR is formed on the glass substrate RS, only the pattern of the second alignment mark MK2 is not covered with the photoresist in the outer peripheral portion covered with the photoresist. Exposure and development with a photomask for the purpose. Then, a portion of the glass substrate RS that is not covered with the photoresist (the region where the discharge space DS is formed and the second alignment mark MK2) is removed by sandblasting or the like. Thereafter, the photoresist is removed, and the barrier ribs BR are formed. At the same time, the second alignment mark MK2 is formed by removing the glass substrate at that portion. Thus, the second alignment mark MK2 is formed simultaneously with the partition wall BR.

In step 210, phosphors PHr, PHg, and PHb are formed between the barrier ribs BR (on the glass substrate RS between the side surfaces of the barrier ribs BR and the barrier ribs BR adjacent to each other). For example, the phosphor materials PHr, PHg, and PHb are formed by applying a paste-like phosphor material by printing or the like between the barrier ribs BR and drying the applied phosphor material.

In step 220, a seal for bonding the back substrate portion 12 and the front substrate portion 14 to each other is formed on the outer peripheral portion of the glass base RS. For example, a seal is formed by applying a sealing material such as low melting point glass to the outer peripheral portion of the glass substrate RS and drying the applied sealing material. Then, the phosphors PHr, PHg, PHb formed in step 210 and the seal are fired simultaneously.

In the firing in step 220, since the firing temperature is low, thermal shrinkage hardly occurs in the glass substrate RS. For example, in step 220, even when heat shrinkage occurs in the glass substrate RS due to firing, the firing temperature is lower than firing in step 120 (manufacturing step of the dielectric layer DL of the front substrate portion 12). The amount of heat shrinkage of the material RS is very small compared to the amount of heat shrinkage of the glass substrate FS generated in step 120. Therefore, the position of the second alignment mark MK2 after step 220 (after baking) is the same as the position of the second alignment mark MK2 before step 220 (before baking) (when the second alignment mark MK2 is provided on the glass substrate RS). Almost no deviation from the design value.

As described above, the front substrate portion 12 formed through the steps 100-140 and the back substrate portion 14 formed through the steps 200-220 have an amount of expansion / contraction (thermal contraction amount) of the glass base materials FS and RS. A difference occurs. For this reason, for example, the position of the first alignment mark MK1 when the front substrate portion 12 and the rear substrate portion 14 are arranged to face each other is shifted from the position of the second alignment mark MK2. Therefore, in this embodiment, when the positions of the front substrate portion 12 and the rear substrate portion 14 are aligned with each other (step 400 described later), the relative positional deviation of the first alignment mark MK1 with respect to the second alignment mark MK2 is changed. The corrected virtual alignment coordinate AC is used.

In the step of assembling the front substrate portion 12 and the rear substrate portion 14, first, in step 300 (virtual alignment coordinate calculation step), the virtual alignment coordinate AC in the front substrate portion 12 is calculated. For example, the difference between the distance between the first alignment marks MK1 and the distance between the second alignment marks MK2 is the expansion / contraction of the front substrate portion 12 and the back substrate portion 14 formed through the steps 100-140 and 200-220, respectively. Calculated as the difference in quantity.

In other words, the difference between the distance between the first alignment marks MK1 and the distance between the second alignment marks MK2 when the front substrate portion 12 and the back substrate portion 14 are bonded together causes the front substrate portion 12 and the back substrate portion 14 to adhere to each other. It is calculated as a difference in expansion / contraction amount between the front substrate portion 12 and the back substrate portion 14 generated in the step before the bonding. Then, based on the calculated difference in expansion / contraction amount and the coordinates of the first alignment mark MK, the virtual alignment coordinate AC in the front substrate portion 12 is calculated. As described above, the relative positional shift between the first alignment mark MK1 and the second alignment mark MK2 due to the difference in expansion / contraction between the front substrate portion 12 and the back substrate portion 14 is corrected by the virtual alignment coordinate AC.

In step 400 (alignment step), the positions of the front substrate portion 12 and the back substrate portion 14 are aligned with each other by aligning the virtual alignment coordinate AC and the second alignment mark MK. Thereby, in this embodiment, the alignment precision at the time of bonding the front substrate part 12 and the back substrate part 14 together can be improved, and the electrodes provided on the front substrate part 12 and the partition walls provided on the back substrate part 14 The relative position of can be accurately adjusted.

In step 500 (sealing step), the front substrate portion 12 and the rear substrate portion 14 that are aligned with each other are bonded to each other. Thereby, in this embodiment, the PDP 10 in which the positions of the front substrate portion 12 and the rear substrate portion 14 are accurately aligned can be assembled. As a result, in this embodiment, for example, the margin of the voltage applied to each electrode in order to generate discharge can be expanded, and the PDP 10 can be driven stably. In other words, in this embodiment, a discharge for displaying an image can be generated correctly, and the display quality of the PDP 10 can be improved.

In step 600, a discharge gas such as Ne or Xe is sealed in the discharge space DS. For example, evacuation (evacuation) for making the discharge space DS into a vacuum state is performed through the exhaust hole EH and the exhaust space ES shown in FIG. Then, a discharge gas such as Ne or Xe is sealed in the discharge space DS. Note that sealing (step 500) and evacuation may proceed simultaneously.

4 and 5 show an example of the virtual alignment coordinate calculation step and the alignment step shown in FIG. FIG. 4 shows processing performed in the virtual alignment coordinate calculation step and the alignment step. For example, the processes 310 to 410 shown in FIG. 4 are performed by a positioning apparatus that aligns the positions of two substrates with each other according to a program that controls the operation of the apparatus. For example, the processing 310 to 350 is performed in the step 300 shown in FIG. 3 described above, and the processing 410 is performed in the step 400. Moreover, the value calculated by each process is memorize | stored in memory, such as an alignment apparatus, for example.

FIG. 5 shows the state of the alignment marks MK1 and MK2 and the position of the virtual alignment coordinate AC viewed from the image display surface side (upper side in FIG. 1). The meanings of the arrows in the figure are the same as those in FIG. For example, the front substrate unit 12 and the rear substrate unit 14 in FIG. 5 are set in an alignment device or the like. Hereinafter, the processes of the virtual alignment coordinate calculation step and the alignment step will be described with reference to FIG.

In the process 310 of the virtual alignment coordinate calculation step, the first distance DT1 and the second distance DT2 between the first alignment marks MK1 are respectively calculated. Here, the first distance DT1 is a distance between the first alignment marks MK1 along the side extending in the first direction D1 of the front substrate portion 12, as shown in FIG. The second distance DT2 is a distance between the first alignment marks MK1 along the side extending in the second direction D2 of the front substrate portion 12, as shown in FIG. For example, the alignment apparatus in which the front substrate portion 12 and the rear substrate portion 14 are set has the actual coordinates of each first alignment mark MK1 (for example, each of the front substrate portions 12 after the process 140 shown in FIG. The coordinates of the first alignment mark MK1) are detected, and the distances DT1 and DT2 are calculated based on the detected coordinates.

In process 320, a third distance DT3 and a fourth distance DT4 between the second alignment marks MK2 are calculated. Here, the third distance DT3 is a distance between the second alignment marks MK2 corresponding to the first distance DT1, and extends, for example, in the first direction D1 of the back substrate portion 14 as shown in FIG. This is the distance between the second alignment marks MK2 along the existing side. The fourth distance DT4 is a distance between the second alignment marks MK2 corresponding to the second distance DT2. For example, as shown in FIG. 5A, the fourth distance DT4 extends in the second direction D2 of the back substrate portion 14. This is the distance between the second alignment marks MK2 along the side to be moved.

For example, the alignment apparatus detects the actual coordinates of each second alignment mark MK2 (for example, the coordinates of each second alignment mark MK2 in the back substrate part 14 after step 220 shown in FIG. 3), and the detected coordinates. Based on the above, distances DT3 and DT4 are calculated. In this embodiment, as described above with reference to FIG. 3, the position of the second alignment mark MK2 when the front substrate portion 12 and the rear substrate portion 14 are bonded to each other is the same as that of the second alignment mark MK2. 14 is not substantially deviated from the design value at the time of being provided.

Therefore, in this embodiment, the distance between the design values between the second alignment marks MK2 is calculated as the distances DT3 and DT4 (the virtual alignment coordinate AC is calculated when calculating the difference between the expansion amounts of the front substrate portion 12 and the rear substrate portion 14. May be used as the distances DT3 and DT4). That is, in this embodiment, the distances DT3 and DT4 are calculated based on design values when the second alignment mark MK2 is provided on the back substrate part 14 without using the actual coordinates of the second alignment mark MK2. May be.

In the process 330, the first difference DF1, which is the difference between the first distance DT1 and the third distance DT3 (the absolute value of (DT3-DT1)), and the difference between the second distance DT2 and the fourth distance DT4 ((DT4-DT2) The second difference DF2 that is an absolute value is calculated.

In process 340, the coordinates of the first direction D1 of the virtual alignment coordinates AC on the front substrate portion 12 are calculated. In this embodiment, as described with reference to FIG. 3 described above, the shrinkage amount of the front substrate portion 12 in the first direction D1 is larger than the shrinkage amount of the back substrate portion 14 in the first direction D1. Therefore, in this embodiment, for example, as shown in FIG. 5B, the coordinate in the first direction D1 of the virtual alignment coordinate AC is equal to the first difference DF1 with respect to the actual coordinate of the first alignment mark MK1. A half (DF1 / 2 = (DT3-DT1) / 2) is set to the outer position along the first direction D1. Thereby, the distance DT5 along the first direction D1 between the virtual alignment coordinates AC is set to be the same as the distance DT3.

In process 350, the coordinates of the second direction D2 of the virtual alignment coordinates AC are calculated. In this embodiment, as described above with reference to FIG. 3, the coordinates of the virtual alignment coordinate AC in the second direction D2 are such that the contraction amount in the second direction D2 of the front substrate portion 12 is the second direction D2 of the rear substrate portion 14. Larger than the amount of shrinkage. Therefore, in this embodiment, for example, as shown in FIG. 5B, the coordinate in the second direction D2 of the virtual alignment coordinate AC is the second difference DF2 with respect to the actual coordinate of the first alignment mark MK1. A half (DF2 / 2 = (DT4-DT2) / 2) is set to the outer position along the second direction D2. Thereby, the distance DT6 along the second direction D2 between the virtual alignment coordinates AC is set to be the same as the distance DT4.

That is, by the

processes

340 and 350, the virtual alignment coordinate AC on the front substrate unit 12 is half the first difference DF1 (DF1 / 2) in the first direction D1 and the second direction D2 from the actual coordinates of the first alignment mark MK1. And distances DT5 and DT6 along the first direction D1 and the second direction D2 between the virtual alignment coordinates AC are respectively the same as the distances DT3 and DT4 at positions shifted by half (DF2 / 2) of the second difference DF2 It is set to a position that becomes a distance.

In processing 410, the positions of the front substrate portion 12 and the rear substrate portion 14 are aligned with each other. For example, as shown in FIG. 5C, the position of the front substrate unit 12 is adjusted so that the virtual alignment coordinate AC matches the coordinate of the second alignment mark MK2, and the front substrate unit 12 and the rear substrate unit 14 are aligned. The positions are aligned with each other. For example, the alignment apparatus can detect the relative angular deviation between the front substrate unit 12 and the rear substrate unit 14 as viewed from the image display surface 16 side based on the virtual alignment coordinates AC and the coordinates of the second alignment mark MK. A displacement amount of the position in the first direction D1 and the second direction D2 is calculated. Then, the alignment apparatus adjusts the position of the front substrate portion 12 based on the calculated angular deviation amount and the positional deviation amounts in the directions D1 and D2.

Note that, for example, the alignment apparatus may adjust the virtual alignment coordinate AC and the coordinate of the second alignment mark MK to each other by adjusting the position of the back substrate portion 14. Alternatively, the virtual alignment coordinate AC and the coordinate of the second alignment mark MK may be aligned with each other by adjusting the positions of the front substrate portion 12 and the rear substrate portion 14 with each other.

In this embodiment, the calculation of the coordinates in the first direction D1 and the calculation of the coordinates in the second direction D2 of the virtual alignment coordinates AC are performed by independent processes (processes 340 and 350), respectively. Therefore, in this embodiment, for example, even when the thermal contraction rate of the front substrate portion 12 is anisotropic (when the thermal contraction rate is different between the first direction D1 and the second direction D2), the virtual alignment coordinate AC By aligning the coordinates of the second alignment mark MK with each other, it is possible to improve the alignment accuracy when the front substrate portion 12 and the rear substrate portion 14 are bonded to each other.

FIG. 6 shows an example of a plasma display device configured using the PDP 10 shown in FIG. A plasma display device (hereinafter also referred to as a PDP device) is disposed on a PDP 10 having a square plate shape, an optical filter 20 provided on the image display surface 16 side (light output side) of the PDP 10, and an image display surface 16 side of the PDP 10. The front housing 30, the rear housing 40 and the base chassis 50 disposed on the back surface 18 side of the PDP 10, the circuit unit 60 for driving the PDP 10, and the PDP 10 attached to the rear housing 40 side of the base chassis 50 A double-sided adhesive sheet 70 for attaching to the base chassis 50 is provided. Since the circuit unit 60 includes a plurality of components, the circuit unit 60 is indicated by a dashed box in the figure. The optical filter 20 is affixed to a protective glass (not shown) attached to the opening 32 of the front housing 30. The optical filter 20 may have a function of shielding electromagnetic waves. The optical filter 20 may be directly attached to the image display surface 16 side of the PDP 10 instead of the protective glass.

As described above, in the present embodiment, the virtual alignment coordinate AC in the front substrate portion 12 and the second alignment mark MK2 provided on the rear substrate portion 14 are aligned with each other, whereby the front substrate portion 12 and the rear substrate portion 14 are mutually aligned. Adjust the position. In this embodiment, since the virtual alignment coordinates AC in which the displacement of the relative position of the first alignment mark MK1 with respect to the second alignment mark MK2 is corrected is used, the positions of the front substrate portion 12 and the rear substrate portion 14 are accurately determined. Can be matched well. As a result, in this embodiment, it is possible to improve the alignment accuracy when the front substrate portion 12 and the back substrate portion 14 are bonded to each other, and to correctly generate a discharge for displaying an image.

In the above-described embodiment, an example in which one pixel includes three cells (red (R), green (G), and blue (B)) has been described. The present invention is not limited to such an embodiment. For example, one pixel may be composed of four or more cells. Alternatively, one pixel may be composed of cells that generate colors other than red (R), green (G), and blue (B), and one pixel may be red (R), green (G), A cell that generates a color other than blue (B) may be included.

In the above-described embodiment, the example in which the second direction D2 is orthogonal to the first direction D1 has been described. The present invention is not limited to such an embodiment. For example, the second direction D2 may intersect the first direction D1 in a substantially perpendicular direction (for example, 90 ° ± 5 °). Also in this case, the same effect as the above-described embodiment can be obtained.

In the above-described embodiment, the example in which the alignment marks MK1 and MK2 are provided at the three corners of the front substrate portion 12 and the rear substrate portion 14 has been described. The present invention is not limited to such an embodiment. For example, the alignment marks MK1 and MK2 may be provided at the four corners of the front substrate portion 12 and the rear substrate portion 14, respectively. Also in this case, the same effect as the above-described embodiment can be obtained.

In the above-described embodiment, the example in which the partition wall BR extending in the second direction D2 is provided on the glass substrate RS has been described. The present invention is not limited to such an embodiment. For example, a grid-like partition wall including partition walls extending in the first direction D1 and partition walls BR extending in the second direction D2 may be provided on the glass substrate RS. As described in the above-described embodiment, even when the thermal contraction rate of the front substrate portion 12 has anisotropy, the positions of the front substrate portion 12 and the back substrate portion 14 are bonded together with high accuracy. That is, also in this case, the relative positions of the electrodes provided on the front substrate portion 12 and the grid-like partition walls provided on the rear substrate portion 14 can be accurately matched, and the discharge for displaying an image is possible. Can be generated correctly. Therefore, also in this case, the same effect as that of the above-described embodiment can be obtained.

In the above-described embodiment, the example in which the partition wall BR is formed integrally with the glass substrate RS has been described. The present invention is not limited to such an embodiment. For example, as shown in FIG. 7, the barrier ribs BR2 may be provided on the dielectric layer DL2 provided on the glass substrate RS. For example, the barrier ribs BR2 are formed by applying a paste-like barrier rib material, followed by drying, sandblasting, and baking processes. The partition wall BR2 may be formed by printing. In the configuration of FIG. 7, the plurality of address electrodes AE extending in the second direction D2 are provided on the glass base RS of the back substrate portion 14 and are covered with the dielectric layer DL2. A partition wall BR2 is formed on the dielectric layer DL2. Also in this case, the same effect as the above-described embodiment can be obtained.

Here, for example, when the address electrode AE is formed, the second alignment mark MK2 is formed at the three corners of the glass base RS with the same material as the address electrode AE. In this case, in the firing process for forming the dielectric layer DL2 and the firing process for forming the barrier ribs BR2, thermal contraction occurs in the back substrate part 14 (glass substrate RS or the like). The position of the second alignment mark MK2 after baking is the position of the second alignment mark MK2 before baking (design value when the second alignment mark MK2 is provided on the glass substrate RS) due to the thermal contraction of the back substrate portion 14. Deviate.

Alternatively, the dielectric layer DL2 may be omitted from the configuration of FIG. 7 and the partition wall BR2 may be provided directly on the glass substrate RS. Even in this case, the barrier ribs BR2 are formed by applying a paste-like barrier rib material, followed by drying, sandblasting, and baking processes. The partition wall BR2 may be formed by printing. Even in this case, the plurality of address electrodes AE extending in the second direction D2 are provided on the glass base RS of the back substrate portion 14, and the partition wall BR2 is directly formed thereon. Also in this case, the same effect as the above-described embodiment can be obtained.

Here, for example, when the address electrode AE is formed, the second alignment mark MK2 is formed at the three corners of the glass base RS with the same material as the address electrode AE. In this case, thermal shrinkage occurs in the back substrate portion 14 (glass base RS or the like) in the firing step for forming the partition wall BR2. The position of the second alignment mark MK2 after baking is the position of the second alignment mark MK2 before baking (design value when the second alignment mark MK2 is provided on the glass substrate RS) due to the thermal contraction of the back substrate portion 14. Deviate.

In both cases (when the position of the second alignment mark MK2 deviates from the design value), the processing 340 (processing for calculating the coordinates of the virtual alignment coordinate AC in the first direction D1) and the processing 350 (shown in FIG. 4). In the process of calculating the coordinate of the virtual alignment coordinate AC in the second direction D2, for example, the process shown in FIG. 8 is performed.

In the process of calculating the coordinates in the first direction D1 of the virtual alignment coordinate AC in the front substrate part 12, first, in the process 341 and the process 342, the magnitude relationship between the first distance DT1 and the third distance DT3 is compared. When the first distance DT1 and the third distance DT3 are the same (Yes in process 341), in the process 344, the coordinate in the first direction D1 of the virtual alignment coordinate AC in the front substrate portion 12 is the first alignment mark MK1. It is set at the same position as the coordinate in one direction D1.

When the first distance DT1 is smaller than the third distance DT3 (No in the process 341 and Yes in the process 342), in the process 346, the coordinates in the first direction D1 of the virtual alignment coordinate AC are the actual coordinates of the first alignment mark MK1. On the other hand, half of the first difference DF1 (DF1 / 2 = (DT3−DT1) / 2) is set at the outer position along the first direction D1.

When the first distance DT1 is larger than the third distance DT3 (No in the process 341 and No in the process 342), in the process 348, the coordinates in the first direction D1 of the virtual alignment coordinate AC are the actual coordinates of the first alignment mark MK1. On the other hand, half of the first difference DF1 (DF1 / 2 = (DT1−DT3) / 2) is set at an inner position along the first direction D1. Through the above-described processing (processing 341 to 348), the distance DT5 along the first direction D1 between the virtual alignment coordinates AC is set to be the same as the distance DT3.

In the process of calculating the coordinate in the second direction D2 of the virtual alignment coordinate AC in the front substrate part 12, first, in the process 351 and the process 352, the magnitude relationship between the second distance DT2 and the fourth distance DT4 is compared. When the second distance DT2 and the fourth distance DT4 are the same (Yes in process 351), in the process 354, the coordinate in the second direction D2 of the virtual alignment coordinate AC is the coordinate in the second direction D2 of the first alignment mark MK1. Are set to the same positions as

When the second distance DT2 is smaller than the fourth distance DT4 (No in process 351 and Yes in process 352), in process 356, the coordinate in the second direction D2 of the virtual alignment coordinate AC is the actual coordinate of the first alignment mark MK1. On the other hand, half of the second difference DF2 (DF2 / 2 = (DT4−DT2) / 2) is set to the outer position along the second direction D2.

When the second distance DT2 is larger than the fourth distance DT4 (No in the process 351 and No in the process 352), in the process 358, the coordinates in the second direction D2 of the virtual alignment coordinate AC are the actual coordinates of the first alignment mark MK1. On the other hand, half of the second difference DF2 (DF2 / 2 = (DT2−DT4) / 2) is set to the inner position along the second direction D2. Through the above-described processing (processing 351 to 358), the distance DT6 along the second direction D2 between the virtual alignment coordinates AC is set to be the same as the distance DT4.

That is, by the above-described processing (processing 341-358), the virtual alignment coordinate AC in the front substrate portion 12 is half of the first difference DF1 in the first direction D1 and the second direction D2 from the actual coordinate of the first alignment mark MK1. The distances DT5 and DT6 along the first direction D1 and the second direction D2 between the virtual alignment coordinates AC at positions shifted by (DF1 / 2) and half of the second difference DF2 (DF2 / 2) are distances DT3. , DT4 are set at the same distance.

Also in this case, the relative position shift between the first alignment mark MK1 and the second alignment mark MK2 due to the difference in expansion / contraction between the front substrate portion 12 and the back substrate portion 14 by the above-described processing (processing 341-358). Is corrected by the virtual alignment coordinate AC. Therefore, even when the partition wall BR2 provided on the back substrate portion 14 is formed through the firing process, the same effect as that of the above-described embodiment can be obtained.

As described above, the present invention has been described in detail. However, the above-described embodiment and its modification are merely examples of the present invention, and the present invention is not limited thereto. Obviously, modifications can be made without departing from the scope of the present invention.

The present invention can be applied to a method for manufacturing a plasma display panel.

Claims

A first substrate and a second substrate facing each other through a discharge space; a plurality of first alignment marks provided on the first substrate; and a position corresponding to the first alignment mark on the second substrate. A method of manufacturing a plasma display panel comprising a plurality of second alignment marks,
The difference between the distance between the first alignment marks and the distance between the second alignment marks when the first and second substrates are bonded to each other is determined in a step before the first and second substrates are bonded to each other. A virtual alignment coordinate that is calculated as a difference between the expansion amounts of the first and second substrates that are generated, and that calculates a virtual alignment coordinate on the first substrate based on the difference between the expansion amount and the coordinates of the first alignment mark. A calculation process;
An alignment step of aligning the positions of the first substrate and the second substrate by aligning the virtual alignment coordinates and the second alignment mark;
A method of manufacturing a plasma display panel, comprising: a sealing step of bonding the first substrate and the second substrate whose positions are aligned with each other.
In the manufacturing method of the plasma display panel of Claim 1,
The first and second alignment marks are provided at at least three corners of the first and second substrates, respectively.
In the virtual alignment coordinate calculation step,
First and second distances, which are distances between the first alignment marks along the side extending in the first direction of the first substrate and the side extending in the second direction intersecting the first direction, respectively. Calculate
Calculating third and fourth distances respectively corresponding to the first and second distances in the distance between the second alignment marks;
Calculating a first difference that is a difference between the first distance and the third distance and a second difference that is a difference between the second distance and the fourth distance;
The virtual alignment coordinates are shifted from the coordinates of the first alignment mark in the first direction and the second direction by a half of the first difference and a half of the second difference, respectively, and between the virtual alignment coordinates A method of manufacturing a plasma display panel, wherein the distances along the first and second directions are set to the same distance as the third and fourth distances, respectively.
In the manufacturing method of the plasma display panel of Claim 1,
A sustain electrode, a scan electrode, and an address electrode are provided on the first substrate,
A method of manufacturing a plasma display panel, wherein a partition wall for partitioning a discharge space is provided integrally with the second substrate.
In the manufacturing method of the plasma display panel of Claim 3,
In the virtual alignment coordinate calculation step,
Detecting the coordinates of the first alignment marks on the first substrate when the first and second substrates are bonded together, and calculating a distance between the first alignment marks based on the detected coordinates;
The distance between the second alignment marks is calculated based on a design value when the second alignment marks are provided on the second substrate without detecting coordinates of the second alignment marks. A method for manufacturing a plasma display panel.