WO2009123181A1

WO2009123181A1 - Outage detection circuit and electric device

Info

Publication number: WO2009123181A1
Application number: PCT/JP2009/056629
Authority: WO
Inventors: 和昭中山
Original assignee: パイオニア株式会社
Priority date: 2008-03-31
Filing date: 2009-03-31
Publication date: 2009-10-08
Also published as: WO2009122490A1

Abstract

The current flow through capacitors (C₁, C₂) is zero at the peak of a commercial AC power waveform supplied by a commercial AC power line where the derivative of the waveform is zero. An AC clock signal AC_CLK for a high pulse signal is obtained at the collector of a photocoupler transistor (PC1_TR). A timer circuit (130) counts the output period of the AC clock signal AC_CLK, determines whether said commercial AC power is being supplied, and outputs an inverted signal AC_DET, which indicates an outage, when the output period of the AC clock signal AC_CLK exceeds a prescribed period of time. Since the outage detection uses capacitor current, there is no power loss in capacitors (C₁, C₂), and standby power can be limited.

Description

Power failure detection circuit and electrical equipment

The present invention relates to a power failure detection circuit that detects a power failure of an AC power source using a photocoupler, and an electrical device.

2. Description of the Related Art Conventionally, in various electric devices that operate by supplying AC power, such as a television or a recording / reproducing device, the presence / absence of supply of AC power on the primary side is detected using a photocoupler, and a discrimination signal is sent to the secondary side. A power failure detection circuit for outputting is known (for example, see Patent Documents 1 to 4).

The device described in Patent Document 1 has a configuration in which a photocoupler connected to a commercial AC power supply via a resistor is connected, and a pulse voltage synchronized with the commercial AC power supply voltage is output to a microcomputer.
In the device described in Patent Document 2, a series circuit of a resistor, a first light emitting diode, a second light emitting diode, and a Zener diode is connected between terminals of a diode bridge connected to an AC power supply. While the current flows through the first light emitting diode, the capacitor connected to the output terminal is charged with the DC power supply connected to the input terminal of the first phototransistor. The voltage comparator compares the charging voltage of the capacitor with a preset threshold voltage to detect a power failure of the AC power supply.
In the device described in Patent Document 3, a series circuit of a resistor and a bidirectional photocoupler is connected between AC power supply terminals to detect the presence or absence of a power failure of the AC power supply. A configuration is adopted in which the photocoupler changes the reference voltage input to the comparator for power failure detection signal generation upon detection of the power failure.
In the device described in Patent Document 4, a commercial input voltage is full-wave rectified and applied to a photocoupler via a resistor. The photocoupler is turned on when the commercial AC voltage is normal, and discharges the capacitor connected to the photocoupler. When the commercial AC voltage is lowered and the photocoupler is not turned on, the capacitor is not discharged, the output of the comparator is changed from H level to L level, and a power failure signal is output from the transistor.
Patent Document 5 describes a power failure of an AC power supply that supplies power to the load through an input filter that includes at least an inductance connected in series with the load and a capacitor connected in parallel with the load. To detect. A full-wave rectifier circuit connected to the input filter via a DC blocking capacitor, a comparison circuit that compares the pulsating output voltage of the full-wave rectifier circuit with a reference voltage, and charging of the capacitor according to the output signal of the comparison circuit A configuration is provided that includes a charging / discharging circuit that discharges through a resistor, and a detection unit that detects a power failure when the terminal voltage of the capacitor of the charging / discharging circuit rises above a reference voltage.

Japanese Patent Laid-Open No. 10-10164 JP 2000-171497 A JP 2001-45756 A JP 2001-165967 A Japanese Patent No. 2592346

However, in the conventional configuration using the photocoupler connected in series with the resistor as described in Patent Document 1 to Patent Document 4 described above, the voltage of the AC power supply is detected through the resistor, so that the power loss due to the resistor is reduced. It will occur.
The power failure detection circuit described in Patent Document 5 performs power failure detection in synchronization with the zero cross timing of the voltage waveform of the AC power supply. Since rectification is generally performed in synchronization with the peak voltage of the voltage waveform of the AC power supply, when a power failure is detected in synchronization with the zero cross timing that is 90 degrees out of phase with the peak voltage, the rectified DC supply of the power supply device at that position The voltage is lowered, and a large-capacity rectifier capacitor is required to suppress the drop and perform normal power supply operation. In other words, the power failure detection circuit described in Patent Document 5 requires a large capacity rectifier capacitor because the time required for power failure detection becomes longer.

In view of the above-mentioned problems and the like, an object of the present invention is to provide a power failure detection circuit and an electric device that suppress power loss, and to further shorten the time required for power failure detection.

The power failure detection circuit according to the present invention is a power failure detection circuit for detecting a power failure of an AC power supply using a photocoupler, wherein a capacitor provided between input terminals to which the AC power supply is supplied and a light emitting diode of the photocoupler A series circuit connected in series, and a power failure determination means for determining that the supply of the AC power supply is cut off based on a pulse signal output from a phototransistor of the photocoupler and outputting a signal indicating that a power failure has occurred. The pulse signal is synchronized with the peak of the voltage waveform of the AC power supply.

The electrical equipment described in the present invention includes a power failure detection circuit according to the present invention and a process for protecting electrical processing at the time when the power failure detection signal is input from the power failure detection circuit. And an electric processing unit for performing the above.

It is a circuit diagram which shows the power failure detection circuit which concerns on one Embodiment of this invention. It is a circuit diagram which shows the power failure detection circuit in other embodiment. It is a waveform diagram in each part in the circuit diagram of the embodiment shown in FIG. 2, (A) is an AC power supply waveform, (B) is a current waveform of a photocoupler, (C) is an AC clock waveform. It is a circuit diagram which shows a part of power failure detection circuit in other embodiment. It is a circuit diagram which shows a part of power failure detection circuit in other embodiment. It is a circuit diagram which shows a part of power failure detection circuit in other embodiment. It is a circuit diagram which shows the power failure detection circuit in other embodiment. It is a waveform diagram at each part in the circuit configuration of the first embodiment for explaining the present invention, (A) is a voltage waveform of the AC power supply, (B) is a voltage waveform of the AC clock signal AC_CLK, (C) is a photo Current waveform of coupler diode PC1 _LED . 4 is a waveform diagram at each part in the circuit configuration of Example 2 for explaining the present invention, (A) is a voltage waveform of an AC power supply, (B) is a voltage waveform of an AC clock signal AC_CLK, and (C) is a photo. Current waveform of coupler diode PC1 _LED . It is a wave form diagram in each part in the circuit composition of comparative example 1 for explaining the present invention, (A) is a voltage waveform of AC power supply, (B) is an output pressure waveform of AC clock signal AC_CLK, (C) is Photocoupler diode PC1 _LED current waveform. It is a wave form diagram in each part in the circuit composition of comparative example 2 for explaining the present invention, (A) is a voltage waveform of AC power supply, (B) is a voltage waveform of AC clock signal AC_CLK, (C) is photo Current waveform of coupler diode PC1 _LED . It is a wave form diagram in each part in the circuit composition of comparative example 3 for explaining the present invention, (A) is a voltage waveform of AC power supply, (B) is a voltage waveform of AC clock signal AC_CLK, (C) is photo Current waveform of coupler diode PC1 _LED . The graph which shows the relationship between the ratio of the capacitive reactance for demonstrating this invention, and the resistance seen from the input terminal side, and the phase difference (degree) of the zero cross of the voltage waveform of AC power supply, and a power failure detection timing.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100,200,300,400,500,600 ... Power failure detection circuit 101 ... Electric processing part 120 ... Detection bridge diode circuit 130 ... Timer circuit as power failure discrimination means 140 ... Frequency selection circuit 150/250 ... series as a switching detection means Circuits A ₁ , A ₂ ... Input terminals C ₁ , C ₂ ... Capacitors constituting the series circuit C ₆ , C ₇ ... Capacitors as bridge capacitors PC1 ... Photocoupler PC1 _LED ... Photocoupler diode as light emitting diode PC1 _TR ... Photo Photocoupler transistors as transistors Q ₁ , Q ₂ ... Transistors constituting a bidirectional ON / OFF circuit SW ₁ ... Main power switch SW _2. Relay power switch ZD ₁ , ZD ₂ .

<First embodiment>
[Configuration of power failure detection circuit]
Below, the structure of 1st embodiment of the power failure detection circuit of this invention is demonstrated based on FIG.
FIG. 1 is a circuit diagram showing a power failure detection circuit.

In FIG. 1, reference numeral 100 denotes a power failure detection circuit. This power failure detection circuit 100 detects the presence or absence of supply of AC power using a photocoupler, and outputs it to the secondary side as a discrimination signal.
For example, the power failure detection circuit 100 is used in an electrical device such as a television or a recording / reproducing apparatus that is equipped with a microcomputer that operates with a commercial AC power supply, and detects a power failure and outputs a determination signal. Execute the process to retain the setting contents and operation contents immediately before the power failure.

The power failure detection circuit 100 has a pair of input terminals A ₁ and A ₂ to which commercial AC power is supplied, and a line cross capacitor C _x is connected between the input terminals A ₁ and A ₂ .
A main power switch SW ₁ and a reactor L _x are connected between _one input terminal A ₁ and the line cross capacitor C _x, and between the other input terminal A ₂ and the line cross capacitor C _x. Reactor L _x is connected. Four rectifier bridge diodes D ₁ to D ₄ are connected in parallel to the line cross capacitor C _x, and the anodes of the rectifier bridge diodes D ₃ and D ₄ are each grounded (PG) on the primary side.

One input end 111 of the SW power supply circuit 110 is connected to a connection point between the rectifying bridge diode D ₁ and the rectifying bridge diode D ₂ . A smoothing capacitor C _p is connected between the

input terminals

111 and 112 of the SW power supply circuit 110. A connection point between the other input terminal 112 of the SW power supply circuit 110 and the smoothing capacitor C _p is connected to the primary side ground PG.
Further, one output end 113 of the SW power supply circuit 110 outputs a DC output V _dc supplied to the electric processing unit 101, and the other output end 114 is grounded (SG) to the secondary side. Incidentally, the capacitance C _pq as a sum of stray capacitance and noise absorbing capacitor between the primary-side ground PG and the secondary side ground SG is present, for convenience of explanation, the capacitance C _pq in Figure 1 Show.

The line cross capacitor C _x is connected to two input terminals of a detection bridge diode circuit 120 constituted by four diodes D ₅ , D ₆ , D ₇ and D ₈ through capacitors C ₁ and C _2. The photocoupler diode PC1 _LED constituting the photocoupler PC1 is connected between the two output terminals of the detection bridge diode circuit 120. That is, the capacitors C ₁ and C ₂ and the detection bridge diode circuit 120 constitute a series circuit 150.
The emitter of the photocoupler transistor PC1 _TR is grounded on the secondary side, the collector is connected through a resistor R ₁ to the one output end 113 of the SW power supply circuit 110.
Further, the connection point between the collector of the photocoupler transistor PC1 _TR and the resistor R _{1 and} the connection point between the resistor R ₁ and one output terminal 113 of the SW power supply circuit 110 serve as a power failure discrimination means grounded on the secondary side. The timer circuit 130 is connected. The timer circuit 130 outputs an inverted signal AC_DET based on a signal derived to the collector of the photocoupler transistor PC1 _TR , that is, an AC clock signal AC_CLK. The timer circuit 130 can use any circuit configuration that can output a signal indicating that a predetermined alternating current is cut off, in addition to various circuits that output the inverted signal AC_DET.

Here, the capacitors C ₁ and C ₂ function as peak voltage detection of the AC power supply, that is, the capacitor C ₁ satisfies the condition that the peak of the AC power supply voltage waveform corresponds to the voltage waveform of the AC clock signal AC_CLK in the photocoupler transistor PC1 _TR . , C ₂ capacity is set.
Specifically, the capacitive reactance X _C (imaginary part of impedance) of the capacitors C ₁ and C ₂ is relative to the resistance value including the operating resistance of the photocoupler diode PC 1 _LED between the input terminals A and B of the series circuit 150. Set it very large. For example, the capacitance reactance X _{C of} the capacitors C ₁ and C ₂ is not less than 3 times, more preferably not less than 6 times the entire resistance value R between the input terminals A and B of the series circuit 150, that is, the following relational expression (1): It is preferable to set to satisfying conditions.
X _C = 1 / (2πfC) ≧ (3R or 6R) (1)
f: Frequency of AC power supply C: Total capacity between input terminals A and B of series circuit 150 (series combined capacity of capacitors C ₁ and C ₂ )
R: resistance value between the input terminals A and B of the series circuit 150 (the operational resistance of the photocoupler diode PC1 _{LED and} the operational resistances of the diodes D ₅ and D ₇ or the diodes D ₆ and D ₈ of the detection bridge diode circuit 120) Series in total)

[Operation of power failure detection circuit]
Next, the operation of the power failure detection circuit will be described.

When the commercial AC power is supplied between the input terminals A ₁ and A ₂ and the main power switch SW ₁ is closed, the supplied commercial AC power is supplied to the photocoupler diode PC 1 _LED via the detection bridge diode circuit 120. Is done.
In this state, since the current flowing through the capacitors C ₁ and C ₂ is zero at the peak of the voltage waveform where the differential value of the voltage waveform of the commercial AC power supply is zero, the collector of the photocoupler transistor PC1 _TR has H An AC clock signal AC_CLK that is a (High) pulse signal is supplied. With this AC clock signal AC_CLK, the timer circuit 130 counts the output cycle of the AC clock signal AC_CLK, determines whether or not commercial AC power is supplied, and the output cycle of the AC clock signal AC_CLK is longer than a certain time. At this time, the inverted signal AC_DET is output.
On the secondary side, processing associated with a power failure is performed by the inverted signal AC_DET, for example, the memory in the electric device enters the backup mode to protect the memory contents.

[Effects of power failure detection circuit]
According to the circuit configuration of the first embodiment, the pulse signal is output with the differential value of the voltage waveform of the AC power supply by the capacitors C ₁ and C ₂ connected in series to the photocoupler diode PC1 _LED. Is the capacitor current, there is no power loss in the capacitors C ₁ and C ₂ .
For this reason, power consumption for power failure detection can be suppressed, standby power can be reduced, and energy-saving electrical equipment can be provided.
That is, the capacitors C ₁ and C ₂ output pulse signals with differential values, that is, the AC clock signal AC_CLK of the photocoupler diode PC1 _LED is set to a relatively small capacity under the condition corresponding to the peak of the voltage waveform of the AC power supply. Yes. In order to set the capacitors C ₁ and C ₂ to this relatively small capacity, it is necessary to reduce the resistance value between the input terminals A and B of the series circuit 150, but in series with the detection bridge diode circuit 120. Since it is constructed in a simple configuration in which no circuit is connected and it is not necessary to provide a resistor having a relatively large resistance value, the capacitance of the capacitors C ₁ and C ₂ can be reduced. Therefore, the configuration is simplified and power consumption can be suppressed.

When the main power switch SW ₁ is opened and a single wave of the AC power waveform is supplied from the other input terminal A ₂ , the smoothing capacitor C _p is filled and the rectification bridge diodes D ₁ and D having a bridge structure are filled. _{When 2} is OFF, the common mode leakage current from the AC power supply line is the total capacitance C _{pq of} the stray capacitance present between the primary side ground PG and the secondary side ground SG and the noise absorbing capacitor. Since a potential difference occurs between the primary side ground PG and the secondary side ground SG, the capacitors C ₁ and C ₂ are connected between the input terminals A ₁ and A ₂ , and the potential difference therebetween is zero. The malfunction of the photocoupler PC1 can be prevented without being affected by the leakage current.
Further, when the main power switch SW ₁ is opened at the timing when the line cross capacitor C _x is charged, or when the commercial AC power outlet is disconnected, the discharge current of the line cross capacitor C _x is caused by the capacitors C ₁ and C ₂ . Since it is blocked, it can be prevented that it flows into the photocoupler diode PC1 _LED and malfunctions.

Between the input terminals A ₁ and A ₂ , a capacitor C ₁ , an input terminal of the detection bridge diode circuit 120, an output terminal of the detection bridge diode circuit 120, a photocoupler diode PC1 _LED , an output terminal of the detection bridge diode circuit 120, and because of connecting the capacitor C ₂ in series, it is possible to detect the power failure at the timing of the full-wave voltage waveform of the AC power source.

<Second embodiment>
[Configuration of power failure detection circuit]
Below, the structure of 2nd embodiment of the power failure detection circuit of this invention is demonstrated based on FIG.
In the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is simplified or omitted.
FIG. 2 is a circuit diagram showing a power failure detection circuit.

In FIG. 2, reference numeral 200 denotes a power failure detection circuit. The power failure detection circuit 200 has input terminals A ₁ and A ₂ to which commercial AC power is supplied, and a line crossing is provided between these input terminals A ₁ and A _2. A capacitor _Cx is connected.
A main power switch SW ₁ and a reactor L _x are connected between _one input terminal A ₁ and the line cross capacitor C _x, and between the other input terminal A ₂ and the line cross capacitor C _x. Reactor L _x is connected. A relay power switch SW ₂ such as a relay and four rectifier bridge diodes D ₁ to D ₄ are connected to the line cross capacitor C _x , and the anodes of the rectifier bridge diodes D ₃ and D ₄ are grounded to the primary side ( PG).

input terminals

111 and 112 of the SW power supply circuit 110. A connection point between the other input terminal 112 of the SW power supply circuit 110 and the smoothing capacitor C _p is connected to the primary side ground PG.
Further, one output end 113 of the SW power supply circuit 110 outputs a DC output V _dc supplied to the electric processing unit 101, and the other output end 114 is grounded (SG) to the secondary side. Incidentally, the capacitance C _pq as a sum of stray capacitance and noise absorbing capacitor between the primary-side ground PG and the secondary side ground SG is present, for convenience of explanation, the capacitance C _pq in FIG Show.

In addition, a series circuit 250 in which a resistor R ₂ , a capacitor C ₁ , a detection bridge diode circuit 120, a capacitor C ₂ and a resistor R ₃ are connected in series is connected in parallel to the line cross capacitor C _x . And, between the output end of the detection bridge diode circuit 120, and the photo-coupler PC1 _LED constituting a photocoupler PC1, parallel circuit capacitor C ₃ and resistor R ₄ is connected in parallel is connected.
Also in the series circuit 250, as in the first embodiment, the capacitances of the capacitors C ₁ and C ₂ are set to a condition in which the peak of the voltage waveform of the AC power supply corresponds to the AC clock signal AC_CLK in the photocoupler transistor PC1 _TR . Has been. That is, as shown in the above-mentioned equation (1), a capacitor C _1, C ₂ of the capacitive reactance X _C is the input terminal A of the series circuit 250, the resistance value including the operation resistance of the photo-coupler PC1 _LED between B It is preferably set to 3 times or more, more preferably 6 times or more with respect to R.
In the relational expression (1), the resistance value R between the input terminals A and B of the series circuit 250 is the operating resistance of the photocoupler diode PC1 _LED and the diodes D ₅ and D ₇ or the diode D of the detection bridge diode circuit 120. ₆ and D ₈ are the total series resistance values of the operating resistance, the resistance R _2, and the resistance R ₃ .

Furthermore, between the input terminal of the detection diode bridge circuit 120, a diode D _9, the collector of the transistor Q _1, connecting a capacitor C ₄ emitter of the transistor Q _1, and details of determining the pulse widths of the additional pulse to be described later in series Has been. Further, a connection point of the input terminal and the diode D ₉ of the detection bridge diode circuit 120, between the connection point of the emitter and the capacitor C ₄ of the transistor Q ₁ is the emitter of the transistor Q _2, the transistor Q ₂ of the collector and the diode D ₁₀ of which is connected in series.
The base of the transistor Q _{1 and} the base of the transistor Q ₂ are connected to form a bidirectional circuit of transistors Q ₁ and Q _{2 having} different polarities. That is, the transistors Q ₁ and Q ₂ constitute a bidirectional ON / OFF circuit.
Further, a noise absorbing capacitor C ₅ and a resistor R ₅ are connected between a connection point between the emitter of the transistor Q _{1 and} the emitter of the transistor Q ₂ and a connection point between the base of the transistor Q _{1 and} the base of the transistor Q _2. Are connected in parallel.

In addition, a resistor R ₆ , a capacitor C _{6 as} a bridge capacitor, a capacitor C ₇ as a bridge capacitor, and a resistor R ₇ are connected in series to the series circuit of the rectifier bridge diode D ₁ and the rectifier bridge diode D _{2 having} a bridge configuration. A series circuit is connected in parallel. The capacitor C ₆ and the capacitor C ₇ are bridge-balanced as C ₁ : C ₂ = C ₆ : C _{7 with} the relay power switch SW ₂ closed, and the bases of the transistors Q ₁ and Q ₂ It is set so that no current flows between the emitters.
A pair of Zener diodes ZD ₁ and ZD ₂ are connected in series in the opposite direction between the connection point of the capacitors C ₆ and C _{7 and} the connection point of the base of the transistor Q _{1 and} the base of the transistor Q _2. A series circuit for ensuring on / off of the transistors Q ₁ and Q ₂ is connected.
The resistors R ₂ , R ₃ , R ₆ , and R ₇ are for circuit protection from lightning surges and noise absorption. If the resistance value is too large, the power loss increases, so a low setting, for example, a comparison of 10 kΩ or less. It is preferable to use one having a very small resistance value. These resistors R ₂ , R ₃ , R ₆ , and R ₇ may not be provided as long as other configurations for circuit protection from lightning surge and noise absorption are provided.

The emitter of the photocoupler transistor PC1 _TR is grounded on the secondary side, the collector is connected through a resistor R ₁ to the one output end 113 of the SW power supply circuit 110.
Further, the connection point between the collector of the photocoupler transistor PC1 _TR and the resistor R _{1 and} the connection point between the resistor R ₁ and one output terminal 113 of the SW power supply circuit 110 are connected to the timer circuit 130 grounded on the secondary side. A parallel circuit is connected in which a frequency selection circuit 140 serving as an open / close detection means grounded on the secondary side is connected in parallel. Frequency selection circuit 140, based on alternating clock signal AC_CLK a signal to derive the collector of the photocoupler transistor PC1 _TR, and outputs a detection signal RELAY_Check with the opening and closing of the relay power switch SW _2. Note that various circuits can be used for the frequency selection circuit 140, and a microcomputer integrated with the timer circuit 130 may be used.

On the other hand, when the relay power switch SW ₂ is opened while the main power switch SW ₁ is closed, the bridge balance of the capacitors C ₁ , C ₂ , C ₆ , C ₇ is lost, and the commercial AC power supply voltage is reduced. Near the zero cross, the transistors Q ₁ and Q ₂ are turned on for a moment. By instantly turning on these transistors Q ₁ and Q ₂ , the current flowing through the photocoupler diode PC 1 _LED also becomes zero. As a result, the collector side (Low level in the case of the emitter output) of the photocoupler transistor PC1 _TR becomes the High level, and a new pulse such as a cut-off pulse is added between the AC clock signals AC_CLK pulses as a whole. (See FIG. 3B).
Due to this newly added pulse, the repetition frequency of the AC clock signal AC_CLK pulse is doubled. That is, the AC clock signal AC_CLK is output with four pulses that are doubled in one cycle of the commercial AC power supply with the addition of the cut pulse (FIG. 3C).
When the relay power switch SW ₂ is closed, as shown in FIG. 3 (B), no cut pulse is applied to the current flowing through the photocoupler diode PC1 _LED . As shown in FIG. 3 (C), the photocoupler The AC clock signal AC_CLK derived to the collector of the transistor PC1 _TR is output as two pulses in one cycle of the commercial AC power supply.
As described above, the frequency selection circuit 140 detects the change in the number of pulses of the AC clock signal AC_CLK derived to the collector of the photocoupler transistor PC1 _TR , thereby detecting the open / closed state of the relay power switch SW _2. The detection signal RELAY_Check is output to the side.

[Effects of power failure detection circuit]
According to the circuit configuration of the second embodiment, in addition to the configuration of the first embodiment, the capacitors C ₆ and C ₂ for detection that form a bridge with the capacitors C ₁ and C ₂ on the secondary side of the relay power switch SW ₂ are provided. C ₇ is provided, and a bridge configuration of transistors Q ₁ and Q ₂ that are turned on and off by the detection current of the bridge is provided.
Thus, when the relay power switch SW ₂ is open, and cuts off part of the current flow angle flowing to the photocoupler diode PC1 _LED, pulse cuts the AC clock signal AC_CLK which is the output of the photocoupler transistor PC1 _TR In addition, the AC clock signal AC_CLK has a repetition frequency that is double the frequency when the relay power switch SW ₂ is closed. Therefore, by detecting (selecting) this change in frequency, the open / closed state of the relay power switch SW ₂ can be detected in real time. Therefore, a structure for detecting the open or closed state of the relay power supply switch SW ₂ in conjunction with the power failure detection circuit configuration which includes a relay power switch SW _2, can be detected by a single photo coupler PC1, the configuration can be simplified.
Further, since the detection signal RELAY_Check is output from the frequency selection circuit 140, welding of the relay can also be detected by comparing with the ON / OFF signal of the relay separately by this detection signal.
Furthermore, regardless of the open or closed state of the relay power supply switch SW _2, it can be the power failure detection by the full-wave of the AC power waveform.

[Modification of Embodiment]
In addition, this invention is not limited to each embodiment mentioned above, The deformation | transformation shown below is included in the range which can achieve the objective of this invention.

That is, in each of the above-described embodiments, the configuration applied to an electrical device in which the commercial AC power is supplied and the electric processing unit 101 operates is illustrated. However, the configuration is not limited to the commercial AC power and is not limited to a commercial AC power source. The present invention can be applied not only to equipment but also to various electric equipment for home use and business use such as various manufacturing apparatuses and control apparatuses.

In the first embodiment, the power failure is detected by both waves of the AC power supply waveform using the detection bridge diode circuit 120. However, the detection bridge diode circuit 120 is not used, for example, as shown in FIG. Alternatively, a bidirectional photocoupler PC may be used.
According to the configuration of the power failure detection circuit 300 shown in FIG. 4, a power failure can be detected by both waves without using the detection bridge diode circuit 120, and the circuit configuration can be simplified.
The configuration using the bidirectional photocoupler PC in the power failure detection circuit 300 shown in FIG. 4 can be applied in place of the detection bridge diode circuit 120 in the power failure detection circuit 200 of the second embodiment shown in FIG.

Furthermore, in the first embodiment, the configuration in which a power failure is detected using both waves of the AC power supply waveform using the detection bridge diode circuit 120 is illustrated. For example, as illustrated in FIG. It is good.
That is, the power failure detection circuit 400 shown in FIG. 5 includes the capacitor C ₁ , the input terminal of the detection bridge diode circuit 120, the output terminal of the detection bridge diode circuit 120, the photocoupler diode PC1 _LED , and the detection bridge diode circuit 120 in the first embodiment. the output end, and, connected in place of the series circuit of the capacitor C _2, provided with a series circuit of a capacitor C ₁ and the photo-coupler PC1 _LED, the reverse direction of the diode D ₁₁ in parallel with the photo-coupler PC1 _LED is doing.
In the power failure detection circuit 400 of FIG. 5, the circuit configuration can be further simplified.
Then, further the simplification of the circuit configuration, to share the line cross capacitors C _x and the capacitor C ₁ in the power failure detecting circuit 400 in FIG. 5, it may be configured of a power failure detection circuit 500 shown in FIG.

In the second embodiment, for example, as shown in FIG. 7, only the frequency selection circuit 140 may be provided without providing the timer circuit 130.

In addition, the specific structure and procedure for carrying out the present invention can be appropriately changed to other structures and the like within a range in which the object of the present invention can be achieved.

[Effect of the embodiment]
According to the above embodiment, since the pulse signal is output with the differential value of the AC power supply waveform by the capacitors C ₁ and C ₂ connected in series to the photocoupler diode PC 1 _LED , the current for power failure detection is the capacitor current. Therefore, there is no power loss in the capacitors C ₁ and C ₂ , and power consumption for power failure detection can be suppressed.
Furthermore, by using the power failure detection circuit 100, standby power can be reduced and energy-saving electrical equipment can be provided.

[Relationship capacitive reactance X _C and a resistor R]
It will be specifically described the relationship between the capacitance reactance X _C and the resistance R in the power failure detection circuit of the present invention. In addition, this invention is not limited to the following examples.

(Example 1)
In the first embodiment, a resistor R ₂ is connected in series between the input terminal A of the series circuit 150 and the capacitor C _1, and a resistor R ₃ is connected in series between the input terminal A and the capacitor C _2. a resistor R ₁₀₄ to the coupler diode PC1 _LED was used connected in series.
The resistors R ₂ and R ₃ are each 10 KΩ, the resistor R ₁₀₄ is 0Ω, the capacities of the capacitors C ₁ and C ₂ are 0.047 uF, and the diodes D ₅ , D ₆ , D ₇ , D ₈ and operating resistance of the photo-coupler PC1 _LED was used as the 26Ω at 1 mA. The resistors R ₂ and R ₃ are measures against lightning surge.

An AC current of 50 Hz was applied at 100 V between the input terminals A and B of the series circuit 150, and the voltage waveform of the AC clock signal AC_CLK generated at the collector of the photocoupler transistor PC1 _TR was detected. Then, the relationship between the voltage waveform of the AC power supply and the voltage waveform of the AC clock signal AC_CLK was compared and examined. The result is shown in FIG. 8A shows the voltage waveform of the AC power supply, FIG. 8B shows the voltage waveform of the AC clock signal AC_CLK, and FIG. 8C shows the current waveform of the photocoupler diode PC1 _LED .
At this time, the resistance R (the real part of the AC impedance) of the power failure detection circuit viewed from the input terminals A and B is obtained by the following equation (2).
R = R ₂ + R ₃ = 20000 (Ω) (2)
The resistor R includes the operating resistances of the diodes D ₅ , D ₆ , D ₇ , D ₈ and the photocoupler diode PC 1 _LED , but is ignored because it is sufficiently small with respect to the resistors R ₂ , R ₃ .
On the other hand, the capacitive reactance X _C (imaginary part of AC impedance) of the power failure detection circuit viewed from the input terminals A and B is obtained by the following equation (3).
X _C = 1 / (2πfC)
= 1 / (2 × 3.14 × 50 × (0.047 / 2) × 10 ⁻⁶ )
= 136000 (3)
Thus, the ratio of the capacitive reactance X _C and the resistance R is obtained by the following equation (4).
X _C /R=6.8 (4)

From Table 1 described later, when the ratio of the capacitive reactance 1 / C and the impedance R is 6.8, the phase difference between the peak of the voltage of the AC power supply and the timing of the voltage waveform pulse of the AC clock signal AC_CLK for power failure detection is About 10 degrees. FIG. 8 is a waveform diagram obtained by circuit simulation, which almost coincides with the results in Table 1.
Example 1 is a desirable example of the power failure detection circuit of the present application.

(Example 2, Comparative Examples 1 to 3)
Example 2 was the same as Example 1 except that the capacitances of the capacitors C ₁ and C ₂ were each 0.47 uF. The result is shown in FIG. In addition, each waveform in FIG. 9 is the same as FIG.
The ratio of the capacitive reactance X _C and the resistance R in this case is determined by the following equation (5).
X _C /R=0.68 (5)
As shown in FIG. 9, the peak of the voltage of the AC power supply and the pulse timing of the voltage waveform of the AC clock signal AC_CLK for power failure detection are greatly shifted.

Comparative Example 1 was the same as Example 1 except that the capacitances of capacitors C ₁ and C ₂ were each ₂ uF. The result is shown in FIG. In addition, each waveform in FIG. 10 is the same as FIG.
The ratio of the capacitive reactance X _C and the resistance R in this case is determined by the following equation (6).
X _C /R=0.16 (6)
As shown in FIG. 10, the phase difference between the peak of the voltage of the AC power supply and the timing of the voltage waveform pulse of the AC clock signal AC_CLK for power failure detection is approximately 80 degrees. That is, the pulse timing of the voltage waveform of the AC clock signal AC_CLK is close to the zero cross of the AC power supply voltage.

Comparative Example 2 was the same as Example 1 except that the resistors R ₂ and R ₃ were 0Ω, the resistor R ₁₀₄ was 47 KΩ, and the capacities of the capacitors C ₁ and C ₂ were ₂ uF, respectively. The result is shown in FIG. Each waveform in FIG. 11 is the same as FIG.
At this time, the resistance R of the power failure detection circuit viewed from the input terminals A and B is obtained by the following equation (7).
R = R ₁₀₄ = 47000 (Ω) (7)
The resistor R includes the operating resistances of the diodes D ₅ , D ₆ , D ₇ , D ₈ and the photocoupler diode PC1 _LED , but is ignored because it is small enough for R _{2 and} R ₃ .
On the other hand, the capacitive reactance X _C (imaginary part of the AC impedance) of the power failure detection circuit viewed from the input terminals A and B is obtained by the following equation (8).
X _C = 1 / (2πfC)
= 1 / (2 × 3.14 × 50 × (2/2) × 10 ⁻⁶ )
= 3180 (8)
Accordingly, the ratio of the capacitive reactance X _C and the resistance R is determined by the following equation (9).
X _C /R=0.068 (9)
As shown in FIG. 11, the phase difference between the peak of the voltage of the AC power supply and the voltage waveform pulse of the AC clock signal AC_CLK for detecting a power failure is 86 degrees. That is, the pulse timing of the voltage waveform of the AC clock signal AC_CLK substantially coincides with the zero cross of the voltage of the AC power supply. This is the same timing as the invention described in Patent Document 5. In Patent Document 5, in order to obtain a comparison voltage, a somewhat large voltage is required in the coupler LED circuit, and an LED protection current limiting resistor corresponding to the resistor R ₁₀₄ is required so that a large current does not flow through the LED. This current limiting resistor causes power loss.
In the state of Comparative Example 2, there is an example in which the capacities of the capacitors C ₁ and C ₂ are reduced in order to match the timing of the voltage waveform pulse of the AC clock signal AC_CLK for power failure detection to the timing of the peak of the AC power supply voltage. This is Comparative Example 3.

Comparative Example 3 was the same as Example 1 except that the resistors R ₂ and R ₃ were 0Ω, the resistor R ₁₀₄ was 47 KΩ, the capacitor C ₂ was removed, and the capacitance of the capacitor C ₁ was 0.015 uF. The result is shown in FIG. Each waveform in FIG. 12 is the same as FIG.
The ratio of the capacitive reactance _{X C} and the resistance R is obtained by the following equation (10).
X _C /R=4.5 (10)
That is, the phase difference between the pulse timing of the voltage waveform of the AC clock signal AC_CLK for detecting a power failure and the peak timing of the voltage of the AC power supply is a little over 10 degrees. However, if the capacitances of the capacitors C ₁ and C ₂ are reduced in this way, the LED current becomes insufficient, causing a malfunction of the power failure detection, resulting in a decrease in power failure detection accuracy. As shown in FIG. 12C, the peak of the current waveform of the photocoupler diode PC1 _LED is 0.5 V or less, and the voltage waveform of the AC clock signal AC_CLK shown in FIG.
Therefore, in the invention described in Comparative Example 2 and Patent Document 5, it is difficult to match the timing of the voltage waveform pulse of the AC clock signal AC_CLK for power failure detection to the timing of the peak of the AC power supply voltage.

Table 1 shows the ratio of the capacitive reactance (1 / 2πfC) seen from the input terminal side to the resistance R seen from the input terminal side, and the phase difference (degree) between the zero crossing of the AC power supply voltage waveform and the power failure detection timing. When this phase difference is 90 degrees, the power failure detection timing coincides with the peak timing of the voltage waveform of the AC power supply. Since the power supply rectification timing is generally centered on this peak timing, the timing with a phase difference of 90 degrees is ideal. It is possible to promptly detect a power failure or return after an instantaneous interruption of the AC power supply. The fact that such power failure detection can be performed promptly means that the reduction of the rectified DC supply voltage of the power supply device can be suppressed, and the capacity of the rectifying capacitor required for normal power supply operation can be reduced. Become.
Further, as can be seen from Table 1, when the ratio of the capacitive reactance and the resistance, that is, the ratio of the imaginary part and the real part of the impedance viewed from the input terminal side of the power supply device is 3 or more, the change in the phase difference becomes gentle. Further, when the ratio of capacitive reactance to resistance is 6 or more, the change in phase difference becomes extremely gradual. That is, a power failure can be detected quickly by detecting a power failure within a range where the phase shift from the peak timing of the voltage waveform of the power source is within 20 degrees, preferably within 10 degrees.

The present invention can be used in a power failure detection circuit that is used in electrical equipment and detects a power failure of a supplied AC power source using a photocoupler.

Claims

A power failure detection circuit that detects a power failure of an AC power source using a photocoupler,
A series circuit in which a capacitor and a light-emitting diode of the photocoupler are provided in series between input terminals to which the AC power is supplied;
A power failure determination means for determining that the supply of the AC power supply is cut off based on a pulse signal output from a phototransistor of the photocoupler and outputting a signal indicating that a power failure has occurred, and
The power failure detection circuit, wherein the pulse signal is synchronized with a peak of a voltage waveform of the AC power supply.
The power failure detection circuit according to claim 1,
The power failure detection circuit characterized in that the capacitive reactance viewed from the input terminal side is set to a condition that is at least three times the resistance viewed from the input terminal side.
The power failure detection circuit according to claim 2,
The power failure detection circuit characterized in that the capacitive reactance viewed from the input terminal side is set to a condition that is at least six times the resistance viewed from the input terminal side.
The power failure detection circuit according to any one of claims 1 to 3,
A power failure detection circuit, wherein a bridge diode is provided between the capacitor and the light emitting diode of the photocoupler.
The power failure detection circuit according to any one of claims 1 to 3,
The photocoupler is a power failure detection circuit, wherein the light emitting diode is a bidirectional parallel circuit.
The power failure detection circuit according to claim 4 or 5,
The light-emitting diode is connected to the input terminal through the capacitor.
The power failure detection circuit according to any one of claims 1 to 3,
A relay power switch connected to the input terminal;
A capacitor connected in series to the light emitting diode in a state where the relay power switch is located on the input side and a bridge capacitor set to bridge balance;
A bidirectional ON / OFF circuit of a pair of transistors to which the voltage of the AC power supply is supplied to the base via the bridge capacitor;
A power failure detection circuit comprising: open / close detection means for determining an open / closed state of the relay power switch based on a pulse signal output from a phototransistor of the photocoupler and outputting a signal related to the open / closed state.
The power failure detection circuit according to claim 7,
A power failure detection circuit, wherein a series circuit of Zener diodes in the reverse direction is connected between the bridge capacitor and the bidirectional ON / OFF circuit.
A power failure detection circuit according to any one of claims 1 to 8,
When the signal indicating that the power failure has occurred from this power failure detection circuit is input, an electrical processing unit that performs processing to protect electrical processing at the time when this signal is input,
An electrical device characterized by comprising: