WO2009116168A1 - Receiving apparatus - Google Patents

Receiving apparatus Download PDF

Info

Publication number
WO2009116168A1
WO2009116168A1 PCT/JP2008/055284 JP2008055284W WO2009116168A1 WO 2009116168 A1 WO2009116168 A1 WO 2009116168A1 JP 2008055284 W JP2008055284 W JP 2008055284W WO 2009116168 A1 WO2009116168 A1 WO 2009116168A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
reproduction
signal
burst
received data
Prior art date
Application number
PCT/JP2008/055284
Other languages
French (fr)
Japanese (ja)
Inventor
巨生 鈴木
小崎　成治
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2008/055284 priority Critical patent/WO2009116168A1/en
Publication of WO2009116168A1 publication Critical patent/WO2009116168A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0262—Arrangements for detecting the data rate of an incoming signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0062—Network aspects
    • H04Q11/0067—Provisions for optical access or distribution networks, e.g. Gigabit Ethernet Passive Optical Network (GE-PON), ATM-based Passive Optical Network (A-PON), PON-Ring

Definitions

  • the present invention relates to a receiving apparatus that receives a burst optical signal in which a plurality of optical signals having different transmission speeds are time-multiplexed in an upstream direction such as a PON (Passive Optical Networks) system.
  • a PON Passive Optical Networks
  • Non-Patent Document 1 as a method of accommodating an upstream optical signal from each subscriber device to the master station device, a TDMA (Time DMA) in which optical signals from each subscriber are intermittently burst and multiplexed in time.
  • a PON system using the Division Multiplex Access) method is disclosed.
  • a single master station device can accommodate a plurality of subscriber devices having the same transmission light wavelength band via a single optical fiber transmission line.
  • the service cost can be reduced by sharing the devices constituting the system among the subscribers.
  • Patent Document 1 describes a technique related to such a multi-rate PON system, and specifically describes a method for accommodating subscriber devices in a downlink multi-rate PON system.
  • a general optical receiver includes an optical preamplifier and a limiting amplifier that convert an optical signal into an electric signal having an identifiable amplitude, and a CDR that extracts a clock component from received data and performs data reproduction based on phase synchronization information. (Clock and Data Recovery) circuit.
  • a PLL circuit Phased Lock Loop
  • a control signal substantially close to a DC component is applied as a control signal for frequency and phase control. This is to suppress fluctuation components (jitter) generated from the oscillator and the PLL, but due to this, a feedback control type clock extraction circuit such as a PLL essentially obtains a high-speed response characteristic. Things have become difficult.
  • Patent Document 1 Although a specific accommodation method of each subscriber apparatus in the downlink multi-rate PON system is shown, subscriber accommodation in the case of multi-rate in the uplink direction is shown. A specific configuration of a receiver (multi-rate receiver) capable of receiving burst optical signals having different transmission rates at the same optical wavelength in the method, particularly the master station device, is not shown.
  • a receiver that receives only a burst optical frame having a fixed transmission rate is known. This is because a PLL circuit using a continuous voltage control type oscillator as described above, This is also because the clock information (transmission rate information) cannot be extracted for each frame from optical frames having different transmission rates with different frequency components since only a single frequency is followed.
  • the present invention has been made in view of the above, and an object of the present invention is to obtain a multi-rate compatible receiving apparatus capable of receiving burst optical signals having different transmission speeds for each frame in the upstream direction of a multi-rate PON system. To do.
  • the present invention provides a burst optical signal in which a plurality of optical signals having any one of a plurality of predefined transmission rates are time-multiplexed.
  • a receiving device for receiving, a conversion means for converting the burst optical signal into an electric signal, and a plurality of the electric signal with a plurality of conditions determined in advance corresponding to each of the plurality of transmission speeds
  • a reproduction data generating means for generating the same number of reproduction data as the plurality of transmission speeds, selecting any one reproduction data from the plurality of reproduction data, and finally Selecting means for outputting as received data.
  • the receiving apparatus is adapted to correspond to each transmission rate with respect to a burst optical signal in which a plurality of optical signals having any one of a plurality of predefined transmission rates are time-multiplexed.
  • the data reproduction process is executed under a plurality of conditions determined in advance, and the optimum reproduction data is selected as the final reproduction data (reception data) from the obtained reproduction data.
  • FIG. 1 is a diagram illustrating a configuration example of a first embodiment of a receiving device according to the present invention.
  • FIG. 2 is a diagram illustrating a configuration example of the light receiving unit.
  • FIG. 3 is a diagram showing the relationship between the optimum phase clock, the edge phase, and the sampling result.
  • FIG. 4 is a diagram illustrating an example of optimum phase clock information output from the multi-phase CLK sampling unit at the subsequent stage of the high-speed data receiving unit.
  • FIG. 5 is a diagram illustrating a configuration example of a receiving apparatus according to the second embodiment.
  • FIG. 6 is a diagram illustrating a configuration example of a burst frame.
  • FIG. 7 is a diagram illustrating a configuration example of a receiving apparatus according to the third embodiment.
  • FIG. 8 is a diagram illustrating a configuration example of a light receiving unit included in the receiving device of the fourth embodiment.
  • FIG. 9 is a diagram illustrating a configuration example of a receiving apparatus according to the fifth embodiment.
  • FIG. 1 is a diagram illustrating a configuration example of a first embodiment of a receiving device according to the present invention.
  • the receiving apparatus includes a light receiving unit 1 (corresponding to a conversion unit) that converts an optical signal received via an optical fiber into an electrical signal, and a signal after being converted into an electrical signal.
  • a data receiving unit 2 (corresponding to a reproduction data generating unit) that performs data reproduction processing on a signal under a plurality of conditions to generate a plurality of reproduction data, and optimum reproduction data from a plurality of reproduction data that are input signals
  • a burst synchronization processing unit 3 (corresponding to selection means) to be selected and a system clock generation unit 4 are provided.
  • This receiving apparatus constitutes a master station apparatus of the PON system, and an optical signal input to the light receiving unit 1 via an optical fiber is an uplink in which a plurality of optical signals having different transmission speeds are multiplexed in time.
  • Directional optical signal is provided.
  • the data reception unit 2 includes a low-speed data reception section 2 2 for reproducing the reception unit 2 1 and the low transmission rate data for high-speed data for reproducing a high transmission rate data, also receiving high speed data
  • the unit 2 1 includes a burst preamplifier 21 1 and a burst limiting amplifier 22 1
  • the low-speed data receiving unit 2 2 includes a burst preamplifier 21 2 and a burst limiting amplifier 22 2 .
  • the high-speed data receiver 2 1 and the low-speed data receiver 2 2 constitute data reproducing means
  • the burst preamplifiers 21 1 and 21 2 constitute level adjusting means.
  • the burst limiting amplifiers 22 1 and 22 2 constitute a bit determination means.
  • the burst synchronization processing unit 3 includes multi-phase CLK (clock) sampling units 31 1 and 31 2 , a speed determination unit 32, and a data selection unit 33.
  • the multi-phase CLK sampling units 31 1 and 31 2 sample the input signal at a timing based on the system clock, and output a determination result of the optimum sampling timing and a sampling result.
  • the speed determination unit 32 determines the transmission speed of the received signal and outputs a determination result.
  • Data selection unit 33 based on the determination result by the speed determination unit 32 selects and outputs the sampling result output from the multi-phase CLK sampling unit 31 1 or 31 2.
  • the multi-phase CLK sampling units 31 1 and 31 2 constitute an optimum phase determination unit
  • the speed determination unit 32 and the data selection unit 33 constitute a reception data selection unit.
  • the transmission rate of high transmission rate data is 10.3125 Gbps (hereinafter, described as 10.31 Gbps), and the transmission rate of low transmission rate data is 1.25 Gbps.
  • the description using these specific numerical values does not limit the operation of the receiving apparatus of this embodiment.
  • a burst optical signal frame having a data rate of 10.31 Gbps (hereinafter referred to as optical signal frame a) and a burst optical signal frame having a data rate of 1.25 Gbps (hereinafter referred to as optical signal frame b) are time-multiplexed.
  • optical signal frame a a burst optical signal frame having a data rate of 10.31 Gbps
  • optical signal frame b a burst optical signal frame having a data rate of 1.25 Gbps
  • the light receiving unit 1 includes an intensity branching optical coupler 11 and photodiodes (PD) 12 1 and 12 2 .
  • PD photodiodes
  • an optical signal composed of an optical signal frame a and an optical signal frame b time-multiplexed at the same optical wavelength is input to the light receiving unit 1 through a single optical fiber, the optical signal is converted into an intensity branching optical coupler.
  • the photodiode 12 2 is an electrical transducer - optimized light to the photodiode 12 for 1 and 1.25Gbps an electric conversion element - 11 are intensity split by, optimized light for 10.31Gbps.
  • the optical signal branched by the intensity branching optical coupler 11 is simultaneously input to the photodiodes 12 1 and 12 2 .
  • the optical signal composed of the optical signal frame a and the optical signal frame b is an electrical signal in which each burst optical signal data is mixed in each photodiode (the electrical signal frame obtained by converting each optical signal frame is temporally multiplexed). Converted into an electrical signal).
  • the electrical signals output from the photodiodes 12 1 and 12 2 are sent to the high-speed data receiver 2 1 optimized for 10.31 Gbps and the high-speed data receiver 2 2 optimized for 1.25 Gbps. Each is output.
  • the burst preamplifier 21 1 In high speed data receiving section 2 1 of the data reception section 2 that has received the electric signal output from the light receiving unit 1, input to the burst preamplifier 21 1 electrical signal received has the best amplification gain (Ga) for 10.31Gbps The burst preamplifier 21 1 amplifies the input signal. Specifically, each electric signal that is intermittent in bursts and has a different signal level between signal frames is amplified according to the signal level so as to be within a predetermined output electric signal range. The electric signal after being amplified by the burst preamplifier 21 1 is input to the burst limiting amplifier 22 1 .
  • Ga amplification gain
  • an identification threshold value is extracted at a high speed in accordance with each signal level of the input electric signal frame, and a constant electric level is set as the H and L logic levels based on the identification threshold value. Is output to the burst synchronization processing unit 3. That is, the burst limiting amplifier 22 1 performs bit determination of the input signal using an identification threshold, and outputs the determination result as H or L logic level.
  • the output signal output from the burst limiting amplifier 22 1 is optimally amplified simultaneously with the burst signal data of the identified 10.31Gbps, included in the state in which the burst signal data 1.25Gbps are temporally multiplexed ing.
  • the optimal amplification gain for the electric signal received from the photodiode 12 2 is 1.25Gbps a (Gb) It is input to the burst preamplifier 21 2 having, burst preamplifier 21 2 amplifies the input signal. Specifically, electrical signals that are intermittent in bursts and have different signal levels between frames are amplified according to the signal level so as to be within a predetermined output electrical signal range. The electric signal after being amplified by the burst preamplifier 21 2 is input to the burst limiting amplifier 22 2 .
  • an identification threshold value is extracted at a high speed according to each signal level of the input electric signal frame, and a constant electric level is set as the H and L logic levels based on the identification threshold value. Is output to the burst synchronization processing unit 3.
  • the output signal output from the burst limiting amplifier 22 2 is optimally amplified simultaneously with the burst signal data identified 1.25 Gbps, included in the state in which the burst signal data 10.31Gbps is temporally multiplexed ing.
  • Burst synchronization processing section 3 that has received the signal outputted from the data receiver 2, the signal output from the high-speed data receiving section 2 1 (burst electric signal), the speed to extract only data 10.31Gbps, system Synchronize with the system clock output from the clock generator 4. Further, the signal output from the low-speed data receiver 2 2 (burst electric signal), the speed to extract only data of 1.25 Gbps, synchronized to the system clock output from system clock generator 4. Then, either 10.31 Gbps data or 1.25 Gbps data synchronized with the system clock is selected and output as identification reproduction synchronization data (reproduced reception data). The operation for reproducing the received data will be described in detail below.
  • the signal output from the data receiving unit high speed data receiver unit 21 1 of 2 is inputted to the multi-phase CLK sampling unit 31 1 of the burst synchronization processing unit 3, the multi-phase CLK sampling unit 31 1, synchronized to the system clock 10.31
  • the input signal (output data from the high-speed data receiving unit 21 1 ) is sampled with a GHz ⁇ 8 phase clock.
  • one data series sampled with the optimum phase clock is selected from the data series sampled with each phase clock and output to the data selection unit 33.
  • information on the optimum phase clock (optimum sampling timing) for the output data is output to the speed determination unit 32 as optimum phase information.
  • the optimum phase clock is a phase clock farthest from the sampled edge (data change point) phase.
  • the relationship between the optimum phase clock and the edge phase will be described with reference to FIG.
  • FIG. 3 is a diagram showing the relationship between the optimum phase clock, the edge phase, and the sampling result.
  • the phase clock ⁇ 4> is determined as the optimum phase is schematically shown.
  • the phase of the data edge (change point) is phase clock ⁇ 0> and phase clock ⁇ 7
  • the phase clock ⁇ 4> farthest from these data edge phases is determined as the optimum phase. Further, as shown in FIG.
  • the data sequence ⁇ 4> is output in synchronization with the system clock as a sampling result. That is, the multi-phase CLK sampling unit 31 1 outputs the sampling result at the optimum phase for one system clock cycle. For example, if the sampling result at the optimum phase is H, H is output in a section between two data edge phases corresponding to (before and after) the optimum phase. As a result, the multi-phase CLK sampling unit 31 1 outputs the same signal as the signal input from the high-speed data receiving unit 2 1 .
  • FIG. 4 is a diagram showing an example of the optimum phase clock information outputted from the multi-phase CLK sampling unit 31 1.
  • 10.31 Gbps data input data
  • 10.31 GHz clock arbitrary fixed optimum phase information is always output if the input data jitter and the jitter component superimposed on the sampling clock are ignored.
  • the phase clock ⁇ 4> is always output as the optimum phase.
  • the output signal data from the high speed data receiving section 2 1 not only 10.31Gbps data, and 1.25Gbps data is temporally multiplexed.
  • the optimum phase obtained from the 1.25 Gbps data varies with time. For example, 8 times 1.25 Gbps is 10 Gbps, and when 10 Gbps data is sampled with a 10.31 GHz clock, the relationship of the following equation (1) is established.
  • Equation (1) can be interpreted as follows.
  • the 10.31 Gbps data When 10 Gbps data is sampled with a 10.31 GHz clock, the 10.31 Gbps data output shifts by 1 bit every 32 bits, that is, the optimum phase information changes with time, with 32 bits as one cycle.
  • FIG. 4 shows this phenomenon. It can be seen that when 1.25 Gbps data is sampled at 10.31 GHz, the optimum phase fluctuates by one cycle every 32 bits. Therefore, the speed determination unit 32 determines the transmission speed using the periodic fluctuation information of the optimum phase information as speed information.
  • the optimum phase information output from the multi-phase CLK sampling unit 31 1, time-fixed optimum phase information extracted time segment of 10.31Gbps data interval, the time-optimal phase information by periodic variation And the determination result is output to the data selection unit 33 as a speed determination signal.
  • the signal output from the high-speed data receiving unit 21 2 of the data receiving unit 2 is input to the multi-phase CLK sampling unit 312 of the burst synchronization processing unit 3, and the multi-phase CLK sampling unit 31 2 is synchronized with the system clock. sampling the input signal at the 1.25 GHz ⁇ 8-phase clock, similarly to the high speed data receiving section 21 1 described above, when the data of 1.25Gbps is input, the fixing of optimum phase information, the optimum phase clock And the sampled data series.
  • 10.31Gbps data normally amplified in the low-speed data reception unit 2 2, not identified.
  • the optical receiver normally optimized for 1.25 Gbps corresponding to the low-speed data receiver 2 2 in the receiving apparatus shown in FIG. 1
  • the multi-phase CLK sampling unit 31 2 in the time interval in which 10.31Gbps data is input, and to output the indeterminate optimum phase information. That is, the optimum phase information is normally output only in the 1.25 Gbps data section.
  • the multi-phase CLK enter the optimum phase information output from the sampling unit 31 2 to the speed determination unit 32, among the optimum phase information output outputted from the multi-phase CLK sampling unit 31 1 described above, the periodicity information and time intervals with, that optimum phase information output which is output from the multi-phase CLK sampling unit 31 2 takes the product of the outputs become time interval of fixed, it is possible to reduce the rate decision error probability.
  • Data selection unit 33 based on the speed determination signal input from the speed determination unit 32, selects the multi-phase CLK data sequence is input from the sampling unit 31 1 or the multi-phase CLK input data sequence from the sampling unit 31 2 And output as identification reproduction synchronization data (final received data). Specifically, in a section where the speed determination signal indicates 10.31Gbps data section outputs a data sequence input from the multi-phase CLK sampling unit 31 1, from multi-phase CLK sampling unit 31 2 in the section showing the 1.25Gbps data section Output the input data series.
  • the receiving apparatus is a block for reproducing received data from a signal having a specific transmission rate in a signal obtained by time-multiplexing optical signals having different transmission rates (the burst preamplifier and burst limiting).
  • a plurality of amplifiers individually executes data reproduction processing on the input signal, and selects the optimum reproduction data from the plurality of reproduction data to obtain final reproduction data ( Output as received data).
  • a plurality of blocks for executing reception data reproduction processing are provided, and in each block, optimum conditions for reproducing data at a specific transmission rate are set in advance. Since the transmission rate is determined based on the phase determination result obtained by sampling at a specific period, it is based on the complicated rate determination signal extraction function required by the conventional receiver and the speed determination signal. Control of the burst preamplifier and burst limiting amplifier is unnecessary, and the cost of the receiving apparatus can be reduced.
  • FIG. 5 is a diagram illustrating a configuration example of a receiving apparatus according to the second embodiment.
  • the receiving apparatus of this embodiment has a configuration including a burst synchronization processing unit 3a instead of the burst synchronization processing unit 3 of the receiving apparatus (see FIG. 1) shown in the first embodiment. Since the configuration other than the burst synchronization processing unit 3a is the same as that of the receiving apparatus of the first embodiment, the same reference numerals are given and the description thereof is omitted.
  • the burst synchronization processing unit 3a (corresponding to the reception data reproduction means) includes a speed determination unit 32a, a data selection unit 33a, a header identification unit 34, a switch 35, and a multiphase CLK sampling unit 36.
  • the data selection unit 33 a includes a switch 331 and a low speed data reproduction unit 332.
  • the header identification unit 34 and the switch 35 constitute a reproduction data selection unit
  • the speed determination unit 32a and the data selection unit 33a constitute a final reception data reproduction unit.
  • the speed determination unit 32a determines the transmission speed of the received signal and outputs a determination result.
  • the data selection unit 33a reproduces the received data based on the input signals from the speed determination unit 32a and the multiphase CLK sampling unit 36.
  • the switch 331 switches the output destination of the input signal (input data) from the multiphase CLK sampling unit 36 according to the content of the speed determination signal received from the speed determination unit 32a. That is, switching is made between whether the input data is output as it is as final reproduction data (identification reproduction synchronization data) or is passed to the low-speed data reproduction unit 332.
  • the low-speed data reproducing unit 332 reproduces received data (low transmission rate data) based on the data.
  • Header identification unit 34 analyzes the information contained in the header of the received frame received via the receiving unit 2 1 for high-speed data, and controls the switch 35 based on the analysis result.
  • Switch 35 in accordance with an instruction from the header identification unit 34, is input by selecting the output signal from one of the high-speed data receiving section 2 1 or low-speed data reception section 2 2 to the multi-phase CLK sampling unit 36.
  • the multi-phase CLK sampling unit 36 samples an input signal at a timing based on the system clock and outputs a sampling result.
  • the transmission rate of high transmission rate data is 10.3125 Gbps (note that it is 10.31 Gbps in the description), and the transmission rate of low transmission rate data is 1.25 Gbps.
  • FIG. 6 is a diagram illustrating a configuration example of a burst frame. As shown in FIG. 6, in a burst frame, a “10” alternating pattern that is a fixed frequency component is usually prepared as a header.
  • the header identifying section 34 by detecting the frequency component of the header section, 1.25 Gbps data output from 10.31Gbps data section and the low speed data receiving section 2 2 output from the high-speed data receiving section 2 1
  • the switch 35 is controlled so as to switch between the sections and to output to the multi-phase CLK sampling unit 36.
  • hxAAAA... (10101010101010) Is inserted as a header. It controls the switch 35 to select the output of the receiving section 2 1.
  • detecting a frequency of 625MHz controls the switch 35 so that the transmission speed to select the output of the receiving unit 2 2 for the low-speed data determines that the 1.25 Gbps.
  • Polyphase CLK sampling unit 36 performs the same processing as the multi-phase CLK sampling unit 31 1 receiving apparatus equipped with the first embodiment, the sampled data sequence at the optimum phase clock to the data selector 33a, also Then, the optimum phase information which is the information of the optimum phase clock is output to the speed determination unit 32a.
  • the speed determination unit 32a determines the transmission speed of the received data by the same determination method as the speed determination unit 32 provided in the receiving apparatus of Embodiment 1, and outputs the determination result to the data selection unit 33a.
  • the switch 331 outputs the output from the multiphase CLK sampling unit 36 as identification reproduction synchronization data (high-speed data) when the speed determination signal input from the speed determination unit 32a indicates a 10.31 Gbps data section. To do. On the other hand, when the speed determination signal indicates a 1.25 Gbps data section, the output from the multiphase CLK sampling unit 36 is output to the low-speed data reproduction unit 332.
  • the low speed data reproducing unit 332 reproduces 1.25 Gbps data based on the input signal.
  • the receiving apparatus is a block for reproducing received data from a signal having a specific transmission rate in a signal obtained by time-multiplexing optical signals having different transmission rates (the burst preamplifier and burst limiting).
  • a plurality of amplifiers each block individually performing data reproduction processing on the input signal, and selecting the optimum reproduction data from a plurality of reproduction data, based on the selected signal The final received data was reproduced.
  • FIG. 7 is a diagram illustrating a configuration example of a receiving apparatus according to the third embodiment.
  • the receiving apparatus according to the present embodiment replaces the data receiving section 2 and burst synchronization processing section 3 of the receiving apparatus (see FIG. 1) shown in the first embodiment with a data receiving section 2b and burst synchronization processing section 3b (received data). (Corresponding to reproducing means).
  • the light-receiving part 1 is the same as what was shown in Embodiment 1, description is abbreviate
  • the data receiving unit 2b includes burst preamplifiers 21 1 and 21 2 (corresponding to level adjusting means) and a burst limiting amplifier 23 (corresponding to reception data candidate generating means), and the burst limiting amplifier 23 includes: A switch 231, a header identification unit 232, and a gain switching type limiting amplifier 233 are provided. Note that burst preamplifiers 21 1 and 21 2 are the same as burst preamplifiers 21 1 and 21 2 provided in the receiving apparatus of the first embodiment, and thus description thereof is omitted.
  • the burst limiting amplifier 23 of the data reception unit 2b selects the output from the burst preamplifier 21 1 or 21 2 , and further generates temporary reception data (reception data candidate) based on the selected signal.
  • the header identifying unit 232 analyzes information included in the header of the received frame received from the burst preamplifier 21 1 , and switches based on the analysis result. 231 and the limiting amplifier 233 are controlled.
  • the switch 231 selects an output signal from the burst preamplifier 21 1 or the burst preamplifier 21 2 in accordance with an instruction from the header identification unit 232 and outputs the selected signal to the limiting amplifier 233.
  • the limiting amplifier 233 performs bit determination of the input signal using the identification threshold value instructed from the header identifying unit 232.
  • the burst synchronization processing unit 3b is obtained by removing the header identification unit 34 and the switch 35 from the burst synchronization processing unit 3a provided in the receiving apparatus (see FIG. 5) according to the second embodiment. Is the same as the burst synchronization processing unit 3a. For this reason, the same reference numerals as those assigned to the respective constituent elements of the burst synchronization processing unit 3a are given and the description thereof is omitted.
  • the transmission rate of high transmission rate data is 10.3125 Gbps (note that it is 10.31 Gbps in the description), and the transmission rate of low transmission rate data is 1.25 Gbps.
  • the header identifying unit 232 When receiving the output signal from the burst preamplifier 21 1 , in the burst limiting amplifier 23, first, the header identifying unit 232 detects the header section of the head region of the received burst frame. Then, the switch 231 is controlled according to the information stored in the header section, and either the burst preamplifier 21 1 output or the burst preamplifier 21 2 output is input to the limiting amplifier 233.
  • the operation of the header identifying unit 232 detecting the header section of the head region of the burst frame and controlling the switch 231 is the same as the operation of the header identifying unit 34 described in the second embodiment.
  • the burst frame transmission rate is determined using the header section information, and the switch 231 is controlled so that the signal from the burst preamplifier corresponding to the determination result is input to the limiting amplifier 233.
  • the header identification unit 232 also changes the setting of the limiting amplifier 233 based on the determination result. That is, the transmission rate is determined to change settings so that the burst limiting amplifier 22 1 and the same configuration shown in the first embodiment if 10.31Gbps, whereas, the transmission rate is determined is if 1.25Gbps embodiment The setting is changed so that the setting is the same as that of the burst limiting amplifier 22 2 shown in the first embodiment.
  • the limiting amplifier 233 performs threshold determination using an identification threshold (the identification threshold set by the header identification unit 232) according to the signal level of the input frame, and the determination result is obtained. Output as H and L logic levels.
  • the transmission rate determination using the header information of the received frame is performed before the burst limiting amplifier, and the signal level is desired for the received signal corresponding to the determination result.
  • the data reproduction process including the process of adjusting the level and the sampling process is executed.
  • the header detection function (corresponding to the transmission rate judgment processing of the received signal using the header information) is usually integrated into a limiting amplifier that can be realized as an IC, and is shared for burst signal frames of different rates. As a result, the circuit scale and power consumption can be further reduced.
  • FIG. 8 is a diagram illustrating a configuration example of a light receiving unit included in the receiving device of the fourth embodiment.
  • the light receiving unit 1 see FIG. 2 of the receiving apparatus shown in the first embodiment is replaced with the light receiving unit 1c shown in FIG. Therefore, in the present embodiment, only the light receiving unit 1c different from the receiving device of the first embodiment will be described.
  • the light receiving unit 1 c of the present embodiment is configured by a photodiode 13.
  • the optical signal input to the light receiving unit 1 is input to the photodiode 13 which is a photoelectric conversion element.
  • the optical signal frames a and b constituting the optical signal are commonly input to the photodiode 13.
  • the input optical signal frames a and b are converted into an electric signal in which each burst optical signal data is mixed, and the electric signal output from the photodiode 13 is a high-speed data receiving unit 2 1 optimized for 10.31 Gbps. and output respectively optimized high speed data receiving section 2 2 for 1.25 Gbps.
  • the optical signal is converted into an electric signal, and then branched to each of the plurality of reception processing units corresponding to each transmission speed of the received signal.
  • the number of optical components can be reduced as compared with the receiving apparatuses of Embodiments 1 to 3 described above, and cost reduction can be realized.
  • FIG. 9 is a diagram illustrating a configuration example of a receiving apparatus according to the fifth embodiment.
  • the receiving apparatus according to the present embodiment includes a light receiving section 1d (corresponding to conversion means) and a data receiving section instead of the light receiving section 1 and the data receiving section 2 of the receiving apparatus (see FIG. 1) shown in the first or second embodiment.
  • a configuration with 2d (corresponding to reproduction data generating means) is adopted.
  • the burst synchronization processing unit 3 is the same as that shown in the first embodiment, but may be the one shown in the second embodiment (burst synchronization processing unit 3a shown in FIG. 5).
  • the light converts the input optical signal into an electrical signal - comprises a photodiode 12 1 is an electrical conversion element. Note that this photodiode is the same as the photodiode 12 1 constituting the light receiving unit 1 shown in the first embodiment.
  • Data receiving unit 2d, a high speed data receiving section 2d 1 and the low-speed data reception section 2d 2, also high-speed data receiving section 2d 1 is provided with a burst preamplifier 21 1 and burst limiting amplifier 22 d 1, the low speed data
  • the reception unit 2d 2 includes a burst limiting amplifier 22d 2 .
  • the burst preamplifier 21 1 is the same as the burst preamplifier 21 1 provided in the receiving apparatus of the first embodiment.
  • the transmission rate of high transmission rate data is 10.3125 Gbps (note that it is 10.31 Gbps in the description), and the transmission rate of low transmission rate data is 1.25 Gbps.
  • the electric signal after being amplified by the burst preamplifier 21 1 is input to the burst limiting amplifiers 22 1 and 22 2 .
  • an identification threshold is extracted at a high speed in accordance with each signal level of the input electric signal frame, and the H and L logic levels based on the identification threshold are constant. It is output to the burst synchronization processing unit 3 at the electrical level.
  • the burst limiting amplifier 22 2 has an optimum gain band for 1.25 Gbps.
  • the output signal output from the burst limiting amplifier 22 1 is optimally amplified simultaneously with the burst signal data of the identified 10.31Gbps, included in the state in which the burst signal data 1.25Gbps are temporally multiplexed ing.
  • the burst limiting amplifier band is optimized so that the noise characteristic (SNR: signal-to-noise intensity ratio) is the best for 10.31 Gbps signals.
  • the output signal output from the burst limiting amplifier 22 2 is optimally amplified simultaneously with the burst signal data identified 1.25 Gbps, included in the state in which the burst signal data 10.31Gbps is temporally multiplexed ing.
  • the burst limiting amplifier band is optimized so that the noise characteristic (SNR: signal-to-noise intensity ratio) is the best for a 1.25 Gbps signal.
  • Output signals from the burst limiting amplifiers 22 1 and 22 2 are input to the burst synchronization processing unit 3, and the burst synchronization processing unit 3 operates in the same manner as the burst synchronization processing unit described in the first embodiment on the input signal. To play the received data.
  • the receiving apparatus shown in the above-described embodiment is modified to share the light receiving unit and the burst preamplifier at each transmission rate.
  • the number of parts can be further reduced as compared with the receiving apparatus of the fourth embodiment described above, and further cost reduction can be realized.
  • the receiver shown in FIG. 1 includes and three or more pairs of multi-phase CLK sampling unit (corresponding to high-speed data receiving section 22 1) receiving sections corresponding to the transmission rate, burst synchronization processing unit 3 (data selection unit 33) selects and outputs one of the received data reproduced in each reception unit.
  • the speed determination unit 32 can determine the transmission rate of the received frame using the optimum phase information output from each multi-phase CLK sampling unit based on the above-described optimum phase characteristics (see FIG. 4 and the like).
  • the receiving apparatus is useful for an optical signal receiving apparatus.
  • it constitutes a master station apparatus of a PON system, and an upstream direction in which a plurality of optical signals having different transmission speeds are time-multiplexed. It is suitable for a receiving apparatus that receives a burst optical signal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Optical Communication System (AREA)

Abstract

A receiving apparatus for receiving a burst optical signal which is obtained by time-multiplexing a plurality of optical signals having one of a plurality of predetermined transmission speeds, the apparatus including a light-receiving section (1) for converting the burst light signal into an electric signal, a data-receiving section (2) for performing a data regeneration process for plural times using a plurality of conditions that have been determined in advance correspondingly to the plurality of respective transmission speeds to generate the same number of regenerated data as the number of the plurality of transmission speeds, and a burst synchronization section (3) for selecting one regenerated data from the plurality of regenerated data to output it as a final received data.

Description

受信装置Receiver
　本発明は、ＰＯＮ（Passive　Optical　Networks）システムなどの上り方向において、伝送速度が異なる複数の光信号が時間多重化されたバースト光信号を受信する受信装置に関する。 The present invention relates to a receiving apparatus that receives a burst optical signal in which a plurality of optical signals having different transmission speeds are time-multiplexed in an upstream direction such as a PON (Passive Optical Networks) system.
　近年、インターネットや、音楽配信、双方向データ通信等の急激な普及に伴い、加入者光アクセス網において、大幅なブロードバンド化が要求されてきている。この要求に応えるため、2004年度以降にＦＴＴＨ（Fiber-to-the-home）サービスの本格的な市場展開が開始され、加入者光アクセスサービスへの加入者数は指数関数的な増大を見せている。このような広帯域光アクセス網を収容するシステムとして、光ファイバ及び光カプラを用いて親局装置（ＯＬＴ：Optical　Line　Terminal）と加入者装置（ＯＮＵ：Optical　Network　Unit）を双方向で結ぶＰＯＮ（Passive　Optical　Networks）システムが主流となっている。このＰＯＮシステムについては、例えば下記非特許文献１にそのシステム構成が開示されている。 In recent years, with the rapid spread of the Internet, music distribution, two-way data communication, etc., there has been a demand for drastic broadband in subscriber optical access networks. In order to meet this demand, full-scale market development of FTTH (Fiber-to-the-home) service started in 2004 and the number of subscribers to the subscriber optical access service has increased exponentially. Yes. As a system for accommodating such a broadband optical access network, a PON (Passive) that connects a master station device (OLT: Optical Line Terminal) and a subscriber device (ONU: Optical Network Unit) using an optical fiber and an optical coupler. Optical Networks) system is mainstream. About this PON system, the system structure is disclosed by the following nonpatent literature 1, for example.
　下記非特許文献１では、各加入者装置から親局装置に向けた上り方向の光信号の収容方法として、各加入者からの光信号をバースト的に間欠させ、時間的に多重させるＴＤＭＡ（Time　Division　Multiplex　Access）方式を適用したＰＯＮシステムが開示されている。この方式により、一芯の光ファイバ伝送路を介して、一つの親局装置が同一の送信光波長帯を有する複数の加入者装置を収容可能となる。また、各加入者間でシステムを構成する装置を共有してサービスコストの低減を実現可能にしている。このように、ＰＯＮシステムの持つ利点により、広帯域光アクセス網における一層の経済化と、さらなる加入者数の増大が実現されている。 In Non-Patent Document 1 below, as a method of accommodating an upstream optical signal from each subscriber device to the master station device, a TDMA (Time DMA) in which optical signals from each subscriber are intermittently burst and multiplexed in time. A PON system using the Division Multiplex Access) method is disclosed. According to this method, a single master station device can accommodate a plurality of subscriber devices having the same transmission light wavelength band via a single optical fiber transmission line. In addition, the service cost can be reduced by sharing the devices constituting the system among the subscribers. Thus, due to the advantages of the PON system, further economic improvement in the broadband optical access network and further increase in the number of subscribers are realized.
　また、加入者光アクセス網の広帯域化要求を受け、伝送速度をさらに向上させた高伝送速度ＰＯＮシステムの検討がなされており、すでにサービスが運用されている既存のＰＯＮシステムとこの高伝送速度ＰＯＮシステムの混在共存が可能なマルチレートＰＯＮシステムの提供が期待されている。下記特許文献１には、このようなマルチレートＰＯＮシステムに関する技術が記載されており、具体的には、下り方向のマルチレートＰＯＮシステムにおける加入者装置の収容方法が記載されている。 Further, in response to a request for broadband access of the subscriber optical access network, a high transmission rate PON system in which the transmission rate is further improved is being studied. The existing PON system in which the service is already in operation and this high transmission rate PON system are being studied. It is expected to provide a multi-rate PON system capable of coexisting systems. The following Patent Document 1 describes a technique related to such a multi-rate PON system, and specifically describes a method for accommodating subscriber devices in a downlink multi-rate PON system.
特開２００７－２８８６５５号公報JP 2007-288655 A
　従来のＰＯＮシステムにおいて、親局装置における上り方向のバースト光受信器は、バースト受信に特有の技術課題を有している。この技術課題を以下に説明する。一般的な光受信器は、光信号を識別可能な振幅を持つ電気信号に変換する光プリアンプ及びリミッティングアンプと、受信データからクロック成分を抽出し、位相同期情報に基づいてデータ再生を行うＣＤＲ（Clock　and　Data　Recovery）回路から構成されている。そして、このＣＤＲにおけるクロック成分を抽出する方式としては、連続電圧制御型発振器を用いたＰＬＬ回路（Phased　Lock　Loop）が通常用いられる。ここで、ＰＬＬ方式においては、周波数及び位相制御用の制御信号として、ほぼＤＣ成分に近い制御信号が適用される。これは発振器及びＰＬＬから発生するゆらぎ成分（ジッタ）を抑圧するためであるが、このことに起因して、本質的にＰＬＬのような帰還制御型クロック抽出回路においては、高速な応答特性を得る事が困難となっている。 In the conventional PON system, the upstream burst optical receiver in the master station apparatus has a technical problem peculiar to burst reception. This technical problem will be described below. A general optical receiver includes an optical preamplifier and a limiting amplifier that convert an optical signal into an electric signal having an identifiable amplitude, and a CDR that extracts a clock component from received data and performs data reproduction based on phase synchronization information. (Clock and Data Recovery) circuit. As a method for extracting clock components in the CDR, a PLL circuit (Phased Lock Loop) using a continuous voltage controlled oscillator is usually used. Here, in the PLL system, a control signal substantially close to a DC component is applied as a control signal for frequency and phase control. This is to suppress fluctuation components (jitter) generated from the oscillator and the PLL, but due to this, a feedback control type clock extraction circuit such as a PLL essentially obtains a high-speed response characteristic. Things have become difficult.
　そのため、たとえば、上記特許文献１においては、下り方向のマルチレートＰＯＮシステムにおける、各加入者装置の具体的な収容方法については示されているものの、上り方向をマルチレート化する場合の加入者収容方法、特に親局装置において、同一の光波長にて、異なる伝送速度を持つバースト光信号を受信可能な受信器（マルチレート受信器）の具体的な構成については示されていない。 Therefore, for example, in Patent Document 1, although a specific accommodation method of each subscriber apparatus in the downlink multi-rate PON system is shown, subscriber accommodation in the case of multi-rate in the uplink direction is shown. A specific configuration of a receiver (multi-rate receiver) capable of receiving burst optical signals having different transmission rates at the same optical wavelength in the method, particularly the master station device, is not shown.
　また、従来のバースト光受信器として、固定の伝送速度のバースト光フレームのみを受信する受信器が知られているが、これは、前述のような連続電圧制御型発振器を用いたＰＬＬ回路は、単一の周波数のみに追随するため、周波数成分の異なる伝送速度の光フレームからフレーム毎にクロック情報（伝送速度情報）を抽出できないことにも起因している。 In addition, as a conventional burst optical receiver, a receiver that receives only a burst optical frame having a fixed transmission rate is known. This is because a PLL circuit using a continuous voltage control type oscillator as described above, This is also because the clock information (transmission rate information) cannot be extracted for each frame from optical frames having different transmission rates with different frequency components since only a single frequency is followed.
　また、通常、ＰＯＮシステムでは、伝送速度情報を抽出した場合でも、伝送速度情報に基づいて光受信器のフロントエンドであるプリアンプやリミッティングアンプの制御が必要であり、受信処理の複雑さや処理時間が増大する要因となっていた。 In general, in the PON system, even when the transmission rate information is extracted, it is necessary to control the preamplifier and the limiting amplifier that are the front end of the optical receiver based on the transmission rate information. Was a factor that increased.
　本発明は、上記に鑑みてなされたものであって、マルチレートＰＯＮシステムの上り方向において、フレーム毎に伝送速度の異なるバースト光信号を受信可能なマルチレート対応の受信装置を得ることを目的とする。 The present invention has been made in view of the above, and an object of the present invention is to obtain a multi-rate compatible receiving apparatus capable of receiving burst optical signals having different transmission speeds for each frame in the upstream direction of a multi-rate PON system. To do.
　また、周波数成分の異なる伝送速度の光フレームからフレーム毎にクロック情報（伝送速度情報）を抽出可能な受信装置を得ることを目的とする。 It is another object of the present invention to obtain a receiving apparatus capable of extracting clock information (transmission rate information) for each frame from optical frames having different transmission rates of frequency components.
　さらに、受信処理の複雑さや処理時間を従来よりも低減させた受信装置を得ることを目的とする。 Furthermore, it aims at obtaining the receiver which reduced the complexity and the processing time of the reception process compared with the past.
　上述した課題を解決し、目的を達成するために、本発明は、予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号を受信する受信装置であって、前記バースト光信号を電気信号に変換する変換手段と、前記電気信号に対して、前記複数の伝送速度それぞれに対応させて予め決定しておいた複数の条件で複数回のデータ再生処理を実行し、前記複数の伝送速度と同じ数の再生データを生成する再生データ生成手段と、前記複数の再生データの中のいずれか一つの再生データを選択し、最終的な受信データとして出力する選択手段と、を備えることを特徴とする。 In order to solve the above-described problems and achieve the object, the present invention provides a burst optical signal in which a plurality of optical signals having any one of a plurality of predefined transmission rates are time-multiplexed. A receiving device for receiving, a conversion means for converting the burst optical signal into an electric signal, and a plurality of the electric signal with a plurality of conditions determined in advance corresponding to each of the plurality of transmission speeds A reproduction data generating means for generating the same number of reproduction data as the plurality of transmission speeds, selecting any one reproduction data from the plurality of reproduction data, and finally Selecting means for outputting as received data.
　本発明にかかる受信装置は、予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号に対して、各伝送速度にそれぞれ対応させて予め決定しておいた複数の条件でデータ再生処理を実行し、得られた複数の再生データの中から最適なものを最終的な再生データ（受信データ）として選択することとしたので、受信処理の複雑さや処理時間を従来よりも低減させることができる、という効果を奏する。 The receiving apparatus according to the present invention is adapted to correspond to each transmission rate with respect to a burst optical signal in which a plurality of optical signals having any one of a plurality of predefined transmission rates are time-multiplexed. The data reproduction process is executed under a plurality of conditions determined in advance, and the optimum reproduction data is selected as the final reproduction data (reception data) from the obtained reproduction data. There is an effect that the processing complexity and processing time can be reduced as compared with the prior art.
　また、従来は適用が困難であったＰＯＮシステムの上り方向すなわち親局装置において、同一波長にて、異なる伝送速度のフレームが時間的に間欠、多重されたバースト光信号を受信することができる、という効果を奏する。 Further, in the upstream direction of the PON system, which is difficult to apply in the past, that is, in the master station device, it is possible to receive burst optical signals in which frames of different transmission speeds are intermittently and multiplexed at the same wavelength. There is an effect.
図１は、本発明にかかる受信装置の実施の形態１の構成例を示す図である。FIG. 1 is a diagram illustrating a configuration example of a first embodiment of a receiving device according to the present invention. 図２は、受光部の構成例を示す図である。FIG. 2 is a diagram illustrating a configuration example of the light receiving unit. 図３は、最適位相クロック、エッジ位相およびサンプリング結果の関係を示す図である。FIG. 3 is a diagram showing the relationship between the optimum phase clock, the edge phase, and the sampling result. 図４は、高速データ用受信部の後段の多位相ＣＬＫサンプリング部から出力される最適位相クロック情報の一例を示す図である。FIG. 4 is a diagram illustrating an example of optimum phase clock information output from the multi-phase CLK sampling unit at the subsequent stage of the high-speed data receiving unit. 図５は、実施の形態２の受信装置の構成例を示す図である。FIG. 5 is a diagram illustrating a configuration example of a receiving apparatus according to the second embodiment. 図６は、バーストフレームの構成例を示す図である。FIG. 6 is a diagram illustrating a configuration example of a burst frame. 図７は、実施の形態３の受信装置の構成例を示す図である。FIG. 7 is a diagram illustrating a configuration example of a receiving apparatus according to the third embodiment. 図８は、実施の形態４の受信装置が備える受光部の構成例を示す図である。FIG. 8 is a diagram illustrating a configuration example of a light receiving unit included in the receiving device of the fourth embodiment. 図９は、実施の形態５の受信装置の構成例を示す図である。FIG. 9 is a diagram illustrating a configuration example of a receiving apparatus according to the fifth embodiment.
符号の説明Explanation of symbols
　１、１ｃ、１ｄ　受光部
　２、２ｂ、２ｄ　データ受信部
　２1　高速データ用受信部
　２2、２ｄ2　低速データ用受信部
　３、３ａ、３ｂ　バースト同期処理部
　４　システムクロック生成部
　１１　強度分岐光カプラ
　１２1、１２2、１３　ホトダイオード
　２１1、２１2　バーストプリアンプ
　２２1、２２ｄ1、２２2、２３　バーストリミティングアンプ
　３１1、３１2、３６　多位相ＣＬＫサンプリング部
　３２、３２ａ　速度判定部
　３３、３３ａ　データ選択部
　３４、２３２　ヘッダ識別部
　３５、２３１、３３１　スイッチ
　２３３　リミティングアンプ
　３３２　低速データ再生部 1, 1c, 1d Light receiving unit 2, 2b, 2d Data receiving unit 2 1 High-speed data receiving unit 2 2 , 2d 2 Low-speed data receiving unit 3, 3a, 3b Burst synchronization processing unit 4 System clock generation unit 11 Intensity split light Couplers 12 1 , 12 2 , 13 Photodiodes 21 1 , 21 2 Burst preamplifiers 22 1 , 22d 1 , 22 2 , 23 Burst limiting amplifiers 31 1 , 31 2 , 36 Multi-phase CLK sampling units 32, 32 a Speed determination unit 33, 33a Data selection unit 34, 232 Header identification unit 35, 231, 331 Switch 233 Limiting amplifier 332 Low-speed data reproduction unit
　以下に、本発明にかかる受信装置の実施の形態を図面に基づいて詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではない。 Hereinafter, an embodiment of a receiving apparatus according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.
実施の形態１．
　図１は、本発明にかかる受信装置の実施の形態１の構成例を示す図である。図１に示したように、本実施の形態の受信装置は、光ファイバ経由で受信した光信号を電気信号に変換する受光部１（変換手段に相当）と、電気信号に変換された後の信号に対して複数の条件でデータ再生処理を行い複数の再生データを生成するデータ受信部２（再生データ生成手段に相当）と、入力信号である複数の再生データの中から最適な再生データを選択するバースト同期処理部３（選択手段に相当）と、システムクロック生成部４と、を備える。なお、この受信装置は、ＰＯＮシステムの親局装置を構成し、光ファイバ経由で受光部１へ入力される光信号は、異なる伝送速度を有する複数の光信号が時間的に多重化された上り方向の光信号とする。 Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of a first embodiment of a receiving device according to the present invention. As shown in FIG. 1, the receiving apparatus according to the present embodiment includes a light receiving unit 1 (corresponding to a conversion unit) that converts an optical signal received via an optical fiber into an electrical signal, and a signal after being converted into an electrical signal. A data receiving unit 2 (corresponding to a reproduction data generating unit) that performs data reproduction processing on a signal under a plurality of conditions to generate a plurality of reproduction data, and optimum reproduction data from a plurality of reproduction data that are input signals A burst synchronization processing unit 3 (corresponding to selection means) to be selected and a system clock generation unit 4 are provided. This receiving apparatus constitutes a master station apparatus of the PON system, and an optical signal input to the light receiving unit 1 via an optical fiber is an uplink in which a plurality of optical signals having different transmission speeds are multiplexed in time. Directional optical signal.
　また、データ受信部２は、高伝送速度データを再生するための高速データ用受信部２1および低伝送速度データを再生するための低速データ用受信部２2を備え、また、高速データ用受信部２1は、バーストプリアンプ２１1およびバーストリミティングアンプ２２1を備え、低速データ用受信部２2は、バーストプリアンプ２１2およびバーストリミティングアンプ２２2を備える。ここで、高速データ用受信部２1および低速データ用受信部２2がデータ再生手段を構成し、バーストプリアンプ２１1および２１2がレベル調整手段を構成する。また、バーストリミティングアンプ２２1および２２2がビット判定手段を構成する。 Further, the data reception unit 2 includes a low-speed data reception section 2 2 for reproducing the reception unit 2 1 and the low transmission rate data for high-speed data for reproducing a high transmission rate data, also receiving high speed data The unit 2 1 includes a burst preamplifier 21 1 and a burst limiting amplifier 22 1 , and the low-speed data receiving unit 2 2 includes a burst preamplifier 21 2 and a burst limiting amplifier 22 2 . Here, the high-speed data receiver 2 1 and the low-speed data receiver 2 2 constitute data reproducing means, and the burst preamplifiers 21 1 and 21 2 constitute level adjusting means. The burst limiting amplifiers 22 1 and 22 2 constitute a bit determination means.
　また、バースト同期処理部３は、多位相ＣＬＫ（クロック）サンプリング部３１1および３１2と、速度判定部３２と、データ選択部３３と、を備える。多位相ＣＬＫサンプリング部３１1および３１2は、システムクロックに基づいたタイミングで入力信号をサンプリングし、最適なサンプリングタイミングの判定結果およびサンプリング結果を出力する。速度判定部３２は、受信信号の伝送速度を判定し、判定結果を出力する。データ選択部３３は、速度判定部３２による判定結果に基づいて、多位相ＣＬＫサンプリング部３１1または３１2から出力されたサンプリング結果を選択して出力する。ここで、多位相ＣＬＫサンプリング部３１1および３１2が最適位相判定手段を構成し、速度判定部３２およびデータ選択部３３が受信データ選択手段を構成する。 The burst synchronization processing unit 3 includes multi-phase CLK (clock) sampling units 31 1 and 31 2 , a speed determination unit 32, and a data selection unit 33. The multi-phase CLK sampling units 31 1 and 31 2 sample the input signal at a timing based on the system clock, and output a determination result of the optimum sampling timing and a sampling result. The speed determination unit 32 determines the transmission speed of the received signal and outputs a determination result. Data selection unit 33 based on the determination result by the speed determination unit 32 selects and outputs the sampling result output from the multi-phase CLK sampling unit 31 1 or 31 2. Here, the multi-phase CLK sampling units 31 1 and 31 2 constitute an optimum phase determination unit, and the speed determination unit 32 and the data selection unit 33 constitute a reception data selection unit.
　なお、以下の説明においては、簡単化のため、高伝送速度データの伝送速度を10.3125Gbps（ただし、これ以降は10.31Gbpsと記載する）とし、低伝送速度データの伝送速度を1.25Gbpsとして説明を行う。また、多位相ＣＬＫサンプリング部３１1および３１2のサンプリング位相数をＮ＝８とする。ただし、これらの具体的数値を用いた説明は、本実施の形態の受信装置の動作を限定するものではない。 In the following explanation, for the sake of simplicity, the transmission rate of high transmission rate data is 10.3125 Gbps (hereinafter, described as 10.31 Gbps), and the transmission rate of low transmission rate data is 1.25 Gbps. Do. Further, the number of sampling phases of the multi-phase CLK sampling units 31 1 and 31 2 is N = 8. However, the description using these specific numerical values does not limit the operation of the receiving apparatus of this embodiment.
　つづいて、図１に示した受信装置による光バースト信号の受信動作を詳細に説明する。10.31Gbpsのデータ速度を持つバースト光信号フレーム（以下、光信号フレームａと記載する）と1.25Gbpsのデータ速度を持つバースト光信号フレーム（以下、光信号フレームｂと記載する）が時間多重化された光信号が一芯の光ファイバを介して受光部１に入力されると、受光部１では、受光した光を電気（電流）信号に変換し、データ受信部２の高速データ用受信部２1および低速データ用受信部２2へ出力する。なお、図２は受光部１の構成例を示す図であり、受光部１は、強度分岐光カプラ１１と、ホトダイオード（ＰＤ）１２1および１２2と、により構成されている。以下、この図に基づいて受光部１の動作を詳細に説明する。 Next, the reception operation of the optical burst signal by the receiving apparatus shown in FIG. 1 will be described in detail. A burst optical signal frame having a data rate of 10.31 Gbps (hereinafter referred to as optical signal frame a) and a burst optical signal frame having a data rate of 1.25 Gbps (hereinafter referred to as optical signal frame b) are time-multiplexed. When the received optical signal is input to the light receiving unit 1 through a single optical fiber, the light receiving unit 1 converts the received light into an electric (current) signal, and the data receiving unit 2 receives the high-speed data receiving unit 2. 1 and output to low-speed data receiver 2 2 . FIG. 2 is a diagram illustrating a configuration example of the light receiving unit 1, and the light receiving unit 1 includes an intensity branching optical coupler 11 and photodiodes (PD) 12 1 and 12 2 . Hereinafter, the operation of the light receiving unit 1 will be described in detail with reference to this figure.
　同一光波長にて時間多重化された光信号フレームａおよび光信号フレームｂからなる光信号が一芯の光ファイバを介して受光部１に入力されると、その光信号は、強度分岐光カプラ１１にて強度分岐され、10.31Gbps用に最適化された光－電気変換素子であるホトダイオード１２1および1.25Gbps用に最適化された光－電気変換素子であるホトダイオード１２2へ入力される。ここで、強度分岐光カプラ１１にて分岐された光信号は、ホトダイオード１２1および１２2へ同時に入力される。そして、光信号フレームａおよび光信号フレームｂからなる光信号は、各ホトダイオードにおいて、各バースト光信号データが混在した電気信号（各光信号フレームを変換して得られる電気信号フレームが時間的に多重された電気信号）に変換さる。そして、ホトダイオード１２1，１２2から出力された電気信号は、10.31Gbps用に最適化された高速データ用受信部２1，1.25Gbps用に最適化された高速データ用受信部２2に対してそれぞれ出力される。 When an optical signal composed of an optical signal frame a and an optical signal frame b time-multiplexed at the same optical wavelength is input to the light receiving unit 1 through a single optical fiber, the optical signal is converted into an intensity branching optical coupler. it is input to the photodiode 12 2 is an electrical transducer - optimized light to the photodiode 12 for 1 and 1.25Gbps an electric conversion element - 11 are intensity split by, optimized light for 10.31Gbps. Here, the optical signal branched by the intensity branching optical coupler 11 is simultaneously input to the photodiodes 12 1 and 12 2 . The optical signal composed of the optical signal frame a and the optical signal frame b is an electrical signal in which each burst optical signal data is mixed in each photodiode (the electrical signal frame obtained by converting each optical signal frame is temporally multiplexed). Converted into an electrical signal). The electrical signals output from the photodiodes 12 1 and 12 2 are sent to the high-speed data receiver 2 1 optimized for 10.31 Gbps and the high-speed data receiver 2 2 optimized for 1.25 Gbps. Each is output.
　受光部１から出力された電気信号を受け取ったデータ受信部２の高速データ用受信部２1では、受け取った電気信号が10.31Gbps用に最適な増幅利得（Ga）を持つバーストプリアンプ２１1に入力され、バーストプリアンプ２１1は、入力された信号を増幅する。具体的には、バースト的に間欠し、また、各信号フレーム間の信号レベルがそれぞれ異なる各電気信号をその信号レベルに応じて、高速に所定の出力電気信号範囲となるように増幅する。バーストプリアンプ２１1により増幅された後の電気信号は、バーストリミティングアンプ２２1に入力される。バーストリミティングアンプ２２1においては、入力された電気信号フレームの各信号レベルに応じて識別しきい値が高速に抽出され、この識別しきい値に基づいたＨ，Ｌロジックレベルとして一定の電気レベルでバースト同期処理部３へ出力される。すなわち、バーストリミティングアンプ２２1は、識別しきい値を用いて入力信号のビット判定を行い、判定結果をＨまたはＬロジックレベルとして出力する。 In high speed data receiving section 2 1 of the data reception section 2 that has received the electric signal output from the light receiving unit 1, input to the burst preamplifier 21 1 electrical signal received has the best amplification gain (Ga) for 10.31Gbps The burst preamplifier 21 1 amplifies the input signal. Specifically, each electric signal that is intermittent in bursts and has a different signal level between signal frames is amplified according to the signal level so as to be within a predetermined output electric signal range. The electric signal after being amplified by the burst preamplifier 21 1 is input to the burst limiting amplifier 22 1 . In the burst limiting amplifier 22 1 , an identification threshold value is extracted at a high speed in accordance with each signal level of the input electric signal frame, and a constant electric level is set as the H and L logic levels based on the identification threshold value. Is output to the burst synchronization processing unit 3. That is, the burst limiting amplifier 22 1 performs bit determination of the input signal using an identification threshold, and outputs the determination result as H or L logic level.
　なお、バーストリミティングアンプ２２1より出力される出力信号には、最適に増幅，識別された10.31Gbpsのバースト信号データと同時に、1.25Gbpsのバースト信号データが時間的に多重された状態で含まれている。 Incidentally, the output signal output from the burst limiting amplifier 22 1 is optimally amplified simultaneously with the burst signal data of the identified 10.31Gbps, included in the state in which the burst signal data 1.25Gbps are temporally multiplexed ing.
　同様に、受光部１から出力された電気信号を受け取ったデータ受信部２の低速データ用受信部２2では、ホトダイオード１２2から受け取った電気信号が1.25Gbps用に最適な増幅利得（Gb）を持つバーストプリアンプ２１2に入力され、バーストプリアンプ２１2は、入力された信号を増幅する。具体的には、バースト的に間欠し、また、各フレーム間の信号レベルがそれぞれ異なる電気信号をその信号レベルに応じて、高速に所定の出力電気信号範囲となるように増幅する。バーストプリアンプ２１2により増幅された後の電気信号は、バーストリミティングアンプ２２2に入力される。バーストリミティングアンプ２２2においては、入力された電気信号フレームの各信号レベルに応じて識別しきい値が高速に抽出され、この識別しきい値に基づいたＨ，Ｌロジックレベルとして一定の電気レベルでバースト同期処理部３へ出力される。 Similarly, the low-speed data reception section 2 2 of the data reception section 2 that has received the electric signal output from the light receiving unit 1, the optimal amplification gain for the electric signal received from the photodiode 12 2 is 1.25Gbps a (Gb) It is input to the burst preamplifier 21 2 having, burst preamplifier 21 2 amplifies the input signal. Specifically, electrical signals that are intermittent in bursts and have different signal levels between frames are amplified according to the signal level so as to be within a predetermined output electrical signal range. The electric signal after being amplified by the burst preamplifier 21 2 is input to the burst limiting amplifier 22 2 . In the burst limiting amplifier 22 2 , an identification threshold value is extracted at a high speed according to each signal level of the input electric signal frame, and a constant electric level is set as the H and L logic levels based on the identification threshold value. Is output to the burst synchronization processing unit 3.
　なお、バーストリミティングアンプ２２2より出力される出力信号には、最適に増幅，識別された1.25Gbpsのバースト信号データと同時に、10.31Gbpsのバースト信号データが時間的に多重された状態で含まれている。 Incidentally, the output signal output from the burst limiting amplifier 22 2 is optimally amplified simultaneously with the burst signal data identified 1.25 Gbps, included in the state in which the burst signal data 10.31Gbps is temporally multiplexed ing.
　データ受信部２から出力された信号を受け取ったバースト同期処理部３は、高速データ用受信部２1から出力された信号（バースト電気信号）から、速度が10.31Gbpsのデータのみを抽出し、システムクロック生成部４から出力されたシステムクロックに同期させる。また、低速データ用受信器２2から出力された信号（バースト電気信号）から、速度が1.25Gbpsのデータのみを抽出し、システムクロック生成部４から出力されたシステムクロックに同期させる。そして、システムクロックに同期した10.31Gbpsデータおよび1.25Gbpsデータのいずれか一方を選択し、識別再生同期データ（再生された受信データ）として出力する。以下に、この受信データを再生する動作を詳細に説明する。 Burst synchronization processing section 3 that has received the signal outputted from the data receiver 2, the signal output from the high-speed data receiving section 2 1 (burst electric signal), the speed to extract only data 10.31Gbps, system Synchronize with the system clock output from the clock generator 4. Further, the signal output from the low-speed data receiver 2 2 (burst electric signal), the speed to extract only data of 1.25 Gbps, synchronized to the system clock output from system clock generator 4. Then, either 10.31 Gbps data or 1.25 Gbps data synchronized with the system clock is selected and output as identification reproduction synchronization data (reproduced reception data). The operation for reproducing the received data will be described in detail below.
　データ受信部２の高速データ用受信部２１1から出力された信号はバースト同期処理部３の多位相ＣＬＫサンプリング部３１1へ入力され、多位相ＣＬＫサンプリング部３１1は、システムクロックに同期した10.31GHz×８位相クロックにて入力信号（高速データ用受信部２１1からの出力データ）をサンプリングする。そして、各位相クロックにてサンプリングしたデータ系列の中から、最適位相クロックにてサンプリングしたデータ系列１系列を選択してデータ選択部３３へ出力する。同時に、出力データに対する最適位相クロック（最適なサンプリングタイミング）の情報を最適位相情報として速度判定部３２へ出力する。 The signal output from the data receiving unit high speed data receiver unit 21 1 of 2 is inputted to the multi-phase CLK sampling unit 31 1 of the burst synchronization processing unit 3, the multi-phase CLK sampling unit 31 1, synchronized to the system clock 10.31 The input signal (output data from the high-speed data receiving unit 21 1 ) is sampled with a GHz × 8 phase clock. Then, one data series sampled with the optimum phase clock is selected from the data series sampled with each phase clock and output to the data selection unit 33. At the same time, information on the optimum phase clock (optimum sampling timing) for the output data is output to the speed determination unit 32 as optimum phase information.
　ここで、最適位相クロックは、サンプリングされたエッジ（データ変化点）位相から最も離れた位相クロックとする。最適位相クロックとエッジ位相との関係について、図３を用いて説明する。図３は、最適位相クロック、エッジ位相およびサンプリング結果の関係を示す図であり、一例として、位相クロック<4>を最適位相と判定する場合を模式的に示している。この例では、各位相のクロック<0>～<7>にてサンプリングしたデータ系列<0>～<7>の中から、データエッジ（変化点）位相を位相クロック<0>と位相クロック<7>と判定し、さらに、これらのデータエッジ位相から最も離れた位相クロック<4>を最適位相として判定する。また、図３に示したように、サンプリング結果として、データ系列<4>をシステムクロックに同期させて出力する。すなわち、多位相ＣＬＫサンプリング部３１1は、最適位相でのサンプリング結果を１システムクロック周期にわたって出力する。たとえば、最適位相でのサンプリング結果がＨであれば、この最適位相に対応する（前後する）２つのデータエッジ位相で挟まれた区間でＨを出力する。この結果、多位相ＣＬＫサンプリング部３１1は、高速データ用受信部２1から入力された信号と同じ信号を出力することとなる。 Here, the optimum phase clock is a phase clock farthest from the sampled edge (data change point) phase. The relationship between the optimum phase clock and the edge phase will be described with reference to FIG. FIG. 3 is a diagram showing the relationship between the optimum phase clock, the edge phase, and the sampling result. As an example, the case where the phase clock <4> is determined as the optimum phase is schematically shown. In this example, from the data series <0> to <7> sampled by the clocks <0> to <7> of each phase, the phase of the data edge (change point) is phase clock <0> and phase clock <7 In addition, the phase clock <4> farthest from these data edge phases is determined as the optimum phase. Further, as shown in FIG. 3, the data sequence <4> is output in synchronization with the system clock as a sampling result. That is, the multi-phase CLK sampling unit 31 1 outputs the sampling result at the optimum phase for one system clock cycle. For example, if the sampling result at the optimum phase is H, H is output in a section between two data edge phases corresponding to (before and after) the optimum phase. As a result, the multi-phase CLK sampling unit 31 1 outputs the same signal as the signal input from the high-speed data receiving unit 2 1 .
　つぎに、速度判定部３２の動作を説明する。図４は、多位相ＣＬＫサンプリング部３１1から出力される最適位相クロック情報の一例を示す図である。たとえば、10.31Gbpsのデータ（入力データ）を10.31GHzクロックでサンプリングした場合、入力データジッタおよびサンプリングクロックに重畳したジッタ成分を無視すれば、常に任意の固定最適位相情報が出力される。図４に示した例では、最適位相として位相クロック<4>が常に出力されている。一方、上述したように、高速データ用受信部２1からの出力信号データは、10.31Gbpsデータだけでなく、1.25Gbpsデータが時間的に多重されたものである。そして、1.25Gbpsデータは10.31GHzクロック周波数速度に対して整数倍にないため、1.25Gbpsデータから求めた最適位相は時間的に変動する。例えば、1.25Gbpsの８倍は10Gbpsであり、10Gbpsのデータを10.31GHzクロックでサンプリングした場合、次式（１）の関係が成立する。 Next, the operation of the speed determination unit 32 will be described. Figure 4 is a diagram showing an example of the optimum phase clock information outputted from the multi-phase CLK sampling unit 31 1. For example, when 10.31 Gbps data (input data) is sampled with a 10.31 GHz clock, arbitrary fixed optimum phase information is always output if the input data jitter and the jitter component superimposed on the sampling clock are ignored. In the example shown in FIG. 4, the phase clock <4> is always output as the optimum phase. On the other hand, as described above, the output signal data from the high speed data receiving section 2 1 not only 10.31Gbps data, and 1.25Gbps data is temporally multiplexed. Since the 1.25 Gbps data is not an integer multiple of the 10.31 GHz clock frequency rate, the optimum phase obtained from the 1.25 Gbps data varies with time. For example, 8 times 1.25 Gbps is 10 Gbps, and when 10 Gbps data is sampled with a 10.31 GHz clock, the relationship of the following equation (1) is established.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
　そして、式（１）は、次の様に解釈できる。10Gbpsのデータを10.31GHzクロックでサンプリングした場合、10.31Gbpsデータ出力として３２ビット毎に１ビットずつずれる、すなわち、３２ビットを一周期として、最適位相情報が時間的に変化することとなる。図４は、この現象を示しており、1.25Gbpsのデータを10.31GHzにてサンプリングした場合、３２ビット毎に最適位相が一周期変動している事が分かる。そこで、速度判定部３２では、この最適位相情報の周期的な変動情報を速度情報として利用して伝送速度を判定する。すなわち、多位相ＣＬＫサンプリング部３１1から出力された最適位相情報のうち、時間的に固定の最適位相情報が抽出された時間区間を10.31Gbpsデータ区間、時間的に最適位相情報が周期変動している区間を1.25Gbpsデータ区間、と判定し、判定結果を速度判定信号としてデータ選択部３３へ出力する。 Equation (1) can be interpreted as follows. When 10 Gbps data is sampled with a 10.31 GHz clock, the 10.31 Gbps data output shifts by 1 bit every 32 bits, that is, the optimum phase information changes with time, with 32 bits as one cycle. FIG. 4 shows this phenomenon. It can be seen that when 1.25 Gbps data is sampled at 10.31 GHz, the optimum phase fluctuates by one cycle every 32 bits. Therefore, the speed determination unit 32 determines the transmission speed using the periodic fluctuation information of the optimum phase information as speed information. That is, of the optimum phase information output from the multi-phase CLK sampling unit 31 1, time-fixed optimum phase information extracted time segment of 10.31Gbps data interval, the time-optimal phase information by periodic variation And the determination result is output to the data selection unit 33 as a speed determination signal.
　また、データ受信部２の高速データ用受信部２１2から出力された信号はバースト同期処理部３の多位相ＣＬＫサンプリング部３１2へ入力され、多位相ＣＬＫサンプリング部３１2は、システムクロックに同期した1.25GHz×８位相クロックにて入力信号をサンプリングし、上述した高速データ用受信部２１1と同様に、1.25Gbpsのデータが入力された場合は、固定の最適位相情報と、最適位相クロックにてサンプリングしたデータ系列と、を出力する。 The signal output from the high-speed data receiving unit 21 2 of the data receiving unit 2 is input to the multi-phase CLK sampling unit 312 of the burst synchronization processing unit 3, and the multi-phase CLK sampling unit 31 2 is synchronized with the system clock. sampling the input signal at the 1.25 GHz × 8-phase clock, similarly to the high speed data receiving section 21 1 described above, when the data of 1.25Gbps is input, the fixing of optimum phase information, the optimum phase clock And the sampled data series.
　ここで、10.31Gbpsデータは、低速データ用受信部２2においては正常に増幅、識別されない。これは、通常1.25Gbps用に最適化された光受信器（図１に示した受信装置では低速データ用受信部２2に相当）は、低雑音とするために1GHz程度に狭帯域化されたローパスフィルタとして機能するためであり、10.31Gbpsデータを正常に出力することが出来ない。そのため、多位相ＣＬＫサンプリング部３１2は、10.31Gbpsデータが入力された時間区間では、不定の最適位相情報を出力することとなる。すなわち、1.25Gbpsデータ区間でのみ最適位相情報を正常に出力する。 Here, 10.31Gbps data, normally amplified in the low-speed data reception unit 2 2, not identified. This is because the optical receiver normally optimized for 1.25 Gbps (corresponding to the low-speed data receiver 2 2 in the receiving apparatus shown in FIG. 1) has been narrowed to about 1 GHz to reduce noise. Because it functions as a low-pass filter, 10.31Gbps data cannot be output normally. Therefore, the multi-phase CLK sampling unit 31 2, in the time interval in which 10.31Gbps data is input, and to output the indeterminate optimum phase information. That is, the optimum phase information is normally output only in the 1.25 Gbps data section.
　従って、多位相ＣＬＫサンプリング部３１2から出力される最適位相情報を速度判定部３２へ入力し、上述した多位相ＣＬＫサンプリング部３１1から出力された最適位相情報出力の中で、周期性情報を持つ時間区間と、多位相ＣＬＫサンプリング部３１2から出力された最適位相情報出力が固定の出力となる時間区間の積をとることで、速度判定誤り確率を軽減させることができる。 Thus, the multi-phase CLK enter the optimum phase information output from the sampling unit 31 2 to the speed determination unit 32, among the optimum phase information output outputted from the multi-phase CLK sampling unit 31 1 described above, the periodicity information and time intervals with, that optimum phase information output which is output from the multi-phase CLK sampling unit 31 2 takes the product of the outputs become time interval of fixed, it is possible to reduce the rate decision error probability.
　以上の説明は、データ及びクロックにジッタがない理想的な場合を前提としたが、仮にジッタが重畳した場合でも、通常のジッタ周期としては2MHz程度に制限されており、ここで示す最適位相変動周期は10.31GHz/32=322MHzとジッタ変動に対して非常に速いため、ある時間区間では等価的に固定の最適位相とみなすことができる。よって、ジッタが重畳した場合でであっても、上記と同様な速度判定信号を生成できる。 The above explanation is based on an ideal case where there is no jitter in the data and the clock. However, even if jitter is superimposed, the normal jitter period is limited to about 2 MHz, and the optimum phase fluctuation shown here Since the period is 10.31 GHz / 32 = 322 MHz, which is very fast against jitter fluctuation, it can be regarded as a fixed optimum phase equivalently in a certain time interval. Therefore, even when jitter is superimposed, a speed determination signal similar to the above can be generated.
　データ選択部３３は、速度判定部３２から入力された速度判定信号に基づいて、多位相ＣＬＫサンプリング部３１1から入力されたデータ系列または多位相ＣＬＫサンプリング部３１2から入力されたデータ系列を選択し、識別再生同期データ（最終的な受信データ）として出力する。具体的には、速度判定信号が10.31Gbpsデータ区間を示す区間では多位相ＣＬＫサンプリング部３１1から入力されたデータ系列を出力し、1.25Gbpsデータ区間を示す区間では多位相ＣＬＫサンプリング部３１2から入力されたデータ系列を出力する。 Data selection unit 33, based on the speed determination signal input from the speed determination unit 32, selects the multi-phase CLK data sequence is input from the sampling unit 31 1 or the multi-phase CLK input data sequence from the sampling unit 31 2 And output as identification reproduction synchronization data (final received data). Specifically, in a section where the speed determination signal indicates 10.31Gbps data section outputs a data sequence input from the multi-phase CLK sampling unit 31 1, from multi-phase CLK sampling unit 31 2 in the section showing the 1.25Gbps data section Output the input data series.
　このように、本実施の形態の受信装置は、異なる伝送速度の光信号が時間多重された信号の中の特定伝送速度の信号から受信データを再生するためのブロック（上記バーストプリアンプおよびバーストリミティングアンプからなる構成）を、複数備え、入力信号に対して各ブロックが個別にデータ再生処理を実行して得られた複数の再生データの中から最適なものを選択して最終的な再生データ（受信データ）として出力することとした。これにより、ＰＯＮシステムの上り方向すなわち親局装置において、同一波長にて、異なる伝送速度のフレームが時間的に間欠、多重された上りバースト光信号を受信することができる。 As described above, the receiving apparatus according to the present embodiment is a block for reproducing received data from a signal having a specific transmission rate in a signal obtained by time-multiplexing optical signals having different transmission rates (the burst preamplifier and burst limiting). A plurality of amplifiers), and each block individually executes data reproduction processing on the input signal, and selects the optimum reproduction data from the plurality of reproduction data to obtain final reproduction data ( Output as received data). As a result, in the upstream direction of the PON system, that is, in the master station apparatus, it is possible to receive an upstream burst optical signal in which frames having different transmission rates are intermittently multiplexed at the same wavelength.
　また、受信データの再生処理を実行するブロックを複数備え、各ブロックには、特定伝送速度のデータを再生するための最適な条件を予め設定しておくこととし、また、複数の再生データに対して特定周期でサンプリングを行って得られた位相判定結果に基づいて伝送速度を判定することとしたので、従来の受信装置で必要としていた複雑な速度判定信号抽出機能と、速度判定信号に基づいたバーストプリアンプ及びバーストリミティングアンプの制御が不要となり、受信装置の低コスト化が実現できる。 In addition, a plurality of blocks for executing reception data reproduction processing are provided, and in each block, optimum conditions for reproducing data at a specific transmission rate are set in advance. Since the transmission rate is determined based on the phase determination result obtained by sampling at a specific period, it is based on the complicated rate determination signal extraction function required by the conventional receiver and the speed determination signal. Control of the burst preamplifier and burst limiting amplifier is unnecessary, and the cost of the receiving apparatus can be reduced.
実施の形態２．
　つづいて、実施の形態２の受信装置について説明する。図５は、実施の形態２の受信装置の構成例を示す図である。本実施の形態の受信装置は、実施の形態１で示した受信装置（図１参照）のバースト同期処理部３に代えてバースト同期処理部３ａを備えた構成をとる。なお、バースト同期処理部３ａ以外の構成は実施の形態１の受信装置と同様であるため、同一の符号を付してその説明は省略する。 Embodiment 2. FIG.
Next, the receiving apparatus according to the second embodiment will be described. FIG. 5 is a diagram illustrating a configuration example of a receiving apparatus according to the second embodiment. The receiving apparatus of this embodiment has a configuration including a burst synchronization processing unit 3a instead of the burst synchronization processing unit 3 of the receiving apparatus (see FIG. 1) shown in the first embodiment. Since the configuration other than the burst synchronization processing unit 3a is the same as that of the receiving apparatus of the first embodiment, the same reference numerals are given and the description thereof is omitted.
　バースト同期処理部３ａ（受信データ再生手段に相当）は、速度判定部３２ａと、データ選択部３３ａと、ヘッダ識別部３４と、スイッチ３５と、多位相ＣＬＫサンプリング部３６と、を備え、また、データ選択部３３ａは、スイッチ３３１および低速データ再生部３３２を備える。ここで、ヘッダ識別部３４およびスイッチ３５が再生データ選択手段を構成し、速度判定部３２ａおよびデータ選択部３３ａが最終受信データ再生手段を構成する。 The burst synchronization processing unit 3a (corresponding to the reception data reproduction means) includes a speed determination unit 32a, a data selection unit 33a, a header identification unit 34, a switch 35, and a multiphase CLK sampling unit 36. The data selection unit 33 a includes a switch 331 and a low speed data reproduction unit 332. Here, the header identification unit 34 and the switch 35 constitute a reproduction data selection unit, and the speed determination unit 32a and the data selection unit 33a constitute a final reception data reproduction unit.
　速度判定部３２ａは、受信信号の伝送速度を判定し、判定結果を出力する。データ選択部３３ａは、速度判定部３２ａおよび多位相ＣＬＫサンプリング部３６からの入力信号に基づいて受信データを再生する。具体的には、速度判定部３２ａから受け取った速度判定信号の内容に従い、スイッチ３３１が、多位相ＣＬＫサンプリング部３６からの入力信号（入力データ）の出力先を切り替える。すなわち、入力データを最終的な再生データ（識別再生同期データ）としてそのまま出力するか、低速データ再生部３３２へ渡すかを切り替える。低速データ再生部３３２は、低速データ再生部３３２からデータを受け取った場合、そのデータに基づいて受信データ（低伝送速度データ）を再生する。 The speed determination unit 32a determines the transmission speed of the received signal and outputs a determination result. The data selection unit 33a reproduces the received data based on the input signals from the speed determination unit 32a and the multiphase CLK sampling unit 36. Specifically, the switch 331 switches the output destination of the input signal (input data) from the multiphase CLK sampling unit 36 according to the content of the speed determination signal received from the speed determination unit 32a. That is, switching is made between whether the input data is output as it is as final reproduction data (identification reproduction synchronization data) or is passed to the low-speed data reproduction unit 332. When receiving data from the low-speed data reproducing unit 332, the low-speed data reproducing unit 332 reproduces received data (low transmission rate data) based on the data.
　ヘッダ識別部３４は、高速データ用受信部２1経由で受け取った受信フレームのヘッダに含まれている情報を解析し、解析結果に基づいてスイッチ３５を制御する。スイッチ３５はヘッダ識別部３４からの指示に従い、高速データ用受信部２1または低速データ用受信部２2のいずれか一方からの出力信号を選択して多位相ＣＬＫサンプリング部３６へ入力させる。多位相ＣＬＫサンプリング部３６は、システムクロックに基づいたタイミングで入力信号をサンプリングし、サンプリング結果を出力する。 Header identification unit 34 analyzes the information contained in the header of the received frame received via the receiving unit 2 1 for high-speed data, and controls the switch 35 based on the analysis result. Switch 35 in accordance with an instruction from the header identification unit 34, is input by selecting the output signal from one of the high-speed data receiving section 2 1 or low-speed data reception section 2 2 to the multi-phase CLK sampling unit 36. The multi-phase CLK sampling unit 36 samples an input signal at a timing based on the system clock and outputs a sampling result.
　以下に、バースト同期処理部３ａの動作を詳細に説明する。なお、上述した実施の形態１と同様に、高伝送速度データの伝送速度を10.3125Gbps（ただし記載上は10.31Gbpsとする）とし、低伝送速度データの伝送速度を1.25Gbpsとして説明を行う。また、多位相ＣＬＫサンプリング部３６のサンプリング位相数をＮ＝８とする。 Hereinafter, the operation of the burst synchronization processing unit 3a will be described in detail. As in the first embodiment, the transmission rate of high transmission rate data is 10.3125 Gbps (note that it is 10.31 Gbps in the description), and the transmission rate of low transmission rate data is 1.25 Gbps. The number of sampling phases of the multi-phase CLK sampling unit 36 is N = 8.
　バースト同期処理部３ａのヘッダ識別部３４では、高速データ用受信部２1から出力されたバースト電気信号から、各バーストフレームの先頭領域のヘッダ区間を検出する。そして、そのヘッダ区間に格納された情報に応じて、スイッチ３５を制御し、高速データ用受信部２1出力および低速データ用受信部２2出力のいずれか一方を多位相ＣＬＫサンプリング部３６へ入力させる。なお、図６はバーストフレームの構成例を示す図である。図６に示したように、バーストフレームは、通常、固定周波数成分となる“10”交番パタンがヘッダとして準備されている。そのため、ヘッダ識別部３４は、このヘッダ区間の周波数成分を検出することで、高速データ用受信部２1から出力された10.31Gbpsデータ区間と低速データ用受信部２2から出力された1.25Gbpsデータ区間とを切り替え、多位相ＣＬＫサンプリング部３６へ出力するようにスイッチ３５を制御する。図６の例では、ヘッダとしてhxAAAA…(10101010101010…)が挿入されており、ヘッダ識別部３４は、この区間で5.156GHzの周波数を検出した場合、伝送速度が10.31Gbpsと判断して高速データ用受信部２1の出力を選択するようにスイッチ３５を制御する。一方、625MHzの周波数を検出した場合には、伝送速度が1.25Gbpsと判断して低速データ用受信部２2の出力を選択するようにスイッチ３５を制御する。 The header identification unit 34 of the burst synchronization processing unit 3a, a burst electric signal output from the high-speed data receiving section 2 1, to detect the header section of the first part of each burst frame. Then, the depending on the information stored in the header section, and controls the switch 35, input either for high speed data receiving section 2 1 output and the reception section 2 2 output the low-speed data to the multi-phase CLK sampling section 36 Let FIG. 6 is a diagram illustrating a configuration example of a burst frame. As shown in FIG. 6, in a burst frame, a “10” alternating pattern that is a fixed frequency component is usually prepared as a header. Therefore, the header identifying section 34, by detecting the frequency component of the header section, 1.25 Gbps data output from 10.31Gbps data section and the low speed data receiving section 2 2 output from the high-speed data receiving section 2 1 The switch 35 is controlled so as to switch between the sections and to output to the multi-phase CLK sampling unit 36. In the example of FIG. 6, hxAAAA... (10101010101010...) Is inserted as a header. It controls the switch 35 to select the output of the receiving section 2 1. On the other hand, when detecting a frequency of 625MHz controls the switch 35 so that the transmission speed to select the output of the receiving unit 2 2 for the low-speed data determines that the 1.25 Gbps.
　多位相ＣＬＫサンプリング部３６は、実施の形態１の受信装置が備えていた多位相ＣＬＫサンプリング部３１1と同じ処理を実行し、最適位相クロックにてサンプリングしたデータ系列をデータ選択部３３ａへ、また、最適位相クロックの情報である最適位相情報を速度判定部３２ａへ出力する。 Polyphase CLK sampling unit 36 performs the same processing as the multi-phase CLK sampling unit 31 1 receiving apparatus equipped with the first embodiment, the sampled data sequence at the optimum phase clock to the data selector 33a, also Then, the optimum phase information which is the information of the optimum phase clock is output to the speed determination unit 32a.
　速度判定部３２ａは、実施の形態１の受信装置が備えていた速度判定部３２と同じ判定方法により、受信データの伝送速度を判定し、判定結果をデータ選択部３３ａに対して出力する。 The speed determination unit 32a determines the transmission speed of the received data by the same determination method as the speed determination unit 32 provided in the receiving apparatus of Embodiment 1, and outputs the determination result to the data selection unit 33a.
　データ選択部３３ａにおいて、スイッチ３３１は、速度判定部３２ａから入力された速度判定信号が10.31Gbpsデータ区間を示す場合、多位相ＣＬＫサンプリング部３６からの出力を識別再生同期データ（高速データ）として出力する。一方、速度判定信号が1.25Gbpsデータ区間を示す場合には、多位相ＣＬＫサンプリング部３６からの出力を低速データ再生部３３２へ出力する。 In the data selection unit 33a, the switch 331 outputs the output from the multiphase CLK sampling unit 36 as identification reproduction synchronization data (high-speed data) when the speed determination signal input from the speed determination unit 32a indicates a 10.31 Gbps data section. To do. On the other hand, when the speed determination signal indicates a 1.25 Gbps data section, the output from the multiphase CLK sampling unit 36 is output to the low-speed data reproduction unit 332.
　多位相ＣＬＫサンプリング部３６からの信号が入力された場合、低速データ再生部３３２は、入力信号に基づいて1.25Gbpsデータを再生する。具体的なデータ再生手順を示すと、実施の形態１で説明したように、1.25Gbpsの８倍である10.0Gbpsデータと10.31Gbpsの間には、「10.0Gbps×32bit＝10.31Gbps×33bit」の関係が成り立っている。そのため、低速データ再生部３３２は、10.31GHzにてサンプリングされたデータを33bit区切りとし、その内、32bitを有効データ区間、1bitを無効区間として抽出し、さらに32bitデータを8bit毎に抽出することで1.25Gbpsデータ列を再生する。また、低速データ再生部３３２は、この再生したデータを1.25Gbpsの識別再生同期データ（低速データ）として出力する。 When the signal from the multi-phase CLK sampling unit 36 is input, the low speed data reproducing unit 332 reproduces 1.25 Gbps data based on the input signal. The specific data reproduction procedure is as follows. As described in the first embodiment, between 10.0 Gbps data and 10.31 Gbps, which is eight times 1.25 Gbps, “10.0 Gbps × 32 bit = 10.31 Gbps × 33 bit” A relationship is established. Therefore, the low-speed data reproduction unit 332 extracts the data sampled at 10.31 GHz as 33-bit segments, extracts 32 bits as an effective data section, 1 bit as an invalid section, and further extracts 32 bit data every 8 bits. Play a 1.25Gbps data string. The low-speed data reproduction unit 332 outputs the reproduced data as identification reproduction synchronization data (low-speed data) of 1.25 Gbps.
　このように、本実施の形態の受信装置は、異なる伝送速度の光信号が時間多重された信号の中の特定伝送速度の信号から受信データを再生するためのブロック（上記バーストプリアンプおよびバーストリミティングアンプからなる構成）を、複数備え、入力信号に対して各ブロックが個別にデータ再生処理を実行して得られた複数の再生データの中から最適なものを選択し、選択した信号に基づいて最終的な受信データを再生することとした。これにより、実施の形態１の受信装置と同様の効果が得られるとともに、実施の形態１の受信装置と比較して、回路規模および消費電力を低減させることができる。 As described above, the receiving apparatus according to the present embodiment is a block for reproducing received data from a signal having a specific transmission rate in a signal obtained by time-multiplexing optical signals having different transmission rates (the burst preamplifier and burst limiting). A plurality of amplifiers), each block individually performing data reproduction processing on the input signal, and selecting the optimum reproduction data from a plurality of reproduction data, based on the selected signal The final received data was reproduced. Thereby, the same effect as that of the receiving apparatus of the first embodiment can be obtained, and the circuit scale and power consumption can be reduced as compared with the receiving apparatus of the first embodiment.
実施の形態３．
　つづいて、実施の形態３の受信装置について説明する。図７は、実施の形態３の受信装置の構成例を示す図である。本実施の形態の受信装置は、実施の形態１で示した受信装置（図１参照）のデータ受信部２およびバースト同期処理部３に代えてデータ受信部２ｂおよびバースト同期処理部３ｂ（受信データ再生手段に相当）を備えた構成をとる。なお、受光部１は実施の形態１で示したものと同じものであるため、説明は省略する。 Embodiment 3 FIG.
Next, the receiving apparatus according to the third embodiment will be described. FIG. 7 is a diagram illustrating a configuration example of a receiving apparatus according to the third embodiment. The receiving apparatus according to the present embodiment replaces the data receiving section 2 and burst synchronization processing section 3 of the receiving apparatus (see FIG. 1) shown in the first embodiment with a data receiving section 2b and burst synchronization processing section 3b (received data). (Corresponding to reproducing means). In addition, since the light-receiving part 1 is the same as what was shown in Embodiment 1, description is abbreviate | omitted.
　データ受信部２ｂは、バーストプリアンプ２１1および２１2（レベル調整手段に相当）と、バーストリミティングアンプ２３（受信データ候補生成手段に相当）と、を備え、また、バーストリミティングアンプ２３は、スイッチ２３１、ヘッダ識別部２３２および利得切替型のリミティングアンプ２３３を備える。なお、バーストプリアンプ２１1および２１2は、実施の形態１の受信装置が備えていたバーストプリアンプ２１1および２１2と同じものであるため、説明は省略する。 The data receiving unit 2b includes burst preamplifiers 21 1 and 21 2 (corresponding to level adjusting means) and a burst limiting amplifier 23 (corresponding to reception data candidate generating means), and the burst limiting amplifier 23 includes: A switch 231, a header identification unit 232, and a gain switching type limiting amplifier 233 are provided. Note that burst preamplifiers 21 1 and 21 2 are the same as burst preamplifiers 21 1 and 21 2 provided in the receiving apparatus of the first embodiment, and thus description thereof is omitted.
　データ受信部２ｂのバーストリミティングアンプ２３は、バーストプリアンプ２１1または２１2からの出力を選択し、さらに、選択した信号に基づいて仮の受信データ（受信データの候補）を生成する。バーストリミティングアンプ２３を構成する各部の動作を簡単に説明すると、ヘッダ識別部２３２は、バーストプリアンプ２１1から受け取った受信フレームのヘッダに含まれている情報を解析し、解析結果に基づいてスイッチ２３１およびリミティングアンプ２３３を制御する。スイッチ２３１はヘッダ識別部２３２からの指示に従い、バーストプリアンプ２１1またはバーストプリアンプ２１2からの出力信号を選択してリミティングアンプ２３３へ出力する。リミティングアンプ２３３は、ヘッダ識別部２３２から指示された識別しきい値を用いて入力信号のビット判定を行う。 The burst limiting amplifier 23 of the data reception unit 2b selects the output from the burst preamplifier 21 1 or 21 2 , and further generates temporary reception data (reception data candidate) based on the selected signal. The operation of each unit constituting the burst limiting amplifier 23 will be briefly described. The header identifying unit 232 analyzes information included in the header of the received frame received from the burst preamplifier 21 1 , and switches based on the analysis result. 231 and the limiting amplifier 233 are controlled. The switch 231 selects an output signal from the burst preamplifier 21 1 or the burst preamplifier 21 2 in accordance with an instruction from the header identification unit 232 and outputs the selected signal to the limiting amplifier 233. The limiting amplifier 233 performs bit determination of the input signal using the identification threshold value instructed from the header identifying unit 232.
　また、バースト同期処理部３ｂは、実施の形態２の受信装置（図５参照）が備えていたバースト同期処理部３ａからヘッダ識別部３４およびスイッチ３５を取り除いたものであり、これ以外の部分についてはバースト同期処理部３ａと同様である。そのため、バースト同期処理部３ａの各構成要素に付与したものと同じ符号を付してその説明は省略する。 The burst synchronization processing unit 3b is obtained by removing the header identification unit 34 and the switch 35 from the burst synchronization processing unit 3a provided in the receiving apparatus (see FIG. 5) according to the second embodiment. Is the same as the burst synchronization processing unit 3a. For this reason, the same reference numerals as those assigned to the respective constituent elements of the burst synchronization processing unit 3a are given and the description thereof is omitted.
　以下に、データ受信部２ｂの動作を詳細に説明する。ただし、本実施の形態では、実施の形態１のデータ受信部２に含まれていない構成要素であるバーストリミティングアンプ２３についてのみ説明を行う。なお、上述した実施の形態１と同様に、高伝送速度データの伝送速度を10.3125Gbps（ただし記載上は10.31Gbpsとする）とし、低伝送速度データの伝送速度を1.25Gbpsとして説明を行う。また、多位相ＣＬＫサンプリング部３６のサンプリング位相数をＮ＝８とする。 Hereinafter, the operation of the data receiving unit 2b will be described in detail. However, in the present embodiment, only the burst limiting amplifier 23 that is a component not included in the data receiving unit 2 of the first embodiment will be described. As in the first embodiment, the transmission rate of high transmission rate data is 10.3125 Gbps (note that it is 10.31 Gbps in the description), and the transmission rate of low transmission rate data is 1.25 Gbps. The number of sampling phases of the multi-phase CLK sampling unit 36 is N = 8.
　バーストプリアンプ２１1からの出力信号を受け取ると、バーストリミティングアンプ２３では、まず、ヘッダ識別部２３２が、受け取ったバーストフレームの先頭領域のヘッダ区間を検出する。そして、そのヘッダ区間に格納された情報に応じてスイッチ２３１を制御し、バーストプリアンプ２１1出力およびバーストプリアンプ２１2出力のいずれか一方をリミティングアンプ２３３へ入力させる。なお、ヘッダ識別部２３２がバーストフレームの先頭領域のヘッダ区間を検出し、スイッチ２３１を制御する動作は、実施の形態２で説明したヘッダ識別部３４の動作と同様である。すなわち、ヘッダ区間の情報を用いてバーストフレームの伝送速度を判定し、判定結果に対応するバーストプリアンプからの信号がリミティングアンプ２３３へ入力されるようにスイッチ２３１を制御する。ヘッダ識別部２３２は、また、判定結果に基づいてリミティングアンプ２３３の設定を変更する。すなわち、判定した伝送速度が10.31Gbpsであれば実施の形態１で示したバーストリミティングアンプ２２1と同じ設定となるように設定を変更し、一方、判定した伝送速度が1.25Gbpsであれば実施の形態１で示したバーストリミティングアンプ２２2と同じ設定となるように設定を変更する。 When receiving the output signal from the burst preamplifier 21 1 , in the burst limiting amplifier 23, first, the header identifying unit 232 detects the header section of the head region of the received burst frame. Then, the switch 231 is controlled according to the information stored in the header section, and either the burst preamplifier 21 1 output or the burst preamplifier 21 2 output is input to the limiting amplifier 233. The operation of the header identifying unit 232 detecting the header section of the head region of the burst frame and controlling the switch 231 is the same as the operation of the header identifying unit 34 described in the second embodiment. That is, the burst frame transmission rate is determined using the header section information, and the switch 231 is controlled so that the signal from the burst preamplifier corresponding to the determination result is input to the limiting amplifier 233. The header identification unit 232 also changes the setting of the limiting amplifier 233 based on the determination result. That is, the transmission rate is determined to change settings so that the burst limiting amplifier 22 1 and the same configuration shown in the first embodiment if 10.31Gbps, whereas, the transmission rate is determined is if 1.25Gbps embodiment The setting is changed so that the setting is the same as that of the burst limiting amplifier 22 2 shown in the first embodiment.
　次に、リミティングアンプ２３３が、入力されたフレームの信号レベルに応じた識別しきい値（ヘッダ識別部２３２により設定された識別しきい値）を用いてしきい値判定を行い、判定結果をＨ，Ｌロジックレベルとして出力する。 Next, the limiting amplifier 233 performs threshold determination using an identification threshold (the identification threshold set by the header identification unit 232) according to the signal level of the input frame, and the determination result is obtained. Output as H and L logic levels.
　このように、本実施の形態の受信装置では、バーストリミティングアンプの前段において、受信フレームのヘッダ情報を利用した伝送速度判定を行い、判定結果に対応した受信信号を対象として、信号レベルを所望のレベルに調整する処理およびサンプリング処理を含むデータ再生処理を実行することとした。これにより、実施の形態１の受信装置と同様の効果が得られるとともに、実施の形態１の受信装置と比較して、回路規模および消費電力を低減させることができる。 As described above, in the receiving apparatus according to the present embodiment, the transmission rate determination using the header information of the received frame is performed before the burst limiting amplifier, and the signal level is desired for the received signal corresponding to the determination result. The data reproduction process including the process of adjusting the level and the sampling process is executed. Thereby, the same effect as that of the receiving apparatus of the first embodiment can be obtained, and the circuit scale and power consumption can be reduced as compared with the receiving apparatus of the first embodiment.
　加えて、通常はＩＣとして実現可能なリミティングアンプにヘッダ検出機能（上記ヘッダ情報を利用した受信信号の伝送速度判定処理に相当）を集約し、異なる速度のバースト信号フレームに対して共通化することとしたので、回路規模および消費電力をさらに低減させることができる。 In addition, the header detection function (corresponding to the transmission rate judgment processing of the received signal using the header information) is usually integrated into a limiting amplifier that can be realized as an IC, and is shared for burst signal frames of different rates. As a result, the circuit scale and power consumption can be further reduced.
実施の形態４．
　つづいて、実施の形態４の受信装置について説明する。図８は、実施の形態４の受信装置が備える受光部の構成例を示す図である。本実施の形態の受信装置は、たとえば、実施の形態１で示した受信装置の受光部１（図２参照）を図８に示した受光部１ｃに置き換えたものである。そのため、本実施の形態では、実施の形態１の受信装置と異なる受光部１ｃについてのみ説明する。 Embodiment 4 FIG.
Next, the receiving apparatus according to the fourth embodiment will be described. FIG. 8 is a diagram illustrating a configuration example of a light receiving unit included in the receiving device of the fourth embodiment. In the receiving apparatus of the present embodiment, for example, the light receiving unit 1 (see FIG. 2) of the receiving apparatus shown in the first embodiment is replaced with the light receiving unit 1c shown in FIG. Therefore, in the present embodiment, only the light receiving unit 1c different from the receiving device of the first embodiment will be described.
　図８に示したように、本実施の形態の受光部１ｃは、ホトダイオード１３により構成される。受光部１に入力された光信号は、光－電気変換素子であるホトダイオード１３へ入力される。ここで、光信号を構成する光信号フレームａおよびｂは、ホトダイオード１３へ共通的に入力される。入力された光信号フレームａ，ｂは、各バースト光信号データが混在した電気信号に変換され、ホトダイオード１３から出力された電気信号は、10.31Gbps用に最適化された高速データ用受信部２1および1.25Gbps用に最適化された高速データ用受信部２2に対してそれぞれ出力される。 As shown in FIG. 8, the light receiving unit 1 c of the present embodiment is configured by a photodiode 13. The optical signal input to the light receiving unit 1 is input to the photodiode 13 which is a photoelectric conversion element. Here, the optical signal frames a and b constituting the optical signal are commonly input to the photodiode 13. The input optical signal frames a and b are converted into an electric signal in which each burst optical signal data is mixed, and the electric signal output from the photodiode 13 is a high-speed data receiving unit 2 1 optimized for 10.31 Gbps. and output respectively optimized high speed data receiving section 2 2 for 1.25 Gbps.
　なお、実施の形態２または３で示した受信装置の受光部１を受光部１ｃに置き換えることも可能である。 In addition, it is possible to replace the light receiving unit 1 of the receiving apparatus shown in the second or third embodiment with the light receiving unit 1c.
　このように、本実施の形態の受信装置では、光信号を電気信号へ変換後、受信信号の各伝送速度に対応させて複数備えている各受信処理部へ分岐させることとした。これにより、上述した実施の形態１～３の受信装置と比較して光部品の数を削減することができ、低コスト化を実現できる。 As described above, in the receiving apparatus of the present embodiment, the optical signal is converted into an electric signal, and then branched to each of the plurality of reception processing units corresponding to each transmission speed of the received signal. As a result, the number of optical components can be reduced as compared with the receiving apparatuses of Embodiments 1 to 3 described above, and cost reduction can be realized.
実施の形態５．
　つづいて、実施の形態５の受信装置について説明する。図９は、実施の形態５の受信装置の構成例を示す図である。本実施の形態の受信装置は、実施の形態１または２で示した受信装置（図１参照）の受光部１およびデータ受信部２に代えて受光部１ｄ（変換手段に相当）およびデータ受信部２ｄ（再生データ生成手段に相当）を備えた構成をとる。なお、バースト同期処理部３は実施の形態１で示したものと同じものとしているが、実施の形態２で示したもの（図５で示したバースト同期処理部３ａ）としてもよい。 Embodiment 5. FIG.
Next, the receiving apparatus according to the fifth embodiment will be described. FIG. 9 is a diagram illustrating a configuration example of a receiving apparatus according to the fifth embodiment. The receiving apparatus according to the present embodiment includes a light receiving section 1d (corresponding to conversion means) and a data receiving section instead of the light receiving section 1 and the data receiving section 2 of the receiving apparatus (see FIG. 1) shown in the first or second embodiment. A configuration with 2d (corresponding to reproduction data generating means) is adopted. The burst synchronization processing unit 3 is the same as that shown in the first embodiment, but may be the one shown in the second embodiment (burst synchronization processing unit 3a shown in FIG. 5).
　受光部１ｄは、入力された光信号を電気信号に変換する光－電気変換素子であるホトダイオード１２1を備える。なお、このホトダイオードは、実施の形態１で示した受光部１を構成するホトダイオード１２1と同じものである。 Receiving portion 1d, the light converts the input optical signal into an electrical signal - comprises a photodiode 12 1 is an electrical conversion element. Note that this photodiode is the same as the photodiode 12 1 constituting the light receiving unit 1 shown in the first embodiment.
　データ受信部２ｄは、高速データ用受信部２ｄ1および低速データ用受信部２ｄ2を備え、また、高速データ用受信部２ｄ1はバーストプリアンプ２１1およびバーストリミティングアンプ２２ｄ1を備え、低速データ用受信部２ｄ2はバーストリミティングアンプ２２ｄ2を備えている。なお、バーストプリアンプ２１1は、実施の形態１の受信装置が備えていたバーストプリアンプ２１1と同じものである。 Data receiving unit 2d, a high speed data receiving section 2d 1 and the low-speed data reception section 2d 2, also high-speed data receiving section 2d 1 is provided with a burst preamplifier 21 1 and burst limiting amplifier 22 d 1, the low speed data The reception unit 2d 2 includes a burst limiting amplifier 22d 2 . The burst preamplifier 21 1 is the same as the burst preamplifier 21 1 provided in the receiving apparatus of the first embodiment.
　以下に、データ受信部２ｄの動作を詳細に説明する。ただし、本実施の形態では、実施の形態１のデータ受信部２に含まれていない構成要素であるバーストリミティングアンプ２２ｄ1および２２ｄ2についてのみ説明を行う。なお、上述した実施の形態１と同様に、高伝送速度データの伝送速度を10.3125Gbps（ただし記載上は10.31Gbpsとする）とし、低伝送速度データの伝送速度を1.25Gbpsとして説明を行う。また、多位相ＣＬＫサンプリング部３６のサンプリング位相数をＮ＝８とする。 Hereinafter, the operation of the data receiving unit 2d will be described in detail. However, in the present embodiment, only burst limiting amplifiers 22d 1 and 22d 2 that are constituent elements not included in data receiving unit 2 of the first embodiment will be described. As in the first embodiment, the transmission rate of high transmission rate data is 10.3125 Gbps (note that it is 10.31 Gbps in the description), and the transmission rate of low transmission rate data is 1.25 Gbps. The number of sampling phases of the multi-phase CLK sampling unit 36 is N = 8.
　バーストプリアンプ２１1により増幅された後の電気信号は、バーストリミティングアンプ２２1および２２2へ入力される。バーストリミティングアンプ２２1および２２2では、入力された電気信号フレームの各信号レベルに応じて識別しきい値が高速に抽出され、この識別しきい値に基づいたＨ，Ｌロジックレベルとして一定の電気レベルでバースト同期処理部３へ出力される。なお、バーストリミティングアンプ２２2は、1.25Gbps用に最適な利得帯域を持っている。 The electric signal after being amplified by the burst preamplifier 21 1 is input to the burst limiting amplifiers 22 1 and 22 2 . In the burst limiting amplifiers 22 1 and 22 2 , an identification threshold is extracted at a high speed in accordance with each signal level of the input electric signal frame, and the H and L logic levels based on the identification threshold are constant. It is output to the burst synchronization processing unit 3 at the electrical level. The burst limiting amplifier 22 2 has an optimum gain band for 1.25 Gbps.
　また、バーストリミティングアンプ２２1より出力される出力信号には、最適に増幅，識別された10.31Gbpsのバースト信号データと同時に、1.25Gbpsのバースト信号データが時間的に多重された状態で含まれている。また、バーストリミティングアンプ帯域は10.31Gbps信号に対して最も雑音特性（ＳＮＲ：信号対雑音強度比率）が良好となるように最適化されている。 Further, the output signal output from the burst limiting amplifier 22 1 is optimally amplified simultaneously with the burst signal data of the identified 10.31Gbps, included in the state in which the burst signal data 1.25Gbps are temporally multiplexed ing. The burst limiting amplifier band is optimized so that the noise characteristic (SNR: signal-to-noise intensity ratio) is the best for 10.31 Gbps signals.
　一方、バーストリミティングアンプ２２2より出力される出力信号には、最適に増幅，識別された1.25Gbpsのバースト信号データと同時に、10.31Gbpsのバースト信号データが時間的に多重された状態で含まれている。また、バーストリミティングアンプ帯域は1.25Gbps信号に対して最も雑音特性（ＳＮＲ：信号対雑音強度比率）が良好となるように最適化されている。 On the other hand, the output signal output from the burst limiting amplifier 22 2 is optimally amplified simultaneously with the burst signal data identified 1.25 Gbps, included in the state in which the burst signal data 10.31Gbps is temporally multiplexed ing. The burst limiting amplifier band is optimized so that the noise characteristic (SNR: signal-to-noise intensity ratio) is the best for a 1.25 Gbps signal.
　バーストリミティングアンプ２２1および２２2からの出力信号はバースト同期処理部３へ入力され、バースト同期処理部３は、入力信号に対して、実施の形態１で示したバースト同期処理部と同じ動作を実行して受信データを再生する。 Output signals from the burst limiting amplifiers 22 1 and 22 2 are input to the burst synchronization processing unit 3, and the burst synchronization processing unit 3 operates in the same manner as the burst synchronization processing unit described in the first embodiment on the input signal. To play the received data.
　このように、本実施の形態では、上述した実施の形態で示した受信装置を変形し、受光部とバーストプリアンプを各伝送速度で共通化することとした。これにより、上述した実施の形態４の受信装置と比較して部品の数をさらに削減することができ、さらなる低コスト化を実現できる。 As described above, in this embodiment, the receiving apparatus shown in the above-described embodiment is modified to share the light receiving unit and the burst preamplifier at each transmission rate. Thereby, the number of parts can be further reduced as compared with the receiving apparatus of the fourth embodiment described above, and further cost reduction can be realized.
　なお、上記説明では、伝送速度が２つの場合について説明を行ったが、３つ以上の場合にも対応可能である。たとえば、図１に示した受信装置の場合、各伝送速度に対応した受信部（高速データ用受信部２２1などに相当）および多位相ＣＬＫサンプリング部のペアを３つ以上備え、バースト同期処理部３（データ選択部３３）が、各受信部において再生された受信データの中からいずれか一つを選択して出力するようにする。速度判定部３２は、上述した最適位相の特性（図４など参照）より、各多位相ＣＬＫサンプリング部から出力される最適位相情報を利用して受信フレームの伝送速度を判定可能である。 In the above description, the case where the transmission rate is two has been described. However, the case where there are three or more transmission rates is also possible. For example, if the receiver shown in FIG. 1, includes and three or more pairs of multi-phase CLK sampling unit (corresponding to high-speed data receiving section 22 1) receiving sections corresponding to the transmission rate, burst synchronization processing unit 3 (data selection unit 33) selects and outputs one of the received data reproduced in each reception unit. The speed determination unit 32 can determine the transmission rate of the received frame using the optimum phase information output from each multi-phase CLK sampling unit based on the above-described optimum phase characteristics (see FIG. 4 and the like).
　以上のように、本発明にかかる受信装置は、光信号の受信装置に有用であり、特に、ＰＯＮシステムの親局装置を構成し、伝送速度の異なる複数の光信号が時間多重された上り方向のバースト光信号を受信する受信装置に適している。 As described above, the receiving apparatus according to the present invention is useful for an optical signal receiving apparatus. In particular, it constitutes a master station apparatus of a PON system, and an upstream direction in which a plurality of optical signals having different transmission speeds are time-multiplexed. It is suitable for a receiving apparatus that receives a burst optical signal.

Claims (16)

  1. 　予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号を受信する受信装置であって、
    　前記バースト光信号を電気信号に変換する変換手段と、
    　前記電気信号に対して、前記複数の伝送速度それぞれに対応させて予め決定しておいた複数の条件で複数回のデータ再生処理を実行し、前記複数の伝送速度と同じ数の再生データを生成する再生データ生成手段と、
    　前記複数の再生データの中のいずれか一つの再生データを選択し、最終的な受信データとして出力する選択手段と、
    　を備えることを特徴とする受信装置。     A receiving device that receives a burst optical signal in which a plurality of optical signals having any one of a plurality of transmission rates defined in advance are time-multiplexed,
    Conversion means for converting the burst optical signal into an electrical signal;
    The data reproduction process is performed a plurality of times on a plurality of conditions determined in advance corresponding to each of the plurality of transmission rates, and the same number of reproduction data as the plurality of transmission rates is generated. Playback data generation means for
    Selecting means for selecting any one of the plurality of reproduction data and outputting as final received data;
    A receiving apparatus comprising:
  2. 　前記再生データ生成手段は、
    　前記予め規定された複数の伝送速度の中のいずれか一つの伝送速度に対応させて予め決定しておいた条件で前記電気信号に対するデータ再生処理を実行する、当該複数の伝送速度と同じ数のデータ再生手段、
    　を備え、
    　前記各データ再生手段は、それぞれ異なる条件でデータ再生処理を実行することを特徴とする請求項１に記載の受信装置。     The reproduction data generation means includes
    The data reproduction process for the electrical signal is executed under a condition determined in advance corresponding to any one of the plurality of transmission rates defined in advance, and the same number as the plurality of transmission rates. Data reproduction means,
    With
    The receiving apparatus according to claim 1, wherein each of the data reproduction units executes data reproduction processing under different conditions.
  3. 　前記データ再生手段は、
    　入力信号である前記電気信号に対して、対応する条件に従ったレベル調整を行うレベル調整手段と、
    　前記信号レベルが調整された後の電気信号に対して、受信データのビット判定を行うビット判定手段と、
    　を備えることを特徴とする請求項２に記載の受信装置。     The data reproducing means includes
    Level adjustment means for performing level adjustment according to corresponding conditions on the electric signal which is an input signal;
    Bit determination means for performing bit determination of received data with respect to the electric signal after the signal level is adjusted,
    The receiving apparatus according to claim 2, further comprising:
  4. 　前記選択手段は、
    　前記各再生データに対して、再生データの生成処理で使用した条件に対応する多位相クロックでサンプリングを行い、得られたサンプリング結果に基づいて最適なサンプリングタイミングである最適位相を判定する、前記複数の再生データと同じ数の最適位相判定手段と、
    　前記各最適位相判定手段により判定された最適位相に基づいて、前記複数の再生データの中から最終的な受信データを選択する受信データ選択手段と、
    　を備えることを特徴とする請求項１、２または３に記載の受信装置。     The selection means includes
    The plurality of reproduction data is sampled with a multi-phase clock corresponding to the condition used in the reproduction data generation process, and the optimum phase that is the optimum sampling timing is determined based on the obtained sampling result. The same number of optimum phase determination means as the reproduction data of
    Received data selecting means for selecting final received data from the plurality of reproduction data based on the optimum phase determined by each of the optimum phase determining means;
    The receiving device according to claim 1, 2 or 3.
  5. 　前記変換手段は、
    　前記光信号を入力とし、前記複数の伝送速度と同じ数の経路に当該入力信号を強度分岐させる強度分岐光カプラと、
    　前記複数の経路と１対１で接続され、接続された経路を介して前記強度分岐光カプラから受け取った光信号を電気信号に変換する、前記複数の伝送速度と同じ数のホトダイオードと、
    　を備えることを特徴とする請求項１に記載の受信装置。     The converting means includes
    An intensity branching optical coupler that takes the optical signal as input and branches the intensity of the input signal to the same number of paths as the plurality of transmission speeds;
    A plurality of photodiodes connected to the plurality of paths in a one-to-one manner and converting the optical signals received from the intensity branching optical couplers through the connected paths into electrical signals;
    The receiving apparatus according to claim 1, further comprising:
  6. 　前記変換手段は、
    　前記光信号を電気信号に変換し、得られた電気信号を前記予め規定された複数の伝送速度と同じ数の経路に出力することを特徴とする請求項１に記載の受信装置。     The converting means includes
    The receiving apparatus according to claim 1, wherein the optical signal is converted into an electric signal, and the obtained electric signal is output to the same number of paths as the plurality of predetermined transmission rates.
  7. 　予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号を受信する受信装置であって、
    　前記バースト光信号を電気信号に変換する変換手段と、
    　前記電気信号に対して、前記複数の伝送速度それぞれに対応させて予め決定しておいた複数の条件で複数回のデータ再生処理を実行し、前記複数の伝送速度と同じ数の再生データを生成する再生データ生成手段と、
    　前記複数の再生データの中のいずれか一つの再生データに基づいて最終的な受信データを再生する受信データ再生手段と、
    　を備えることを特徴とする受信装置。     A receiving device that receives a burst optical signal in which a plurality of optical signals having any one of a plurality of transmission rates defined in advance are time-multiplexed,
    Conversion means for converting the burst optical signal into an electrical signal;
    The data reproduction process is performed a plurality of times on a plurality of conditions determined in advance corresponding to each of the plurality of transmission rates, and the same number of reproduction data as the plurality of transmission rates is generated. Playback data generation means for
    Received data reproducing means for reproducing final received data based on any one of the plurality of reproduced data;
    A receiving apparatus comprising:
  8. 　前記再生データ生成手段は、
    　前記予め規定された複数の伝送速度の中のいずれか一つの伝送速度に対応させて予め決定しておいた条件で前記電気信号に対するデータ再生処理を実行する、当該複数の伝送速度と同じ数のデータ再生手段、
    　を備え、
    　前記各データ再生手段は、それぞれ異なる条件でデータ再生処理を実行することを特徴とする請求項７に記載の受信装置。     The reproduction data generation means includes
    The data reproduction process for the electrical signal is executed under a condition determined in advance corresponding to any one of the plurality of transmission rates defined in advance, and the same number as the plurality of transmission rates. Data reproduction means,
    With
    8. The receiving apparatus according to claim 7, wherein each of the data reproducing means executes data reproducing processing under different conditions.
  9. 　前記データ再生手段は、
    　入力信号である前記電気信号に対して、対応する条件に従ったレベル調整を行うレベル調整手段と、
    　前記信号レベルが調整された後の電気信号に対して、受信データのビット判定を行うビット判定手段と、
    　を備えることを特徴とする請求項８に記載の受信装置。     The data reproducing means includes
    Level adjustment means for performing level adjustment according to corresponding conditions on the electric signal which is an input signal;
    Bit determination means for performing bit determination of received data with respect to the electric signal after the signal level is adjusted,
    The receiving apparatus according to claim 8, further comprising:
  10. 　前記受信データ再生手段は、
    　前記再生データに含まれる受信フレームのヘッダ情報に基づいて、前記複数の再生データの中のいずれか一つを選択する再生データ選択手段と、
    　前記再生データ選択手段により選択された再生データに対して、前記複数の伝送速度の中の最も高速な伝送速度に対応する多位相クロックでサンプリングを行い、得られたサンプリング結果に基づいて最適なサンプリングタイミングである最適位相を判定する最適位相判定手段と、
    　前記再生データ選択手段により選択された再生データ、および前記最適位相判定手段により判定された最適位相に基づいて、最終的な受信データを再生する最終受信データ再生手段と、
    　を備えることを特徴とする請求項７、８または９に記載の受信装置。     The received data reproduction means includes
    Reproduction data selection means for selecting any one of the plurality of reproduction data based on header information of a received frame included in the reproduction data;
    The reproduction data selected by the reproduction data selection means is sampled with a multi-phase clock corresponding to the fastest transmission speed among the plurality of transmission speeds, and optimum sampling is performed based on the obtained sampling results. An optimal phase determination means for determining an optimal phase as a timing;
    Final received data reproducing means for reproducing final received data based on the reproduced data selected by the reproduced data selecting means and the optimum phase determined by the optimum phase determining means;
    The receiving apparatus according to claim 7, 8 or 9.
  11. 　予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号を受信する受信装置であって、
    　前記バースト光信号を電気信号に変換する変換手段と、
    　入力信号である前記電気信号に対して、前記予め規定された複数の伝送速度の中のいずれか一つの伝送速度に対応させて予め決定しておいたゲインを用いてレベル調整を行う、前記予め規定された複数の伝送速度と同じ数のレベル調整手段と、
    　前記各レベル調整手段によりレベルが調整された後の各電気信号に基づいて、受信データの候補を生成する受信データ候補生成手段と、
    　前記受信データの候補に基づいて最終的な受信データを再生する受信データ再生手段と、
    　を備えることを特徴とする受信装置。     A receiving device that receives a burst optical signal in which a plurality of optical signals having any one of a plurality of transmission rates defined in advance are time-multiplexed,
    Conversion means for converting the burst optical signal into an electrical signal;
    The level adjustment is performed on the electrical signal that is an input signal by using a gain that is determined in advance in correspondence with any one of the plurality of transmission speeds defined in advance. The same number of level adjustment means as the specified multiple transmission rates;
    Received data candidate generating means for generating received data candidates based on each electrical signal after the level is adjusted by each level adjusting means;
    Received data reproduction means for reproducing final received data based on the received data candidates;
    A receiving apparatus comprising:
  12. 　前記受信データ再生手段は、
    　前記受信データ候補生成手段により生成された候補に対して、前記複数の伝送速度の中の最も高速な伝送速度に対応する多位相クロックでサンプリングを行い、得られたサンプリング結果に基づいて最適なサンプリングタイミングである最適位相を判定する最適位相判定手段と、
    　前記受信データ候補生成手段により生成された候補、および前記最適位相判定手段により判定された最適位相に基づいて、最終的な受信データを再生する最終受信データ再生手段と、
    　を備えることを特徴とする請求項１１に記載の受信装置。     The received data reproduction means includes
    The candidate generated by the received data candidate generation means is sampled with a multi-phase clock corresponding to the fastest transmission speed among the plurality of transmission speeds, and optimum sampling is performed based on the obtained sampling result An optimal phase determination means for determining an optimal phase as a timing;
    Final received data reproducing means for reproducing final received data based on the candidate generated by the received data candidate generating means and the optimum phase determined by the optimum phase determining means;
    The receiving device according to claim 11, comprising:
  13. 　予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号を受信する受信装置であって、
    　前記光信号を電気信号に変換する変換手段と、
    　前記電気信号のレベル変換を行い、その信号レベルが所望のレベルとなるように調整し、さらに、レベル調整後の電気信号に対して、前記複数の伝送速度それぞれに対応させて予め決定しておいた複数の条件で複数回のデータ再生処理を実行し、前記複数の伝送速度と同じ数の再生データを生成する再生データ生成手段と、
    　前記複数の再生データの中のいずれか一つの再生データを選択し、最終的な受信データとして出力する選択手段と、
    　を備えることを特徴とする受信装置。     A receiving device that receives a burst optical signal in which a plurality of optical signals having any one of a plurality of transmission rates defined in advance are time-multiplexed,
    Conversion means for converting the optical signal into an electrical signal;
    The level of the electrical signal is converted, adjusted so that the signal level becomes a desired level, and the level-adjusted electrical signal is determined in advance corresponding to each of the plurality of transmission rates. Reproduction data generation means for executing a plurality of data reproduction processes under a plurality of conditions and generating the same number of reproduction data as the plurality of transmission speeds;
    Selecting means for selecting any one of the plurality of reproduction data and outputting as final received data;
    A receiving apparatus comprising:
  14. 　前記選択手段は、
    　前記各再生データに対して、再生データの生成処理で使用した条件に対応する多位相クロックでサンプリングを行い、得られたサンプリング結果に基づいて最適なサンプリングタイミングである最適位相を判定する、前記複数の再生データと同じ数の最適位相判定手段と、
    　前記各最適位相判定手段により判定された最適位相に基づいて、前記複数の再生データの中から最終的な受信データを選択する受信データ選択手段と、
    　を備えることを特徴とする請求項１３に記載の受信装置。     The selection means includes
    The plurality of reproduction data is sampled with a multi-phase clock corresponding to the condition used in the reproduction data generation process, and the optimum phase that is the optimum sampling timing is determined based on the obtained sampling result. The same number of optimum phase determination means as the reproduction data of
    Received data selecting means for selecting final received data from the plurality of reproduction data based on the optimum phase determined by each of the optimum phase determining means;
    The receiving apparatus according to claim 13, comprising:
  15. 　予め規定された複数の伝送速度の中のいずれか一つの伝送速度を有する複数の光信号が時間多重されたバースト光信号を受信する受信装置であって、
    　前記光信号を電気信号に変換する変換手段と、
    　前記電気信号のレベル変換を行い、その信号レベルが所望のレベルとなるように調整し、さらに、レベル調整後の電気信号に対して、前記複数の伝送速度それぞれに対応させて予め決定しておいた複数の条件で複数回のデータ再生処理を実行し、前記複数の伝送速度と同じ数の再生データを生成する再生データ生成手段と、
    　前記複数の再生データの中のいずれか一つの再生データに基づいて最終的な受信データを再生する受信データ再生手段と、
    　を備えることを特徴とする受信装置。     A receiving device that receives a burst optical signal in which a plurality of optical signals having any one of a plurality of transmission rates defined in advance are time-multiplexed,
    Conversion means for converting the optical signal into an electrical signal;
    The level of the electrical signal is converted, adjusted so that the signal level becomes a desired level, and the level-adjusted electrical signal is determined in advance corresponding to each of the plurality of transmission rates. Reproduction data generation means for executing a plurality of data reproduction processes under a plurality of conditions and generating the same number of reproduction data as the plurality of transmission speeds;
    Received data reproducing means for reproducing final received data based on any one of the plurality of reproduced data;
    A receiving apparatus comprising:
  16. 　前記受信データ再生手段は、
    　前記再生データに含まれる受信フレームのヘッダ情報に基づいて、前記複数の再生データの中のいずれか一つを選択する再生データ選択手段と、
    　前記再生データ選択手段により選択された再生データに対して、前記複数の伝送速度の中の最も高速な伝送速度に対応する多位相クロックでサンプリングを行い、得られたサンプリング結果に基づいて最適なサンプリングタイミングである最適位相を判定する最適位相判定手段と、
    　前記再生データ選択手段により選択された再生データ、および前記最適位相判定手段により判定された最適位相に基づいて、最終的な受信データを再生する最終受信データ再生手段と、
    　を備えることを特徴とする請求項１５に記載の受信装置。     The received data reproduction means includes
    Reproduction data selection means for selecting any one of the plurality of reproduction data based on header information of a received frame included in the reproduction data;
    The reproduction data selected by the reproduction data selection means is sampled with a multi-phase clock corresponding to the fastest transmission speed among the plurality of transmission speeds, and optimum sampling is performed based on the obtained sampling results. An optimal phase determination means for determining an optimal phase as a timing;
    Final received data reproducing means for reproducing final received data based on the reproduced data selected by the reproduced data selecting means and the optimum phase determined by the optimum phase determining means;
    The receiving device according to claim 15, comprising:
PCT/JP2008/055284 2008-03-21 2008-03-21 Receiving apparatus WO2009116168A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2008/055284 WO2009116168A1 (en) 2008-03-21 2008-03-21 Receiving apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2008/055284 WO2009116168A1 (en) 2008-03-21 2008-03-21 Receiving apparatus

Publications (1)

Publication Number Publication Date
WO2009116168A1 true WO2009116168A1 (en) 2009-09-24

Family

ID=41090590

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/055284 WO2009116168A1 (en) 2008-03-21 2008-03-21 Receiving apparatus

Country Status (1)

Country Link
WO (1) WO2009116168A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011160054A (en) * 2010-01-29 2011-08-18 Nippon Telegr & Teleph Corp <Ntt> Dual rate amplitude limiting amplifier circuit
WO2013035226A1 (en) * 2011-09-05 2013-03-14 日本電気株式会社 Optical burst signal processing device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH088954A (en) * 1994-06-21 1996-01-12 Nec Corp Increase system for service capacity in point-multi-point optical transmission system
JP2000049823A (en) * 1998-08-03 2000-02-18 Nippon Telegr & Teleph Corp <Ntt> Transmitter, receiver and multi-rate transmission system using them
JP2005151424A (en) * 2003-11-19 2005-06-09 Nippon Telegr & Teleph Corp <Ntt> Optical signal receiver
JP2007300445A (en) * 2006-05-01 2007-11-15 Sumitomo Electric Ind Ltd Station side apparatus to be used for multi-rate pon system, terminal apparatus, and network synchronizing method in the system
JP2008017111A (en) * 2006-07-05 2008-01-24 Mitsubishi Electric Corp Bit speed determination device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH088954A (en) * 1994-06-21 1996-01-12 Nec Corp Increase system for service capacity in point-multi-point optical transmission system
JP2000049823A (en) * 1998-08-03 2000-02-18 Nippon Telegr & Teleph Corp <Ntt> Transmitter, receiver and multi-rate transmission system using them
JP2005151424A (en) * 2003-11-19 2005-06-09 Nippon Telegr & Teleph Corp <Ntt> Optical signal receiver
JP2007300445A (en) * 2006-05-01 2007-11-15 Sumitomo Electric Ind Ltd Station side apparatus to be used for multi-rate pon system, terminal apparatus, and network synchronizing method in the system
JP2008017111A (en) * 2006-07-05 2008-01-24 Mitsubishi Electric Corp Bit speed determination device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011160054A (en) * 2010-01-29 2011-08-18 Nippon Telegr & Teleph Corp <Ntt> Dual rate amplitude limiting amplifier circuit
WO2013035226A1 (en) * 2011-09-05 2013-03-14 日本電気株式会社 Optical burst signal processing device

Similar Documents

Publication Publication Date Title
US8346098B2 (en) Receiving apparatus and receiving method
JP2007060443A (en) Dqpsk optical receiving circuit
JP4233985B2 (en) Optical signal receiver
US20090225914A1 (en) Communication terminal apparatus, communication apparatus, and signal receiving method
CA2875762A1 (en) Burst signal receiving apparatus and method, pon optical line terminal, and pon system
KR101519443B1 (en) Optical receiver
JP2013219599A (en) Multirate optical signal receiving device and method
US20100135666A1 (en) Clock phase aligning apparatus for burst-mode data
WO2009116168A1 (en) Receiving apparatus
US20100183107A1 (en) Burst mode receiver
JP2008219765A (en) Optical receiver and balance adjusting method
JP2005287019A (en) Low power low jitter optical receiver for optical fiber communication link
JP5321312B2 (en) Optical signal receiving apparatus and receiving method
KR101338480B1 (en) apparatus for generating a detection signal for burst mode packet signal and receiving apparatus
CN117397181A (en) Method and apparatus for feedback control of mode MUX and DEMUX
KR101031609B1 (en) Clock phase aligner for burst-mode data
JP4555348B2 (en) System and method for mitigating dispersion slope in optical communication system
JP2014165728A (en) Optical receiver
JP2010178257A (en) Amplifier corresponding to a plurality of speeds
WO2020050101A1 (en) Signal processing device and optical receiver
JP5588814B2 (en) Burst receiver, burst reception control method, and system
WO2013132580A1 (en) Multi-rate recovery device
JP2010219745A (en) Data reproduction circuit
JP5649496B2 (en) Burst CDR circuit and method for reproducing input data signal from burst signal
JP5617405B2 (en) DATA REPRODUCING CIRCUIT, STATION-SIDE OPTICAL TRANSMITTER / RECEIVER AND DATA REPRODUCING METHOD

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08722636

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08722636

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP