WO2009108027A2

WO2009108027A2 - Method and system for transmitting and receiving signals

Info

Publication number: WO2009108027A2
Application number: PCT/KR2009/001000
Authority: WO
Inventors: Woo Suk Ko; Sang Chul Moon
Original assignee: Lg Electronics Inc.
Priority date: 2008-02-28
Filing date: 2009-03-02
Publication date: 2009-09-03
Also published as: EP2195990A2; EP2195990A4; WO2009108027A3

Abstract

The present invention relates to methods of efficiently transmitting signals, an efficient receiver, and methods of efficiently receiving the signals. In particular, the present invention relates to receiving signals and deinterleaving bits between Low Density Parity Check (LDPC) blocks of bitstreams of the received signals in a twisted fashion. In addition, the present invention relates to methods of efficiently transmitting signals which are counterparts of the receiving methods.

Description

METHOD AND SYSTEM FOR TRANSMITTING AND RECEIVING SIGNALS

The present application claims the benefit of priority under 35 U.S.C. 119 of U.S. provisional patent applications No. 61/032,075 filed on Feb. 28, 2008, No. 61/033,003 filed on Mar. 2, 2008, No. 61/035,361 filed on Mar. 10, 2008, No. 61/035,722 filed on Mar. 11, 2008, No. 61/036,917 filed on Mar. 14, 2008, No. 61/043,392 filed on Apr. 8, 2008, which are hereby expressly incorporated by reference.

The present invention relates to a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM (Orthogonal Frequency Division Multiplexing) system including a TFS (Time-Frequency Slicing).

TFS (Time Frequency Slicing) technique has been introduced for broadcasting. When a TFS is used, a single service can be transmitted through multiple RF (Radio Frequency) channels on a two-dimensional time-frequency space.

OFDM (Orthogonal Frequency Division Multiplexing) is a frequency-division multiplexing (FDM) scheme utilized as a digital multi-carrier modulation method. A large number of closely-spaced orthogonal sub-carriers are used to carry data. The data are divided into several parallel data streams or channels, one for each sub-carrier. Each sub-carrier is modulated with a conventional modulation scheme (such as quadrature amplitude modulation or phase shift keying) at a low symbol rate, maintaining total data rates similar to conventional single-carrier modulation schemes in the same bandwidth.

OFDM has developed into a popular scheme for wideband digital communication, whether wireless or over copper wires, used in applications such as digital television and audio broadcasting, wireless networking and broadband internet access.

When TFS, which uses multiple RF bands for each transmitter is combined with OFDM, frequency diversity gain and statistical multiplexing gain can be obtained, thus, resources can be efficiently utilized.

It is, therefore, an object of the present invention to provide a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM system including TFS.

One of the embodiments of the present invention provides a receiver for receiving signals comprising: a demodulator configured to demodulate received signals by Orthogonal Frequency Division Multiplexing (OFDM) method; a demapper configured to transform OFDM symbols in the demodulated signals into bitstreams; a bit deinterleaver configured to deinterleave bits between Low Density Parity Check (LDPC) blocks of the bitstreams, wherein the bit deinterleaving comprises writing the bits of at least one of the LDPC block to a memory in a row direction of the memory and reading the bits from the memory in a twisted fashion and in a column direction of the memory, wherein the read bits from each round of the reading in the twisted fashion correspond to a LDPC block of the bitstreams; and a decoder configured to correct errors in the deinterleaved bits of the bitstreams.

Another embodiment of the present invention provides a method of receiving signals comprising: demodulating received signals by Orthogonal Frequency Division Multiplexing (OFDM) method; transforming OFDM symbols in the demodulated signals into bitstreams; deinterleaving bits between Low Density Parity Check (LDPC) blocks of the bitstreams, wherein the bit deinterleaving comprises writing the bits of at least one of the LDPC block to a memory in a row direction of the memory and reading the bits from the memory in a twisted fashion and in a column direction of the memory, wherein the read bits from each round of the reading in the twisted fashion correspond to a LDPC block of the bitstreams; and correcting errors in the deinterleaved bits of the bitstreams.

Yet another embodiment of the present invention provides a method of transmitting signals comprising: error-correction-coding a transport stream for delivering a service; bitinterleaving bits between Low Density Parity Check (LDPC) blocks of the coded transport stream, wherein the bit interleaving comprises writing the bits of at least one of the LDPC block to a memory in a twisted fashion and in a column direction of the memory and reading the bits from the memory in a row direction of the memory; mapping the bitinterleaved bits into symbols; building a signal frame of the symbols; and modulating the signal frame by an Orthogonal Frequency Division Multiplexing (OFDM) method and transmitting the modulated signal.

It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

According to the present invention, it is possible to provide a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM system including TFS.

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings:

Fig. 1 is a block diagram of an example of a TFS (Time Frequency Slicing)-OFDM (Orthogonal Frequency Division Multiplexing) transmitter.

Fig. 2 is a block diagram of an example of the input processor shown in the Fig. 1.

Fig. 3 is a block diagram of an example of the BICM (Bit-Interleaved Coding and Modulation) shown in Fig. 1.

Fig. 4 is a block diagram of an example of the Frame Builder shown in Fig. 1.

Fig. 5 is a block diagram of an example of the MIMO/MISO decoder shown in Fig. 1.

Fig. 6 is a block diagram of an example of the modulator, specifically an example of an OFDM modulator.

Fig. 7 is a block diagram of an example of the analog processor shown in Fig. 1.

Fig. 8 is a block diagram of an example of a TFS-OFDM receiver.

Fig. 9 is a block diagram of an example of the AFE (Analog Front End) shown in Fig. 8.

Fig. 10 is a block diagram of an example of the demodulator, specifically an OFDM demodulator.

Fig. 11 is a block diagram of an example of the MIMO/MISO decoder shown in Fig. 8.

Fig. 12 is a block diagram of an example of the frame parser shown in Fig. 8.

Fig. 13 is a block diagram of an example of the BICM decoder shown in Fig. 8.

Fig. 14 is a block diagram of an example of the output processor shown in Fig. 8.

Fig. 15 shows equations used for LDPC decoder in prior arts.

Fig. 16 shows that a range of output of atanh is from negative infinity to positive infinity.

Fig. 17 shows a comparison between using a conventional LDPC decoder and a LDPC decoder of present invention regarding number of error bits as a number of iterations increases when Sum-Product algorithm is used.

Fig. 18 shows a size of bit-interleaver.

Fig. 19 shows how inter LDPC block interleaving can increase a diversity gain.

Fig. 20 shows an example of Inter-Block Bit Interleaving (IB-BI).

Fig. 21 shows a result of a simulation.

Fig. 22 shows the result of the simulation on BER graph.

Figs. 23 and 24 show an example of varying BI_SIZE.

Fig. 25 shows a simulation result at different coderates.

Fig. 26 shows the simulation result on BER graph.

Fig. 27 shows the simulation result on BER graph with RQD.

Fig. 28 shows an example of configurable diversity gain when IB-BI is applied to 16QAM, BBC+SONY.

Fig. 29 shows an example of IB-BI applied to a variable bitrate (VBR) PLP.

Fig. 30 shows a diagram assigning IB-BI blocks for various size of PLP.

Fig. 31 shows examples of IB-BI assignments using the above rules for varying number of LDPC blocks and different sizes of PLP.

Fig. 32 shows a maximum BI size which can be transmitted by a transmitter.

Fig. 33 shows a performance comparison between BBC+Sony and BBC + CTW (Column Twisting).

Fig. 34 shows another result of the simulations.

Fig. 35 shows performance comparison between BBC and LG-hat demux regarding Additive White Gaussian Noise (AWGN).

Fig. 36 shows performance comparison between BBC and LG-hat demux.

Fig. 37 shows a diagram of interaction between various interleavers.

Fig. 38 is a bit demux for 256-QAM and NLDPC=64,800.

Fig. 39 is a bit demux for 256-QAM and NLDPC=16,200.

Fig. 40 is a bit demux for 64-QAM, NLDPC=64,800/16,200.

Fig. 41 is a bit demux for 16-QAM, NLDPC=64,800/16,200.

Fig. 42 is a bit demux for 256-QAM, NLDPC=64,800.

Fig. 43 is a bit demux for 256-QAM, NLDPC=16,200.

Fig. 44 is a bit demux for 64-QAM, NLDPC=64,800/16,200.

Fig. 45 is a bit demux for 16-QAM, NLDPC=64,800/16,200.

Fig. 46 is a bit demux for 256-QAM, NLDPC=64,800.

Fig. 47 is a bit demux for 256-QAM, NLDPC=16,200.

Fig. 48 is a bit demux for 64-QAM, NLDPC=64,800.

Fig. 49 is a bit demux for 64-QAM, NLDPC=16,200.

Fig. 50 is a bit demux for 16-QAM, NLDPC=64,800.

Fig. 51 is a bit demux for 16-QAM, NLDPC=16,200.

Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

Fig. 1 shows an example of proposed TFS (Time Frequency Slicing)-OFDM (Orthogonal Frequency Division Multiplexing) transmitter. A multiple MPEG2-TS (Transport Stream) and a multiple Generic stream can be inputted into a TFS transmitter. The input processor (101) can split the inputted streams into a multiple output signals for a multiple PLP (Physical Layer Path). The BICM (Bit-Interleaved Coding and Modulation) (102) can encode and interleave the PLP individually. The frame builder (103) can transform the PLP into total R of RF bands. MIMO (Multiple-Input Multiple-Output)/MISO (Multiple-Input Single-Output) (104) technique can be applied for each RF band. Each RF band for each antenna can be individually modulated by the modulator (105a, b) and can be transmitted to antennas after being converted to an analog signal by the analog processor (106a, b).

Fig. 8 shows an example of a TFS-OFDM receiver. When total R of RF bands are used for TFS system, received signals by AFE (Analog Front End) (801a,b) can be demodulated by demodulators (802a,b), then can be decoded by MIMO/MISO Decoder (803) to obtain diversity gain. Frame parser (804) can restore multiple PLP signals from received TFS frame. BICM decoder (805) can correct errors in a transmission channel. Finally, output processor (806) can restore signals according to necessary format.

Fig. 2 is an example of the input processor. MPEG-TS (Transport Stream) can be multiplexed into a single output through TS-MUX (201a) and Generic streams (Internet protocol) can be transformed into a single output through GSE (General Stream Encapsulation) (201b). Each output from the TS-MUX and GSE can be split for multiple services by the service splitter (202a, b). PLP is a processing of each service. Each PLP can be transformed into a frame by the BB (Baseband) Frame (103a~d).

Fig. 3 is an example of the BICM. The Outer encoder (301) and the inner encoder (303) can add redundancy for error correction in a transmission channel. The outer interleaver (302) and the inner interleaver (304) can interleave data randomly to mitigate burst errors.

Fig. 4 is an example of the frame builder. QAM mapper (401a, b) can transform inputted bits into QAM symbols. Hybrid QAM can be used. Time domain interleaver (402a, b) can interleave data in time domain to make the data be robust against burst error. At this point, an effect of interleaving many RF bands can be obtained in a physical channel because the data are going to be transmitted to a multiple RF bands. TFS frame builder (403) can split inputted data to form TFS frames and send the TFS frames to total R of RF bands according to a TFS scheduling. Each RF band can be individually interleaved in frequency domain by frequency domain interleaver (404a, b) and can become robust against frequency selective fading. Ref (Reference Signals), PL (Physical Layer) signaling, and pilots can be inserted when the TFS frame is built (405).

By hybriding two Even-QAMs, which transmits even number of bits per QAM symbol, an Odd-QAM, which transmits odd number of bits per QAM symbol can be formed by a Hybrid QAM mapper. For example, hybrid 128-QAM can be obtained by hybriding 256-QAM and 64-QAM, hybrid 32-QAM can be obtained by hybriding 64-QAM and 16-QAM, and hybrid 8-QAM can be obtained by hybriding 16-QAM and 4-QAM.

Fig. 5 shows an example of MIMO/MISO Encoder. MIMO/MISO Encoder (501) applies MIMO/MISO method to obtain an additional diversity gain or payload gain. MIMO/MISO Encoder can output signals for total A of antennas. MIMO encoding can be performed individually on total A of antenna signals for each RF band among total R of RF bands. A is equal to or greater than 1.

Fig. 6 shows an example of a modulator, specifically an example of an OFDM modulator. PAPR (Peak-to-Average Power Ratio) reduction 1 (601) can be performed on Antenna (m) signals of RF (n) bands. IFFT (602) can be performed for OFDM demodulation. PAPR reduction 2 (603) can be performed after the IFFT. ACE (Active Constellation Extension) and a tone reservation can be used for the PAPR reduction 2 (603). Lastly, guard interval (604) can be inserted.

Fig. 7 shows an example of the analog processor. Output of each modulator can be converted to an analog-domain signal by a DAC (Digital to Analog Conversion) (701), then can be transmitted to antenna after up-conversion (702). Analog filtering (703) can be performed.

Fig. 9 shows an example of an AFE (Analog Front End). FH (Frequency Hopping)-tuner (901) can perform a frequency hopping and tune signals according to inputted RF center frequency. After down-conversion (902), signals can be converted to digital signals by ADC (Analog to Digital Conversion) (903).

Fig. 10 shows an example of a demodulator, specifically an OFDM demodulator. TFS detector (1001) can detect TFS signals in a received digital signal. TFS sync (1002) can synchronize in time and frequency domains. After GI (Guard Interval) (1003) is removed, symbols in frequency domain can be obtained by performing FFT (1004) for OFDM demodulation. Channel Estimation (1005) can estimate distortion in a transmission channel based on pilot signals. Based on the estimated distortion, Channel Equalization (1006) can compensate distortion in the transmission channel. Finally, PL (Physical Layer) signaling information can be extracted from equalized data and can be transmitted to a system controller.

Fig. 11 shows an example of MIMIO/MISO decoder. Diversity and multiplexing gain can be obtained from data received from total B of antennas. For MIMO, B is greater than 1. For MISO, B is 1.

Fig. 12 shows an example of a Frame parser. Total R of the inputted RF bands data can undergo frequency deinterleaving (1201a, b), then can be reconstructed into datastream by TFS frame parser for each PLP (Physical Layer Path) according to a TFS scheduling. For each PLP, input data for BICM decoder can be obtained by using time domain deinterleaver (1203a, b) and QAM demapper (1204a, b). At this point, hybrid QAM demapper can be used as the QAM demapper.

Fig. 13 shows an example of a BICM decoder. Inner deinterleaver (1301) and outer deinterleaver (1303) can convert burst errors in a transmission channel into random errors. Inner decoder (1302) and outer decoder (1304) can correct errors in the transmission channel.

Fig. 14 shows an example of an output processor. BB (Baseband) frame parser (1401a~d) can reconstruct input data into total P of PLP data. Service mergers (1402a, b) can merge data into a single TS (Transport Stream) and a single GSE stream. For TS, TS-demux (1403a) can reconstruct original TS. For GSE stream, GSE Decapsulation (1403b) can reconstruct generic stream.

Fig. 15 shows equations used for LDPC decoder in prior arts. As shown in the equation for the check node update, atanh is required and atanh is defined with input range of from -1 to 1. The output of atanh is from negative infinity to positive infinity as shown in Fig. 16. The present embodiment of invention suggests modifying the output of the atanh to be limited within certain value, currently '3.75'. Consequently, the check node value is limited as '7.5' according to the second equation shown in Fig. 15. This limitation of atanh value can be chosen among numbers between 3 and 6. Accordingly, the number chosen will be corresponding to numbers between 6 and 12 for maximum available check node value. By this modification, error oscillation phenomenon in LDPC decoder can be prevented as shown in Fig. 17, which shows a comparison between using a conventional LDPC decoder and using a LDPC decoder of present invention regarding number of error bits as a number of iterations increases when Sum-Product algorithm is used. Fig. 17 shows that an error oscillation, which can occur at LDPC decoder can be minimized by modifying the output of the atanh.

As aforementioned, Fig. 3 shows an example of the BICM. Error floor caused during LDPC can be prevented by using BICM with BCH decoding. For example, a BCH encoder and LDPC encoder can be used for Outer code and Inner code shown in Fig. 3, respectively. Due to nature of LDPC, i.e., an effect of interleaving is innately exhibited by LDPC encoder, a combination of BCH encoder(301), LDPC encoder(303), Inner Intrlv(304) without Outer Intrlv(302) can be implemented. In addition, the Inner Intrlv(304) also can be replaced with Symbol interleaver, Time interleaver, Frequency interleaver.

At a receiver side, a combination, which corresponds to combination used in a transmitter can be implemented. Fig. 13 shows an example of BICM decoding of a receiver, a counterpart of the BICM shown in Fig. 3. Specifically, LDPC decoder and BCH decoder can be used for Inner decode(1302) and Outer Decode(1304) shown in Fig. 13. Inner/Outer Deintrlv(1301, 1030) may or may not be used depending on a method of transmission. Aforementioned method of preventing error oscillation by limiting value of check node of LDPC decoder can be applied to LDPC decoder of BICM demodulation.

There can be various types of interleavers in DVB-T2 System. The scope of interleavers is to transform correlated real channels into statistically independent channels. For example, a bit-interleaver is to spread bits within one LDPC block, while cell/time/frequency interleavers are to spread cells between several LDPC blocks or RF channels. However, because symbol mapping is performed only within a LDPC block, correlated channel fading over bits in one LDPC block can still exist. In addition, because of random cell/time/frequency interleaving, burst type of fading can remain at the input of bit deinterleaver. An inter-LDPC block interleaver can spread this type of burst fading into several LDPC blocks. In addition, through the inter-LDPC block interleaving, additional interleaving gain can be achieved. In the inter-LDPC block interleaving, symbol mapping is performed across the LDPC blocks and each cell can contain bits from different LDPC blocks.

Fig. 18 shows a size of bit interleaver or number of LDPC blocks. By controlling the number of LDPC blocks for IB-BI, trade off between diversity gain and zapping time can be determined.

In other words, trade-off between memory requirement and diversity gain is possible. The example in the figure shows a BI_SIZE of three bits, which is a configurable parameter. The maximum value of the BI_SIZE is limited by QAM size. For example, for 256-QAM, maximum additional memory will be 8 x 64,800 bits.

Fig. 19 shows how inter LDPC block interleaving can increase a diversity gain. When a deep faded symbol by channel occurs, without inter-LDPC block interleaving, poor bits caused by deep faded symbol can be all in one LDPC block and that LDPC block becomes an erroneous LDPC block. However, with inter-LDPC block interleaving, the poor bits caused by deep faded symbol can be spread to multiple LDPC blocks and erroneous LDPC blocks can be prevented.

Fig. 20 shows an example of Inter-Block Bit Interleaving (IB-BI). Specifically, it shows the IB-BI applied to 16-QAM, BBC+SONY DEMUX. Total of m LDPC blocks can be used to do bit-interleaving for 2m-QAM. The IB-BI can consist of maximum (2m) columns x (length of LDPC/2) rows memory. With column rotation, one symbol can get bits from different LDPC blocks. DEMUX structure of each LDPC block needs not to be changed. Therefore, it can be understood that the IB-BI can be used at least in 16-QAM, BBC+SONY DEMUX.

Fig. 21 shows a result of a simulation. The simulation was performed in an environment where 256QAM, CR=3/4, Rayleigh & Random Erasure & AWGN channel with K=0.2, 50 error frames after LDPC, and BCH at BER=10^-6 are used. The result shows that proposed IB-BI improves SNR performance gain by 2.7 dB. This diversity gain is expected to give performance gain with all erasure ratio / code rate.

Therefore, the IB-BI can introduce an additional diversity gain to T2 system. Especially, significant performance gain can be obtained with Rayleigh + Erasure channel such as SFN or mobile scenario. IB-BI can give significant gain whenever multiple LDPC blocks fill a time interleaver. For example, IB-BI can be applied to cases such as a low rate service with extended time interleaving, a high rate service with multiple time interleaving frames per TFS frame, and a moderate rate service with time interleaving depth of multiple LDPC blocks.

Fig. 22 shows the result of the simulation on BER graph.

Figs. 23 and 24 show an example of varying BI_SIZE. Specifically, an IB-BI used in 16QAM, BBC+SONY is shown. As shown in Fig. 24, which is one of the embodiments of the invention, by using only two LDPC blocks or BI_SIZE=1, compared to Fig. 20 where four of LDPC blocks or BI_SIZE=3 is used, memory usage can be reduced. In this manner, configurable diversity gain can be achieved.

Fig. 25 shows a simulation result at different coderates. The simulation was performed in an environment where Rayleigh & Random Erasure & AWGN channel, Es/No (dB) with 50 error frames after LDPC and BCH at BER=10^-6 were used. The result showed that proposed IB-BI gives up to 2.8 dB SNR performance gain.

Fig. 26 shows the simulation result on BER graph.

Fig. 27 shows the simulation result on BER graph with RQD.

Fig. 28 shows an example of configurable diversity gain when IB-BI is applied to 16QAM, BBC+SONY. As shown, by varying the number of LDPC blocks to be interleaved, trade off between memory usage and diversity gain can be performed.

Fig. 29 shows an example of IB-BI applied to a variable bitrate (VBR) PLP. In VBR PLP, PLP size can change and it is possible to get partial inter-block interleaving effect with VBR PLP. There are three rules in deciding the size of IB-BI. First one is to make the diversity degree of each LDPC block as same as possible. Second one is to maximize the minimum diversity degree of LDPC block. Third one is to assign bigger IB-BI blocks first. For example, for a case of PLP with 7 LDPC blocks with 16QAM, maximum diversity degree is 4, which is limited by 16QAM. In this case, combination of IB-BI with size of 4 (BI_SIZE=3) and 3 (BI_SIZE=2) is best solution.

Fig. 30 shows a diagram assigning IB-BI blocks for various size of PLP. The rules can be mathematically expressed as follows. If a total number of LDPC block for one PLP is N and a maximum IB-BI size is m, where m cannot be bigger than k, with 2k-QAM, first, a total number of IB-BI block, NIBBI can be determined as <N/m>, where <n> is the smallest integer number which is not smaller than n. Second, the biggest size of IB-BI, S can be determined as <N/NIBBI>. Third, the number of the biggest size of IB-BI, NS can be determined as [N/S], where [n] is the biggest integer number which is not bigger than n.

Fig. 32 shows a maximum BI size which can be transmitted by a transmitter. Specifically, the maximum BI size can be inserted into layer-1 (L1) signaling information region of a second pilot signal of a signal frame of the transport stream. In DVB-T2 system, sizes of 64,800 and 16,200 LDPC blocks can be used. From a signaling perspective, receiver can get information about the assignments of IB-BI block from MAX_BI_SIZE and the number of LDPC blocks for one PLP. The maximum IB-BI size of PLP is a configurable parameter. A trade off between diversity gain and memory requirement can be performed. For example, with MAX_BI_SIZE=0, DVB-T2 system can work exactly same as current baseline, while with MAX_BI_SIZE=7, DVB-T2 system can get maximum diversity gain.

Fig. 33 shows a performance comparison between BBC+Sony and BBC + CTW (Column Twisting). The simulation was performed in an environment where LDPC codeword of 64,800 bits, constellation of 16, 64, 256 QAM, coderates of 1/2, 3/5, 2/3, 3/4, 4/5, 5/6, AWGN and Rayleigh & random erasure channel, Exact LLR & sum-product decoding with 50 iterations, and minimum 50 errorneous blocks at BER=1e-6 after BCH emulation were used. Bit interleavers were BBC + column twisting with/without parity interleaver and BBC and LG-hat bit demux with Sony bit interleaver.

Fig. 34 shows another result of the simulations. Using parity interleaver can provide up to 0.3 dB SNR gain in some high erasure ratios. No significant difference for 256QAM, CR=5/6, K=0.12 was found.

Fig. 35 shows performance comparison between BBC and LG-hat demux regarding Additive White Gaussian Noise (AWGN). For coderates less than or equal to 2/3, BBC demux shows clear benefits for Rayleigh & erasure channel. For coderates greater than 2/3, LG-hat demux shows a little bit better performance than BBC demux.

Fig. 36 shows performance comparison between BBC and LG-hat demux regarding Rayleigh & Erasure. For coderates less than or equal to 2/3, BBC demux shows clear benefits for Rayleigh & erasure channel. For coderates greater than 2/3, LG-hat demux shows up to 0.3 dB SNR gain compared to BBC demux.

Fig. 37 shows a diagram of interaction between various interleavers. An effect of having two kinds of bit interleavers was investigated. Switching between two interleavers may require negligible additional complexity. Regarding interaction, BBC and LG-hat demux differ in number of columns, which may cause unexpected effect. LG-hat demux can be easily modified to have the structure same as BBC demux, which not only can maintain the reliability control of demux but also can keep the interaction between interleavers.

Two demuxs can be a solution because, first, negligible additional hardware complexity is required compared to a single demux use, second a same demux structure as baseline is obtainable with slight modification of LG-hat demux. Consequently, for best performance, using two kinds of demuxs optimized for each coderate set is suggested.

Figs. 38~51 show examples of LG bit demuxs for coderate of 3/5. RAI proposed using new bit demux for coderate of 3/5, which maintains the use of S2 LDPC code. LG-bowl demux showed good performance among various demuxs at first round of simulation. However, the number of columns is not same as that of BBC demux. It is shown that existing demux could be easily modified to have an identical structure as BBC demux. In addition, modified demux is expected not to cause unknown interaction problem while keeping its original reliability control properties. The proposed LG bit demux for coderate 3/5 can be made by modifying existing LG-bowl demux to have competitive performance compared to other proposals for coderate 3/5. Regarding using parity interleaver for coderate 3/5, BER performance of coderate 3/5 showed that using parity interleaver loses SNR gain of 0.13 dB when BBC demux is used.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention. Thus, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims

A receiver for receiving signals comprising:

a demodulator configured to demodulate received signals by Orthogonal Frequency Division Multiplexing (OFDM) method;

a demapper configured to transform OFDM symbols in the demodulated signals into bitstreams;

a bit deinterleaver configured to deinterleave bits between Low Density Parity Check (LDPC) blocks of the bitstreams, wherein the bit deinterleaving comprises writing the bits of at least one of the LDPC block to a memory in a row direction of the memory and reading the bits from the memory in a twisted fashion and in a column direction of the memory, wherein the read bits from each round of the reading in the twisted fashion correspond to a LDPC block of the bitstreams; and

a decoder configured to correct errors in the deinterleaved bits of the bitstreams.
The receiver according to claim 1, further comprising

a bit mux configured to determine (1) a number N _IBBI of a plurality of groups of Low Density Parity Check (LDPC) blocks of the bitstreams to be deinterleaved, where N _IBBI = <N/m>, where N is a total number of LDPC blocks for one Physical Layer Pipe (PLP) and m is a number which is not bigger than k, where k is a number in a 2^k Quadrature amplitude modulation (QAM); (2) a biggest number S of LDPC blocks within a group among the plurality of the groups; and (3) a number N _S of the groups having the biggest number of LDPC blocks, where S = <N/N _IBBI>, where N _S = [N/S], and wherein [N/S] is the biggest integer number which is not bigger than N/S, wherein <N/m> is a smallest integer number which is not smaller than N/m;

a bit deinterleaver configured to deinterleave bits between LDPC blocks within a group which has the biggest number of LDPC blocks, before other groups; and

a demux configured to demux the deinterleaved bits.
The receiver according to claim 2, further comprising a frame parser, wherein the frame parser is configured to extract an amount of the LDPC blocks to be deinterleaved, the N, and the m from a configurable field or a dynamic field of a layer-1 (L1)-post signaling information region of a second pilot signal of a signal frame of the received signals.
The receiver according to claim 2, wherein the demux further comprises a first type of demux and a second type of demux, wherein the first type of demux is modified into the second type of demux such that an LDPC block demuxed by the first type of demux have an identical form with an LDPC block demuxed by the second type of demux.
The receiver according to claim 2, wherein the demux further comprises;

a first type of demux optimized for a first code rate set; and

a second type of demux optimized for a second code rate.
A method of receiving signals comprising:

demodulating received signals by Orthogonal Frequency Division Multiplexing (OFDM) method;

transforming OFDM symbols in the demodulated signals into bitstreams;

deinterleaving bits between Low Density Parity Check (LDPC) blocks of the bitstreams, wherein the bit deinterleaving comprises writing the bits of at least one of the LDPC block to a memory in a row direction of the memory and reading the bits from the memory in a twisted fashion and in a column direction of the memory, wherein the read bits from each round of the reading in the twisted fashion correspond to a LDPC block of the bitstreams; and

correcting errors in the deinterleaved bits of the bitstreams.
The method according to claim 6, further comprising

determining (1) a number N _IBBI of a plurality of groups of Low Density Parity Check (LDPC) blocks of the bitstreams to be deinterleaved, where N _IBBI = <N/m>, where N is a total number of LDPC blocks for one Physical Layer Pipe (PLP) and m is a number which is not bigger than k, where k is a number in a 2^k Quadrature amplitude modulation (QAM); (2) a biggest number S of LDPC blocks within a group among the plurality of the groups; and (3) a number N _S of the groups having the biggest number of LDPC blocks, where S = <N/N _IBBI>, where N _S = [N/S], and wherein [N/S] is the biggest integer number which is not bigger than N/S, wherein <N/m> is a smallest integer number which is not smaller than N/m;

deinterleaving bits between LDPC blocks within a group which has the biggest number of LDPC blocks, before other groups; and

demuxing the deinterleaved bits.
The method according to claim 7, further comprising extracting an amount of the LDPC blocks to be deinterleaved, the N, and the m from a configurable field or a dynamic field of a layer-1 (L1)-post signaling information region of a second pilot signal of a signal frame of the received signals.
The method according to claim 7, wherein the demuxing further comprises;

modifying a first type of demuxing into a second type of demuxing such that an LDPC block demuxed by the first type of demuxing have an identical form with an LDPC block demuxed by the second type of demuxing.
The method according to claim 7, wherein the demuxing further comprises;

a first type of demuxing optimized for a first code rate set; and

a second type of demuxing optimized for a second code rate.
A method of transmitting signals comprising:

error-correction-coding a transport stream for delivering a service;

bitinterleaving bits between Low Density Parity Check (LDPC) blocks of the coded transport stream, wherein the bit interleaving comprises writing the bits of at least one of the LDPC block to a memory in a twisted fashion and in a column direction of the memory and reading the bits from the memory in a row direction of the memory;

mapping the bitinterleaved bits into symbols;

building a signal frame of the symbols; and

modulating the signal frame by an Orthogonal Frequency Division Multiplexing (OFDM) method and transmitting the modulated signal.
The method according to claim 11, further comprising

determining (1) a number N _IBBI of a plurality of groups of Low Density Parity Check (LDPC) blocks of the bitstreams to be bitinterleaved, where N _IBBI = <N/m>, where N is a total number of LDPC blocks for one Physical Layer Pipe (PLP) and m is a number which is not bigger than k, where k is a number in a 2^k Quadrature amplitude modulation (QAM); (2) a biggest number S of LDPC blocks within a group among the plurality of the groups; and (3) a number N _S of the groups having the biggest number of LDPC blocks, where S = <N/N _IBBI>, where N _S = [N/S], and wherein [N/S] is the biggest integer number which is not bigger than N/S, wherein <N/m> is a smallest integer number which is not smaller than N/m;

bitinterleaving bits between LDPC blocks within a group which has the biggest number of LDPC blocks, before other groups; and

demuxing the bitinterleaved bits.
The method according to claim 12, further comprising inserting an amount of the LDPC blocks to be bitinterleaved, the N, and the m into a configurable field or a dynamic field of a layer-1 (L1)-post signaling information region of a second pilot signal of a signal frame of the transport stream.
The method according to claim 12, wherein the demuxing further comprises;

modifying a first type of demuxing into a second type of demuxing such that an LDPC block demuxed by the first type of demuxing have an identical form with an LDPC block demuxed by the second type of demuxing.
The method according to claim 12, wherein the demuxing further comprises;

a first type of demuxing optimized for a first code rate set; and

a second type of demuxing optimized for a second code rate.