WO2009077466A1 - Device and method for managing memory - Google Patents

Device and method for managing memory Download PDF

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Publication number
WO2009077466A1
WO2009077466A1 PCT/EP2008/067461 EP2008067461W WO2009077466A1 WO 2009077466 A1 WO2009077466 A1 WO 2009077466A1 EP 2008067461 W EP2008067461 W EP 2008067461W WO 2009077466 A1 WO2009077466 A1 WO 2009077466A1
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WIPO (PCT)
Prior art keywords
memory
field
fields
bank
recording
Prior art date
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PCT/EP2008/067461
Other languages
French (fr)
Inventor
Alain Verdier
Michaël FOSSARD
Christophe Cottais
Pierrick Adam
Christian Samoyeau
Anne Peaudouye
Laurent Fangain
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Thomson Licensing
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Publication of WO2009077466A1 publication Critical patent/WO2009077466A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/103Selection of coding mode or of prediction mode
    • H04N19/112Selection of coding mode or of prediction mode according to a given display mode, e.g. for interlaced or progressive display mode
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements

Definitions

  • the invention relates to a device and a method to manage memory and a decoding device.
  • the invention relates to the organisation of video data storage in the memories.
  • the various coding standards often enable pictures to be coded in an adaptive manner, based on content analysis to define the manner in which the picture data will be coded.
  • the macroblocks of pictures are coded in the optimal manner in field mode when there is a lot of motion and in frame mode when there is little motion. This is notably the case for the coding standard H.264.
  • a choice must be made during recording, either to record the data in frame mode, or to record the data in field mode, that is the even field and the odd field separately. Irrespective of the choice made, during the data replay, when the replay mode requires an access other than the mode in which the data have been recorded, the data are not accessed efficiently, if they have been recorded in field mode and must then be replayed in frame mode, and inversely.
  • DDR Double Data Rate
  • a DDR type memory comprises a number of pages, each page comprising a plurality of banks. At a given instant t, only a single page can be open per bank. During access to a bank, this is loaded in a type of cache memory that comprises a memory space divided into a plurality of spaces each corresponding to the size of a bank. This is shown in figure 5. On this figure is shown a DDR type memory containing n pages. Each page is cut into 4 banks and during the opening of a page, the accessed bank is loaded into a type of cache with rapid access and that is an integral part of the DDR memory.
  • the invention proposes a method for the arrangement of data in a memory that enables optimisation of access to recorded data with a view to, but not exclusively, data access during decoding of fields requiring this data during their decoding.
  • the invention proposes a memory management device comprising a memory for recording pictures, the memory comprising at least two independent parts that can be opened simultaneously.
  • the memory comprising at least two independent parts that can be opened simultaneously.
  • at least one part of the memory is designed for the recording of odd fields and at least one other part of the memory is designed for the recording of even fields.
  • the device comprises the means to record the first even field at the beginning of the first part and to record the corresponding odd field at the beginning of the second part and to fill the two parts alternatively in this way, the even fields being recorded one after the other in the first part and the odd fields being recorded one after the other in the second part.
  • the memory being organised in a plurality m of parts j called pages, each page being organised in a plurality of n subparts i numbered 1 to n, called banks, the means to record the even field recording it at the beginning of a bank i of a page j and recording the odd field at the beginning of a bank k of a page I such that k is different to i and I is superior to j.
  • the j pages are organised sequentially and the memory space between the bank k of the part I and the bank i of the part j is sufficient to contain at least one field.
  • the memory space between page I and page j is dimensioned so as to record a field in high definition format.
  • the device comprises the means to record noise data relating to said field in said memory space after the first field.
  • the space is dimensioned to host a field of maximum size, such as a high definition format field
  • the noise data being relative to the field, they are recorded in a continuous space, which also renders their access more rapid.
  • the memory is of DDR type.
  • DDR- 1 There are several generations of DDR. Naturally the invention relates to all generations of DDR, DDR- 1 just like DDR-2.
  • the invention also relates to a decoding device comprising a memory management device according to the invention and the means of decoding, the memory being designed to record reference fields decoded by the decoding means and used by said decoding means during the decoding of the following fields.
  • the decoders use pictures previously decoded to decode the current picture. It is therefore important that the decoders access rapidly the data in the memory so that the decoding is performed rapidly. This is all the more important for trickmodes.
  • the data is coded according to the H.264 standard or according to the MPEG-2 standard.
  • the invention also relates to a memory management method of a memory comprising at least two independent parts that can be open simultaneously.
  • the method comprises the steps for: - recording even fields in a first of the two parts of said memory,
  • FIG. 2 shows a device according to a preferred embodiment of the invention
  • FIG. 3 shows the organisation of the memory according to a simplified embodiment of the invention
  • FIG. 4 shows the organisation of the memory according to a second embodiment of the invention
  • -figure 5 illustrates the standard operation of a DDR type memory.
  • Figure 1 a shows a picture in progressive mode where a field corresponds to a complete picture, an even line succeeds an odd line in the field.
  • Figure 1 b shows a field in interlaced mode, half a picture is transmitted to each field: even lines for the first picture and odd lines for the second picture. The signal is therefore composed of successive even and odd fields.
  • the invention applies more particularly to video data decoding devices. More particularly, according to a preferred embodiment of the invention, the invention relates to a coding/decoding type that conforms to the H.264 standard.
  • FIG 2 shows a personal recorder (PVR) type device 1 designed to interface with a display screen 7 and receive coded data according to the H.264 standard from a content broadcaster, either by cable, satellite, terrestrial network or according to the IP protocol.
  • the device shown in figure 1 comprises other modules not shown in figure 1 and not indispensable to the explanation of the invention.
  • the device 1 is a device comprising the characteristic elements of personal recorders known by persons skilled in the art.
  • the new and inventive part of this personal recorder is at the level of memory management 3 as described hereafter.
  • Such a device 1 receives a Transport Stream (TS) comprising coded data in H.264 format. It is intended to decode data either to, record it on a means of storage 2 (that can be of hard disk, memory card, holographic storage or 'blue ray' type), or to display it directly on a display screen 7. The recorded data can then be visually displayed, on user request.
  • TS Transport Stream
  • the invention relates more particularly to the decoding of data and access to the DDR memory 3.
  • a demultiplexer 8 receives a data stream comprising multiple programs (MPTS) and provides from this stream, streams comprising of a single program (SPTS), either to record this program or to display it directly. Such a demultiplexer 8 also extracts service information associated with the program in order to display it in due time as well as other information useful for the exploitation of this program.
  • MPTS multiple programs
  • SPTS single program
  • a processor 6 controls the data streams in the PVR. Its interconnections with the other modules are not shown in figure 2.
  • the decoder 4 conforms to the coding/decoding H.264 standard.
  • the data coded according to the H.264 standard is coded in a complex way requiring during numerous accesses to he DDR memory 3 during its decoding.
  • the frame mode consists in combining two fields together and coding them as a single picture.
  • the field mode consists in not combining the two fields and coding them independently. This is shown in figures 1 a and 1 b.
  • the MBAFF (Macro Block Adaptive Frame/Field) prediction mode is the development of a frame/field prediction at picture level to a frame/field at macroblock level.
  • the H.264 standard enables data to be coded according to the MBAFF mode.
  • some macroblocks are coded in frame mode and some are coded in field mode.
  • the pictures are coded in intra or in inter mode.
  • the inter pictures require a certain number of reference pictures during decoding. This means frequent accesses to the memory 3 in which are stored the reference pictures after decoding.
  • the numbers of reference pictures can vary.
  • the data are recorded in the DDR memory 3 in a particularly advantageous way.
  • Figure 3 provides a very diagrammatic representation of the organisation of the DDR memory according to a first preferred simplified embodiment of the invention.
  • a DDR type memory is organized into memory pages, and each memory page is organized into several data banks.
  • One of the characteristics of these memories in that they cannot very rapidly pass from bank j of page i to bank j of page k with k different to i.
  • the DDR memory comprises 4 data banks, only one page is shown.
  • the recording of the even field is started in bank 0 and the recording of the odd field is started in bank 2.
  • the even field, or the odd field or both fields are accessed and in this last case there is a rapid access time between the two fields because the two fields are recorded in different banks and can therefore be rapidly accessed as they are both in open pages.
  • a page is not open when the current access is not being performed on that page.
  • the decoding of some macroblocks requires access to the odd reference field or the even reference field and the decoding of some other macroblocks requires rapid access to the two fields.
  • a 13x13 prediction window is required.
  • the decoder 4 accesses in ban 0 a set of data corresponding to 13 pixels on 6 pixels and in bank 2 to a set of data corresponding to 13 pixels on 7 pixels.
  • the decoder accesses the DDR memory in burst mode and thus optimises the memory accesses.
  • the decoder 4 accesses in bank 0 a set of data corresponding to 13x13 pixels.
  • the decoder 4 accesses, in bank 2, a set of data corresponding to 13x13 pixels.
  • the memory comprises at least two independent banks that can be opened simultaneously, and at least one of the banks of the memory is intended for recording of odd fields and the other bank of the memory is intended for the recording of even fields.
  • the memory being structured to alternate between the at least two independent parts, the device 1 comprises the means to record the first even field at the beginning of the first bank and to record the corresponding odd field at the beginning of the second bank and thus to fill the two banks alternatively, the even fields being recorded one after the other in the first bank and the odd fields being recorded one after the other in the second bank.
  • a bank can only contain a single macroblock if it is small and if the size of the bank is also small. Therefore for example macroblocks containing even lines can be recorded in bank 0, the macroblocks containing the odd lines can be recorded in bank 2, leaving an offset of two macroblocks between the banks. Two macroblocks of even fields are thus recorded in banks 0 and 1 and two macroblocks of odd lines are recorded in banks 2 and 3. An offset of only one macroblock can also be left and in this case, an even field macroblock is recorded in bank 0, an odd field macroblock is recorded in bank 1 , an even field macroblock is recorded in bank 2 and an odd field macroblock is recorded in bank 3.
  • Figure 4 shows an organisation of the DDR memory showing several pages of this memory. Each page comprises 4 banks.
  • the writing of the data of the first even reference field is started in bank 0 of page 0.
  • the writing of the data of the first odd reference field is started at the beginning of bank 2 of page 21.
  • the memory space left between the two corresponding even and odd fields is sufficient to contain a field in high definition format.
  • a field of standard definition comprises 720 lines by 576 pixels. Thus, if a memory space of 21 pages is still maintained for the even field, there will be more free space between the two corresponding even and odd fields, in the case of storage of an SD field.
  • the memory being organised in a plurality m of parts j called pages, each page being organised in a plurality of n subparts i numbered 1 to n, called banks, the means to record the even field recording it at the beginning of a bank i of a page j and recording the odd field at the beginning of a bank k of a page I such that k is different to i and I is superior to j.
  • the intended space between the even field and the corresponding odd field is therefore overdimensioned to record a field, whether it is even or odd.
  • the noise data transmitted in the data stream and generated during the coding is then recorded after having recorded the even field in the memory.
  • This data called “film grain” enables the grain of the picture to be reproduced during the display of data.
  • This data is coded and transmitted in SEI (Supplemental Enhancement Information) type messages defined in the H.264 standard. During decoding, this data is extracted from the received stream and also recorded to be transmitted with the picture data decoded at the display device 7.
  • the noise data is recorded only in the memory space between the two fields representing the chrominance component.
  • the noise data relating to luminance is therefore recorded in the space left free between the even field and the odd field and the data relating to chrominance is recorded after the of field and before the next field.
  • This space is left free between the two fields representative of luminance.
  • This space can be used for other data relating to the display for example.
  • luminance data and chrominance data per pixel For each picture field, luminance data and chrominance data per pixel is available. Hence the above description refers to the recording of the luminance data (Y) or chrominance data (Cr, Cb) without distinction. There are therefore, two distinct memory spaces per field, one for luminance, and a second for chrominance Cr/Cb, both components of chrominance being recorded together. Whatever the component, the storage schema previously described above applies to each field.
  • the invention also applies to MPEG-2 type coding.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

The invention relates to a memory management device comprising a memory (3) for recording pictures, said memory comprising at least two independent parts (BK0,BK1,BK2,BK3) that can be open simultaneously. According to the invention, at least one part (BK0) of said memory is designed for the recording of odd fields and at least one other part (BK2) of the memory is designed for the recording of even fields.

Description

DEVICE AND METHOD FOR MANAGING MEMORY
FIELD OF THE INVENTION
The invention relates to a device and a method to manage memory and a decoding device.
More particularly the invention relates to the organisation of video data storage in the memories.
BACKGROUND OF THE INVENTION
In fact, the various coding standards often enable pictures to be coded in an adaptive manner, based on content analysis to define the manner in which the picture data will be coded. Hence, for example according to the amount of motion observed, the macroblocks of pictures are coded in the optimal manner in field mode when there is a lot of motion and in frame mode when there is little motion. This is notably the case for the coding standard H.264.
Hence, within a picture, it is possible to have different coding modes. This can pose problems in term of efficiency during the replay of data for decoding. It is in fact necessary during the decoding of even or odd fields or frames to access data previously decoded and temporarily recorded in the memory to enable the subsequent decoding of other frames or fields of those pictures useful for the decoding of other pictures called reference pictures.
To be capable of replaying the data in the memory, a choice must be made during recording, either to record the data in frame mode, or to record the data in field mode, that is the even field and the odd field separately. Irrespective of the choice made, during the data replay, when the replay mode requires an access other than the mode in which the data have been recorded, the data are not accessed efficiently, if they have been recorded in field mode and must then be replayed in frame mode, and inversely.
Moreover, there are also constraints at the level of the storage memories used in parallel with the decoders. Some specificities of these memories and notably DDR (Double Data Rate) type memories mean that not all areas can be accessed in parallel. It is therefore penalising to store data in a random manner in the memory.
A DDR type memory comprises a number of pages, each page comprising a plurality of banks. At a given instant t, only a single page can be open per bank. During access to a bank, this is loaded in a type of cache memory that comprises a memory space divided into a plurality of spaces each corresponding to the size of a bank. This is shown in figure 5. On this figure is shown a DDR type memory containing n pages. Each page is cut into 4 banks and during the opening of a page, the accessed bank is loaded into a type of cache with rapid access and that is an integral part of the DDR memory. It is therefore observed that when bank 0 is accessed from page x and if there is then a desire to access bank 0 from page y, the data of bank 0 of page x must be replaced with the data of bank 0 page y. This requires a lengthy access time compared to the simultaneous data access already present in the cache.
SUMMARY OF THE INVENTION
Hence the invention proposes a method for the arrangement of data in a memory that enables optimisation of access to recorded data with a view to, but not exclusively, data access during decoding of fields requiring this data during their decoding.
For this purpose, the invention proposes a memory management device comprising a memory for recording pictures, the memory comprising at least two independent parts that can be opened simultaneously. According to the invention, at least one part of the memory is designed for the recording of odd fields and at least one other part of the memory is designed for the recording of even fields.
Hence, it becomes possible to rapidly access the data of the two fields.
This is particularly advantageous when during the decoding of data, data from the memory contents are used both in the even fields and in the odd fields. The invention naturally is not restricted to the use of this memory for the purpose of decoding. For example it could also be useful for display. According to a preferred embodiment, the memory being structured to alternate between at least two independent parts, the device comprises the means to record the first even field at the beginning of the first part and to record the corresponding odd field at the beginning of the second part and to fill the two parts alternatively in this way, the even fields being recorded one after the other in the first part and the odd fields being recorded one after the other in the second part.
Preferentially, the memory being organised in a plurality m of parts j called pages, each page being organised in a plurality of n subparts i numbered 1 to n, called banks, the means to record the even field recording it at the beginning of a bank i of a page j and recording the odd field at the beginning of a bank k of a page I such that k is different to i and I is superior to j.
Advantageously, the j pages are organised sequentially and the memory space between the bank k of the part I and the bank i of the part j is sufficient to contain at least one field.
In this way, the frequent opening of memory pages is avoided and rapid access to data is enabled.
Preferentially, the memory space between page I and page j is dimensioned so as to record a field in high definition format.
This enables an efficient management of the memory by avoiding page jumps to record a same field.
Advantageously, when the memory space between part I and part j is greater than the size of a field, the device comprises the means to record noise data relating to said field in said memory space after the first field. Hence, even if the space is dimensioned to host a field of maximum size, such as a high definition format field, when a field of lower definition is recorded, the free space at the end of this field is occupied in the memory. In addition the noise data being relative to the field, they are recorded in a continuous space, which also renders their access more rapid.
Preferentially, the memory is of DDR type.
There are several generations of DDR. Naturally the invention relates to all generations of DDR, DDR- 1 just like DDR-2.
According to another aspect, the invention also relates to a decoding device comprising a memory management device according to the invention and the means of decoding, the memory being designed to record reference fields decoded by the decoding means and used by said decoding means during the decoding of the following fields.
During a decoding of data, the decoders use pictures previously decoded to decode the current picture. It is therefore important that the decoders access rapidly the data in the memory so that the decoding is performed rapidly. This is all the more important for trickmodes.
According to a preferred embodiment, the data is coded according to the H.264 standard or according to the MPEG-2 standard.
The invention also relates to a memory management method of a memory comprising at least two independent parts that can be open simultaneously. According to the invention, the method comprises the steps for: - recording even fields in a first of the two parts of said memory,
- recording odd fields in a second of the two parts of said memory,
BRIEF DESCRIPTION OF THE DRAWINGS The invention will be better understood and illustrated by means of embodiments and implementations, by no means limiting, with reference to the annexed figures, wherein:
- figures 1 a and 1 b show respectively the pictures in progressive mode and in interlaced mode,
- figure 2 shows a device according to a preferred embodiment of the invention,
- figure 3 shows the organisation of the memory according to a simplified embodiment of the invention,
- figure 4 shows the organisation of the memory according to a second embodiment of the invention,
-figure 5 illustrates the standard operation of a DDR type memory.
DETAILED DESCRIPTION OF PREFERED EMBODIMENTS
Figure 1 a shows a picture in progressive mode where a field corresponds to a complete picture, an even line succeeds an odd line in the field. Figure 1 b shows a field in interlaced mode, half a picture is transmitted to each field: even lines for the first picture and odd lines for the second picture. The signal is therefore composed of successive even and odd fields.
The invention applies more particularly to video data decoding devices. More particularly, according to a preferred embodiment of the invention, the invention relates to a coding/decoding type that conforms to the H.264 standard.
Figure 2 shows a personal recorder (PVR) type device 1 designed to interface with a display screen 7 and receive coded data according to the H.264 standard from a content broadcaster, either by cable, satellite, terrestrial network or according to the IP protocol. The device shown in figure 1 comprises other modules not shown in figure 1 and not indispensable to the explanation of the invention. The device 1 is a device comprising the characteristic elements of personal recorders known by persons skilled in the art. The new and inventive part of this personal recorder is at the level of memory management 3 as described hereafter.
Such a device 1 receives a Transport Stream (TS) comprising coded data in H.264 format. It is intended to decode data either to, record it on a means of storage 2 (that can be of hard disk, memory card, holographic storage or 'blue ray' type), or to display it directly on a display screen 7. The recorded data can then be visually displayed, on user request.
The invention relates more particularly to the decoding of data and access to the DDR memory 3.
A demultiplexer 8 receives a data stream comprising multiple programs (MPTS) and provides from this stream, streams comprising of a single program (SPTS), either to record this program or to display it directly. Such a demultiplexer 8 also extracts service information associated with the program in order to display it in due time as well as other information useful for the exploitation of this program.
A processor 6 controls the data streams in the PVR. Its interconnections with the other modules are not shown in figure 2.
The decoder 4 conforms to the coding/decoding H.264 standard.
The data coded according to the H.264 standard is coded in a complex way requiring during numerous accesses to he DDR memory 3 during its decoding.
In fact, when a picture comprises regions in motion and static regions, it is more efficient to code the static regions in frame mode and the regions in motion in field mode. The frame mode consists in combining two fields together and coding them as a single picture. The field mode consists in not combining the two fields and coding them independently. This is shown in figures 1 a and 1 b.
The MBAFF (Macro Block Adaptive Frame/Field) prediction mode is the development of a frame/field prediction at picture level to a frame/field at macroblock level. The H.264 standard enables data to be coded according to the MBAFF mode. Hence, for a single picture, some macroblocks are coded in frame mode and some are coded in field mode.
According to the H.264 standard, the pictures are coded in intra or in inter mode. The inter pictures require a certain number of reference pictures during decoding. This means frequent accesses to the memory 3 in which are stored the reference pictures after decoding. Depending on the structure of the GOP (Group Of Pictures), the numbers of reference pictures can vary.
It is important to be able to rapidly access these reference pictures to guarantee the rapidity and efficiency of the decoding at the level of decoder 4. Elsewhere this is even more crucial when the data are fast replayed forwards or backwards where the pictures must be decoded very quickly.
Hence, the data are recorded in the DDR memory 3 in a particularly advantageous way.
Such an arrangement is shown in figures 3 and 4. Figure 3 provides a very diagrammatic representation of the organisation of the DDR memory according to a first preferred simplified embodiment of the invention.
A DDR type memory is organized into memory pages, and each memory page is organized into several data banks. One of the characteristics of these memories in that they cannot very rapidly pass from bank j of page i to bank j of page k with k different to i. In addition, it is very costly in time to change memory page within the same bank as shown in figure 5.
According to figure 3 the DDR memory comprises 4 data banks, only one page is shown. The recording of the even field is started in bank 0 and the recording of the odd field is started in bank 2. Hence, when access to this reference field for the decoding of a following picture in the data stream is desired, the even field, or the odd field or both fields are accessed and in this last case there is a rapid access time between the two fields because the two fields are recorded in different banks and can therefore be rapidly accessed as they are both in open pages. A page being open when it is being accessed. A page is not open when the current access is not being performed on that page. Hence, for example, if the current field to be decoded is coded in MBAFF mode, the decoding of some macroblocks requires access to the odd reference field or the even reference field and the decoding of some other macroblocks requires rapid access to the two fields. In H.264 coding, to decode an 8x8 macroblock, a 13x13 prediction window is required. For an 8x8 macroblock coded in frame mode, the decoder 4 accesses in ban 0 a set of data corresponding to 13 pixels on 6 pixels and in bank 2 to a set of data corresponding to 13 pixels on 7 pixels. The decoder accesses the DDR memory in burst mode and thus optimises the memory accesses. For an 8x8 macroblock coded in field mode, corresponding to an even field, the decoder 4 accesses in bank 0 a set of data corresponding to 13x13 pixels.
For an 8x8 macroblock coded in field mode, corresponding to an odd field, the decoder 4 accesses, in bank 2, a set of data corresponding to 13x13 pixels.
It is clear that those skilled in the art can envisage another organisation than the storage in bank 0 of the even field and the storing in bank 2 of the odd field according to the number of banks contained per page, notably according to the size of the fields or the pictures it is possible to have only one bank offset between the even field and the odd field (which means storing the even field in bank 0 and the odd field in bank 1 ). In other memories it is also possible to have more than one offset of two banks between the even field and the corresponding odd field. The number of pages separating the fields is also dimensioned according to the size of the pictures, therefore to their format. Currently, the format requiring the maximum size is the high definition format but the invention also addresses future formats that may require a greater memory space for storing each field.
It is therefore observed that the memory comprises at least two independent banks that can be opened simultaneously, and at least one of the banks of the memory is intended for recording of odd fields and the other bank of the memory is intended for the recording of even fields. It is also noted that the memory being structured to alternate between the at least two independent parts, the device 1 comprises the means to record the first even field at the beginning of the first bank and to record the corresponding odd field at the beginning of the second bank and thus to fill the two banks alternatively, the even fields being recorded one after the other in the first bank and the odd fields being recorded one after the other in the second bank.
According to the size of the banks and the pictures, it can also be envisaged that a bank can only contain a single macroblock if it is small and if the size of the bank is also small. Therefore for example macroblocks containing even lines can be recorded in bank 0, the macroblocks containing the odd lines can be recorded in bank 2, leaving an offset of two macroblocks between the banks. Two macroblocks of even fields are thus recorded in banks 0 and 1 and two macroblocks of odd lines are recorded in banks 2 and 3. An offset of only one macroblock can also be left and in this case, an even field macroblock is recorded in bank 0, an odd field macroblock is recorded in bank 1 , an even field macroblock is recorded in bank 2 and an odd field macroblock is recorded in bank 3.
Figure 4 shows an organisation of the DDR memory showing several pages of this memory. Each page comprises 4 banks.
According to this embodiment, the writing of the data of the first even reference field is started in bank 0 of page 0.
The writing of the data of the first odd reference field is started at the beginning of bank 2 of page 21.
The memory space left between the two corresponding even and odd fields is sufficient to contain a field in high definition format.
A field of standard definition comprises 720 lines by 576 pixels. Thus, if a memory space of 21 pages is still maintained for the even field, there will be more free space between the two corresponding even and odd fields, in the case of storage of an SD field.
It is therefore observed that the memory being organised in a plurality m of parts j called pages, each page being organised in a plurality of n subparts i numbered 1 to n, called banks, the means to record the even field recording it at the beginning of a bank i of a page j and recording the odd field at the beginning of a bank k of a page I such that k is different to i and I is superior to j.
In order to avoid any problems during the storage of reference fields, the intended space between the even field and the corresponding odd field is therefore overdimensioned to record a field, whether it is even or odd. Advantageously, the noise data transmitted in the data stream and generated during the coding is then recorded after having recorded the even field in the memory. This data, called "film grain" enables the grain of the picture to be reproduced during the display of data. This data is coded and transmitted in SEI (Supplemental Enhancement Information) type messages defined in the H.264 standard. During decoding, this data is extracted from the received stream and also recorded to be transmitted with the picture data decoded at the display device 7.
In a preferred embodiment of the invention, the noise data is recorded only in the memory space between the two fields representing the chrominance component. The noise data relating to luminance is therefore recorded in the space left free between the even field and the odd field and the data relating to chrominance is recorded after the of field and before the next field.
Thus a space is left free between the two fields representative of luminance. This space can be used for other data relating to the display for example.
For each picture field, luminance data and chrominance data per pixel is available. Hence the above description refers to the recording of the luminance data (Y) or chrominance data (Cr, Cb) without distinction. There are therefore, two distinct memory spaces per field, one for luminance, and a second for chrominance Cr/Cb, both components of chrominance being recorded together. Whatever the component, the storage schema previously described above applies to each field.
The invention also applies to MPEG-2 type coding.

Claims

Claims
1. Device for managing memory comprising a memory (3) for recording pictures, said memory comprising at least two independent parts that can be open simultaneously, said device (1 ) being characterized in that at least one of the parts of said memory is intended for the recording of the odd fields and the other at least one part of said memory is intended for the recording of even fields.
2. Device for managing memory according to claim 1 , characterized in that said memory (3) being structured to alternate between the at least two independent parts, said device comprises the means to record the first even field at the beginning of the first part and to record the corresponding odd field at the beginning of the second part and thus to fill the two banks alternatively, the even fields being recorded one after the other in the first part and the odd fields being recorded one after the other in the second part.
3. Device for managing memory according to one of claims 1 or 2 characterized in that said memory (3) being organised in a plurality m of parts j called pages, each page being organised in a plurality of n subparts i numbered 1 to n, called banks, the means to record the even field recording it at the beginning of a bank i of a page j and recording the odd field at the beginning of a bank k of a page I such that k is different to i and I is superior to j.
4. Device for managing memory according to claim 3, characterized in that the j pages are organised sequentially and the memory space between the bank k of the part I and the bank i of the part j is sufficient to contain at least one field.
5. Device for managing memory according to claim 4, characterized in that the memory space between page I and page j is dimensioned to be able to record a field in high definition format.
6. Device for managing memory according to claim 4, characterized in that when the memory space between part I and part j is greater than the size of a field, said device comprises the means to record noise data relating to said field in said memory space after the first field.
7. Device for managing memory according to one of the preceding claims, characterized in that said memory is of DDR type.
8. Decoding device characterized in that it comprises a device for managing memory according to one of the preceding claims and the means for decoding (4), said memory (3) being designed to record reference fields decoded by the decoding means (4) and used by said decoding means (4) during the decoding of the following fields.
9. Decoding device according to claim 8, characterized in that the data is coded according to the H.264 standard or according to the MPEG-2 standard.
10. Method for managing memory of a memory comprising at least two independent parts that can be open simultaneously, said method being characterized in that it comprises steps for:
- recording even fields in a first of the two said parts of said memory (3),
- recording odd fields in a second of the two said parts of said memory (3),
PCT/EP2008/067461 2007-12-14 2008-12-12 Device and method for managing memory WO2009077466A1 (en)

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