WO2009075544A3 - A liner for semiconductor chamber - Google Patents
A liner for semiconductor chamber Download PDFInfo
- Publication number
- WO2009075544A3 WO2009075544A3 PCT/KR2008/007368 KR2008007368W WO2009075544A3 WO 2009075544 A3 WO2009075544 A3 WO 2009075544A3 KR 2008007368 W KR2008007368 W KR 2008007368W WO 2009075544 A3 WO2009075544 A3 WO 2009075544A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- liner
- gate
- reaction
- semiconductor chamber
- wafer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 230000003670 easy-to-clean Effects 0.000 abstract 1
- 239000012530 fluid Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
- H01J37/32633—Baffles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Plasma & Fusion (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Drying Of Semiconductors (AREA)
Abstract
A liner for a semiconductor chamber is provided. The semiconductor chamber is divided into a reaction portion to provide a closed reaction space where a wafer is processed and provided with an electrostatic chuck on which the wafer is rested at the bottom thereof and an exhaust portion in communication with the reaction portion through a gate and formed with an exhaust port through which fluids are exhausted from the reaction portion. The liner is mounted in the semiconductor chamber, and comprises: a first liner including a cylindrical portion mounted on the inner wall of the reaction portion and having a gate hole at a position corresponding to the gate, and a flange portion mounted on the bottom of the reaction portion and extending inwardly from the lower end of the cylindrical portion to be integrated with the cylindrical portion; a second liner having one end connected to a lower portion of the gate hole and the other end extending toward the exhaust port to be mounted on the lower portion of the inner surface of the gate; and a third liner having one end connected to an upper portion of the gate hole and the other end extending toward the exhaust portion to be mounted on the upper portion of the inner surface of the gate and be coupled to the upper surface of the second liner. The liner is easy to clean and takes a short time to maintain and repair due to its ease of assembly and disassembly, contributing to the maximization of wafer throughput.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2007-0130138 | 2007-12-13 | ||
KR1020070130138A KR100906392B1 (en) | 2007-12-13 | 2007-12-13 | A liner for semiconductor chamber |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009075544A2 WO2009075544A2 (en) | 2009-06-18 |
WO2009075544A3 true WO2009075544A3 (en) | 2009-09-11 |
Family
ID=40755994
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/KR2008/007368 WO2009075544A2 (en) | 2007-12-13 | 2008-12-12 | A liner for semiconductor chamber |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR100906392B1 (en) |
TW (1) | TW200947585A (en) |
WO (1) | WO2009075544A2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101884003B1 (en) * | 2011-03-22 | 2018-07-31 | 어플라이드 머티어리얼스, 인코포레이티드 | Liner assembly for chemical vapor deposition chamber |
US10923327B2 (en) * | 2018-08-01 | 2021-02-16 | Applied Materials, Inc. | Chamber liner |
US11270898B2 (en) * | 2018-09-16 | 2022-03-08 | Applied Materials, Inc. | Apparatus for enhancing flow uniformity in a process chamber |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002075974A (en) * | 2000-07-07 | 2002-03-15 | Applied Materials Inc | Multipurpose processing chamber having removable chamber liner |
KR20040011839A (en) * | 2002-07-30 | 2004-02-11 | 삼성전자주식회사 | Plasma etch chamber having liner |
KR20060080686A (en) * | 2005-01-06 | 2006-07-11 | 삼성전자주식회사 | Equipment for etching semiconductor device |
KR200431206Y1 (en) * | 2006-05-03 | 2006-11-23 | 어플라이드 머티어리얼스, 인코포레이티드 | Upper chamber liner without insert suitable for etching high aspect ratio features |
-
2007
- 2007-12-13 KR KR1020070130138A patent/KR100906392B1/en active IP Right Grant
-
2008
- 2008-12-12 TW TW097148648A patent/TW200947585A/en unknown
- 2008-12-12 WO PCT/KR2008/007368 patent/WO2009075544A2/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002075974A (en) * | 2000-07-07 | 2002-03-15 | Applied Materials Inc | Multipurpose processing chamber having removable chamber liner |
KR20040011839A (en) * | 2002-07-30 | 2004-02-11 | 삼성전자주식회사 | Plasma etch chamber having liner |
KR20060080686A (en) * | 2005-01-06 | 2006-07-11 | 삼성전자주식회사 | Equipment for etching semiconductor device |
KR200431206Y1 (en) * | 2006-05-03 | 2006-11-23 | 어플라이드 머티어리얼스, 인코포레이티드 | Upper chamber liner without insert suitable for etching high aspect ratio features |
Also Published As
Publication number | Publication date |
---|---|
WO2009075544A2 (en) | 2009-06-18 |
KR100906392B1 (en) | 2009-07-07 |
TW200947585A (en) | 2009-11-16 |
KR20090062720A (en) | 2009-06-17 |
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