WO2009045010A3 - Flash memory mapping management method - Google Patents

Flash memory mapping management method Download PDF

Info

Publication number
WO2009045010A3
WO2009045010A3 PCT/KR2008/005522 KR2008005522W WO2009045010A3 WO 2009045010 A3 WO2009045010 A3 WO 2009045010A3 KR 2008005522 W KR2008005522 W KR 2008005522W WO 2009045010 A3 WO2009045010 A3 WO 2009045010A3
Authority
WO
WIPO (PCT)
Prior art keywords
sector
block
logical block
management method
logical
Prior art date
Application number
PCT/KR2008/005522
Other languages
French (fr)
Other versions
WO2009045010A2 (en
Inventor
Dae-Hyun Ahn
Mu-Kyoung Jung
Shin-Soo Ha
Original Assignee
Huone Inc
Dae-Hyun Ahn
Mu-Kyoung Jung
Shin-Soo Ha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huone Inc, Dae-Hyun Ahn, Mu-Kyoung Jung, Shin-Soo Ha filed Critical Huone Inc
Publication of WO2009045010A2 publication Critical patent/WO2009045010A2/en
Publication of WO2009045010A3 publication Critical patent/WO2009045010A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Read Only Memory (AREA)

Abstract

The present invention relates to a flash memory mapping management method and a memory according to the method. The present invention provides a memory mapping management method including the steps of: upon receiving a request for assignment of a new physical block to a logical block for a memory, assigning the new physical block to the logical block; writing LSN, which is information of a sector mapping table being used when the new physical block is assigned to the logical block, PSN representing an actual physical sector being used by the LSN, and PBN assigned with the PSN in a predetermined sector of the newly assigned physical block, along with LBN of the logical block; assigning a physical sector of the new physical block to a logical sector of the logical block and updating mapping information related to the sector assignment into the sector mapping table; and reading the mapping information written in a predetermined sector of a physical block last assigned to the logical block and producing the sector mapping table for the logical block.
PCT/KR2008/005522 2007-10-02 2008-09-18 Flash memory mapping management method WO2009045010A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2007-0099343 2007-10-02
KR1020070099343A KR100924021B1 (en) 2007-10-02 2007-10-02 Flash memory mapping management method

Publications (2)

Publication Number Publication Date
WO2009045010A2 WO2009045010A2 (en) 2009-04-09
WO2009045010A3 true WO2009045010A3 (en) 2009-07-02

Family

ID=40526809

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2008/005522 WO2009045010A2 (en) 2007-10-02 2008-09-18 Flash memory mapping management method

Country Status (2)

Country Link
KR (1) KR100924021B1 (en)
WO (1) WO2009045010A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100970537B1 (en) * 2008-11-20 2010-07-16 서울시립대학교 산학협력단 Method and device for managing solid state drive
CN102543184B (en) * 2010-12-22 2016-06-08 群联电子股份有限公司 Memorizer memory devices, its Memory Controller and method for writing data
KR101888074B1 (en) 2012-01-09 2018-08-13 삼성전자주식회사 Storage device and nonvolatile memory device and operation method thererof
KR20130084846A (en) 2012-01-18 2013-07-26 삼성전자주식회사 Storage device based on a flash memory, user device including the same, and data read method thereof
CN103970605A (en) * 2013-02-06 2014-08-06 珠海世纪鼎利通信科技股份有限公司 Low-performance terminal based data analysis method and device
US9940261B2 (en) * 2016-05-05 2018-04-10 Western Digital Technology, Inc. Zoning of logical to physical data address translation tables with parallelized log list replay

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020013879A1 (en) * 1998-03-18 2002-01-31 Sang-Wook Han Flash memory array access method and device
KR20020092261A (en) * 2002-08-31 2002-12-11 지인정보기술 주식회사 Management Scheme for Flash Memory with the Multi-Plane Architecture
KR20040072875A (en) * 2003-02-11 2004-08-19 유비시스테크놀러지 주식회사 Storage using nand flash memory
US20070061545A1 (en) * 2003-10-24 2007-03-15 Hyperstone Ag Method for writing memory sectors in a memory deletable by blocks
US20070192533A1 (en) * 2006-02-16 2007-08-16 Samsung Electronics Co., Ltd. Apparatus and method for managing mapping information of nonvolatile memory

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020013879A1 (en) * 1998-03-18 2002-01-31 Sang-Wook Han Flash memory array access method and device
KR20020092261A (en) * 2002-08-31 2002-12-11 지인정보기술 주식회사 Management Scheme for Flash Memory with the Multi-Plane Architecture
KR20040072875A (en) * 2003-02-11 2004-08-19 유비시스테크놀러지 주식회사 Storage using nand flash memory
US20070061545A1 (en) * 2003-10-24 2007-03-15 Hyperstone Ag Method for writing memory sectors in a memory deletable by blocks
US20070192533A1 (en) * 2006-02-16 2007-08-16 Samsung Electronics Co., Ltd. Apparatus and method for managing mapping information of nonvolatile memory

Also Published As

Publication number Publication date
KR100924021B1 (en) 2009-10-28
WO2009045010A2 (en) 2009-04-09
KR20090034135A (en) 2009-04-07

Similar Documents

Publication Publication Date Title
WO2009045010A3 (en) Flash memory mapping management method
US9208074B2 (en) Updating address mapping in sub-intervals in a flash memory data storage device
US20150186261A1 (en) Data storage device and flash memory control method
CN103425595B (en) Data memory device and the block management method of flash memory
US9875250B2 (en) Solid state disk, data management method and system therefor
TW200741526A (en) Management of memory blocks that directly store data files
TW200951715A (en) Memory system
WO2011041047A3 (en) Home agent data and memory management
TW200639633A (en) Direct data file storage implementation techniques in flash memories
JP2008507756A5 (en)
RU2008116179A (en) DATA MANAGEMENT METHODS IN A FLASH MEMORY CARRIER
WO2006108169A3 (en) Sequencer address management
ATE557350T1 (en) FAT ANALYSIS FOR OPTIMIZED SEQUENTIAL CLUSTER MANAGEMENT
WO2007072317A3 (en) Non-volatile memory with block erasable locations
WO2010078540A3 (en) Spare block management in non-volatile memories
WO2004040578A3 (en) Wear leveling in non-volatile storage systems
JP2012522292A5 (en)
CN102929795B (en) A kind of NandFlash bad block management method
WO2007076378A3 (en) Dual mode access for non-volatile storage devices
WO2010076966A3 (en) Memory controller and memory management method
WO2007019197A3 (en) Management of memory blocks that directly store data files
WO2010043978A3 (en) Matrix for tissue repair
TW200951717A (en) Memory system
WO2005066793A3 (en) Non-volatile memory and method with non-sequential update block management
CN102662852A (en) Method for storing nonvolatile data by using MCU internal data Flash

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08836720

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08836720

Country of ref document: EP

Kind code of ref document: A2