WO2009038450A2 - Procédé et appareil de détection d'un signal à bande étroite immergé dans un signal à large bande - Google Patents

Procédé et appareil de détection d'un signal à bande étroite immergé dans un signal à large bande Download PDF

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Publication number
WO2009038450A2
WO2009038450A2 PCT/MY2008/000104 MY2008000104W WO2009038450A2 WO 2009038450 A2 WO2009038450 A2 WO 2009038450A2 MY 2008000104 W MY2008000104 W MY 2008000104W WO 2009038450 A2 WO2009038450 A2 WO 2009038450A2
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WIPO (PCT)
Prior art keywords
frequency
processing
fcch
value
processing frame
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PCT/MY2008/000104
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English (en)
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WO2009038450A3 (fr
Inventor
Ayman Ahmed Mahmoud Abdel-Samad
Essam Abdel-Fattah Sourour Sourour
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Mimos Berhad
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Publication of WO2009038450A2 publication Critical patent/WO2009038450A2/fr
Publication of WO2009038450A3 publication Critical patent/WO2009038450A3/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0083—Signalling arrangements

Definitions

  • the present invention relates generally to the field of communication system and particularly to signal detection in communication system. More particularly, the present invention relates to the detection of control channel use in connection of calls, data and general network management of the communication system.
  • GSM Global System for Mobile Communications
  • the downlink includes one control channel and several traffic channels.
  • the channel bandwidth is 200 kHz for both the uplink and downlink channels.
  • the mobile station receives control commands and paging commands on the control channel.
  • the traffic channel is used for exchanging user data.
  • Each base station selects one channel to be the control channel. Any of the channels available to the base station can be selected as a control channel, i.e., the control channel is not a predetermined channel.
  • the base station transmits it in higher power level.
  • FCCH occupies time slot number zero in the first frame and it is repeated every ten frames.
  • the mobile station employs the FCCH slot to achieve the following goals: 1) To distinguish the control channel by detecting the FCCH slot,
  • FCCH Fibre Channel
  • FCCH signals are part of the GSM beacon signal transmitted on its broadcast channel.
  • FCCH signal is essential for GSM network selection and for the general network management of the communication system.
  • a mobile unit can detect the presence of a GSM signal by detecting the FCCH through its special characters.
  • FCCH detection methods use a narrow band band-pass filter centered at frequency fy. When the FCCH is not present the output power of the filter is much smaller than the input power. When the FCCH is present the output power is approximately equal to the input power. Therefore, the comparison of the input and output powers is used to detect the presence of the FCCH slot.
  • This concept is used in the method disclosed in U.S. patent application No. 20030189978 Al, titled “Phase Difference Based Frequency Correction Channel Detector for Wireless Communication System", to Lin et al. In this method the received signal is applied to a phase differentiator that is followed by a low-pass filter.
  • phase differentiator When the FCCH slot is present the phase differentiator generates a DC value, otherwise the differentiator output is a wideband random signal.
  • the filtered signal power is measured twice, with and without applying a DC notch filter. The ratio of the two measurements will be large only of the FCCH slot is present.
  • a phase differentiator is used prior to filtering the signal.
  • Phase differentiator is done by multiplying the received signal by a delayed and conjugated version of itself. With the presence of large noise without narrow-band filtering this will produce high product of signal times noise, which can potentially degrade the performance of the system.
  • Another method for detecting the FCCH slot employs the correlation between the received signal and a reference signal. A correlation-based FCCH detection method is provided in U.S. Pat.
  • the method in accordance with the above patent, involves the sampling of the baseband received signal with an analog-to-digital converter circuit, and obtaining a correlation value of the sampled signal with a predetermined reference signal.
  • the FCCH slot is detected depending on the obtained correlation value.
  • the reference signal frequency is controllable. If the correlation value is not large enough the reference signal frequency is slightly changed and correlation is repeated.
  • One drawback of this method is that the time needed to detect the FCCH is large. Several FCCH slots have to be tested until the correct frequency is found.
  • the bandwidth of the front-end filter in that method must be wide enough to allow any possible frequency offset. This wide bandwidth introduces high noise power and degrades the performance, especially when the frequency offset range is large.
  • Another method for detecting the FCCH slot also employs the correlation between the received signal and a reference signal.
  • a correlation-based FCCH detection method is provided in U.S. Pat. No. 5,907,558, titled "Burst signal reception method and apparatus", assigned to Sony Corporation, Tokyo, Japan.
  • the method, in accordance with this patent is a modification of their previous patent (U.S. Pat. No. 6,122,327), also assigned to Sony Corporation, Tokyo, Japan.
  • This method also requires the front-end filter bandwidth to be wide enough to allow any possible frequency offset. This wide bandwidth introduces high noise power and degrades the performance.
  • FCCH slot detection is based on adaptive filtering techniques.
  • One such method is proposed in Pat. No. 5,241,688, titled “Frequency and Time Slot Synchronization Using Adaptive Filtering", and assigned to Motorola, Inc. Schaumburg, Illinois, USA.
  • the method in accordance with the above patent, involves the filtering of the received signal with an adaptive band-pass, filter and buffering the received signal in a memory. The energies of the input signal and the filtered signal are estimated and the gain of the filter is adapted, based on the difference between the energies.
  • the pole of the filter is adapted to center the frequency of the input signal in the filter's pass-band.
  • the threshold for FCCH slot detection is based on the signal-to-noise ratio (SNR), probability of detection and probability - - of false alarm.
  • the adaptive filter methods mentioned above have some common shortcomings that we avoid with the present invention.
  • the first drawback pertains to its performance in fading channels. Wireless systems like GSM are often subject to fading channel conditions. In a fading channel the received signal power may considerably decay, which can potentially cause a significant reduction in the received signal to noise ratio. In this case the performance of the adaptive filter significantly degrades since adaptation is done with a very noisy signal.
  • the adaptive filter may take long time to tune to the FCCH frequency, or it may not be able to rune to it altogether.
  • Another drawback of adaptive filter methods mentioned above is the distortion of its output. The adaptive filter tries to adapt its bandwidth to be just enough for the FCCH slot. With such a narrow bandwidth, the adaptive filter may cause distortion to the FCCH slot. Hence, even if the FCCH slot is detected, when the distorted FCCH slot at the output of
  • the adaptive filter is used for frequency offset estimation, the performance of the estimator may not be adequate.
  • a third drawback of the methods of adaptive filters is the high computational complexity.
  • FCCH slot detection is the utilization of a bank of band-pass filters. This is similar to the conventional detection of an M- ary Frequency shift keying signal.
  • the filters are chosen with different central frequencies. These central frequencies are chosen so that they cover a large range of frequency offsets around the expected frequency of the FCCH slot. Detection can possibly be done by comparing the input and output powers of all the filters. When it arrives, the filter corresponding to the FCCH slot will have approximately equal input and output power. Other filters, or all filters when the
  • FCCH slot is not present, will have much lower output power compared to the input power.
  • the drawback of this method is its high hardware complexity.
  • the number of filters required for the successful detection of the FCCH slot increases with the frequency offset. Therefore, the method requires many filters for large frequency offsets.
  • the complexity is high.
  • more design effort is required to make all filters to be exactly at the same spectral characteristics. Spectral variations in the filter characteristics can negatively affect the performance.
  • the present invention proposes detection of the control signal in the digital domain where sampling of the total received signal with only one narrow band low pass digital filter and partitioning the total received signal into narrower band sections.
  • the sampled signal is stored in memory and undergoes the proposed process to detect its control signal presence.
  • the present invention is generally directed to a method and apparatus to detect the FCCH slot in the control channel of a GSM system.
  • the first objective of the invention is to provide a method for efficient detection of the FCCH slot in wireless fading channels with high probability of detection and low probability of false alarm.
  • a second objective of the invention is to accurately detect the slot and frame boundary of the GSM control channel.
  • the received GSM RF Control Channel is continuously converted to digital baseband complex I/Q format.
  • This digital baseband signal is processed by a digital receiver according to the present invention. Initially the slot and frame boundaries are unknown. The digital receiver successively stores frames of the digital signal for processing. The stored frame duration is 8 slots (8 T s ) and it is not necessarily coinciding with the correct frame boundaries.
  • the digital receiver forms what we denote in our invention as "Processing Frames". Each Processing Frame consists of the current frame and the last slot of the previous Processing Frame. Hence, a processing frame duration is 9 slots (9 T s ). Each Processing Frame is digitally processed to detect if it includes the FCCH slot. If it is determined that the FCCH slot is present in this Processing Frame, the FCCH slot boundary is detected.
  • the Processing Frame is digitally shifted in frequency such that the first section (n-O) of the N sections in ambiguity region is centered at zero frequency.
  • the shifted Processing Frame is digitally filtered by a Low Pass filter whose bandwidth B is slightly bigger than W/N.
  • the output of the filter is buffered in memory.
  • the filtered Processing Frame is denoted as array X n .
  • the output of the filter is multiplied by a delayed and conjugated version of itself. Let the value of the delay be T samples. A reasonable value for T is T
  • FCCH Time Division Multiple Access
  • said detection test includes the steps of generating plurality of Processing Frames from said digital baseband representation and storing each of said Processing Frames in a frame buffering means (54);
  • An apparatus adapted for detecting the presence of Frequency Correction Channel (FCCH) from a received composite signal in a Time Division Multiple Access (TDMA) system said apparatus comprises of:-
  • a radio frequency front end means (52) adapted to receive said composite signal
  • an analog to digital converter means (53) adapted to convert the received composite signal into a digital baseband complex format
  • said FCCH detection means include a means adapted to generate a plurality of Processing Frames from said digital baseband representation
  • a frame buffering means (54) adapted to store said Processing Frames
  • a low-pass filter (62) adapted to filter said Processing
  • a digital processing means (65,66,67,68 and 69) adapted to determine corresponding maximum value (P n ) and index (K n ) associated with each of said frequency-shifted Processing Frame array (X n ), and identifying, from among the maximum values (P n ), the highest of the value (Q), the location of the highest of the value (i) and the index (m) of the same, and comparing said highest of the value (Q) against the total sum of the remaining of the maximum values (P n ).
  • Figure 1 shows how the wideband signal changes to a narrow band signal where all the power during the narrow band duration is concentrated in the narrow band signal. This figure exemplifies the arrival of the FCCH.
  • Figure 2 shows the spectral difference between the wideband non-FCCH and narrow band FCCH signals and the ambiguity region around the center frequency of the narrow band FCCH signal.
  • Figure 3 shows the center frequency of the wideband signal and the narrow band signal and the power spectral density of each one. It also shows the ambiguity region.
  • Figure 4 shows the partitioning of the ambiguity region into N sections.
  • Figure 5 shows a block diagram of the narrow band detection system.
  • Figure 6 shows a block diagram of the process that will be done on each
  • Figure 7 shows the threshold testing to verify the detection of the narrow band signal.
  • Figure 8 shows the frames and slots of the control channel, the FCCH slot and the Processing Frames.
  • Figure 10 shows the flow chart of the process of detection of the narrow band signal.
  • Figure 11 shows an example of the results after several processing stages explained in text.
  • the GSM network uses one of the channels as a control channel.
  • the multiplexing technology is TDMA where data is transmitted in frames. Each frame consists of 8 time slots.
  • the control channel is characterized by the presence of the FCCH slot.
  • the FCCH slot occupies slot number zero every 10 frames.
  • the local reference oscillator In the mobile station can be offset from the local oscillator of the base station.
  • the goal of this invention is to detect the FCCH slot accurately despite this frequency ambiguity region.
  • the RF Front End block (52) converts the received GSM channel from RF to baseband.
  • the sampled baseband is converted to in-phase/Quadri-phase (I/Q) digital baseband signal.
  • the Frame Buffering block buffers successive frames of samples where, based on the above mentioned sampling frequency, each frame consists of 1250 samples. At this time the buffered frame border does not necessarily coincide with the actual frame or slot border since the frame and slot borders are still unknown.
  • the Frame Buffering block generates what we denote in our invention as Processing Frames. Each Processing Frame consists of the presently received frame and the last received slot. This is shown in Figure 8, where it is shown that each Processing Frame overlaps the previous Processing Frame by one slot duration. This is important to ensure that the FCCH slot will be fully present in a Processing Frame. For example, if one Processing Frame happened to start at the middle of the FCCH slot, then the previous Processing
  • Each Processing Frame must have the complete FCCH slot within it. Similarly, if one Processing Frame happened to end at the middle of the FCCH slot, then the next Processing Frame must have the complete FCCH slot within it. Hence, it is guaranteed that one or more Processing Frames will have the full FCCH slot.
  • Each Processing Frame will be processed by the FCCH detection block (55) as explained below.
  • the frequency ambiguity region is divided into JV sections.
  • Each filtering bandwidth is W/N.
  • N 4 ⁇ N ⁇ 6.
  • step (102) The Processing Frame is shifted in Frequency such that the n'th section of the frequency ambiguity region is centered at zero frequency. As shown in block (61) in Figure 6 this is done by multiplying Processing Frame samples as follows:
  • part (a) shows the spectrum before frequency shifting.
  • Figure IQ 1 step (103V.
  • the frequency shifted Processing Frame is filtered by the LPF shown in block (62) of Figure 6.
  • the output is denoted as x n,k .
  • the output will have larger power than the output of the other sections during the FCCH slot. If the FCCH slot is not present at all, the output due to all sections of the frequency ambiguity region will be of about the same power level.
  • Figure 11, part 1 shows an example of the in phase part of the output of the filter when the FCCH slot is actually present in the Processing Frame.
  • step flO4 The array X n - x n>k is stored in memory to be used later if the FCCH slot is detected.
  • step Tl 05 The array X n is multiplied by a shifted and conjugated version of itself. This is done using blocks (63), (64) and (65) of Figure 6.
  • Figure 11, part 2 shows an example of the shifted version as described above.
  • the resulting samples y n ,k can be written as
  • step (106V. Moving average is performed on array Y. If the
  • FCCH slot is actually present, its power will be accumulated. On the other hand, if the FCCH slot is not present there will be no power accumulation and the output will be random. Moving average is performed using block (69) of Figure 6. The results can be written as
  • Figure 11 shows an example of the moving average results when the FCCH slot is present.
  • step (108) The values P n and K n , are stored in memory for future processing
  • JV values of both P n , and the associated index K n stored in memory. Also stored in memory are JV arrays X n ,.
  • FCCH slot if present in any of the JV frequency ambiguity sections. This is done by selecting the largest value of the set P n and comparing it to a threshold. If the threshold is exceeded the FCCH slot is declared to be detected. Then, the boundary of the FCCH slot is decided and the samples that will be used to estimate the frequency offset are generated. This process is done as follows.
  • step 110 The sum of the remaining N-I values of P n , are added and denoted as F. This is done in block (72) of Figure 7. It is also possible to sum a subset of the remaining N-I values of P n .
  • step 111 The value Q is compared to the multiplication r ⁇ F mentioned in the previous step. This is done in block (74) of Figure 7. If Q> r ⁇ F the FCCH slot is declared to be detected in the current Processing Frame.
  • FCCH slot is considered not present in the Processing Frame and a new Processing Frame is processed as mentioned above.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Geophysics And Detection Of Objects (AREA)

Abstract

Cette invention se rapporte à un procédé et à un appareil conçus pour détecter un signal à bande étroite immergé dans un signal à large bande. En général, la fréquence centrale du signal à bande étroite est connue pour se situer à l'intérieur d'une région d'ambiguïté des signaux. La région d'ambiguïté est divisée en N sections. Chaque trame du signal composite reçu (bande étroite + large bande) est ensuite déplacée en fréquence N fois de manière numérique de telle sorte que, après chaque déplacement, l'une des N sections soit centrée sur la fréquence nulle. Les N signaux composites déplacés en fréquence sont filtrés par le même filtre passe-bas (62) et les N sorties sont tamponnées par les moyens de tamponnage de trame (54). En procédant ainsi, le signal à bande étroite, s'il est présent, se situe à l'une des N sorties filtrées. Pour détecter le signal à bande étroite, chaque sortie tamponnée du filtre est multipliée par une version retardée et conjuguée d'elle-même. Une moyenne mobile est alors appliquée au résultat de la multiplication et le maximum de la valeur absolue de la moyenne mobile est trouvé. Si le plus grand des N maximums est plus grand qu'un seuil, le signal à bande étroite est détecté et identifié comme le canal de contrôle. Des échantillons élevés du SNR sont sélectionnés par la suite de manière à estimer le décalage de fréquence du signal à bande étroite.
PCT/MY2008/000104 2007-09-19 2008-09-19 Procédé et appareil de détection d'un signal à bande étroite immergé dans un signal à large bande WO2009038450A2 (fr)

Applications Claiming Priority (2)

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MYPI20071568 2007-09-19
MYPI20071568A MY146218A (en) 2007-09-19 2007-09-19 Method and apparatus for detecting a narrow band signal immersed in a wideband signal

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WO2009038450A3 WO2009038450A3 (fr) 2009-06-04

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9781675B2 (en) 2015-12-03 2017-10-03 Qualcomm Incorporated Detecting narrow band signals in wide-band interference

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6421099B1 (en) * 1998-11-28 2002-07-16 Samsung Electronics Co., Ltd. Automatic frequency tracking apparatus and method for a television signal receiving system
US20030189978A1 (en) * 2002-04-09 2003-10-09 Jingdong Lin Phase difference based frequency correction channel detector for wireless communication system
WO2004010624A1 (fr) * 2002-07-19 2004-01-29 Open Solution Co., Ltd. Recepteur ofdm

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6421099B1 (en) * 1998-11-28 2002-07-16 Samsung Electronics Co., Ltd. Automatic frequency tracking apparatus and method for a television signal receiving system
US20030189978A1 (en) * 2002-04-09 2003-10-09 Jingdong Lin Phase difference based frequency correction channel detector for wireless communication system
WO2004010624A1 (fr) * 2002-07-19 2004-01-29 Open Solution Co., Ltd. Recepteur ofdm

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9781675B2 (en) 2015-12-03 2017-10-03 Qualcomm Incorporated Detecting narrow band signals in wide-band interference

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MY146218A (en) 2012-07-31
WO2009038450A3 (fr) 2009-06-04

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