WO2009034984A1 - Clock synchronization system in packet network, its method and program - Google Patents

Clock synchronization system in packet network, its method and program Download PDF

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Publication number
WO2009034984A1
WO2009034984A1 PCT/JP2008/066293 JP2008066293W WO2009034984A1 WO 2009034984 A1 WO2009034984 A1 WO 2009034984A1 JP 2008066293 W JP2008066293 W JP 2008066293W WO 2009034984 A1 WO2009034984 A1 WO 2009034984A1
Authority
WO
WIPO (PCT)
Prior art keywords
delay
time stamp
packet
slave node
path
Prior art date
Application number
PCT/JP2008/066293
Other languages
French (fr)
Japanese (ja)
Inventor
Hideo Yoshimi
Zhenlong Cui
Kazuo Takagi
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Publication of WO2009034984A1 publication Critical patent/WO2009034984A1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0664—Clock or time synchronisation among packet nodes using timestamps unidirectional timestamps
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

By reducing the affect of network delay fluctuation, it is possible to realize an accurate clock synchronization between a master node and a slave node without causing an unstable self advance of a PLL. The master node transmits a time stamp packet to a slave node. The slave node classifies the time stamp packet according to a path. A transfer delay time of each time stamp is successively measured and its minimum value is obtained so as to derive a fixed delay of each path. According to the derived fixed delay, an offset of a fixed delay of each path is corrected. The derived fixed delay is subtracted from a packet transfer delay time to calculate a delay jitter of each packet. The delay jitter is compared to a threshold value and a time stamp packet including a delay jitter exceeding the threshold value is discarded. According to the time stamp packet, a clock of the slave node is reproduced.
PCT/JP2008/066293 2007-09-14 2008-09-10 Clock synchronization system in packet network, its method and program WO2009034984A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007239416 2007-09-14
JP2007-239416 2007-09-14

Publications (1)

Publication Number Publication Date
WO2009034984A1 true WO2009034984A1 (en) 2009-03-19

Family

ID=40451991

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/066293 WO2009034984A1 (en) 2007-09-14 2008-09-10 Clock synchronization system in packet network, its method and program

Country Status (1)

Country Link
WO (1) WO2009034984A1 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009206777A (en) * 2008-02-27 2009-09-10 Nec Corp Clock synchronization system, clock synchronization method, program, and recording medium
WO2010058831A1 (en) * 2008-11-20 2010-05-27 日本電気株式会社 Packet-filter-used clock synchronization system, apparatus, method and program thereof
JP2010232845A (en) * 2009-03-26 2010-10-14 Sony Corp Receiving apparatus, and time correction method for the same
JP2011029918A (en) * 2009-07-24 2011-02-10 Nec Corp Clock synchronization system, communication apparatus, method and program
JP2011135482A (en) * 2009-12-25 2011-07-07 Nec Corp Time synchronizing system, master node, slave node, repeater, time synchronizing method, and program for time synchronization
JP2013501393A (en) * 2009-07-31 2013-01-10 アルカテル−ルーセント How to synchronize client clock frequency with server clock frequency
JP2013104772A (en) * 2011-11-14 2013-05-30 Fujitsu Ltd Frame transmission device and synchronization method
CN104080115A (en) * 2013-03-28 2014-10-01 中国移动通信集团公司 Time synchronization performance monitoring method, device and system
WO2019196810A1 (en) * 2018-04-09 2019-10-17 华为技术有限公司 Data transmission method, related device, and communications system
CN113556221A (en) * 2020-04-23 2021-10-26 西门子股份公司 Method and device for timing in redundant network
CN114157381A (en) * 2021-12-09 2022-03-08 福州大学 Network delay jitter-oriented dynamic delay estimation period adjustment method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000244473A (en) * 1999-02-24 2000-09-08 Matsushita Electric Ind Co Ltd Pll circuit
JP2000278275A (en) * 1999-03-23 2000-10-06 Yamaha Corp Packet transfer device
WO2001050674A1 (en) * 1999-12-30 2001-07-12 Nokia Networks Oy Synchronization in packet-switched telecommunications system
JP2001244809A (en) * 2000-02-28 2001-09-07 Matsushita Electric Ind Co Ltd Pll circuit
WO2004075447A1 (en) * 2003-02-20 2004-09-02 Zarlink Semiconductor Inc. Alignment of clock domains in packet networks
JP2007134873A (en) * 2005-11-09 2007-05-31 National Institute Of Information & Communication Technology Highly precise time synchronization processing apparatus and program thereof, and network congestion degree warning apparatus and program thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000244473A (en) * 1999-02-24 2000-09-08 Matsushita Electric Ind Co Ltd Pll circuit
JP2000278275A (en) * 1999-03-23 2000-10-06 Yamaha Corp Packet transfer device
WO2001050674A1 (en) * 1999-12-30 2001-07-12 Nokia Networks Oy Synchronization in packet-switched telecommunications system
JP2001244809A (en) * 2000-02-28 2001-09-07 Matsushita Electric Ind Co Ltd Pll circuit
WO2004075447A1 (en) * 2003-02-20 2004-09-02 Zarlink Semiconductor Inc. Alignment of clock domains in packet networks
JP2007134873A (en) * 2005-11-09 2007-05-31 National Institute Of Information & Communication Technology Highly precise time synchronization processing apparatus and program thereof, and network congestion degree warning apparatus and program thereof

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009206777A (en) * 2008-02-27 2009-09-10 Nec Corp Clock synchronization system, clock synchronization method, program, and recording medium
JP5440880B2 (en) * 2008-11-20 2014-03-12 日本電気株式会社 Clock synchronization system, apparatus, method, and program using packet filter
WO2010058831A1 (en) * 2008-11-20 2010-05-27 日本電気株式会社 Packet-filter-used clock synchronization system, apparatus, method and program thereof
US8731036B2 (en) 2008-11-20 2014-05-20 Nec Corporation Packet filter-based clock synchronization system, apparatus, and method, and program thereof
JPWO2010058831A1 (en) * 2008-11-20 2012-04-19 日本電気株式会社 Clock synchronization system, apparatus, method, and program using packet filter
JP2010232845A (en) * 2009-03-26 2010-10-14 Sony Corp Receiving apparatus, and time correction method for the same
JP2011029918A (en) * 2009-07-24 2011-02-10 Nec Corp Clock synchronization system, communication apparatus, method and program
JP2013501393A (en) * 2009-07-31 2013-01-10 アルカテル−ルーセント How to synchronize client clock frequency with server clock frequency
JP2011135482A (en) * 2009-12-25 2011-07-07 Nec Corp Time synchronizing system, master node, slave node, repeater, time synchronizing method, and program for time synchronization
JP2013104772A (en) * 2011-11-14 2013-05-30 Fujitsu Ltd Frame transmission device and synchronization method
CN104080115A (en) * 2013-03-28 2014-10-01 中国移动通信集团公司 Time synchronization performance monitoring method, device and system
CN104080115B (en) * 2013-03-28 2018-02-23 中国移动通信集团公司 A kind of time synchronized performance monitoring method, apparatus and system
WO2019196810A1 (en) * 2018-04-09 2019-10-17 华为技术有限公司 Data transmission method, related device, and communications system
CN113556221A (en) * 2020-04-23 2021-10-26 西门子股份公司 Method and device for timing in redundant network
CN114157381A (en) * 2021-12-09 2022-03-08 福州大学 Network delay jitter-oriented dynamic delay estimation period adjustment method

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