WO2009014126A1 - Multilayer wiring board - Google Patents

Multilayer wiring board Download PDF

Info

Publication number
WO2009014126A1
WO2009014126A1 PCT/JP2008/063144 JP2008063144W WO2009014126A1 WO 2009014126 A1 WO2009014126 A1 WO 2009014126A1 JP 2008063144 W JP2008063144 W JP 2008063144W WO 2009014126 A1 WO2009014126 A1 WO 2009014126A1
Authority
WO
WIPO (PCT)
Prior art keywords
electronic component
wiring board
multilayer wiring
cavity
laminated body
Prior art date
Application number
PCT/JP2008/063144
Other languages
French (fr)
Japanese (ja)
Inventor
Tsuyoshi Suesada
Norio Yoshida
Original Assignee
Murata Manufacturing Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co., Ltd. filed Critical Murata Manufacturing Co., Ltd.
Publication of WO2009014126A1 publication Critical patent/WO2009014126A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15158—Shape the die mounting substrate being other than a cuboid
    • H01L2924/15159—Side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/1003—Non-printed inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10477—Inverted

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

Provided is a multilayer wiring board, which can be mounted with an electronic component having a height that protrudes from a recessed section of a laminated body, and achieves small size and low height in a state where the multilayer wiring board is mounted on a mounting board. A multilayer wiring board (10) is provided with a laminated body (11) wherein a plurality of base material layers (11A) are laminated, a cavity (11B) formed on a lower surface of the laminated body (11), a first electronic component (for instance, a winding type inductor) (13) mounted in the cavity (11B), and a second electronic component (for instance, a semiconductor element) (14) mounted on an upper surface of the laminated body (11). The first electronic component (13) is composed of an electronic component (for instance, a winding type inductor) having a height that protrudes from the cavity (11B), and a mother board (20) has a recessed section (20A) for storing the protruding section of the electronic component (13) from the cavity (11B).
PCT/JP2008/063144 2007-07-23 2008-07-23 Multilayer wiring board WO2009014126A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-191472 2007-07-23
JP2007191472 2007-07-23

Publications (1)

Publication Number Publication Date
WO2009014126A1 true WO2009014126A1 (en) 2009-01-29

Family

ID=40281377

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/063144 WO2009014126A1 (en) 2007-07-23 2008-07-23 Multilayer wiring board

Country Status (1)

Country Link
WO (1) WO2009014126A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013036394A (en) * 2011-08-08 2013-02-21 Sanden Corp Vibration-proof structure for electric circuit of electric compressor
WO2015033704A1 (en) * 2013-09-05 2015-03-12 株式会社村田製作所 Electronic component with built-in capacitor
CN105101636A (en) * 2014-05-23 2015-11-25 三星电机株式会社 Printed circuit board, method for manufacturing the same and package on package having the same
JP2018006408A (en) * 2016-06-28 2018-01-11 株式会社ジェイデバイス Semiconductor package and manufacturing method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0467372U (en) * 1990-10-23 1992-06-15
WO2001048821A1 (en) * 1999-12-27 2001-07-05 Mitsubishi Denki Kabushiki Kaisha Integrated circuit
JP2004128413A (en) * 2002-10-07 2004-04-22 Sanyo Electric Co Ltd Lamination module
JP2004128002A (en) * 2002-09-30 2004-04-22 Taiyo Yuden Co Ltd Electronic part built-in type multilayer substrate
JP2004304159A (en) * 2003-03-19 2004-10-28 Ngk Spark Plug Co Ltd Intermediate substrate, intermediate substrate with semiconductor element, substrate with intermediate substrate, and structure composed of semiconductor element, intermediate substrate, and substrate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0467372U (en) * 1990-10-23 1992-06-15
WO2001048821A1 (en) * 1999-12-27 2001-07-05 Mitsubishi Denki Kabushiki Kaisha Integrated circuit
JP2004128002A (en) * 2002-09-30 2004-04-22 Taiyo Yuden Co Ltd Electronic part built-in type multilayer substrate
JP2004128413A (en) * 2002-10-07 2004-04-22 Sanyo Electric Co Ltd Lamination module
JP2004304159A (en) * 2003-03-19 2004-10-28 Ngk Spark Plug Co Ltd Intermediate substrate, intermediate substrate with semiconductor element, substrate with intermediate substrate, and structure composed of semiconductor element, intermediate substrate, and substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013036394A (en) * 2011-08-08 2013-02-21 Sanden Corp Vibration-proof structure for electric circuit of electric compressor
WO2015033704A1 (en) * 2013-09-05 2015-03-12 株式会社村田製作所 Electronic component with built-in capacitor
JP5725268B1 (en) * 2013-09-05 2015-05-27 株式会社村田製作所 Electronic components with built-in capacitors
US9668353B2 (en) 2013-09-05 2017-05-30 Murata Manufacturing Co., Ltd. Electronic component with built-in capacitor
CN105101636A (en) * 2014-05-23 2015-11-25 三星电机株式会社 Printed circuit board, method for manufacturing the same and package on package having the same
JP2018006408A (en) * 2016-06-28 2018-01-11 株式会社ジェイデバイス Semiconductor package and manufacturing method thereof

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