WO2009010007A1 - A method, an apparatus and an optical modulator for phase adjustment - Google Patents

A method, an apparatus and an optical modulator for phase adjustment Download PDF

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Publication number
WO2009010007A1
WO2009010007A1 PCT/CN2008/071642 CN2008071642W WO2009010007A1 WO 2009010007 A1 WO2009010007 A1 WO 2009010007A1 CN 2008071642 W CN2008071642 W CN 2008071642W WO 2009010007 A1 WO2009010007 A1 WO 2009010007A1
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WIPO (PCT)
Prior art keywords
signal
response signal
low frequency
difference
frequency disturbance
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PCT/CN2008/071642
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French (fr)
Chinese (zh)
Inventor
Xiaoyan Fan
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Huawei Technologies Co., Ltd.
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Publication of WO2009010007A1 publication Critical patent/WO2009010007A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/0121Operation of devices; Circuit arrangements, not otherwise provided for in this subclass
    • G02F1/0123Circuits for the control or stabilisation of the bias voltage, e.g. automatic bias control [ABC] feedback loops
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50Transmitters
    • H04B10/501Structural aspects
    • H04B10/503Laser transmitters
    • H04B10/505Laser transmitters using external modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50Transmitters
    • H04B10/58Compensation for non-linear transmitter output

Definitions

  • the present invention relates to the field of communications technologies, and more particularly to a method, apparatus, and optical modulator for phase adjustment.
  • optical communication With the continuous deepening of research in optical and electronic communication, optical communication has developed rapidly.
  • optical transmission system In the optical transmission system
  • the external modulator is used to operate the laser in the continuous wave mode, which is simple and thorough to overcome the influence of the frequency ripple. In addition, it offers higher speeds, higher extinction ratios and greater power. Therefore, the external modulation technology is ideal for ultra-high speed, long-distance optical transmission.
  • Mach-Zehnder modulators among which mainly lithium niobate
  • LiNbio3 modulator The working principle of the lithium niobate modulator is described below.
  • the working principle of a lithium niobate modulator uses a characteristic that the refractive index of a particular material changes with the applied electric field to achieve a modulation function.
  • the applied electric field causes a change in the refractive index of the material.
  • the change in the refractive index causes a phase change of the modulated optical signal.
  • the phase change of the optical signal is combined with a specific lithium gallium silicate (MZ) interferometer to cause an interference effect on the output signal.
  • !0 is the modulation of optical power.
  • the characteristic curve of the lithium niobate modulator operation is shown in Figure 1.
  • the V coordinate represents the applied DC bias (Bias) voltage of the modulator. Different applied DC bias voltages correspond to different output optical powers.
  • the Bias voltage operates at various voltage points to achieve maximum output power (MAX), minimum (MIN), two Quad points (ie, Quad-, Quad+), and other optical power points.
  • the modulator when the light source is modulated by a high-speed non-return-to-zero (NRZ) code electrical signal, the modulator operates at two Quad points, with the lowest bit error rate for digital signal systems and minimal distortion for analog systems. Therefore, the voltage value of the applied DC bias voltage should be stabilized at Vpi/2 as much as possible to ensure that the optical power is stable at the Quad point, and the output optical modulation signal is optimal.
  • the Bias voltage at the Quad point of the lithium niobate modulator will drift due to temperature (ie, the Quad point DC voltage changes with temperature;), That is, the input voltage Vin does not guarantee that the optical power is always stable at the Quad point. Therefore, it is necessary to continuously compensate for the drift of the DC Bias voltage, so that the output value of the optical power is locked at the Quad point.
  • the prior art mainly uses the following two methods for bias control of the Bias voltage.
  • the first way is to use amplitude modulation bias control.
  • the principle of amplitude modulation bias control is to use high frequency data signals.
  • No. 5 performs amplitude modulation, and Bias voltage control is realized by calculating the feedback value of the feedback signal of the modulator.
  • the specific implementation process can be seen in Figure 2.
  • the low frequency disturbance signal (periodic sinusoidal signal) is loaded to achieve amplitude modulation of the RF at the amplitude modulation end of the amplitude driver.
  • the modulated signal that is, the PD response signal, is extracted by the backlight detection photodiode (PD).
  • the PD response signal is amplified, and frequency-selective filtering is performed on the frequency range of the low-frequency disturbance signal to obtain a PD response signal existing at a low-frequency disturbance frequency.
  • Vpp amplitude difference
  • the second way to add a low frequency disturbance signal is different from the first method, not by the amplitude modulation pin of the driver, but by the Bias end of the modulator.
  • the offset of the Bias voltage is determined by calculating the Vpp of the PD response signal at the disturbance frequency of the low frequency disturbance signal and the Vpp of the output signal at the second harmonic frequency of the low frequency, thereby obtaining a compensation value for the Bias voltage.
  • the inventors have found through research that: the first mode and the second mode in the prior art described above only implement the PD response signal and the low frequency disturbance in the process of calculating the Bias voltage compensation value.
  • Vpp can be accurately calculated to compensate for the Bias voltage.
  • both methods use multi-stage filtering and multi-stage amplification circuits, due to
  • the 5th-stage filtering and multi-stage amplifying circuits have different phase changes at different temperatures, which causes the synchronization between the PD response signal and the low-frequency disturbance signal, and the phase difference occurs, which causes the deviation of the Vpp to be calculated and the Bias voltage to be lowered. Control accuracy; If part of the amplifier circuit and filter circuit are removed to reduce the phase difference, the PD signal will be degraded. Therefore, the problem of the phase difference between the PD response signal and the low frequency disturbance signal always plagues the control accuracy of the Bias voltage. Summary of the invention
  • Embodiments of the present invention provide a phase adjustment method, apparatus, and optical modulator capable of operating a bias voltage and power of a light modulator at a stable operating point, thereby outputting a stable optical modulation signal.
  • Embodiments of the present invention provide a method for phase adjustment, including:
  • a characterization value is obtained by using all the sample values in each time slot, and a characterization difference between the two characterization values is obtained;
  • Embodiments of the present invention provide a phase adjustment apparatus, including:
  • a signal extracting unit configured to obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
  • a standard clock unit for dividing a standard clock period of a predetermined length into two equal time slots and providing a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are within the The response signal waveform is symmetrical;
  • a sampling unit configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and obtaining the sample value of the response signal in the divided two time slots
  • An operation unit configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment difference between the characterization difference value and a predetermined threshold value;
  • Embodiments of the present invention provide a light modulator, including:
  • An input device for inputting a low frequency disturbance signal and an RF signal into the light modulator; a photoelectric conversion device for obtaining a modulated optical response signal having a low frequency disturbance signal, and The optical response signal is converted into a response signal;
  • Phase adjustment device including:
  • a signal extracting unit configured to obtain, from the photoelectric conversion device, a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
  • a standard clock unit for dividing a standard clock period of a predetermined length into two equal time slots and providing a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
  • a sampling unit configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and obtaining the sample value of the response signal in the divided two time slots 0 is an operation unit, configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment difference between the characterization difference value and a predetermined threshold value; ;
  • An adjusting unit configured to move a phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference
  • a bias voltage control device configured to perform a synchronous 5 demodulation calculation by using the low frequency disturbance signal and the response signal, and use the calculation result to increase or decrease the bias voltage.
  • the method and apparatus in the embodiments of the present invention can adjust the phase difference between the low frequency disturbance signal and the response signal, keep the phase difference between the low frequency disturbance signal and the response signal constant, and the phase difference is not affected by the temperature and the device, and is reduced.
  • the cost of hardware design can perform synchronous demodulation calculation on the low frequency disturbance signal and the response signal, and use the calculation result to increase or decrease the bias of the !0 voltage, thereby improving the reliability of the lock bias voltage.
  • the bias voltage and power of the optical modulator are operated at a stable operating point to output a stable optical modulation signal.
  • FIG. 1 is a schematic diagram showing the characteristic curve of the operation of the lithium niobate modulator in the prior art
  • FIG. 2 is a schematic structural view of a lithium niobate modulator in the prior art
  • Figure 5 is a structural diagram of a modulator according to Embodiment 1 of the present invention.
  • FIG. 5 is a schematic diagram of a waveform when a standard signal and a response signal are synchronized in the first embodiment of the present invention
  • FIG. 6 is a schematic diagram showing a waveform of a response signal waveform deviating to the left in the first embodiment of the present invention
  • FIG. 7 is a first embodiment of the present invention
  • Figure 8 is a structural diagram of a device in Embodiment 2 of the present invention.
  • Figure 9 is a structural diagram of a light modulator in Embodiment 3 of the present invention.
  • a first embodiment of the present invention will be described in detail with reference to Figs. 3 and 4, see Fig. 3, in which the modulator uses an MZ type modulator, specifically a lithium niobate modulator.
  • the modulator uses an MZ type modulator, specifically a lithium niobate modulator.
  • an electrical signal is obtained by photoelectric conversion after the PD end, and after filtering and amplification, AD is sampled, the digital processing chip judges by using the sample value, and the low frequency disturbance signal is adjusted by the result of the judgment.
  • the specific actual process is shown in Figure 4, including the following steps:
  • Step 401 Obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
  • the optical response signal is obtained through the PD end of the modulator, and the optical response signal is photoelectrically converted to obtain a response signal, and the obtained response signal is filtered, and the filtering includes frequency selection, band pass, and filtering out the response signal having the frequency of the low frequency interference signal.
  • the frequency of the standard clock and the sample clock can be varied.
  • the standard clock is 1K
  • the sample clock is 20 ⁇ , that is, 20 times in the period of one standard clock signal.
  • Step 402 Divide a standard clock period of a predetermined length into two equal time slots, and sample the response signal in the time slot !0;
  • the predetermined length used may be one-half, or three-quarters of a standard clock cycle, or one standard clock cycle, or a plurality of standard clock cycles, and the like.
  • the response signal is sampled within a predetermined clock period of a predetermined length, it is necessary to divide the standard clock period of a predetermined length into two equal time slots, and the divided two time slots are not continuous.
  • the response signal waveforms in the two time slots are symmetric when the response signal is synchronized with the standard time of 5 minutes, which may be mirror symmetry or origin symmetry.
  • the standard clock cycle length used is one-half of the standard clock cycle length, and the length is divided into two consecutive and equal time slots.
  • FIG. 5 is a schematic diagram of the waveform when the standard clock and the response signal are synchronized
  • the square waveform in FIG. 5 is a standard clock signal waveform.
  • Party The wave is the signal time slot of the standard clock cycle
  • the curve waveform is the waveform of the response signal.
  • the forward direction of the response signal i.e., the upper half axis in Fig. 5
  • the negative direction i.e., the lower half axis in Fig. 5
  • the sample values are obtained 10 times, and the sample values in the two time slots are separately counted.
  • Step 403 Record the obtained sample values in an array
  • Step 404 Determine whether the number of times of each sample is less than the maximum number of samples
  • Step 405 Calculate the characterization values of the response signals in the two time slots respectively.
  • the calculation process is to perform the sum, difference, product, logarithm, and integral of all the sample values in each time slot. Or a combination of operations.
  • the sum values are summed to obtain the characterization values of the respective time slots.
  • the characterization value is obtained as SUMA.
  • the negative ⁇ sample value can be obtained. Since the response signal is in the negative direction, the obtained ⁇ sample value is summed. After the operation, the characterization value is obtained, which is recorded as SUMB and is negative.
  • step 407 if less, step 408;
  • the predetermined threshold is a characterization difference obtained according to the divided time slots when the response signal is synchronized with the standard clock.
  • the predetermined threshold value is related to the waveform of the response signal in the time slot. If the waveform of the response signal is divided into left and right symmetry when dividing the time slot, the difference value represented by subtracting the two time slots is The threshold is 0; if the time slot is divided, the waveform of the response signal is the origin Symmetrical, the characterization difference after subtracting through two time slots is not zero.
  • the divided two time slots are equal, the number of times of each time slot is the same, and the response signal waveforms in the two time slots are mirror symmetrical, so the predetermined threshold is zero.
  • the response signal is just in the time slot to the left of the standard clock.
  • the value of SUMB is a negative value. 5
  • the result of subtracting SUMB with SUMA is recorded as SUMC, and the value is subtracted by positive value.
  • the result of the negative value must be a positive value greater than the threshold 0, indicating that the phase of the low frequency disturbance signal is offset to the right relative to the phase of the standard clock.
  • Step 407 Offset the phase of the low frequency disturbance clock to the left by a corresponding degree
  • the obtained adjustment difference value SUMC corresponds to the phase difference of the response signal of the left part of the standard clock signal is 45 degrees
  • the phase of the low frequency disturbance signal is shifted to the left by 45 degrees
  • the degree of the phase is Reduce it by 45 degrees.
  • Step 408 Determine whether the difference between the two representative values is less than a predetermined threshold. If it is less than 5, perform step 409; otherwise, indicate that no phase offset occurs, end the adjustment or re-execute step 401.
  • FIG. 7 a waveform diagram as shown in Fig. 7 appears.
  • the response signal of the standard clock waveform ie, square wave
  • the sample result SUMA is a negative value
  • the sampling result of the response signal in the shaded area is recorded as SUMB
  • the SUMB is obtained as a positive value.
  • SUMA minus SUMB results SUMC is a negative !0 value that must be less than the threshold 0.
  • Step 409 Offset the phase of the low frequency disturbance clock to the right by a corresponding degree.
  • the adjustment difference between the characteristic difference value and the predetermined threshold value needs to be obtained, and the corresponding degree is moved by adjusting the difference value.
  • the corresponding phase degree can be obtained according to the obtained difference SUMC, and the phase of the !5 low frequency disturbance signal is increased by the corresponding degree, so that the waveform of the low frequency disturbance signal is shifted to the right.
  • the phase adjustment apparatus includes: a signal extraction unit 801. , a standard clock unit 802, a sample unit 803, an operation unit 804, a determination unit 805, and an adjustment unit 806, wherein:
  • a signal extraction unit 801 configured to obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
  • a standard clock unit 802 configured to divide a standard clock period of a predetermined length into two equal time slots and provide a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
  • a sampling unit 803 configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and acquiring the response signal in the divided two time slots
  • the calculation unit 804 is configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment between the characterization difference value and a predetermined threshold value. Difference
  • the determining unit 805 is configured to determine whether the adjusted difference exceeds a predetermined threshold, and obtain a judgment knot
  • the adjusting unit 806 moves the phase of the low frequency disturbance signal by a corresponding angle according to the determination result and the adjustment difference.
  • the process by which the operation unit 804 obtains the characterization value by using all the sample values in each time slot includes:
  • the adjusting unit 806 includes:
  • a first adjusting unit 807 configured to: when the determining result is that the difference is greater than the predetermined threshold, reduce a phase of the low frequency disturbance signal by a corresponding angle according to the difference;
  • the second adjustment unit 808 is configured to increase the phase of the low frequency disturbance signal by a corresponding angle according to the difference when the determination result is that the adjustment difference is less than the threshold.
  • the functions of the determining unit 805 and the adjusting unit 806 can be integrated into one unit in practical applications.
  • the method and apparatus in embodiments of the present invention are capable of adjusting between a low frequency disturbance signal and a response signal
  • the phase difference keeps the phase difference between the low frequency disturbance signal and the response signal synchronized.
  • the characterization value can be obtained in a variety of ways, the calculation method is flexible, easy to implement, and the phase difference control precision is accurate.
  • FIG. 9 is a structural diagram of a light modulator including an input device 901, a bias voltage control device 902, and a phase.
  • the adjusting device 903, the photoelectric conversion device 904, wherein the light modulator may be an MZ modulator.
  • An input device 901 configured to input a low frequency disturbance signal and an RF signal into the light modulator; 0 a photoelectric conversion device 904, configured to obtain a modulated optical response signal having a low frequency disturbance signal, and convert the optical response signal into a response Signal
  • the phase adjustment device 903 includes: a signal extraction unit 905, a standard clock unit 906, a sample unit 907, an operation unit 908, a determination unit 909, and an adjustment unit 910;
  • a signal extracting unit 905 configured to obtain, from the photoelectric conversion device 904, a response signal including the low frequency disturbance signal 5, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
  • a standard clock unit 906 configured to divide a standard clock period of a predetermined length into two equal time slots and provide a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
  • a sampling unit 907 configured to: in the time slot, the response signal of the low frequency disturbance signal frequency !0 is sampled by the sampling clock; in the divided two time slots, acquiring the response signal
  • the operation unit 908 is configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain a relationship between the characterization difference value and a predetermined threshold value. Adjust the difference;
  • the determining unit 909 is configured to determine whether the adjusted difference exceeds a predetermined threshold, and obtain a judgment result
  • the bias voltage control device 902 is configured to increase or decrease the bias voltage by using the calculation result by performing synchronous demodulation calculation on the low frequency disturbance signal and the response signal.
  • the adjusting unit 910 includes: a first adjusting unit 911, configured to: when the determining result is that the adjustment difference is greater than the predetermined threshold, reduce a phase of the low frequency disturbance signal by a corresponding angle according to the difference;
  • the second adjusting unit 912 is configured to: when the determining result is that the adjustment difference is less than the predetermined threshold, increase a phase of the low frequency disturbance signal by a corresponding angle according to the difference.
  • the functions of the determining unit 805 and the adjusting unit 806 can be integrated into one unit in practical applications.
  • the phase difference can be adjusted without interruption; a control switch can also be added to perform the operation of adjusting the phase difference when the bias voltage is not stable.
  • the optical modulator in the embodiment of the invention can calculate the low frequency disturbance signal and the response signal, and use the calculation result to increase or decrease the bias voltage, so that the bias voltage and power of the light modulator operate at a stable working point, so that the output is stable.
  • Optical modulation signal can be calculated.
  • the calculation process of the bias voltage control device can be implemented in various existing ways, such as calculating the deviation value of the bias voltage by the amplitude relationship of the low frequency disturbance signal and the response signal; The technique of calculating the deviation value of the bias voltage when the voltage is operated at MAX or MIN as shown in FIG. 1 to perform corresponding adjustment. These techniques can be phase controlled by the scheme in the embodiment of the present invention to achieve relatively stable control of the bias voltage.

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  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
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  • Optics & Photonics (AREA)
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Abstract

A method for phase adjustment comprises: obtaining a response signal including a low frequency disturbing signal, and obtaining a response signal with the frequency of the low frequency disturbing signal according to the said response signal; dividing a standard clock period with a predetermined length into two equal slots, and with a sampling clock sampling the said response signal with the frequency of the low frequency disturbing signal in the said slots; in the said two divided slots, obtaining sampling values of the said response signal; obtaining a characteristic value by using all the sampling values in each slot, and obtaining the characteristic difference value between two characteristic values; obtaining an adjusting difference value between the characteristic difference value and a predetermined threshold, and shifting the phase of the said low frequency disturbing signal with a corresponding angle according to the said adjusting difference value, in order to keep the phase difference between the low frequency disturbing signal and the response signal constant. An apparatus and an optical modulator for phase adjustment are also disclosed in this invention.

Description

一种相位调整的方法、 装置及光调制器  Method, device and light modulator for phase adjustment
本申请要求于 2007 年 7 月 16 日提交中国专利局、 申请号为 200710135834.3、 发明名称为"一种相位调整的方法、 装置及光调制器"的中国 专利申请的优先权, 其全部内容通过引用结合在本申请中。  This application claims priority to Chinese Patent Application No. 200710135834.3, entitled "A Phase Adjustment Method, Apparatus, and Light Modulator", filed on July 16, 2007, the entire contents of which are incorporated by reference. Combined in this application.
5 技术领域 5 Technical fields
本发明涉及通信技术领域,特别是指一种相位调整的方法、装置及光调制 器。  The present invention relates to the field of communications technologies, and more particularly to a method, apparatus, and optical modulator for phase adjustment.
背景技术  Background technique
随着光学和电子通信研究的不断深入, 光通信得到快速发展。在光传输系 With the continuous deepening of research in optical and electronic communication, optical communication has developed rapidly. In the optical transmission system
0 统中无电中继传输的距离已经达到数百公里。 光纤传输时, 釆用外调制器使激 光器工作在连续波方式, 简单又比较彻底的克服频率啁啾的影响。 此外, 它还 能提供更高的速度、更高的消光比和更大的功率。 因此,外调制技术为超高速、 长距离光传输的理想选择。 0 The distance from the unpowered relay in the system has reached hundreds of kilometers. When the fiber is transmitted, the external modulator is used to operate the laser in the continuous wave mode, which is simple and thorough to overcome the influence of the frequency ripple. In addition, it offers higher speeds, higher extinction ratios and greater power. Therefore, the external modulation technology is ideal for ultra-high speed, long-distance optical transmission.
目前的光调制器大部分为马赫-曾德尔调制器, 其中, 主要是铌酸锂 Most of the current optical modulators are Mach-Zehnder modulators, among which mainly lithium niobate
5 ( LiNbio3 )调制器。 下面介绍铌酸锂调制器的工作原理。 5 (LiNbio3) modulator. The working principle of the lithium niobate modulator is described below.
铌酸锂调制器的工作原理利用特殊材料的折射率会随着外加电场的变化 而变化的特性来实现调制功能。 外加电场引起材料折射率的变化,折射率的变 化引起所承载调制光信号的相位变化,光信号的相位变化再结合特定的铌酸锂 马赫 (MZ )干涉仪, 会使输出信号产生干涉效应, 从而实现光强度的调制, The working principle of a lithium niobate modulator uses a characteristic that the refractive index of a particular material changes with the applied electric field to achieve a modulation function. The applied electric field causes a change in the refractive index of the material. The change in the refractive index causes a phase change of the modulated optical signal. The phase change of the optical signal is combined with a specific lithium gallium silicate (MZ) interferometer to cause an interference effect on the output signal. Thereby realizing the modulation of the light intensity,
!0 即光功率的调制。 !0 is the modulation of optical power.
铌酸锂调制器工作的特性曲线如图 1所示, V坐标表示调制器的外加直流 偏置(Bias ) 电压。 不同的外加直流偏置电压对应不同的输出光功率。 Bias电 压可工作在各个电压点, 以实现输出光功率达到最大(MAX )、 最小 (MIN )、 两个 Quad点 (即 Quad -、 Quad+ ) 以及其它光功率点。 在调制器的工作过程 The characteristic curve of the lithium niobate modulator operation is shown in Figure 1. The V coordinate represents the applied DC bias (Bias) voltage of the modulator. Different applied DC bias voltages correspond to different output optical powers. The Bias voltage operates at various voltage points to achieve maximum output power (MAX), minimum (MIN), two Quad points (ie, Quad-, Quad+), and other optical power points. During the working process of the modulator
!5 中, 当光源被高速非归零(NRZ )码电信号调制, 调制器工作在两个 Quad点 时, 对数字信号系统来说误码率最低, 对模拟系统来说畸变最小。 所以尽量将 外加直流偏置电压的电压值稳定在 Vpi/2上, 以保证光功率稳定在 Quad点, 这时输出的光调制信号是最佳的。 但是, 在实际情况中, 铌酸锂调制器 Quad 点的 Bias电压会因为温度发生漂移 (即 Quad点直流电压随温度发生变化;), 即输入电压 Vin不能保证光功率始终稳定在 Quad点。 因此, 需要不断对直流 Bias电压的漂移进行补偿,使光功率的输出值锁定在 Quad点。现有技术对 Bias 电压进行偏置控制时主要釆用以下两种方式。 In !5, when the light source is modulated by a high-speed non-return-to-zero (NRZ) code electrical signal, the modulator operates at two Quad points, with the lowest bit error rate for digital signal systems and minimal distortion for analog systems. Therefore, the voltage value of the applied DC bias voltage should be stabilized at Vpi/2 as much as possible to ensure that the optical power is stable at the Quad point, and the output optical modulation signal is optimal. However, in practice, the Bias voltage at the Quad point of the lithium niobate modulator will drift due to temperature (ie, the Quad point DC voltage changes with temperature;), That is, the input voltage Vin does not guarantee that the optical power is always stable at the Quad point. Therefore, it is necessary to continuously compensate for the drift of the DC Bias voltage, so that the output value of the optical power is locked at the Quad point. The prior art mainly uses the following two methods for bias control of the Bias voltage.
第一种方式是釆用调幅偏置控制,调幅偏置控制的原理是釆用高频数据信 The first way is to use amplitude modulation bias control. The principle of amplitude modulation bias control is to use high frequency data signals.
5 号 (RF )进行幅度调制, 通过计算调制器的反馈信号的反馈值来实现 Bias电 压控制。 具体实现过程可参见图 2, 低频扰动信号(周期性的正弦信号)加载 在幅度驱动器的调幅端实现对 RF的幅度调制。通过背光检测光电二极管( PD ) 提取调制后的信号, 即 PD响应信号。 对 PD响应信号进行放大, 并以低频扰 动信号的频率范围进行选频滤波, 得到以低频扰动频率存在的 PD响应信号。No. 5 (RF) performs amplitude modulation, and Bias voltage control is realized by calculating the feedback value of the feedback signal of the modulator. The specific implementation process can be seen in Figure 2. The low frequency disturbance signal (periodic sinusoidal signal) is loaded to achieve amplitude modulation of the RF at the amplitude modulation end of the amplitude driver. The modulated signal, that is, the PD response signal, is extracted by the backlight detection photodiode (PD). The PD response signal is amplified, and frequency-selective filtering is performed on the frequency range of the low-frequency disturbance signal to obtain a PD response signal existing at a low-frequency disturbance frequency.
0 当低频扰动信号为正向扰动或负向扰动时,可通过偏置控制模块同步解调 计算正向扰动和负向扰动幅度的最大值和最小值, 并得到幅度的差值(Vpp )。 当 Vpp较小并接近于零时, 说明调制器的 Bias电压工作在士 Vpi/2上, 即光功 率工作在士 Quad点; 当 Vpp较大时, 说明调制器的 Bias电压工作偏离 ±Vpi/2, 即光功率已经偏离士 Quad点。 通过 Vpp的大小, 即可将得出 Bias电压所需的0 When the low frequency disturbance signal is forward disturbance or negative disturbance, the maximum and minimum values of the forward disturbance and the negative disturbance amplitude can be calculated by the bias control module synchronous demodulation, and the amplitude difference (Vpp) can be obtained. When Vpp is small and close to zero, it means that the modulator's Bias voltage works on ±Vpi/2, that is, the optical power works at the ±Quad point; when Vpp is large, it indicates that the modulator's Bias voltage works off ±Vpi/ 2, that is, the optical power has deviated from the Quarter point. With the size of Vpp, you will get the required Bias voltage.
5 补偿值, 从而实现 Bias电压的补偿。 5 Compensation value to compensate for Bias voltage.
第二种方式加入低频扰动信号与第一种方式不同,不是通过驱动器的调幅 管脚加入, 而是通过调制器的 Bias端加入。 通过计算低频扰动信号在其扰动 频率下的 PD响应信号的 Vpp以及在低频二次谐波频率下输出信号的 Vpp来 判断 Bias电压的偏移量, 从而得出对 Bias电压的补偿值。  The second way to add a low frequency disturbance signal is different from the first method, not by the amplitude modulation pin of the driver, but by the Bias end of the modulator. The offset of the Bias voltage is determined by calculating the Vpp of the PD response signal at the disturbance frequency of the low frequency disturbance signal and the Vpp of the output signal at the second harmonic frequency of the low frequency, thereby obtaining a compensation value for the Bias voltage.
!0 在实现本发明的过程中,发明人经过研究发现: 上述现有技术中的第一种 方式和第二种方式在实现计算 Bias电压补偿值的过程中 ,只有在 PD响应信号 和低频扰动信号的相位差同步时, 才能准确的计算出 Vpp, 从而实现对 Bias 电压的补偿。 为使从调制器获得的 PD响应信号在信噪比很低时也能得到满足 计算 Vpp 的幅度信号, 这两种方式均釆用多级滤波和多级放大电路, 由于多 In the process of implementing the present invention, the inventors have found through research that: the first mode and the second mode in the prior art described above only implement the PD response signal and the low frequency disturbance in the process of calculating the Bias voltage compensation value. When the phase difference of the signals is synchronized, Vpp can be accurately calculated to compensate for the Bias voltage. In order to make the PD response signal obtained from the modulator get the amplitude signal satisfying the calculation Vpp when the signal-to-noise ratio is very low, both methods use multi-stage filtering and multi-stage amplification circuits, due to
!5 级滤波和多级放大电路在不同温度下相位变化不同, 这样会引起 PD响应信号 和低频扰动信号之间的不同步, 并出现相位差, 从而造成计算 Vpp 的偏差, 降低对 Bias 电压的控制精度; 如果去除部分放大电路、 滤波电路以降低相位 差, 又会造成 PD信号的劣化。 因此, PD响应信号和低频扰动信号之间存在 相位差的问题总是困扰着对 Bias电压的控制精度。 发明内容 The 5th-stage filtering and multi-stage amplifying circuits have different phase changes at different temperatures, which causes the synchronization between the PD response signal and the low-frequency disturbance signal, and the phase difference occurs, which causes the deviation of the Vpp to be calculated and the Bias voltage to be lowered. Control accuracy; If part of the amplifier circuit and filter circuit are removed to reduce the phase difference, the PD signal will be degraded. Therefore, the problem of the phase difference between the PD response signal and the low frequency disturbance signal always plagues the control accuracy of the Bias voltage. Summary of the invention
本发明实施例提供一种相位调整的方法、装置及光调制器, 能够使光调制 器的偏置电压、 功率工作在稳定的工作点, 从而输出稳定的光调制信号。  Embodiments of the present invention provide a phase adjustment method, apparatus, and optical modulator capable of operating a bias voltage and power of a light modulator at a stable operating point, thereby outputting a stable optical modulation signal.
本发明的实施例提供一种相位调整的方法, 包括:  Embodiments of the present invention provide a method for phase adjustment, including:
5 获得包含低频扰动信号的响应信号 ,根据所述响应信号得到具有低频扰动 信号频率的响应信号; 5 obtaining a response signal including a low frequency disturbance signal, and obtaining a response signal having a frequency of the low frequency disturbance signal according to the response signal;
将预定长度的标准时钟周期划分出两个相等的时隙,在所述时隙内通过釆 样时钟对所述低频扰动信号频率的响应信号进行釆样; 其中, 所述响应信号与 所述标准时钟同步时, 所述两个时隙内的响应信号波形对称;  Dividing a predetermined length of the standard clock period into two equal time slots, wherein the response signal of the low frequency disturbance signal frequency is sampled by the sample clock in the time slot; wherein the response signal and the standard When the clock is synchronized, the waveforms of the response signals in the two time slots are symmetrical;
0 在所述划分的两个时隙内, 获取所述响应信号的釆样值; 0 acquiring, in the divided two time slots, a sample value of the response signal;
利用每个时隙内的所有釆样值获得表征值,获得两个表征值之间的表征差 值;  A characterization value is obtained by using all the sample values in each time slot, and a characterization difference between the two characterization values is obtained;
获得所述表征差值与预定阔值之间的调整差值,按照所述调整差值将所述 低频扰动信号的相位移动相应的角度。  Obtaining an adjustment difference between the characteristic difference value and a predetermined threshold value, and shifting the phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference value.
5 本发明的实施例提供一种相位调整的装置, 包括: 5 Embodiments of the present invention provide a phase adjustment apparatus, including:
信号提取单元, 用于获得包含低频扰动信号的响应信号,根据所述响应信 号得到具有低频扰动信号频率的响应信号;  a signal extracting unit, configured to obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
标准时钟单元,用于预定长度的标准时钟周期划分出两个相等的时隙并提 供标准时钟信号; 其中, 所述响应信号与所述标准时钟同步时, 所述两个时隙 !0 内的响应信号波形对称;  a standard clock unit for dividing a standard clock period of a predetermined length into two equal time slots and providing a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are within the The response signal waveform is symmetrical;
釆样单元,用于在所述时隙内通过釆样时钟对所述低频扰动信号频率的响 应信号进行釆样; 在所述划分的两个时隙内, 获取所述响应信号的釆样值; 运算单元, 用于利用每个时隙内的所有釆样值获得表征值, 获得两个表征 值之间的表征差值, 获得所述表征差值与预定阔值之间的调整差值;  a sampling unit, configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and obtaining the sample value of the response signal in the divided two time slots An operation unit, configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment difference between the characterization difference value and a predetermined threshold value;
!5 调整单元,用于根据所述调整差值将所述低频扰动信号的相位移动相应的 角度。 !5 an adjustment unit for moving the phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference.
本发明的实施例提供一种光调制器, 包括:  Embodiments of the present invention provide a light modulator, including:
输入装置, 用于将低频扰动信号和 RF信号输入到光调制器中; 光电转换装置, 用于获得调制后的存在低频扰动信号的光响应信号, 并将 光响应信号转换为响应信号; An input device for inputting a low frequency disturbance signal and an RF signal into the light modulator; a photoelectric conversion device for obtaining a modulated optical response signal having a low frequency disturbance signal, and The optical response signal is converted into a response signal;
相位调整装置, 包括:  Phase adjustment device, including:
信号提取单元,用于从所述光电转换装置获得包含低频扰动信号的响应信 号, 根据所述响应信号得到具有低频扰动信号频率的响应信号;  a signal extracting unit, configured to obtain, from the photoelectric conversion device, a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
5 标准时钟单元,用于将预定长度的标准时钟周期划分出两个相等的时隙并 提供标准时钟信号; 其中, 所述响应信号与所述标准时钟同步时, 所述两个时 隙内的响应信号波形对称;  a standard clock unit for dividing a standard clock period of a predetermined length into two equal time slots and providing a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
釆样单元,用于在所述时隙内通过釆样时钟对所述低频扰动信号频率的响 应信号进行釆样; 在所述划分的两个时隙内, 获取所述响应信号的釆样值; 0 运算单元, 用于利用每个时隙内的所有釆样值获得表征值, 获得两个表征 值之间的表征差值, 获得所述表征差值与预定阔值之间的调整差值;  a sampling unit, configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and obtaining the sample value of the response signal in the divided two time slots 0 is an operation unit, configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment difference between the characterization difference value and a predetermined threshold value; ;
调整单元,用于根据所述调整差值将所述低频扰动信号的相位移动相应的 角度;  An adjusting unit, configured to move a phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference;
偏置电压控制装置, 用于通过所述低频扰动信号、所述响应信号进行同步 5 解调计算, 利用计算结果提高或降低偏置电压。  And a bias voltage control device configured to perform a synchronous 5 demodulation calculation by using the low frequency disturbance signal and the response signal, and use the calculation result to increase or decrease the bias voltage.
本发明实施例中的方法和装置能够调节低频扰动信号和响应信号之间的 相位差,使低频扰动信号和响应信号之间的相位差保持恒定,且相位差不受温 度和器件的影响, 降低硬件设计的成本。本发明实施例中的光调制器能够通过 对低频扰动信号和响应信号进行同步解调计算,利用计算结果提高或降低偏置 !0 电压, 提高锁定偏置电压的可靠性。 使光调制器的偏置电压、 功率工作在稳定 的工作点, 从而输出稳定的光调制信号。  The method and apparatus in the embodiments of the present invention can adjust the phase difference between the low frequency disturbance signal and the response signal, keep the phase difference between the low frequency disturbance signal and the response signal constant, and the phase difference is not affected by the temperature and the device, and is reduced. The cost of hardware design. The optical modulator in the embodiment of the present invention can perform synchronous demodulation calculation on the low frequency disturbance signal and the response signal, and use the calculation result to increase or decrease the bias of the !0 voltage, thereby improving the reliability of the lock bias voltage. The bias voltage and power of the optical modulator are operated at a stable operating point to output a stable optical modulation signal.
附图说明  DRAWINGS
图 1是现有技术中铌酸锂调制器工作的特性曲线示意图;  1 is a schematic diagram showing the characteristic curve of the operation of the lithium niobate modulator in the prior art;
图 2是现有技术中铌酸锂调制器的结构示意图;  2 is a schematic structural view of a lithium niobate modulator in the prior art;
!5 图 3是本发明实施例一的调制器结构图; Figure 5 is a structural diagram of a modulator according to Embodiment 1 of the present invention;
图 4是本发明实施例一的流程图;  4 is a flow chart of Embodiment 1 of the present invention;
图 5是本发明实施例一中标准信号和响应信号同步时的波形示意图; 图 6是本发明实施例一中响应信号波形向左偏离标准信号波形的示意图; 图 7是本发明实施例一中响应信号波形向右偏离标准信号波形的示意图; 图 8是本发明实施例二中装置的结构图; 5 is a schematic diagram of a waveform when a standard signal and a response signal are synchronized in the first embodiment of the present invention; FIG. 6 is a schematic diagram showing a waveform of a response signal waveform deviating to the left in the first embodiment of the present invention; FIG. 7 is a first embodiment of the present invention; A schematic diagram of the response signal waveform deviating to the right from the standard signal waveform; Figure 8 is a structural diagram of a device in Embodiment 2 of the present invention;
图 9是本发明实施例三中光调制器的结构图。  Figure 9 is a structural diagram of a light modulator in Embodiment 3 of the present invention.
具体实施方式  detailed description
下面通过本发明的实施例详细说明调整响应信号和低频 4尤动信号之间相 5 位差的具体实现方案。  A specific implementation scheme for adjusting the phase difference between the response signal and the low frequency 4 special motion signal will be described in detail below by way of an embodiment of the present invention.
首先, 结合图 3和图 4详细说明本发明的实施例一, 参见图 3 , 在该实施 例中,调制器釆用 MZ类型调制器,具体可以是铌酸锂调制器。在该调制器中, 通过 PD端进行光电转换后获得电信号, 经过滤波、 放大后进行 AD釆样, 数 字处理芯片利用釆样值判断, 利用判断后的结果调整低频扰动信号。具体的实 0 现过程参见图 4, 包括以下步骤:  First, a first embodiment of the present invention will be described in detail with reference to Figs. 3 and 4, see Fig. 3, in which the modulator uses an MZ type modulator, specifically a lithium niobate modulator. In the modulator, an electrical signal is obtained by photoelectric conversion after the PD end, and after filtering and amplification, AD is sampled, the digital processing chip judges by using the sample value, and the low frequency disturbance signal is adjusted by the result of the judgment. The specific actual process is shown in Figure 4, including the following steps:
步骤 401 : 获得包含低频扰动信号的响应信号, 根据所述响应信号得到具 有低频扰动信号频率的响应信号;  Step 401: Obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
通过调制器的 PD端获得光响应信号, 光响应信号进行光电转换获得响应 信号, 将获得的响应信号进行滤波, 滤波包括选频、 带通, 过滤出具有低频扰 5 动信号频率的响应信号。  The optical response signal is obtained through the PD end of the modulator, and the optical response signal is photoelectrically converted to obtain a response signal, and the obtained response signal is filtered, and the filtering includes frequency selection, band pass, and filtering out the response signal having the frequency of the low frequency interference signal.
获得 PD响应信号后, 将执行下面的 AD釆样过程。 釆样时, 标准时钟和 釆样时钟的频率是可以变化的, 在该实施例中, 标准时钟为 1K、 釆样时钟为 20Κ, 即在一个标准时钟信号的周期内可釆样 20次。  After the PD response signal is obtained, the following AD sample process will be performed. In this case, the frequency of the standard clock and the sample clock can be varied. In this embodiment, the standard clock is 1K, and the sample clock is 20Κ, that is, 20 times in the period of one standard clock signal.
步骤 402: 将预定长度的标准时钟周期划分出两个相等的时隙, 并对时隙 !0 内的响应信号釆样;  Step 402: Divide a standard clock period of a predetermined length into two equal time slots, and sample the response signal in the time slot !0;
所釆用的预定长度可以是一个标准时钟周期的二分之一、或四分之三、或 一个标准时钟周期、或多个标准时钟周期等。在预定长度的标准时钟周期内对 于响应信号进行釆样时,需要将预定长度的标准时钟周期划分出两个相等的时 隙, 划分出的两个时隙并非要连续。但这两个时隙要满足在响应信号与标准时 !5 钟同步时, 两个时隙内的响应信号波形对称, 可以是镜像对称或原点对称。  The predetermined length used may be one-half, or three-quarters of a standard clock cycle, or one standard clock cycle, or a plurality of standard clock cycles, and the like. When the response signal is sampled within a predetermined clock period of a predetermined length, it is necessary to divide the standard clock period of a predetermined length into two equal time slots, and the divided two time slots are not continuous. However, when the two time slots are synchronized, the response signal waveforms in the two time slots are symmetric when the response signal is synchronized with the standard time of 5 minutes, which may be mirror symmetry or origin symmetry.
为便于说明, 本实施例中, 所釆用的标准时钟周期长度为二分之一的标准 时钟周期长度, 并将该长度划分出两个连续且相等的时隙。在标准时钟周期划 分出的时隙内对响应信号釆样的波形示意图可参见 5 , 图 5是标准时钟和响应 信号同步时的波形示意图, 图 5中的方形波形是标准的时钟信号波形,每个方 波即标准时钟周期的信号时隙, 曲线波形为响应信号的波形。 在釆样时, 对方 波的时隙内对响应信号的正向 (即图 5中的上半轴)、 负向 (即图 5中的下半 轴)进行釆样。 在一个方波的时隙内, 获取 10次釆样值, 并分别统计两个时 隙内的釆样值。 For convenience of description, in this embodiment, the standard clock cycle length used is one-half of the standard clock cycle length, and the length is divided into two consecutive and equal time slots. For the waveform diagram of the response signal in the time slot divided by the standard clock cycle, see FIG. 5, FIG. 5 is a schematic diagram of the waveform when the standard clock and the response signal are synchronized, and the square waveform in FIG. 5 is a standard clock signal waveform. Party The wave is the signal time slot of the standard clock cycle, and the curve waveform is the waveform of the response signal. In the case of the sample, the forward direction of the response signal (i.e., the upper half axis in Fig. 5) and the negative direction (i.e., the lower half axis in Fig. 5) are sampled in the time slot of the square wave. In a time slot of a square wave, the sample values are obtained 10 times, and the sample values in the two time slots are separately counted.
5 步骤 403: 将获得的釆样值记录在数组中; 5 Step 403: Record the obtained sample values in an array;
步骤 404: 判断每次釆样的次数是否小于最大釆样次数;  Step 404: Determine whether the number of times of each sample is less than the maximum number of samples;
在该实施例中,每次釆样结束后, 判断当前釆样的次数是否小于最大的釆 样次数, 即判断是否不等于 10 , 如果不等于, 则继续执行步骤 402, 直到釆样 10次结束; 如果釆样次数大于 10后, 则不再执行釆样操作, 执行步骤 405。 0 步骤 405: 分别计算所述两个时隙内响应信号釆样结果的表征值。  In this embodiment, after each sample is finished, it is determined whether the number of times of the current sample is less than the maximum number of samples, that is, whether it is not equal to 10, and if not, proceeding to step 402 until the end of 10 times. If the number of times is greater than 10, the sample operation is no longer performed, and step 405 is performed. 0 Step 405: Calculate the characterization values of the response signals in the two time slots respectively.
当标准信号和响应信号失去同步时,可能会出现如图 6或图 7所示的波形 偏差。 在图 6中, 响应信号的波形在标准时钟的方波时隙内向左发生偏移, 釆 样时,在负向会釆集到响应信号的反向釆样值, 而在正向则会釆集到与标准时 钟同向的釆样值; 在图 7中, 响应信号的波形在标准时钟的方波时隙内向右发 5 生偏移, 釆样时, 也会出现与图 6相似的釆样结果。  When the standard and response signals are out of sync, waveform deviations as shown in Figure 6 or Figure 7 may occur. In Figure 6, the waveform of the response signal is shifted to the left in the square wave time slot of the standard clock. In the case of the sample, the reverse value of the response signal is collected in the negative direction, and in the positive direction, Collecting the same value as the standard clock; In Figure 7, the waveform of the response signal is shifted to the right within the square wave time slot of the standard clock, and similarly, the same as Figure 6 Sample results.
分别计算所划分的两个时隙内对响应信号釆样结果的表征值,计算过程是 将每个时隙内的所有釆样值进行和、 差、 积、 对数、 积分任意一种数学运算或 其组合运算。 优选的, 是将釆样值进行和运算, 得到各个时隙的表征值。  Calculate the characterization values of the response signals in the two divided time slots respectively. The calculation process is to perform the sum, difference, product, logarithm, and integral of all the sample values in each time slot. Or a combination of operations. Preferably, the sum values are summed to obtain the characterization values of the respective time slots.
在该实施例中, 以图 6的波形示意图为例, 由于响应信号向左偏移, 在方 !0 波左侧的时隙中可得出正向的 5 次釆样值, 将釆样值进行和运算后得到表征 值, 记为 SUMA; 对于右侧有阴影的时隙内, 可得出负向的 5次釆样值, 由 于响应信号在负向, 因此, 得到的釆样值进行和运算后得到表征值, 记为 SUMB , 为负值。  In this embodiment, taking the waveform diagram of FIG. 6 as an example, since the response signal is shifted to the left, a positive 5 times sample value can be obtained in the time slot to the left of the square!0 wave, and the sample value is obtained. After the sum operation, the characterization value is obtained as SUMA. For the time slot with the shadow on the right side, the negative 的 sample value can be obtained. Since the response signal is in the negative direction, the obtained 釆 sample value is summed. After the operation, the characterization value is obtained, which is recorded as SUMB and is negative.
!5 则执行步骤 407; 如果小于, 则执行步骤 408; !5, step 407; if less, step 408;
其中,预定的阔值是在响应信号与标准时钟同步时,按照划分出的时隙所 获得的表征差值。预定的阔值与划分出时隙内的响应信号的波形有关, 如果在 划分时隙时, 所划分出响应信号的波形是左右对称, 则通过两个时隙相减后的 表征差值, 即阔值为 0; 如果在划分时隙时, 所划分出响应信号的波形是原点 对称, 则通过两个时隙相减后的表征差值不为 0。 Wherein, the predetermined threshold is a characterization difference obtained according to the divided time slots when the response signal is synchronized with the standard clock. The predetermined threshold value is related to the waveform of the response signal in the time slot. If the waveform of the response signal is divided into left and right symmetry when dividing the time slot, the difference value represented by subtracting the two time slots is The threshold is 0; if the time slot is divided, the waveform of the response signal is the origin Symmetrical, the characterization difference after subtracting through two time slots is not zero.
在该实施例中, 划分的两个时隙相等, 每个时隙的釆样次数相同, 两个时 隙内的响应信号波形属于镜像对称, 因此预定阔值为 0。 对于判断过程, 以图 6为例, 响应信号刚好在标准时钟左侧的时隙内, 此时, SUMB的值为负值, 5 用 SUMA减去 SUMB的结果记为 SUMC, 用正值减去负值的结果必为大于阔 值 0 的正值, 说明低频扰动信号的相位相对于标准时钟的相位发生向右的偏 移。  In this embodiment, the divided two time slots are equal, the number of times of each time slot is the same, and the response signal waveforms in the two time slots are mirror symmetrical, so the predetermined threshold is zero. For the judgment process, taking Figure 6 as an example, the response signal is just in the time slot to the left of the standard clock. At this time, the value of SUMB is a negative value. 5 The result of subtracting SUMB with SUMA is recorded as SUMC, and the value is subtracted by positive value. The result of the negative value must be a positive value greater than the threshold 0, indicating that the phase of the low frequency disturbance signal is offset to the right relative to the phase of the standard clock.
步骤 407: 将低频扰动时钟的相位向左偏移相应的度数;  Step 407: Offset the phase of the low frequency disturbance clock to the left by a corresponding degree;
将低频扰动时钟的相位向左调节时,需要获得表征差值与预定阔值之间的 0 调整差值, 通过调整差值移动相应的度数。  When the phase of the low frequency disturbance clock is adjusted to the left, it is necessary to obtain a 0 adjustment difference between the characteristic difference value and the predetermined threshold value, and move the corresponding degree by adjusting the difference value.
在本实施例中, 如果得到的调整差值 SUMC对应于标准时钟信号的左侧 部分的响应信号的相位差是 45度, 则将低频扰动信号的相位向左偏移 45度, 将相位的度数减少 45度。  In this embodiment, if the obtained adjustment difference value SUMC corresponds to the phase difference of the response signal of the left part of the standard clock signal is 45 degrees, the phase of the low frequency disturbance signal is shifted to the left by 45 degrees, and the degree of the phase is Reduce it by 45 degrees.
步骤 408:判断两个表征值之间的表征差值是否小于预定阔值,如果小于, 5 则执行步骤 409; 否则说明没有发生相位偏移, 结束调整或重新执行步骤 401。  Step 408: Determine whether the difference between the two representative values is less than a predetermined threshold. If it is less than 5, perform step 409; otherwise, indicate that no phase offset occurs, end the adjustment or re-execute step 401.
以图 7为例, 如果出现小于阔值的情况, 出现如图 7所示的波形示意图, 这时在标准时钟波形(即方波)的响应信号在无阴影的区域内为负向, 因此记 釆样结果 SUMA为负值,在有阴影的区域内响应信号的抽样结果记为 SUMB, 获得 SUMB为正值。 SUMA减去 SUMB的结果 SUMC是必小于阔值 0的负 !0 值。  Taking Figure 7 as an example, if there is a case smaller than the threshold value, a waveform diagram as shown in Fig. 7 appears. At this time, the response signal of the standard clock waveform (ie, square wave) is negative in the unshaded area, so The sample result SUMA is a negative value, and the sampling result of the response signal in the shaded area is recorded as SUMB, and the SUMB is obtained as a positive value. SUMA minus SUMB results SUMC is a negative !0 value that must be less than the threshold 0.
步骤 409: 将低频扰动时钟的相位向右偏移相应的度数。  Step 409: Offset the phase of the low frequency disturbance clock to the right by a corresponding degree.
将低频扰动时钟的相位向右调节时,需要获得表征差值与预定阔值之间的 调整差值, 通过调整差值移动相应的度数。  When the phase of the low frequency disturbance clock is adjusted to the right, the adjustment difference between the characteristic difference value and the predetermined threshold value needs to be obtained, and the corresponding degree is moved by adjusting the difference value.
在本实施例中, 可按照得出的差值 SUMC获得相对应的相位度数, 并将 !5 低频扰动信号的相位增加相应的度数, 使低频扰动信号的波形向右偏移。  In this embodiment, the corresponding phase degree can be obtained according to the obtained difference SUMC, and the phase of the !5 low frequency disturbance signal is increased by the corresponding degree, so that the waveform of the low frequency disturbance signal is shifted to the right.
至此, 该实施例中的相位调节过程结束。  So far, the phase adjustment process in this embodiment ends.
本领域普通技术人员可以理解,实现上述实施例方法中的全部或部分步骤 是可以通过程序来执行指令相关的硬件来完成,所述的程序可以存储于一计算 机可读介质中, 所述存储介质, 如: ROM/RAM、 磁碟、 光盘等。 上面的实施例详细说明调节相位差的过程, 下面给出实施例二, 即实现上 述相位差调整过程的装置实施例, 参见图 8 , 该实施例中, 相位调整的装置包 括: 信号提取单元 801、 标准时钟单元 802、 釆样单元 803、 运算单元 804、 判 断单元 805、 调整单元 806 , 其中: It will be understood by those skilled in the art that all or part of the steps of the foregoing embodiments may be implemented by executing the instruction-related hardware by a program, and the program may be stored in a computer readable medium, the storage medium. Such as: ROM / RAM, disk, CD, etc. The above embodiment details the process of adjusting the phase difference. The following is a second embodiment of the apparatus for implementing the phase difference adjustment process. Referring to FIG. 8, the phase adjustment apparatus includes: a signal extraction unit 801. , a standard clock unit 802, a sample unit 803, an operation unit 804, a determination unit 805, and an adjustment unit 806, wherein:
5 信号提取单元 801 , 用于获得包含低频扰动信号的响应信号, 根据所述响 应信号得到具有低频扰动信号频率的响应信号; a signal extraction unit 801, configured to obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
标准时钟单元 802 , 用于将预定长度的标准时钟周期划分出两个相等的时 隙并提供标准时钟信号; 其中, 所述响应信号与所述标准时钟同步时, 所述两 个时隙内的响应信号波形对称;  a standard clock unit 802, configured to divide a standard clock period of a predetermined length into two equal time slots and provide a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
0 釆样单元 803 , 用于在所述时隙内通过釆样时钟对所述低频扰动信号频率 的响应信号进行釆样;在所述划分的两个时隙内,获取所述响应信号的釆样值; 运算单元 804 , 用于利用每个时隙内的所有釆样值获得表征值, 获得两个 表征值之间的表征差值, 获得所述表征差值与预定阔值之间的调整差值; a sampling unit 803, configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and acquiring the response signal in the divided two time slots The calculation unit 804 is configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment between the characterization difference value and a predetermined threshold value. Difference
判断单元 805 , 用于判断所述调整差值是否超过预定阔值, 并得到判断结 The determining unit 805 is configured to determine whether the adjusted difference exceeds a predetermined threshold, and obtain a judgment knot
5 果; 5 fruit;
调整单元 806 , 按照所述判断结果、 所述调整差值, 将所述低频扰动信号 的相位移动相应的角度。  The adjusting unit 806 moves the phase of the low frequency disturbance signal by a corresponding angle according to the determination result and the adjustment difference.
其中,所述运算单元 804利用每个时隙内的所有釆样值获得表征值的过程 包括:  The process by which the operation unit 804 obtains the characterization value by using all the sample values in each time slot includes:
!0 将每个时隙内的所有釆样值进行和、 差、 积、 对数、 积分任意一种数学运 算或其组合运算获得表征值。  !0 Combine all the sample values in each time slot with the sum, difference, product, logarithm, and integral mathematical operations or a combination of them to obtain the characterization value.
其中, 所述调整单元 806包括:  The adjusting unit 806 includes:
第一调整单元 807 , 用于所述判断结果为差值大于所述预定阔值时, 按照 所述差值将所述低频扰动信号的相位减少相应的角度;  a first adjusting unit 807, configured to: when the determining result is that the difference is greater than the predetermined threshold, reduce a phase of the low frequency disturbance signal by a corresponding angle according to the difference;
!5 第二调整单元 808 , 用于所述判断结果为所述调整差值小于所述阔值时, 按照所述差值将所述低频扰动信号的相位增加相应的角度。 The second adjustment unit 808 is configured to increase the phase of the low frequency disturbance signal by a corresponding angle according to the difference when the determination result is that the adjustment difference is less than the threshold.
此处需要说明一点, 在实际应用中也可以将判断单元 805和调整单元 806 的功能集成在一个单元上予以实现。  It should be noted here that the functions of the determining unit 805 and the adjusting unit 806 can be integrated into one unit in practical applications.
本发明实施例中的方法和装置能够调节低频扰动信号和响应信号之间的 相位差,使低频扰动信号和响应信号之间的相位差保持同步。且可通过多种方 式获得表征值, 计算方式灵活, 易于实现, 相位差的控制精度准确。 The method and apparatus in embodiments of the present invention are capable of adjusting between a low frequency disturbance signal and a response signal The phase difference keeps the phase difference between the low frequency disturbance signal and the response signal synchronized. The characterization value can be obtained in a variety of ways, the calculation method is flexible, easy to implement, and the phase difference control precision is accurate.
上述的相位调整的装置可用于各类电子设备的当中, 如应用于光调制器 中,但不局限于光调制器。 下面给出本发明的装置应用与光调制器时的实施例 参见图 9, 图 9是光调制器的结构图, 该实施例的光调制器包括输入装置 901、 偏置电压控制装置 902、 相位调整装置 903、 光电转换装置 904, 其中, 光调制器可以是 MZ调制器。  The above-described phase adjustment device can be used in various types of electronic devices, such as in a light modulator, but is not limited to a light modulator. Referring now to FIG. 9 for an embodiment of the apparatus application and optical modulator of the present invention, FIG. 9 is a structural diagram of a light modulator including an input device 901, a bias voltage control device 902, and a phase. The adjusting device 903, the photoelectric conversion device 904, wherein the light modulator may be an MZ modulator.
输入装置 901 , 用于将低频扰动信号和 RF信号输入到光调制器中; 0 光电转换装置 904,用于将获得调制后的存在低频扰动信号的光响应信号, 并将光响应信号转换为响应信号;  An input device 901, configured to input a low frequency disturbance signal and an RF signal into the light modulator; 0 a photoelectric conversion device 904, configured to obtain a modulated optical response signal having a low frequency disturbance signal, and convert the optical response signal into a response Signal
相位调整装置 903 , 包括: 信号提取单元 905、 标准时钟单元 906、 釆样 单元 907、 运算单元 908、 判断单元 909、 调整单元 910;  The phase adjustment device 903 includes: a signal extraction unit 905, a standard clock unit 906, a sample unit 907, an operation unit 908, a determination unit 909, and an adjustment unit 910;
信号提取单元 905 , 用于从所述光电转换装置 904获得包含低频扰动信号 5 的响应信号, 根据所述响应信号得到具有低频扰动信号频率的响应信号;  a signal extracting unit 905, configured to obtain, from the photoelectric conversion device 904, a response signal including the low frequency disturbance signal 5, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
标准时钟单元 906 , 用于将预定长度的标准时钟周期划分出两个相等的时 隙并提供标准时钟信号; 其中, 所述响应信号与所述标准时钟同步时, 所述两 个时隙内的响应信号波形对称;  a standard clock unit 906, configured to divide a standard clock period of a predetermined length into two equal time slots and provide a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
釆样单元 907 , 用于在所述时隙内通过釆样时钟对所述低频扰动信号频率 !0 的响应信号进行釆样;在所述划分的两个时隙内,获取所述响应信号的釆样值; 运算单元 908 , 用于利用每个时隙内的所有釆样值获得表征值, 获得两个 表征值之间的表征差值, 获得所述表征差值与预定阔值之间的调整差值;  a sampling unit 907, configured to: in the time slot, the response signal of the low frequency disturbance signal frequency !0 is sampled by the sampling clock; in the divided two time slots, acquiring the response signal The operation unit 908 is configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain a relationship between the characterization difference value and a predetermined threshold value. Adjust the difference;
判断单元 909 , 用于判断所述调整差值是否超过预定阔值, 并得到判断结 果;  The determining unit 909 is configured to determine whether the adjusted difference exceeds a predetermined threshold, and obtain a judgment result;
!5 调整单元 910 , 按照所述判断结果、 所述调整差值将所述低频扰动信号的 相位移动相应的角度;  !5 adjusting unit 910, moving the phase of the low frequency disturbance signal by a corresponding angle according to the determination result and the adjustment difference;
偏置电压控制装置 902, 用于通过对所述低频扰动信号、 所述响应信号进 行同步解调计算, 利用计算结果提高或降低偏置电压。  The bias voltage control device 902 is configured to increase or decrease the bias voltage by using the calculation result by performing synchronous demodulation calculation on the low frequency disturbance signal and the response signal.
其中, 所述调整单元 910包括: 第一调整单元 911 , 用于所述判断结果为所述调整差值大于所述预定阔值 时, 按照所述差值将所述低频扰动信号的相位减少相应的角度; The adjusting unit 910 includes: a first adjusting unit 911, configured to: when the determining result is that the adjustment difference is greater than the predetermined threshold, reduce a phase of the low frequency disturbance signal by a corresponding angle according to the difference;
第二调整单元 912, 用于所述判断结果为所述调整差值小于所述预定阔值 时, 按照所述差值将所述低频扰动信号的相位增加相应的角度。  The second adjusting unit 912 is configured to: when the determining result is that the adjustment difference is less than the predetermined threshold, increase a phase of the low frequency disturbance signal by a corresponding angle according to the difference.
此处需要说明一点, 在实际应用中也可以将判断单元 805和调整单元 806 的功能集成在一个单元上予以实现。  It should be noted here that the functions of the determining unit 805 and the adjusting unit 806 can be integrated into one unit in practical applications.
在该实施例中, 可不间断调节相位差; 还可添加控制开关, 当偏置电压不 稳定时执行调节相位差的工作。  In this embodiment, the phase difference can be adjusted without interruption; a control switch can also be added to perform the operation of adjusting the phase difference when the bias voltage is not stable.
本发明实施例中的光调制器能够低频扰动信号和响应信号进行计算,利用 计算结果提高或降低偏置电压,使光调制器的偏置电压、 功率工作在稳定的工 作点, 从而输出稳定的光调制信号。  The optical modulator in the embodiment of the invention can calculate the low frequency disturbance signal and the response signal, and use the calculation result to increase or decrease the bias voltage, so that the bias voltage and power of the light modulator operate at a stable working point, so that the output is stable. Optical modulation signal.
对于本领域技术人员而言,能够通过多种现有的方式实现偏置电压控制装 置的计算过程,如通过低频扰动信号、 响应信号的幅度关系计算偏置电压的偏 离值; 还有通过控制偏置电压工作在如图 1所示的 MAX或 MIN时计算偏置 电压的偏离值以进行相应调节的技术。这些技术均可通过本发明实施例中的方 案进行相位控制, 以实现对偏置电压较稳定的控制。  For those skilled in the art, the calculation process of the bias voltage control device can be implemented in various existing ways, such as calculating the deviation value of the bias voltage by the amplitude relationship of the low frequency disturbance signal and the response signal; The technique of calculating the deviation value of the bias voltage when the voltage is operated at MAX or MIN as shown in FIG. 1 to perform corresponding adjustment. These techniques can be phase controlled by the scheme in the embodiment of the present invention to achieve relatively stable control of the bias voltage.
对于本发明各个实施例中所阐述的方法、装置和光调制器, 凡在本发明的 精神和原则之内, 所作的任何修改、 等同替换、 改进等, 均应包含在本发明的 保护范围之内。  For the methods, devices, and optical modulators set forth in the various embodiments of the present invention, any modifications, equivalents, improvements, etc. within the spirit and scope of the present invention are intended to be included in the scope of the present invention. .

Claims

权 利 要 求 Rights request
1、 一种相位调整的方法, 其特征在于, 包括:  A method for phase adjustment, comprising:
获得包含低频扰动信号的响应信号 ,根据所述响应信号得到具有低频扰动 信号频率的响应信号;  Obtaining a response signal including a low frequency disturbance signal, and obtaining a response signal having a frequency of the low frequency disturbance signal according to the response signal;
5 将预定长度的标准时钟周期划分出两个相等的时隙,在所述时隙内通过釆 样时钟对所述低频扰动信号频率的响应信号进行釆样; 其中, 所述响应信号与 所述标准时钟同步时, 所述两个时隙内的响应信号波形对称;  5 dividing a standard clock period of a predetermined length into two equal time slots, wherein the response signal of the low frequency disturbance signal frequency is sampled by the sample clock in the time slot; wherein the response signal is When the standard clock is synchronized, the waveforms of the response signals in the two time slots are symmetrical;
在所述划分的两个时隙内, 获取所述响应信号的釆样值;  Obtaining a sample value of the response signal in the two time slots of the dividing;
利用每个时隙内的所有釆样值获得表征值,获得两个表征值之间的表征差 The characterization value is obtained by using all the sample values in each time slot, and the characterization difference between the two characterization values is obtained.
0 值; 0 value;
获得所述表征差值与预定阔值之间的调整差值,按照所述调整差值将所述 低频扰动信号的相位移动相应的角度。  Obtaining an adjustment difference between the characteristic difference value and a predetermined threshold value, and shifting the phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference value.
2、 根据权利要求 1所述的方法, 其特征在于, 利用每个时隙内的所有釆 样值获得表征值的过程包括:  2. The method according to claim 1, wherein the process of obtaining the characterization value by using all the sample values in each time slot comprises:
5 将每个时隙内的所有釆样值进行和、 差、 积、 对数、 积分中的任意一种数 学运算或其组合运算获得表征值。  5 Perform all the numerical values in each time slot for each of the sum, difference, product, logarithm, and integral arithmetic operations or a combination thereof to obtain the characterization value.
3、 根据权利要求 1所述的方法, 其特征在于, 按照所述调整差值将所述 低频扰动信号的相位移动相应的角度的步骤包括:  3. The method according to claim 1, wherein the step of moving the phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference comprises:
当所述表征差值大于所述预定阔值时,按照所述调整差值将所述低频扰动 !0 信号的相位减少相应的角度;  And when the characterization difference is greater than the predetermined threshold, reducing a phase of the low frequency disturbance !0 signal by a corresponding angle according to the adjustment difference;
当所述表征差值小于所述预定阔值时,按照所述调整差值将所述低频扰动 信号的相位增加相应的角度。  When the characterization difference is less than the predetermined threshold, the phase of the low frequency disturbance signal is increased by a corresponding angle according to the adjustment difference.
4、 根据权利要求 1所述的方法, 其特征在于, 所述预定阔值为, 所述响 应信号与所述标准时钟同步时所获得的表征差值。  4. The method according to claim 1, wherein the predetermined threshold is a characterization difference obtained when the response signal is synchronized with the standard clock.
!5 !5
5、 一种相位调整的装置, 其特征在于, 包括: 5. A phase adjustment device, comprising:
信号提取单元, 用于获得包含低频扰动信号的响应信号,根据所述响应信 号得到具有低频扰动信号频率的响应信号;  a signal extracting unit, configured to obtain a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
标准时钟单元,用于将预定长度的标准时钟周期划分出两个相等的时隙并 提供标准时钟信号; 其中, 所述响应信号与所述标准时钟同步时, 所述两个时 隙内的响应信号波形对称; a standard clock unit, configured to divide a standard clock period of a predetermined length into two equal time slots and provide a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two times The waveform of the response signal in the gap is symmetrical;
釆样单元,用于在所述时隙内通过釆样时钟对所述低频扰动信号频率的响 应信号进行釆样; 在所述划分的两个时隙内, 获取所述响应信号的釆样值; 运算单元, 用于利用每个时隙内的所有釆样值获得表征值, 获得两个表征 5 值之间的表征差值, 获得所述表征差值与预定阔值之间的调整差值;  a sampling unit, configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and obtaining the sample value of the response signal in the divided two time slots And an operation unit, configured to obtain a characterization value by using all the sample values in each time slot, obtain a characterization difference between the two characterization values, and obtain an adjustment difference between the characterization difference value and a predetermined threshold value; ;
调整单元,用于根据所述调整差值将所述低频扰动信号的相位移动相应的 角度。  And an adjusting unit, configured to move a phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference.
6、 根据权利要求 5所述的装置, 其特征在于, 所述运算单元利用每个时 隙内的所有釆样值获得表征值的过程包括:  6. The apparatus according to claim 5, wherein the calculating unit obtains the characterization value by using all the sample values in each time slot comprises:
0 将每个时隙内的所有釆样值进行和、 差、 积、 对数、 积分中的任意一种数 学运算或其组合运算获得表征值。  0 All the sample values in each time slot are subjected to any of the mathematical operations of the sum, difference, product, logarithm, and integral, or a combination thereof to obtain a characterization value.
7、 根据权利要求 5所述的装置, 其特征在于, 所述调整单元包括: 第一调整单元, 用于当确定所述调整差值大于所述预定阔值时,按照所述 差值将所述低频扰动信号的相位减少相应的角度;  The device according to claim 5, wherein the adjusting unit comprises: a first adjusting unit, configured to: when determining that the adjusted difference is greater than the predetermined threshold, according to the difference Determining the phase of the low frequency disturbance signal by a corresponding angle;
5 第二调整单元, 用于当确定所述调整差值小于所述预定阔值时,按照所述 差值将所述低频扰动信号的相位增加相应的角度。 And a second adjusting unit, configured to increase a phase of the low frequency disturbance signal by a corresponding angle according to the difference when determining that the adjustment difference is less than the predetermined threshold.
8、 一种光调制器, 其特征在于, 包括:  8. A light modulator, comprising:
输入装置, 用于将低频扰动信号和高频数据 RF信号输入到光调制器中; 光电转换装置, 用于获得调制后的存在低频扰动信号的光响应信号, 并将 !0 光响应信号转换为响应信号;  An input device, configured to input a low frequency disturbance signal and a high frequency data RF signal into the light modulator; a photoelectric conversion device, configured to obtain a modulated optical response signal having a low frequency disturbance signal, and convert the !0 optical response signal into Response signal
相位调整装置, 包括:  Phase adjustment device, including:
信号提取单元,用于从所述光电转换装置获得包含低频扰动信号的响应信 号, 根据所述响应信号得到具有低频扰动信号频率的响应信号;  a signal extracting unit, configured to obtain, from the photoelectric conversion device, a response signal including a low frequency disturbance signal, and obtain a response signal having a frequency of the low frequency disturbance signal according to the response signal;
标准时钟单元,用于将预定长度的标准时钟周期划分出两个相等的时隙并 !5 提供标准时钟信号; 其中, 所述响应信号与所述标准时钟同步时, 所述两个时 隙内的响应信号波形对称;  a standard clock unit for dividing a standard clock period of a predetermined length into two equal time slots and providing a standard clock signal; wherein, when the response signal is synchronized with the standard clock, the two time slots are The response signal waveform is symmetrical;
釆样单元,用于在所述时隙内通过釆样时钟对所述低频扰动信号频率的响 应信号进行釆样; 在所述划分的两个时隙内, 获取所述响应信号的釆样值; 运算单元, 用于利用每个时隙内的所有釆样值获得表征值, 获得两个表征 值之间的表征差值, 获得所述表征差值与预定阔值之间的调整差值; 调整单元,用于根据所述调整差值将所述低频扰动信号的相位移动相应的 角度; a sampling unit, configured to: in the time slot, the response signal of the low frequency disturbance signal frequency is sampled by the sampling clock; and obtaining the sample value of the response signal in the divided two time slots An arithmetic unit for obtaining a characterization value using all the sample values in each time slot to obtain two characterizations Determining a difference between the values, obtaining an adjustment difference between the characteristic difference value and a predetermined threshold value; adjusting unit, configured to move a phase of the low frequency disturbance signal by a corresponding angle according to the adjustment difference value;
偏置电压控制装置, 用于通过对所述低频扰动信号、所述响应信号进行同 步解调计算, 利用计算结果提高或降低偏置电压。  And a bias voltage control device configured to increase or decrease the bias voltage by using the calculation result by performing synchronous demodulation calculation on the low frequency disturbance signal and the response signal.
9、 根据权利要求 8所述的光调制器, 其特征在于, 所述调整单元包括: 第一调整单元, 用于所述当确定所述调整差值大于所述预定阔值时,按照 所述差值将所述低频扰动信号的相位减少相应的角度;  The light modulator according to claim 8, wherein the adjusting unit comprises: a first adjusting unit, configured to: when determining that the adjusted difference is greater than the predetermined threshold, according to the The difference reduces the phase of the low frequency disturbance signal by a corresponding angle;
第二调整单元, 用于所述当确定所述调整差值小于所述预定阔值时,按照 所述差值将所述低频扰动信号的相位增加相应的角度。  a second adjusting unit, configured to: when determining that the adjustment difference is less than the predetermined threshold, increase a phase of the low frequency disturbance signal by a corresponding angle according to the difference.
10、 根据权利要求 8所述的光调制器, 其特征在于, 所述光调制器为马赫 -曾德尔调制器。  10. The light modulator of claim 8, wherein the light modulator is a Mach-Zehnder modulator.
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101794001B (en) * 2010-01-22 2012-04-04 苏州旭创科技有限公司 Design method for novel radio frequency analog SFP module
CN101808063B (en) * 2010-03-30 2014-01-01 中兴通讯股份有限公司 Method and device for controlling phase delay bias point of modulator
CN102834770A (en) * 2011-04-14 2012-12-19 华为技术有限公司 Optical modulation method and system
CN108345554B (en) * 2017-01-22 2020-08-21 联发科技股份有限公司 Method for determining sampling phase of sampling clock signal and related electronic device
CN109257103A (en) * 2018-09-30 2019-01-22 武汉联特科技有限公司 A kind of control method and system of M-Z modulator stabilization of operating point
CN112887010B (en) * 2021-01-22 2022-07-19 中国人民解放军国防科技大学 Inter-satellite link signal level cooperative communication method and device and computer equipment

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000122015A (en) * 1998-10-20 2000-04-28 Nippon Hoso Kyokai <Nhk> Optical modulator
CN1254851A (en) * 1998-11-25 2000-05-31 富士通株式会社 Optical modulator and method for controlling optical modulator
CN2517183Y (en) * 2001-11-27 2002-10-16 华为技术有限公司 Optical signal modulation device of optical communication system
CN1253756C (en) * 2002-04-05 2006-04-26 株式会社东芝 Light modulator, light signal transmitting apparatus and method for controlling light modulator
EP1696570A2 (en) * 2002-07-30 2006-08-30 Sanyo Denki Co., Ltd. Synchronised sinusoidal signal controller
CN1954499A (en) * 2004-05-17 2007-04-25 三菱电机株式会社 Phase locked loop (PLL) circuit, its phasing method and operation analyzing method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000122015A (en) * 1998-10-20 2000-04-28 Nippon Hoso Kyokai <Nhk> Optical modulator
CN1254851A (en) * 1998-11-25 2000-05-31 富士通株式会社 Optical modulator and method for controlling optical modulator
CN2517183Y (en) * 2001-11-27 2002-10-16 华为技术有限公司 Optical signal modulation device of optical communication system
CN1253756C (en) * 2002-04-05 2006-04-26 株式会社东芝 Light modulator, light signal transmitting apparatus and method for controlling light modulator
EP1696570A2 (en) * 2002-07-30 2006-08-30 Sanyo Denki Co., Ltd. Synchronised sinusoidal signal controller
CN1954499A (en) * 2004-05-17 2007-04-25 三菱电机株式会社 Phase locked loop (PLL) circuit, its phasing method and operation analyzing method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JIN G.C.: "New Progress and Applications of Phase Measuring Techniques", PHYSICS, vol. 22, no. 6, June 1993 (1993-06-01), pages 374 - 378 *
REN G.Z. ET AL.: "Phase Measurement Technology", ELECTRICAL MEASUREMENT & INSTRUMENTATION, no. 9, September 1990 (1990-09-01), pages 41 - 60 *

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