WO2009002073A1 - Method for fabricating semiconductor device - Google Patents

Method for fabricating semiconductor device Download PDF

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Publication number
WO2009002073A1
WO2009002073A1 PCT/KR2008/003580 KR2008003580W WO2009002073A1 WO 2009002073 A1 WO2009002073 A1 WO 2009002073A1 KR 2008003580 W KR2008003580 W KR 2008003580W WO 2009002073 A1 WO2009002073 A1 WO 2009002073A1
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WO
WIPO (PCT)
Prior art keywords
layer
type clad
clad layer
nitride
dimensional nanostructure
Prior art date
Application number
PCT/KR2008/003580
Other languages
French (fr)
Inventor
Jae Eung Oh
Moon Deock Kim
Original Assignee
Wooreelst Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wooreelst Co., Ltd. filed Critical Wooreelst Co., Ltd.
Publication of WO2009002073A1 publication Critical patent/WO2009002073A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Definitions

  • the present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for fabricating a semiconductor device in which a buffer layer having a 3 -dimensional nanostructure is used instead of a conventional buffer layer having a 2-dimensional thin film with a discontinuous surface when a I ⁇ -N-based heterogeneous bonding thin film is grown to fabricate a light emitting device such as a light emitting diode or a laser diode.
  • IH-N gallium nitride (GaN)
  • LED light emitting diode
  • UV ultraviolet
  • the light emitting diode is formed by sequentially growing a buffer layer of a gallium nitride thin film, a clad layer, an active layer and the like on a substrate.
  • the substrate for growing the gallium nitride thin film is a single crystalline gallium nitride substrate.
  • a heterogeneous substrate such as a sapphire (Al 2 O 3 ), silicon carbide (SiC) or silicon (Si), which is relatively easy to be acquired and has a low price, is widely used.
  • a gallium nitride layer serving as an epitaxial layer on a heterogeneous substrate such as a sapphire (Al 2 O 3 ), silicon carbide (SiC) or silicon (Si)
  • a seed buffer layer serving as a seed of crystallization is further grown on the heterogeneous substrate, thereby fabricating the light emitting device.
  • FIGs. 1 to 4 illustrate cross-sectional views showing the steps of the conventional method for fabricating a light emitting device.
  • a buffer layer 11, an n-type clad layer 12, an active layer 13 and a p-type clad layer 14 are sequentially formed on a heterogeneous substrate 10 such as a sapphire (Al 2 O 3 ), silicon carbide (SiC) or silicon (Si).
  • a heterogeneous substrate 10 such as a sapphire (Al 2 O 3 ), silicon carbide (SiC) or silicon (Si).
  • the buffer layer 11 is formed as a nitride semiconductor such as aluminum nitride (AlN), gallium nitride, or an alloy thereof having a thickness of 100 to 500 A at a temperature of 380 to 800 "C, which is disclosed in US Patent No. 5,122,845 and other Publication documents.
  • AlN aluminum nitride
  • gallium nitride or an alloy thereof having a thickness of 100 to 500 A at a temperature of 380 to 800 "C, which is disclosed in US Patent No. 5,122,845 and other Publication documents.
  • the n-type clad layer 12 and the p-type clad layer 14 are formed of gallium nitride.
  • the n-type clad layer 12 is a semiconductor layer formed of a gallium nitride or nitride semiconductor doped with n-type impurities.
  • the p-type clad layer 14 is formed of a gallium nitride or nitride semiconductor doped with p-type impurities.
  • the active layer 13 is formed by a quantum well formed of In x Ga 1-x N (0 ⁇ x ⁇ 1) and a composition thereof.
  • the n-type clad layer 12 serves to supply electrons to the active layer 13.
  • the p-type clad layer 14 serves to supply holes to the active layer 13.
  • the active layer 13 recombines the electrons and the holes supplied from the n-type clad layer 12 and the p-type clad layer 14 to convert extra energy into light.
  • an ohmic contact layer 15 is formed as a transparent conductive layer on the p-type clad layer 14.
  • a first electrode 16a and a second electrode 16b are formed on the ohmic contact layer 15 and the exposed n-type clad layer 12, respectively, thereby completing a light emitting diode.
  • the conventional method for fabricating a light emitting diode has the following problems.
  • the lattice mismatching is generated between the buffer layer and the heterogeneous substrate.
  • the heterogeneous substrate is a silicon (Si) substrate and the buffer layer is an aluminum nitride film
  • a lattice mismatching of about 18.9 % is generated between the two layers.
  • the heterogeneous substrate is an aluminum oxide (sapphire) substrate and the buffer layer is a gallium nitride (GaN) film
  • the lattice mismatching of about 16.9 % is generated between the two layers.
  • An object of the present invention devised to solve the problem lies on a method for fabricating a semiconductor device capable of minimizing defects between the heterogeneous substrate and the nitride-based layer to grow a nitride- based thin film having good quality by introducing a 3 -dimensional nanostructure which reduces lattice mismatching of the heterogeneous bonding structure, thereby providing a semiconductor device having long lifetime and excellent light emitting characteristics.
  • the object of the present invention can be achieved by providing a method for fabricating a semiconductor device comprising: forming a buffer layer having a 3-dimensional nanostructure using a nitride-based material on a heterogeneous substrate; sequentially forming a n-type clad layer, an active layer and a p-type clad layer on the heterogeneous substrate with the buffer layer; mesa etching specific portions of the p-type clad layer, the active layer and the n-type clad layer to expose the n-type clad layer; forming an ohmic contact layer made of a transparent material on the p-type clad layer; and forming electrodes on the ohmic contact layer and the n-type clad layer, respectively.
  • the method for fabricating a semiconductor device according to the present invention has the following effects.
  • the 3-dimensional nanostructure having a defect-free magnetic lattice constant is used in the buffer layer, stress of the n-type clad layer, the active layer and the p-type clad layer formed thereon is relieved and it has a clearance space to reduce a difference in the lattice constant, thereby offering a structure with few defects and improving the light emitting characteristics of the light emitting device.
  • FIGs. 1 to 4 illustrate cross-sectional views showing the steps of a conventional method for fabricating a light emitting device.
  • FIGs. 5 to 9 illustrate cross-sectional views showing the steps for fabricating a light emitting device according to an embodiment of the present invention.
  • FIG. 10 is an atomic force microscopy (AFM) photograph showing the surface of a nitride-based 3-dimensional buffer layer according to the present invention.
  • AFM atomic force microscopy
  • FIG. 11 is a graph showing variation in a lattice constant according to formation of a 3-dimensional nanostructure according to the present invention.
  • FIG. 12 is an exemplary diagram showing a concept of growth of a nitride- based thin film using the buffer layer having the 3-dimensional nanostructure according to the present invention.
  • FIGs. 5 to 9 illustrate cross-sectional views showing the steps for fabricating a light emitting device according to an embodiment of the present invention.
  • a buffer layer 21 having a 3-dimensional nanostructure is formed of a nitride-based material such as aluminum nitride, gallium nitride, indium nitride, or an alloy thereof on a heterogeneous substrate 20 such as a sapphire
  • the self-assembled method is a method for growing a nitride- based material discontinuously (in an insular shape) on the substrate by adjusting a composition ratio of a compound of the nitride-based material or by adjusting growth conditions (temperature, reaction gas, growth time and the like) of the apparatus.
  • the patterning method is a method for growing a nitride-based material layer on the substrate and selectively removing the nitride-based material layer in an insular shape by a general photolithography.
  • the 3-dimensional nanostructure has a size formed by the self-assembled method or the patterning method, representing quantum characteristics in physics and having a width of 1000 A or less and a height of 500 A or less.
  • the buffer layer 21 having the 3-dimensional nanostructure has a defect-free magnetic lattice constant.
  • the nitride-based material employs any one of IH-N group compounds such as AlN, InN, GaN, Al(i -X )Ga( X )N, In x Ga(i -X )N, and Al ⁇ Ga ⁇ In ⁇ N ⁇ . y) , or a structure using the same.
  • an n-type clad layer 22, an active layer 23 and a p-type clad layer 24 are sequentially formed on the heterogeneous substrate 20 with the buffer layer 21 having the 3-dimensional nanostructure.
  • the n-type clad layer 22, the active layer 23 and the p-type clad layer 24 are formed of any one of the above-mentioned III -N group compounds.
  • the n-type clad layer 22 is a nitride compound semiconductor layer doped with n-type impurities.
  • the p-type clad layer 24 is formed as a nitride compound semiconductor layer doped with p-type impurities.
  • the n-type clad layer 22 serves to supply electrons to the active layer 23.
  • the p-type clad layer 24 serves to supply holes to the active layer 23.
  • the active layer 23 recombines the electrons and the holes supplied from the n-type clad layer 22 and the p-type clad layer 24 to convert extra energy into light. Accordingly, as described above, the stress of the n-type clad layer 22, the active layer 23 and the p-type clad layer 24 is relieved, thereby providing a structure with few defects.
  • an ohmic contact layer 25 is formed as a transparent conductive layer on the p-type clad layer 24.
  • a first electrode 26a and a second electrode 26b are formed on the ohmic contact layer 25 and the exposed n-type clad layer 22, respectively, thereby completing a light emitting diode.
  • a first electrode and a second electrode are respectively formed on the ohmic contact layer 25 and the rear surface of the substrate 20, thereby completing a light emitting diode.
  • a first electrode may be formed on the rear surface of the n-type clad layer 22 by omitting the mesa etching process and removing the heterogeneous substrate 20, thereby fabricating a vertical light emitting device.
  • FIG. 10 is an atomic force microscopy (AFM) photograph showing the surface of the nitride-based 3 -dimensional buffer layer according to the present invention.
  • FIG. 11 is a graph showing variation in a lattice constant according to formation of the 3 -dimensional nanostructure according to the present invention.
  • FIG. 12 is an exemplary diagram showing a concept of growth of a nitride-based thin film using the buffer layer 21 having the 3 -dimensional nanostructure according to the present invention.

Abstract

A method for fabricating a semiconductor device, capable of minimizing defects between a heterogeneous substrate and a nitride-based layer to grow a nitride-based thin film having good quality by introducing a 3-dimensional nanostructure which reduces lattice mismatching of a heterogeneous bonding structure and providing a semiconductor device having long lifetime and excellent light emitting characteristics, is disclosed. The method includes forming a buffer layer having a 3 -dimensional nanostructure using a nitride-based material on a heterogeneous substrate, sequentially forming a n-type clad layer, an active layer and a p-type clad layer on the heterogeneous substrate with the buffer layer, mesa etching specific portions of the p-type clad layer, the active layer and the n-type clad layer to expose the n-type clad layer, forming an ohmic contact layer made of a transparent material on the p-type clad layer, and forming electrodes on the ohmic contact layer and the n-type clad layer, respectively.

Description

DESCRIPTION
TITLE OF INVENTION
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
TECHNICAL FIELD
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for fabricating a semiconductor device in which a buffer layer having a 3 -dimensional nanostructure is used instead of a conventional buffer layer having a 2-dimensional thin film with a discontinuous surface when a Iϋ-N-based heterogeneous bonding thin film is grown to fabricate a light emitting device such as a light emitting diode or a laser diode.
BACKGROUND ART
Generally, a IH-N (e.g., gallium nitride (GaN)) based light emitting diode (LED), which emits blue, green and ultraviolet (UV) light, is widely used in various application fields such as an electric signboard, a signal lamp, LCD back light and back light of a key pad of a mobile phone.
The light emitting diode is formed by sequentially growing a buffer layer of a gallium nitride thin film, a clad layer, an active layer and the like on a substrate. In this case, it is preferable that the substrate for growing the gallium nitride thin film is a single crystalline gallium nitride substrate. However, since the single crystalline gallium nitride substrate has difficulty in fabrication and a high price, a heterogeneous substrate such as a sapphire (Al2O3), silicon carbide (SiC) or silicon (Si), which is relatively easy to be acquired and has a low price, is widely used.
However, in a case of directly growing a gallium nitride layer serving as an epitaxial layer on a heterogeneous substrate such as a sapphire (Al2O3), silicon carbide (SiC) or silicon (Si), it is difficult to fabricate a light emitting device having good quality due to lattice mismatching. Accordingly, before the epitaxial layer is grown, a seed buffer layer serving as a seed of crystallization is further grown on the heterogeneous substrate, thereby fabricating the light emitting device.
A conventional method for fabricating a light emitting device on a heterogeneous substrate will be described with reference to the accompanying drawings.
FIGs. 1 to 4 illustrate cross-sectional views showing the steps of the conventional method for fabricating a light emitting device.
As shown in FIG. 1, a buffer layer 11, an n-type clad layer 12, an active layer 13 and a p-type clad layer 14 are sequentially formed on a heterogeneous substrate 10 such as a sapphire (Al2O3), silicon carbide (SiC) or silicon (Si).
In this case, the buffer layer 11 is formed as a nitride semiconductor such as aluminum nitride (AlN), gallium nitride, or an alloy thereof having a thickness of 100 to 500 A at a temperature of 380 to 800 "C, which is disclosed in US Patent No. 5,122,845 and other Publication documents.
The n-type clad layer 12 and the p-type clad layer 14 are formed of gallium nitride. The n-type clad layer 12 is a semiconductor layer formed of a gallium nitride or nitride semiconductor doped with n-type impurities. The p-type clad layer 14 is formed of a gallium nitride or nitride semiconductor doped with p-type impurities. The active layer 13 is formed by a quantum well formed of InxGa1-xN (0 < x < 1) and a composition thereof.
In this case, the n-type clad layer 12 serves to supply electrons to the active layer 13. The p-type clad layer 14 serves to supply holes to the active layer 13. The active layer 13 recombines the electrons and the holes supplied from the n-type clad layer 12 and the p-type clad layer 14 to convert extra energy into light.
As shown in FIG. 2, specific portions of the p-type clad layer 14, the active layer 13 and the n-type clad layer 12 are mesa-etched from the p-type clad layer 14 to a predetermined depth of the n-type clad layer 12, thereby exposing the n-type clad layer 12.
As shown in FIG. 3, an ohmic contact layer 15 is formed as a transparent conductive layer on the p-type clad layer 14.
As shown in FIG. 4, a first electrode 16a and a second electrode 16b are formed on the ohmic contact layer 15 and the exposed n-type clad layer 12, respectively, thereby completing a light emitting diode.
However, the conventional method for fabricating a light emitting diode has the following problems.
That is, even though the buffer layer is formed to prevent a heterogeneous bonding structure from occurring between the heterogeneous substrate and the nitride-based semiconductor layer, the lattice mismatching is generated between the buffer layer and the heterogeneous substrate. For example, when the heterogeneous substrate is a silicon (Si) substrate and the buffer layer is an aluminum nitride film, a lattice mismatching of about 18.9 % is generated between the two layers. When the heterogeneous substrate is an aluminum oxide (sapphire) substrate and the buffer layer is a gallium nitride (GaN) film, the lattice mismatching of about 16.9 % is generated between the two layers. When the lattice mismatching is generated between two materials, there is stress between the heterogeneous substrate and the nitride-based film, thereby causing many defects. Accordingly, it deteriorates light emitting characteristics of the light emitting device and has a bad influence on the lifetime of the light emitting device.
DISCLOSURE
TECHNICAL PROBLEM
An object of the present invention devised to solve the problem lies on a method for fabricating a semiconductor device capable of minimizing defects between the heterogeneous substrate and the nitride-based layer to grow a nitride- based thin film having good quality by introducing a 3 -dimensional nanostructure which reduces lattice mismatching of the heterogeneous bonding structure, thereby providing a semiconductor device having long lifetime and excellent light emitting characteristics.
TECHNICAL SOLUTION
The object of the present invention can be achieved by providing a method for fabricating a semiconductor device comprising: forming a buffer layer having a 3-dimensional nanostructure using a nitride-based material on a heterogeneous substrate; sequentially forming a n-type clad layer, an active layer and a p-type clad layer on the heterogeneous substrate with the buffer layer; mesa etching specific portions of the p-type clad layer, the active layer and the n-type clad layer to expose the n-type clad layer; forming an ohmic contact layer made of a transparent material on the p-type clad layer; and forming electrodes on the ohmic contact layer and the n-type clad layer, respectively.
ADVANTAGEOUS EFFECTS The method for fabricating a semiconductor device according to the present invention has the following effects.
That is, since the 3-dimensional nanostructure having a defect-free magnetic lattice constant is used in the buffer layer, stress of the n-type clad layer, the active layer and the p-type clad layer formed thereon is relieved and it has a clearance space to reduce a difference in the lattice constant, thereby offering a structure with few defects and improving the light emitting characteristics of the light emitting device.
DESCRIPTION OF DRAWINGS
The accompanying drawings, which are included to provide a further understanding of the invention, illustrate embodiments of the invention and together with the description serve to explain the principle of the invention. In the drawings: FIGs. 1 to 4 illustrate cross-sectional views showing the steps of a conventional method for fabricating a light emitting device.
FIGs. 5 to 9 illustrate cross-sectional views showing the steps for fabricating a light emitting device according to an embodiment of the present invention. FIG. 10 is an atomic force microscopy (AFM) photograph showing the surface of a nitride-based 3-dimensional buffer layer according to the present invention.
FIG. 11 is a graph showing variation in a lattice constant according to formation of a 3-dimensional nanostructure according to the present invention. FIG. 12 is an exemplary diagram showing a concept of growth of a nitride- based thin film using the buffer layer having the 3-dimensional nanostructure according to the present invention.
MODE FOR INVENTION
Hereinafter, a method for fabricating a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.
FIGs. 5 to 9 illustrate cross-sectional views showing the steps for fabricating a light emitting device according to an embodiment of the present invention.
As shown in FIG. 5, a buffer layer 21 having a 3-dimensional nanostructure is formed of a nitride-based material such as aluminum nitride, gallium nitride, indium nitride, or an alloy thereof on a heterogeneous substrate 20 such as a sapphire
(Al2O3), silicon (Si) or silicon carbide (SiC) in a domed, pyramidal, cylindrical, disk, or square shape by a self-assembled method or a patterning method using an apparatus enabling compound structure growth such as MBE, CVD, VPE and LPE.
In this case, the self-assembled method is a method for growing a nitride- based material discontinuously (in an insular shape) on the substrate by adjusting a composition ratio of a compound of the nitride-based material or by adjusting growth conditions (temperature, reaction gas, growth time and the like) of the apparatus.
Further, the patterning method is a method for growing a nitride-based material layer on the substrate and selectively removing the nitride-based material layer in an insular shape by a general photolithography. The 3-dimensional nanostructure has a size formed by the self-assembled method or the patterning method, representing quantum characteristics in physics and having a width of 1000 A or less and a height of 500 A or less. The buffer layer 21 having the 3-dimensional nanostructure has a defect-free magnetic lattice constant. When a IH-N-based thin film is formed on the buffer layer having the 3-dimensional nanostructure, stress of the DI-N-based thin film is relieved and it has a clearance space to reduce a difference in the lattice constant, thereby growing a structure with few defects.
The nitride-based material employs any one of IH-N group compounds such as AlN, InN, GaN, Al(i-X)Ga(X)N, InxGa(i-X)N, and Al^Ga^In^N^.y), or a structure using the same.
As shown in FIG. 6, an n-type clad layer 22, an active layer 23 and a p-type clad layer 24 are sequentially formed on the heterogeneous substrate 20 with the buffer layer 21 having the 3-dimensional nanostructure. The n-type clad layer 22, the active layer 23 and the p-type clad layer 24 are formed of any one of the above-mentioned III -N group compounds. The n-type clad layer 22 is a nitride compound semiconductor layer doped with n-type impurities. The p-type clad layer 24 is formed as a nitride compound semiconductor layer doped with p-type impurities.
In this case, the n-type clad layer 22 serves to supply electrons to the active layer 23. The p-type clad layer 24 serves to supply holes to the active layer 23. The active layer 23 recombines the electrons and the holes supplied from the n-type clad layer 22 and the p-type clad layer 24 to convert extra energy into light. Accordingly, as described above, the stress of the n-type clad layer 22, the active layer 23 and the p-type clad layer 24 is relieved, thereby providing a structure with few defects.
As shown in FIG. 7, specific portions of the p-type clad layer 24, the active layer 23 and the n-type clad layer 22 are mesa-etched from the p-type clad layer 24 to a predetermined depth of the n-type clad layer 22, thereby exposing the n-type clad layer 22.
As shown in FIG. 8, an ohmic contact layer 25 is formed as a transparent conductive layer on the p-type clad layer 24.
As shown in FIG. 9, a first electrode 26a and a second electrode 26b are formed on the ohmic contact layer 25 and the exposed n-type clad layer 22, respectively, thereby completing a light emitting diode.
In another way, a first electrode and a second electrode are respectively formed on the ohmic contact layer 25 and the rear surface of the substrate 20, thereby completing a light emitting diode.
Although a method for fabricating a light emitting diode on a substrate is illustrated in this embodiment, the present invention is not limited thereto. A first electrode may be formed on the rear surface of the n-type clad layer 22 by omitting the mesa etching process and removing the heterogeneous substrate 20, thereby fabricating a vertical light emitting device.
FIG. 10 is an atomic force microscopy (AFM) photograph showing the surface of the nitride-based 3 -dimensional buffer layer according to the present invention. FIG. 11 is a graph showing variation in a lattice constant according to formation of the 3 -dimensional nanostructure according to the present invention. FIG. 12 is an exemplary diagram showing a concept of growth of a nitride-based thin film using the buffer layer 21 having the 3 -dimensional nanostructure according to the present invention.
As seen from FIGs. 10 to 12, as the 3-dimensional nanostructure is used as in the present invention, it is possible to reduce variation in the lattice constant, thereby reducing defects.

Claims

[CLAIMS]
[Claim 1 ] A method for fabricating a semiconductor device comprising: forming a buffer layer having a 3 -dimensional nanostructure using a nitride- based material on a heterogeneous substrate; sequentially forming an n-type clad layer, an active layer and a p-type clad layer on the heterogeneous substrate with the buffer layer; mesa etching specific portions of the p-type clad layer, the active layer and the n-type clad layer to expose the n-type clad layer; forming an ohmic contact layer made of a transparent material on the p-type clad layer; and forming electrodes on the ohmic contact layer and the n-type clad layer, respectively.
[Claim 2] The method according to claim 1, wherein the buffer layer having the 3-dimensional nanostructure is formed in any one of domed, pyramidal, cylindrical, disk, and square shapes.
[Claim 3] The method according to claim 1, wherein the buffer layer having the 3-dimensional nanostructure is formed by a self-assembled method or a patterning method.
[Claim 4] The method according to claim 1, wherein the 3-dimensional nanostructure has a size having a width of 1000 A and a height of 500 A.
[Claim 5] The method according to claim 1, wherein the nitride-based material employs any one of III -N group compounds such as AlN, InN, GaN, Al(1-x)Ga(X)N, InxGa(1.X)N, and Al(x)Ga(1-x)In(y)N(i-y).
PCT/KR2008/003580 2007-06-26 2008-06-24 Method for fabricating semiconductor device WO2009002073A1 (en)

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JP2014506727A (en) * 2011-01-25 2014-03-17 エルジー イノテック カンパニー リミテッド Semiconductor device and semiconductor crystal growth method
CN111058083A (en) * 2019-11-29 2020-04-24 深圳大学 Micro-cavity structure electric machining method and device based on double machining stations

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KR101125327B1 (en) * 2011-01-25 2012-03-27 엘지이노텍 주식회사 Semiconductor device and method for growing semiconductor crystal
KR101042562B1 (en) * 2011-02-28 2011-06-20 박건 Nitride based light emitting device using wurtzite powder and method of manufacturing the same

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KR20040067125A (en) * 2003-01-21 2004-07-30 삼성전자주식회사 Manufacturing method of semiconductor device having high efficiency
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JP2014506727A (en) * 2011-01-25 2014-03-17 エルジー イノテック カンパニー リミテッド Semiconductor device and semiconductor crystal growth method
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CN111058083A (en) * 2019-11-29 2020-04-24 深圳大学 Micro-cavity structure electric machining method and device based on double machining stations
CN111058083B (en) * 2019-11-29 2021-07-06 深圳大学 Micro-cavity structure electric machining method and device based on double machining stations

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