WO2008150136A1 - Arc detecting apparatus and arc monitoring method using the same - Google Patents

Arc detecting apparatus and arc monitoring method using the same Download PDF

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Publication number
WO2008150136A1
WO2008150136A1 PCT/KR2008/003188 KR2008003188W WO2008150136A1 WO 2008150136 A1 WO2008150136 A1 WO 2008150136A1 KR 2008003188 W KR2008003188 W KR 2008003188W WO 2008150136 A1 WO2008150136 A1 WO 2008150136A1
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WO
WIPO (PCT)
Prior art keywords
arc
signal
comparison
current
electrical signal
Prior art date
Application number
PCT/KR2008/003188
Other languages
French (fr)
Inventor
Sang Won Lee
Hyung-Jun Kim
Jaehyun Kim
Sang Hun Seo
Yong Kwan Lee
Original Assignee
Plasmart Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plasmart Inc. filed Critical Plasmart Inc.
Priority to CN2008800193153A priority Critical patent/CN101702936B/en
Publication of WO2008150136A1 publication Critical patent/WO2008150136A1/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/26Plasma torches
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/145Indicating the presence of current or voltage
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32055Arc discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32055Arc discharge
    • H01J37/32064Circuits specially adapted for controlling the arc discharge
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/26Plasma torches
    • H05H1/32Plasma torches using an arc
    • H05H1/34Details, e.g. electrodes, nozzles
    • H05H1/3494Means for controlling discharge parameters

Definitions

  • the present invention relates to a discharge apparatus for generating plasma, and more particularly, to an arc detecting apparatus of a plasma generating apparatus for discharging plasma by the use of a radio frequency (RF) power supply, and an arc monitoring method using the same.
  • RF radio frequency
  • Plasma processing apparatuses are being widely used for semiconductor fabrication process, material surface processing, air pollutant processing, nuclear fusion, etc.
  • plasma processing apparatuses used in semiconductor fabrication process utilize an RF power supply mainly so as to generate plasma.
  • an arc causing the stability of plasma processing to be poor may be generated if there are structural defects or small particles in a discharge chamber.
  • the arc may lead other small particles to be generated, thus causing semiconductor devices to be failed.
  • the generation of the arc is monitored through analysis of optical properties of the plasma.
  • an optical monitoring method has a technical limitation in that it is difficult to determine an arc type. More specifically, the arc generated in the chamber may be classified into two types, of which one is a micro-arc that is allowable up to a predetermined level, and the other is a macro-arc necessitating an immediate response.
  • the optical monitoring method is difficult to provide information about the arc type.
  • a window for observing plasma emission should be formed on a sidewall of the chamber for optically monitoring the arc generation, however, contamination of the window, which deteriorates the stability of an optical signal, becomes serious as a processing time increases.
  • the present invention provides an arc detecting apparatus capable of monitoring arc generation and plasma processing in real time.
  • the present invention also provides an arc detecting apparatus capable of monitoring arc generation and plasma processing without modification of a chamber structure.
  • the present invention also provides a method for monitoring arc generation and plasma processing in real time.
  • the present invention also provides a method for monitoring arc generation and plasma processing without modification of a chamber structure.
  • Embodiments of the present invention provide arc detecting apparatuses including: a transmission line connected to a load, and transmitting an electrical signal of a current or voltage; a detector measuring the electrical signal of the current or voltage of the transmission line; and a processor processing the electrical signal to generate at least one arc detection signal, wherein the arc detection signal is generated corresponding to an arc generated in the load.
  • arc monitoring methods include: measuring an electrical signal of a current or voltage transmitted through a transmission signal connected to a load; generating at least one arc detection signal corresponding to an arc generated in the load by processing the electrical signal; determining an arc generation in the load through analysis of the arc detection signal; and determining an arc type through analysis of the arc detection signal.
  • FIG. 1 is block diagram illustrating a schematic configuration of an arc detecting apparatus according to an embodiment of the present invention
  • FIG. 2 is a block diagram illustrating a schematic configuration of a processor and a post-processor in FIG. 1;
  • FIG. 3 is a block diagram of a processor according to an embodiment of the present invention.
  • FIG. 4 is a flowchart illustrating an arc monitoring method according to embodiments of the present invention.
  • FIG. 5 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention.
  • FIG. 6 is a block diagram of a reference signal converter according to an embodiment of the present invention.
  • FIG. 7 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention.
  • FIG. 8 is a block diagram of a processor according to an embodiment of the present invention.
  • FIG. 9 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention.
  • FIG. 10 is a block diagram of a processor according to an embodiment of the present invention.
  • FIG. 11 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention.
  • FIG. 12 is a block diagram of a processor according to an embodiment of the present invention.
  • FIG. 13 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Mode for the Invention
  • An arc may be classified into a micro-arc and a macro-arc.
  • RF radio frequency
  • a duration of the macro-arc in plasma may be several nanoseconds, however, a duration of a current or voltage of the transmission line may be increased to several microseconds.
  • An electrical signal of the transmission line according to the generation of the macro-arc is perturbed from an electrical signal of a steady state.
  • a perturbation component caused by the generation of the macro-arc may be 100 KHz in a frequency space.
  • the matching network may be changed. Accordingly, when the macro-arc is generated, the input impedance of the power supply terminal may depend on a change of a load if the RF discharge is maintained.
  • both a current and a voltage of the transmission line may be decreased, and the RF discharge may be maintained well.
  • the generation of the micro-arc may be an early phenomenon occurring before the generation of the macro- arc.
  • durations of a current and a voltage of the transmission line may be several microseconds.
  • An electrical signal of the transmission line according to the generation of the micro- arc may be perturbed from an electrical signal of a steady state.
  • a perturbation component caused by the generation of the micro-arc may be 1 MHz in a frequency space.
  • the input impedance is restored to the original state in several microseconds, a matching network may not be varied. Accordingly, when the micro-arc is generated, the input impedance of the power supply terminal in the load direction may depend on a change of a load.
  • a duration of plasma characteristic variation which is not caused by the arc may be several milliseconds (msec) at the transmission line.
  • the matching network may be varied for the maximum power transmission according to the plasma characteristic variation.
  • the input impedance of the power supply terminal in the load direction may depend on the load and a variation of the matching network.
  • the arc is classified into a first type arc and a second type arc in the present disclosure.
  • the first type arc is defined as an arc generated in the case where a current of the transmission line is smaller than a current in a steady state.
  • the first type arc may include the micro-arc.
  • the second type arc is defined as an arc generated in the case where a current of the transmission line is larger than a current in the steady state.
  • the second type arc may include the macro-arc.
  • the electrical properties of the transmission line may be affected by the arc generation and the plasma characteristic variation. Therefore, it is necessary to distinguish the plasma characteristic variation and the arc from each other.
  • a duration of the plasma characteristics variation may be several hundreds of milliseconds, and a duration of the arc may be in the range of several microseconds to several hundreds of microseconds. Accordingly, to distinguish the plasma characteristic variation and the arc from each other, it is preferable to detect the arc generation by measuring a current and voltage of the transmission line, and a duration of variation thereof.
  • the arc generation may be detected using an input impedance of the transmission line, reflection coefficient, consumed power, and the like, this method is difficult to detect an arc type, and also difficult to distinguish the plasma characteristic variation and the arc with each other.
  • FIG. 1 is block diagram illustrating a schematic configuration of an arc detecting apparatus according to an embodiment of the present invention.
  • the arc detecting apparatus includes a load 24, an RF power supply 10 supplying power to the load 24, a transmission line 36, and a matching network 38.
  • the transmission line 36 and the matching network 38 may be disposed between the load 24 and the RF power supply 10.
  • a detector 22, which measures an electrical signal of a current or voltage of the transmission line 36, is disposed around the transmission line 36, and electrically connected to a processor 25 processing the electrical signal.
  • the arc detecting apparatus further includes a post-processor 32 that determines an arc generation and an arc type.
  • a controller 34 may control the arc detecting apparatus.
  • the RF power supply 10 supplies an input power to input terminals Nl and N2. Only a portion of the input power supplied through the transmission line 36 is consumed in the load 24, and the other portion is reflected toward the input terminals Nl and N2 from the load 24. Therefore, the matching network 38 is configured to transmit the maximum input power to the load 24, and may be disposed between the input terminals Nl and N2 and load terminals N3 and N4.
  • a driving frequency of the RF power supply 10 is selected from a range of 200 KHz to 500 MHz. In the embodiment of the present invention, the driving frequency may be 13.56 MHz.
  • the RF power supply 10 may be configured with one or more power supplies.
  • the first power supply may differ in driving frequency from the second power supply.
  • the first power supply and the second power supply may be connected to the same load.
  • a first matching network and a first detector may be disposed between the first power supply and the load
  • a second matching network and a second detector may be disposed between the second power supply and the load.
  • the first and second matching networks are combined into one, and then one detector may be disposed in front of the load.
  • An internal impedance of the RF power supply 10 may be 50 Ohm, and a characteristic impedance of the transmission line 36 may be 50 Ohm.
  • the transmission line 36 may include at least one of a coaxial cable, two wires, a strip line and a bus bar.
  • the load 24 is connected to the load terminals N3 and N4.
  • the load 24 may be an electrode or an antenna for generating plasma.
  • An impedance of the load 24 may be varied with time due to plasma characteristic variation or arc generation.
  • reactances of variable reactance elements 12 and 14 in the matching network 38 may be varied for the maximum input power transmission.
  • the detector 22 is provided to measure an electrical signal of the transmission line 36 connecting the input terminals Nl and N2 and the load terminals N3 and N4.
  • the detector 22 may be disposed between the load terminals N3 and N4 and the matching network 38, and disposed between the input terminals Nl and N2 and the matching network 38. Alternatively, the detector 22 may be disposed inside the matching network 38.
  • the detector 22 includes at least one sensor disposed around the transmission line 36.
  • the sensor may include at least one of a current measuring unit that measures a current flowing through the transmission line 36 to output a current signal SI, and a voltage measuring unit that measures a voltage of the transmission line 36 to output a voltage signal SV.
  • the current measuring unit may include a coil used to measure an induced electromotive force.
  • the current measuring unit may be a Rogowski coil used to measure an induced electromotive force.
  • the voltage measuring unit may be a voltage divider using an electrode or a resistor.
  • the processor 25 may include at least one of a current processor and a voltage processor.
  • the current processor may be configured such that it is connected to the current measuring unit to generate arc detection signals (see OUTl and OUT2 in FIG. 2) from the current signal SI.
  • the voltage processor may be configured such that it is connected to the voltage measuring unit to generate an arc detection signal OUT3 from the voltage signal SV.
  • Each of the arc detection signals OUTl, 0UT2 and 0UT3 may have a width corresponding to a duration of an arc generated in the load 24.
  • the post-processor 32 may be configured such that it receives the arc detection signals OUT, 0UT2 and 0UT3, and detects the arc generation and the arc type. More specifically, according to the present invention, the arc generation may be detected through analysis of pulse widths of the arc detection signals OUTl, 0UT2 and 0UT3, and the arc type may be detected through analysis of signs of the arc detection signals OUTl, 0UT2 and 0UT3.
  • the post-processor 32 may include at least one of an arc generation determining unit 46 that determines the arc generation by analyzing the pulse width of the arc detection signal, and an arc type determining unit 48 that determines the arc type by analyzing the logic state or level of the arc detection signal.
  • the controller 34 controls the arc detecting apparatus to communicate with the processor 25 and the post-processor 32.
  • the controller 34 may display results of the processor 23 on an external display. The communication may be performed by the use of RS232, RS485 or Devicenet/CAN.
  • the controller 34 may be a computer.
  • FIG. 2 is a block diagram illustrating a schematic configuration of the processor 25 and the post-processor 32 illustrated in FIG. 1.
  • the processor 25 may include at least one of a first current processor, a second current processor, and a voltage processor.
  • the first and second current processors are configured such that they are connected to the current measuring unit to generate the arc detection signals OUTl and 0UT2 from the current signal SI.
  • the voltage processor is configured such that it is connected to the voltage measuring unit to generate the arc detection signal 0UT3 from the voltage signal SV. Except for a difference in a kind of an input signal (i.e., current and voltage) and a difference in a method of processing each signal, the first and second current processors and the voltage processor have a similar configuration substantially. Hence, to avoid complexity in description, following description will be made on a basic structure of the processor 25 configured to generate one arc detection signal.
  • the processor 25 may include at least one reference signal generating unit 44 configured to generate a reference signal REF, at least one comparison signal generating unit 40 configured to generate a comparison signal IN, and at least one comparison unit 42 configured to compare the reference signal REF and the comparison signal IN with each other to generate the arc detection signal OUT.
  • the reference signal REF and the comparison signal IN may be generated using the electrical signal.
  • the comparison signal generating unit 40 receives the current signal SI or the voltage signal SV of the detector 22 to output the comparison signal IN having a perturbation component caused by the arc (hereinafter, referred to as arc- caused perturbation component or arc-caused perturbation frequency component).
  • the comparison signal IN contains the arc-caused perturbation frequency component.
  • the comparison signal IN does not have a driving frequency component, however, may have a frequency component due to a DC component or plasma characteristic variation.
  • the arc-caused perturbation component means a frequency component of the current signal SI or the voltage signal SV caused by the arc generated in the load 24.
  • the reference signal generating unit 44 may be configured to output the reference signal REF from the current signal SI or the voltage signal SV of the detector 22.
  • the arc-caused perturbation component in the comparison signal IN is not contained in the reference signal REF.
  • the reference signal generating unit 44 may be configured to output the reference signal REF by processing one of the current signal SI or the voltage signal SV using an offset signal of the controller 34.
  • the reference signal REF does not contain the driving frequency component of the RF power supply 10, but may contain a low frequency component which is removed the arc caused perturbation component. That is, the reference signal REF may contain a frequency component caused by plasma characteristic variation.
  • the comparison signal generating unit 40 may include at least one of a comparison signal rectifier configured to rectify the electrical signal, a comparison signal filter configured to extract the arc-caused perturbation component from the electrical signal, and a comparison signal converter configured to convert an amplitude or polarity of the electrical signal.
  • the reference signal generating unit 44 may include at least one of a reference signal rectifier configured to rectify the electrical signal, a reference signal filter configured to remove the arc-caused perturbation component from the electrical signal, and a reference signal converter configured to convert an amplitude or polarity of the electrical signal.
  • the reference signal generating unit 44 may further include at least one of a combiner and an offset signal generator configured to generate an offset signal.
  • the combiner may be an adder or a sub tractor. That is, the combiner may add or subtract two input signals to output the added or subtracted result. According to another embodiment of the present invention, the combiner may be configured with an operational amplifier (OP-amp).
  • each of these rectifiers may be one of a rectifier using a diode, a rectifier using a multiplier and a low-pass filter, and a rectifier using an OP-amp and a filter.
  • the multiplier may square the input signal, and the low-pass filter may extract a low- frequency component from a signal output from the multiplier.
  • each of the reference signal rectifier and the comparison signal rectifier may be one of a half- wave rectifier, a full- wave rectifier, an RMS detector, and a peak detector.
  • the reference signal filter is configured to remove an arc-caused perturbation frequency component from the input signal.
  • the reference signal filter may be an active filter or a passive filter. In terms of its functionality, the reference signal filter may be one of a low-pass filter and a band-pass filter.
  • the reference signal converter may be configured to convert an amplitude or polarity of the input signal.
  • the reference signal converter may be at least one of a log amplifier, an attenuator, and a negative gain amplifier.
  • the comparison signal filter may be configured to extract an arc-caused perturbation frequency component from the input signal. Resultantly, a frequency band filtered by the comparison signal filter differs from a frequency band filtered by the reference signal filter.
  • the comparison signal filter may be an active filter or a passive filter. In terms of its functionality, the comparison signal filter may be one of a low-pass filter or a band-pass filter.
  • the comparison signal converter may be configured to convert an amplitude or polarity of the input signal.
  • the comparison signal converter may be at least one of a log amplifier, an attenuator, and a negative gain amplifier. According to the present invention, an amplitude variation of a signal converted by the comparison signal converter may differ from that of a signal converted by the reference signal converter.
  • the reference signal generating unit 44 includes at least one of a reference signal rectifier configured to rectify the electrical signal, a reference signal filter configured to remove the arc- caused perturbation component from the electrical signal, and a reference signal converter configured to convert an amplitude or polarity of the electrical signal.
  • the reference signal filter is configured to extract the arc-caused perturbation component from the electrical signal that is rectified by the reference signal rectifier, and the reference signal converter is configured to convert an amplitude or polarity of the electrical signal that is filtered by the reference signal filter.
  • the comparison signal generating unit 40 includes at least one of a comparison signal rectifier configured to rectify the electrical signal, a comparison signal filter configured to allow the arc- caused perturbation component of the electrical signal to be contained, and a comparison signal converter configured to convert an amplitude or polarity of the electrical signal.
  • the comparison signal filter is configured to extract the arc-caused perturbation component from the electrical signal that is rectified by the comparison signal rectifier.
  • the comparison signal converter may convert an amplitude or polarity of the electrical signal that is filtered by the comparison signal filter.
  • the comparison unit 42 compares the comparison signal IN and the reference signal
  • the comparison unit 42 may be at least one of a comparator, an operational amplifier without a negative feedback loop, and a differentiating amplifier.
  • the comparator may be configured to output the arc detection signal with a high level if a voltage of a non-inverting terminal is greater than that of an inverting terminal, and to output the arc detection signal with a low level if a voltage of the inverting terminal is greater than that of the non-inverting terminal.
  • the comparison signal IN may be input to the non-inverting terminal of the comparator, and the reference signal REF may be input to the inverting terminal.
  • the operation of the comparison unit 42 is exemplarily illustrated to realize a technical idea of the present invention, and thus it may be variously modified.
  • the post-processor 32 may include at least one of the arc generation determining unit 46 that determines the arc generation by measuring pulse widths of the arc detection signals OUTl, OUT2 and OUT3, and the arc type determining unit 48 that determines the arc type by comparing signs of the arc detection signals OUTl, OUT2 and OUT3.
  • the arc detection signal may include a noise component and a plasma characteristic variation component that are irrespective of the arc. Therefore, it is necessary to remove theses components to correctly determine the arc generation.
  • a pulse width due to the noise component is mostly shorter than the minimum width of a pulse due to the arc, and a pulse width due to the plasma characteristic variation is longer than the maximum width of the pulse due to the arc.
  • the arc generation determining unit 46 is configured to determine the arc generation without error caused by the noise component and the plasma characteristic variation component.
  • the arc generation determining unit 46 may include a programmable logic device (PLD) to measure a pulse width of the arc detection signal.
  • the PLD may include a pulse width measuring device, which operates if the levels of the arc detection signals OUTl, 0UT2 and 0UT3 are different from normal levels.
  • widths of the signals may be determined by an operation time of the pulse width measuring device.
  • the arc generation determining unit 46 may include a circuit configured to determine whether the pulse width of the arc detection signal exists between a first reference width and a second reference width.
  • the first reference width may be several microseconds, and the second reference width may be several hundreds of microseconds.
  • the pulse width of the arc detection signal is less than the first reference width, there is a great likelihood that this arc detection signal may be a noise component.
  • the pulse width of the arc detection signal is greater than the second reference width, this arc detection signal may be a component resulting from the plasma characteristic variation. Consequently, when the detection signal may be the noise component or the component resulting from the plasma characteristic variation, the arc generation determining unit 46 does not generate an arc generation signal.
  • the first and second reference widths may be set through the controller 34, and may be variously selected according to circumstances.
  • the arc type determining unit 48 may compare the first arc detection signal OUTl of the current signal, the second arc detection signal 0UT2 of the current signal , and the third arc detection signal 0UT3 of the voltage so as to distinguish the first type arc and the second type arc from each other.
  • first type arc both a current and a voltage of the transmission line may be decreased.
  • second type arc the current of the transmission line is increased but the voltage is decreased.
  • the second type arc is generated, the current of the transmission line may be increased but the voltage may not be changed.
  • the arc type determining unit 48 is configured to determine whether the arc is the first type arc or the second type arc, by using the above-described characteristics.
  • the arc type determining unit 48 may detect the variation direction of the current signal and the voltage signal due to the arc.
  • the arc type determining unit 48 may determine that the generated arc is the first type arc.
  • the first arc detection signal OUTl of the current signal or the second arc detection signal 0UT2 of the current signal differs in logic state or level from the third arc detection signal 0UT3 of the voltage signal
  • the arc type determining unit 48 may determine that the generated arc is the second type arc.
  • the signs or level of the first, second and third arc detection signals OUTl, 0UT2 and 0UT3 may be changed depending on the non- inverting terminal and the inverting terminal of the comparison unit 42.
  • the generated arc may be determined as the first type arc if the logic state or level of a current arc detection signal is low.
  • the generated arc may be determined as the second type arc if the logic state or level of the current arc detection signal is high. That is, the generated arc may be determined as the first type arc if the first arc detection signal OUTl of the current signal has a low state or level, and determined as the second type arc if the second arc detection signal OUT2 of the current signal has a high state or level.
  • the signs or levels of the first, second and third arc detection signals OUTl, 0UT2 and 0UT3 may be changed depending on the non-inverting terminal and the inverting terminal of the comparison unit 42.
  • the arc type determining unit 48 may further include a first type arc counter configured to count number of generation times of the first type arc.
  • the arc type determining unit 48 may output a first type arc count signal DISPl according to the number of generation times of the first type arc counted by the first type arc counter. More specifically, when the number of generation times of first type arc per an hour is greater than a reference number of times, the arc type determining unit 48 may output a warning signal.
  • the arc type determining unit 48 may output a second type arc signal DISP2.
  • the reference number of times used to generate the warning signal associated with the first type arc may be controlled through the controller 34.
  • a programmable logic device According to the embodiment of the present invention, a programmable logic device
  • PLD may be used for real-timing monitoring in the arc generation determining unit 46 and the arc type determining unit 48.
  • the arc generation determining unit 46 and the arc type determining unit 48 having the above technical features may be integrated onto the PLD.
  • the controller 34 may include a display unit configured to visually display at least one of data for signals generated from the processor 25 and the post-processor 32 to a user.
  • the display unit receives the second type arc signal DISP2 and the first type arc count signal DISPl to display number of generation times of the first arc per an hour. If the number of generation times of the first arc per an hour is greater than the reference number of times, the display unit may display a first arc warning signal and may display a second type arc warning signal.
  • the processor 25 may include at least one of the first current processor, the second current processor and the voltage processor.
  • Each of the first current processor, the second current processor and the voltage processor may include the reference signal generating unit 44, the comparison signal generating unit 40, and the comparison unit 42, which have been described already with reference to FIG. 2.
  • the processor 25 may include only the voltage processor configured to process the voltage signal SV without the current processors. According to another modified embodiment, however, the processor 25 may include at least one of the first and second current processors configured to process the current signal SI without the voltage processor.
  • FIG. 3 is a block diagram of the first current processor 26 according to an embodiment of the present invention.
  • the first current processor 26 includes a comparison signal generating unit 40, a reference signal generating unit 44, and a comparison unit 42.
  • the comparison unit 42 compares a first comparison signal INIa of the comparison signal generating unit 40 and a first reference signal REFIa of the reference signal generating unit 44 with each other to output the first arc detection signal OUTl.
  • the comparison signal generating unit 40 may include at least one of a comparison signal rectifier 64 configured to rectify an electrical signal, and a comparison signal filter 62 configured to allow the arc-caused perturbation component of the electrical signal to be contained.
  • the reference signal generating unit 44 may include at least one of a reference signal rectifier 64 configured to rectify an electrical signal, a reference signal filter 66 configured to remove the arc-caused perturbation component from the electrical signal, and a reference signal converter 68 configured to convert an amplitude or polarity of the electrical signal.
  • the comparison signal rectifier 60 receives the current signal SI to output a comparison rectified signal RCTIa.
  • the comparison signal filter 62 receives the comparison rectified signal RCTIa to output a first comparison signal INIa containing the perturbation frequency component caused by the arc.
  • the comparison signal filter 62 is configured to remove a driving frequency component of the RF power supply 10 from the comparison rectified signal RCTIa. That is, the first comparison signal INIa does not contain the driving frequency component.
  • the reference signal rectifier 64 receives the current signal SI of the detector 22 to output a reference rectified signal RCT2a.
  • the comparison signal rectifier 60 may be identical to the reference signal rectifier 66. That is, according to the embodiment of the present invention, the comparison signal generating unit 40 and the reference signal generating unit 44 may share one rectifier 60 or 64.
  • the reference signal filter 66 receives the reference rectified signal RCT2a to output a preliminary reference signal REIa where the driving frequency component of the RF power supply 10 and the perturbation frequency component caused by the arc are removed.
  • a cutoff frequency of the comparison signal filter 62 may be higher than that of the reference signal filter 66.
  • the cutoff frequency of the reference signal filter 66 may be set to a sufficiently low value (for example, about 10 KHz) such that information about the arc is not contained in the reference signal.
  • the cutoff frequency of the comparison signal filter 62 may be set to a value (for example, about 250 KHz) allowing the information about the arc to be contained in the comparison signal.
  • the preliminary reference signal REIa is similar in DC level to the first comparison signal INIa, and thus a direct comparison therebetween is not suitable for achieving meaningful results.
  • the DC level means a difference in a reference level between the case where signal distortion does not occur, and the case where the signal distortion occurs due to the arc.
  • the reference signal converter 68 converts an amplitude or polarity of the preliminary reference signal REIa to output the first reference signal REFIa.
  • the comparison unit 42 compares the first comparison signal INIa of the comparison signal generating unit 40 and the first reference signal REFIa of the reference signal generating unit 44 to output the first arc detection signal OUTl.
  • the comparison unit 42 may be an operational amplifier without a negative feedback loop, and a comparator.
  • FIG. 4 is a flowchart illustrating an arc monitoring method according to embodiments of the present invention.
  • the following arc monitoring method may be realized through the arc detecting apparatus illustrated in FIGS. 1 through 3.
  • the following arc monitoring method may include determining an arc generation and an arc type from an electrical signal measured using a predetermined software.
  • the arc monitoring method includes: measuring an electrical signal of a current or voltage of a transmission line connected to a load in operation SlO; generating at least one arc detection signal corresponding to the arc generation at the load by processing the electrical signal in operation S20; determining the arc generation at the load through analysis of the arc detection signal in operation S32; and determining the arc type at the load through analysis of the arc detection signal in operation S34.
  • the operation S20 may include: generating a reference signal from the electrical signal in operation S22; generating a comparison signal from the electrical signal in operation S24; and comparing the reference signal and the comparison signal with each other to generate the arc detection signal in operation S26.
  • the reference signal, the comparison signal, and the arc detection signal may be generated through the method illustrated in FIGS. 1 through 3. Likewise, the determination on the arc generation and the arc type may be accomplished through the method illustrated in FIGS. 1 through 3.
  • FIG. 5 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 5 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26 of FIG. 3. In detail, FIG. 5 illustrate waveforms of signals generated from the arc detecting apparatus where a half- wave rectifier is used as the reference signal rectifier 64 and the comparison signal rectifier 60, and a low-pass filter is used as the comparison signal filter 62 and the reference signal filter 66. According the arc detecting apparatus of this embodiment, the reference signal filter 66 is a low-pass filter having a cutoff frequency lower than the comparison signal filter 62.
  • FIG. 5(a) illustrates a waveform of the current signal SI output from the detector 22
  • FIG. 5(b) illustrates a waveform of the comparison rectified signal RCTIa output from the comparison signal rectifier 60, and a waveform of the reference rectified signal RCT2a output from the reference signal rectifier 64
  • FIG. 5(c) illustrates a waveform of the first comparison signal INIa output from the comparison signal filter 62, a waveform of the preliminary reference signal REIa output from the reference signal filter 66, and a waveform of the first reference signal REFIa output from the reference signal generating unit 44
  • FIG. 5(d) illustrates a waveform of the first arc detection signal OUTl output from the comparison unit 42
  • FIG. 5(e) illustrates a waveform of the output signal DISPl of the first type arc counter that is output from the arc type determining unit 48.
  • the detector 22 outputs the current signal SI obtained by measuring a current flowing through the transmission line.
  • the current signal SI includes information about the plasma characteristic variation as well as information about the arc.
  • the current signal SI contains a variation of a measured current, but it may be output in a voltage form after it is converted into a voltage.
  • the current signal SI due to first type arcs A, B, C and D is sharply reduced, and then restored to a normal level. If plasma characteristics are varied, the amplitude of the current signal SI may be increased/decreased from Vl to V2, as shown in a duration between t3 and t4.
  • the duration (t4-t3) of the plasma characteristic variation is much longer than the duration (t2-tl) of a variation of the current signal SI caused by arc generation.
  • the arc detecting apparatus according to the present invention utilizes a duration difference in order to distinguish the plasma characteristic variation and the arc from each other.
  • the durations of the first type arcs A, B, C and D may be in the range of several mi- croseconds to several hundreds of microseconds.
  • the comparison signal rectifier 60 receives the current signal
  • the comparison rectified signal RCTIa has only one of a positive or negative component of the current signal SI.
  • the perturbation frequency component due to the first type arc and the frequency component of the plasma characteristic variation are not removed by the comparison signal rectifier 60 and the reference signal rectifier 64, but are contained in the comparison rectified signal RCTIa and the reference rectified signal RCT2a.
  • the comparison signal filter 62 outputs the first comparison signal INIa where the driving frequency component of the RF power supply 10 is removed from the comparison rectified signal RCTIa.
  • the first comparison signal INIa still has the arc-caused perturbation component.
  • the comparison signal filter 62 may be a low-pass filter.
  • a cutoff frequency of the low-pass filter 62 is 250 KHz lower than the driving frequency (13.56 MHz) of the power supply. When the cutoff frequency of the comparison signal filter 62 is too low, information about the arc may be lost from the first comparison signal INIa.
  • the low- pass filter 62 has a cutoff frequency (e.g., 250 KHz) lower than the driving frequency (13.56 MHz) of the power supply. That is, the first comparison signal INIa has the information about the plasma characteristic variation and the information about the first type arcs A, B, C and D. Also, when there is the second type arc, the first comparison signal INIa may include the information about the second type arc.
  • the reference signal filter 66 removes the arc-caused perturbation frequency component and the RF driving frequency component from the reference rectified signal RCT2a to output the preliminary reference signal REIa.
  • the reference signal filter 66 is a low-pass filter having a cutoff frequency that can remove the arc-caused perturbation frequency component, and this cutoff frequency may be 10 KHz. Since the duration of the arc is in the range of several microseconds to several hundreds of microseconds, it is preferable that the cutoff frequency of the reference signal filter is 10 KHz. It is preferable that the reference signal filter 66 should be configured such that the information about the plasma characteristic information is not lost.
  • the DC level is increased between t3 and t4 because the preliminary reference signal REIa has information about the plasma characteristic variation illustrated in a duration t3-t4. That is, as illustrated in FIG. 5(c), the preliminary reference signal REIa exhibits DC level characteristic that the preliminary reference signal REIa is increased in a duration between t3 and t4 like the current signal SI.
  • the preliminary reference signal REIa and the first comparison signal INIa have substantially the same level, which cannot be distinguished from each other.
  • the reference signal converter 68 changes (e.g., reduces) an amplitude of the preliminary reference signal REIa at a predetermined ratio, thereby generating the first reference signal REFIa of which an amplitude differs from that of the first comparison signal INIa.
  • the gain of the reference signal converter 68 may be in the range of 0.1 to 0.8. Since the first reference signal REFIa includes the information of the plasma characteristic variation (see the duration between t3 and t4), the DC level is increased between t3 and t4.
  • the comparison unit 42 receives the first comparison signal
  • the comparison unit 42 determines that the plasma characteristic variation is not an arc. Hence, the information about the plasma characteristic variation is not contained in the first arc detection signal OUTl.
  • pulses a, b c and d corresponding to the arc generations are produced as shown in the waveform diagram of the first arc detection signal OUTl because the perturbation component caused by the first type arcs A, B, C and D of the current signal SI is contained in the first comparison signal INIa but not contained in the first reference signal REFIa.
  • a width of the pulse d of the first arc detection signal OUTl corresponding to the arc D may differ from widths of the pulses a, b and c of the first arc detection signal OUTl before the plasma characteristics are varied.
  • the post-processor 32 receives the first arc detection signal OUTl to measure its pulse width, and determines whether the pulses a, b, c and d are resulted from the arc. According to the embodiment of the present invention, when the pulse is determined as the arc, the arc type determining unit 48 outputs the first arc count signal DISPl to cumulatively count the number of arc generation times.
  • FIG. 6 is a block diagram of the reference signal converter 68 according to an embodiment of the present invention.
  • the reference signal converter 68 includes an analog- to-digital converter (ADC) 70, a microcontroller 74, and a digital-to-analog converter (DAC) 72.
  • the ADC 70 samples the preliminary reference signal REIa to convert it into a digital signal.
  • the microcontroller 74 changes an amplitude of the digital signal.
  • the DAC 72 receives the digital signal of which the amplitude is changed, to thereby output the first reference signal of an analog signal.
  • the profile of the first reference signal REFIa may trace along the profile of the preliminary reference signal REIa by maintaining a sampling time of the ADC 70 to several microseconds or less.
  • the controller 34 can control the microcontroller 74.
  • FIG. 7 is a waveform diagram illustrating an arc monitoring method according to an embodiment of the present invention.
  • FIG. 7 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26 illustrated in FIG. 3. More specifically, FIG. 7 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which half- wave rectifiers are used for the reference signal rectifier 64 and the comparison signal rectifier 60, a band-pass filter is used for the comparison signal filter 62, and a low- pass filter is used as the reference signal filter 66.
  • the comparison signal filter 62 has a low cutoff frequency in the range of 10 Hz to 100 Hz and a high cutoff frequency is 250 KHz
  • the reference signal filter 66 has a cutoff frequency of 10 KHz.
  • FIG. 7 (a) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 7(b) illustrates a waveform of a comparison rectified signal RCTIb output from the comparison signal rectifier 60 and a waveform of a reference rectified signal RCT2b output from the reference signal rectifier 64
  • FIG. 7(c) illustrates a waveform of a first comparison signal INIb, a waveform of a preliminary reference signal REIb output from the reference filter 66, and a waveform of a preliminary reference signal REIb output from the reference signal filter 66, and a waveform of a first reference signal REFIb output from the reference signal generating unit 44
  • FIG. 7 (b) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 7(b) illustrates a waveform of a comparison rectified signal RCTIb output from the comparison signal rectifier 60 and a waveform of a reference rectified signal RCT2b output from the reference signal rectifier 64
  • FIG. 7(d) illustrates a waveform of a first arc detection signal OUTl output from the comparison unit 42; and FIG. 7(e) illustrates a waveform of an output signal DISPl of a first type arc counter that is output from the arc type determining unit 48.
  • the comparison signal filter 62 receives the comparison rectified signal RCTIb to output the first comparison signal INIb where a DC component and a driving frequency component of the RF power supply 10 are removed but an arc-caused perturbation component is contained.
  • the first comparison signal INIb does not contain information (duration t3 to t4) about plasma characteristic variations, but contains information about first type arcs (A, B, C and D). Also, if there is a second type arc, the first comparison signal INIb may include information about the second type arc generation.
  • the preliminary reference signal REIb contains information about the plasma characteristic variation, and thus the DC level is increased between t3 and t4.
  • the reference signal converter 68 may convert at least one of an amplitude and sign of the preliminary reference signal REIb to generate the first reference signal REFIb.
  • the reference signal converter 68 may be a negative gain amplifier, and the gain may be controlled by the controller 34.
  • the comparison unit 42 compares the comparison signal INIb and the first reference signal REFIb to output the first arc detection signal OUTl.
  • the arc-caused perturbation component is contained in the first comparison signal INIb but not contained in the first reference signal REFIb. Therefore, the first arc detection signal OUTl has the pulses a, b, c and d corresponding to the arc generation, as illustrated in FIG. 7(d).
  • the pulse d corresponding to the arc generated after the plasma characteristics are varied may differ in width from the pulses a, b and c generated before the plasma characteristics are varied.
  • FIG. 8 is a block diagram of a processor according to an embodiment of the present invention. For brevity of description, duplicate descriptions, which have been made already with reference to FIGS. 3 through 5, will be minimally provided below.
  • the processor 25 may be used for one of a first current processor, a second current processor, and a voltage processor.
  • the first current processor 26c includes a comparison signal generating unit 40c, a reference signal generating unit 44c, and a comparison unit 42c.
  • the comparison unit 42c compares the first comparison signal INIc of the comparison signal generating unit 40c and the first reference signal REFIc of the reference signal generating unit 44c to thereby output the first arc detection signal OUTl.
  • the comparison signal generating unit 40c may include at least one of a comparison signal rectifier 100 configured to rectify an electrical signal, a comparison signal filter 102 configured to allow the arc-caused perturbation component of the electrical signal to be contained, and a comparison signal converter 104 configured to convert at least one of an amplitude and polarity of the electrical signal.
  • the reference signal generating unit 44c may include at least one of a reference signal rectifier 106 configured to rectify an electrical signal, a reference signal filter 108 configured to remove an arc-caused perturbation component from the electrical signal, and a comparison signal converter 110 configured to convert at least one of an amplitude and polarity of the electrical signal, an offset signal generator 114 configured to generate an offset signal OSc, and a combiner 112 configured to combine the offset signal and an output signal of the reference signal converter 110.
  • the comparison signal rectifier 100 receives a current signal SI to output a comparison rectified signal RCTIc.
  • the comparison signal filter 102 receives the comparison rectified signal RCTIc to output a preliminary comparison signal SNIc where a driving frequency component of the RF power supply is removed but the arc- caused perturbation component is contained.
  • the comparison signal converter 104 converts at least one of an amplitude and polarity of the preliminary comparison signal SNIc to output the first comparison signal INIc.
  • the comparison signal converter 104 may be a log amplifier. The log amplifier has an output proportional to a log value of an input signal.
  • the reference signal rectifier 106 receives the current signal SI of the detector 22 to output a reference rectified signal RCT2c.
  • the comparison signal rectifier 100 and the reference signal rectifier 106 may be identical to each other. Also, the comparison signal rectifier 100 and the reference signal rectifier 106 may share one of the comparison signal rectifier 100 and the reference signal rectifier 106.
  • the reference signal filter 108 receives the reference rectified signal RCT2c to output the preliminary reference signal REIc where the driving frequency component of the RF power supply and the arc-caused perturbation component are removed.
  • the reference signal filter 108 may be a low-pass filter. A cutoff frequency of the comparison signal filter 102 may be higher than that of the reference signal filter 108.
  • the reference signal converter 110 converts at least one of an amplitude and polarity of the preliminary reference signal to output a converted reference signal PRIc.
  • the reference signal converter 110 may be a log amplifier.
  • the log amplifier has an output proportional to a log value of an input signal.
  • the offset signal generator 114 may generate the offset signal OSc.
  • the offset signal OSc of the offset signal generator 114 may be set by the controller 34.
  • the combiner 112 combines the converted reference signal PRIc and the offset signal OSc generated from the offset signal generator 114 to output a first reference signal REFIc.
  • An operational amplifier may be used for the combiner 112.
  • the combiner 112 may be an adder or a sub tractor.
  • the comparison unit 42c compares the first comparison signal INIc and the first reference signal REFIc to output the first arc detection signal OUTl.
  • FIG. 9 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 9 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26c in FIG. 8. More specifically, FIG. 9 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which RMS detectors are used for the reference signal rectifier 106 and the comparison signal rectifier 100, a low-pass filter is used for the comparison signal filter 102 and the reference signal filter 108, and a log amplifier is used for the comparison signal converter 104 and the reference signal converter 110. According to this embodiment, the comparison signal filter 102 has a cutoff frequency of 250 KHz, and the reference signal filter 66 has a cutoff frequency of 10 KHz.
  • FIG. 9(a) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 9(b) illustrates a waveform of a preliminary comparison signal SNIc output from the comparison signal filter 102 and a waveform of preliminary reference signal REIc output from the reference signal filter 108
  • FIG. 9(c) illustrates a waveform of a first comparison signal INIc output from the comparison signal converter 104, and a waveform of a first reference signal REFIc output from the combiner 112
  • FIG. 9(d) illustrates a waveform of a first arc detection signal OUTl output from the comparison unit 42c
  • FIG. 9(e) illustrates a waveform of an output signal DISPl of a first type arc counter that is output from the arc type determining unit 48.
  • the comparison signal converter 104 converts the preliminary comparison signal SNIc into a log value to output the first comparison signal INIc.
  • the reference signal converter 110 converts the preliminary comparison signal REIc into a log value to output the converted reference signal PRIc.
  • the combiner 112 combines the converted reference signal PRIc and the offset signal OSc generated from the offset signal generator 114 to output the first reference signal REFIc.
  • DC level of the first comparison signal INIc and the converted reference signal PRIc have the substantially same levels, making it difficult to distinguish them from each other.
  • the combiner 112 adds the offset signal OSc of the offset signal generator 114 and the converted reference signal PRIc of the reference signal converter 110 to generate the first reference signal REFIc that can be distinguished from the first comparison signal INIc.
  • the offset signal OSc may have a negative level.
  • the comparison unit 42c compares the first comparison signal INIc and the first reference signal REFIc to output the first arc detection signal OUTl corresponding to the arc-caused perturbation. Since information about plasma characteristics is contained in both the first comparison signal INIc and the first reference signal REFIc, information about the plasma characteristic variation is not contained in the first arc detection signal OUTl. However, the arc-caused perturbation component is contained in the first comparison signal INIc but not contained in the first reference signal REFIc, the first arc detection signal OUTl has pulses a, b, c and d corre- sponding to the arc generation, as illustrated in FIG. 9(d). According to the embodiment of the present invention, the pulse d corresponding to the arc generated after the plasma characteristics are varied may differ in width from the pulses a, b and c generated before the plasma characteristics are varied.
  • FIG. 10 is a block diagram of a processor according to an embodiment of the present invention.
  • the processor 25 may be used for one of a first current processor, a second current processor, and a voltage processor.
  • the first current processor 26d includes a comparison signal generating unit 4Od, a reference signal generating unit 44d, and a comparison unit 42d.
  • the comparison unit 42d compares the first comparison signal INId of the comparison signal generating unit 4Od and the first reference signal REFId of the reference signal generating unit 44d to output the first arc detection signal OUTl.
  • the comparison signal generating unit 4Od may include a sub tractor 92, a first signal calculator 85 configured to receive the current signal SI to generate a first calculation signal D_INld having an arc-caused perturbation component, and a second signal calculator D_IN2d configured to receive the current signal SI to generate a second calculation signal D_IN2d where the arc-caused perturbation component is removed.
  • the subtracter 92 receives outputs signals of the first and second signal calculators 85 and 91 to output a difference therebetween as the first comparison signal INId.
  • the first signal calculator 85 may include at least one of a first comparison signal rectifier 80, a first comparison signal filter 82, and a first reference signal converter 84.
  • the second signal calculator 91 may include at least one of a second comparison signal rectifier 86, a second comparison signal filter 88, and a second reference signal converter 90.
  • the first comparison signal rectifier 80 receives the current signal SI of the detector 22 to output a first rectified signal RCTId.
  • the first comparison signal rectifier 80 may be an RMS detector.
  • the RMS detector outputs a root mean square (RMS) value of an input signal.
  • the first comparison signal filter 82 outputs a first comparison filter signal SNId where a driving frequency component of the RF power supply 10 is removed from the first rectified signal RCTId but the arc-caused perturbation component is contained.
  • the first comparison signal converter 84 receives the first comparison filter signal SNId, and then converts at least one of an amplitude and polarity of the first comparison filter signal SNId to output the first calculation signal D_INld.
  • the first comparison signal converter 84 may be a log amplifier.
  • the log amplifier outputs a log value of an input signal.
  • the first calculation signal D_INld may include information about the plasma characteristic variation and information about a first type arc. Also, if there is a second type arc, the first calculation signal D_INld may contain information about the generation of the second type arc.
  • the second comparison signal rectifier 86 receives the current signal SI of the detector 22 to output a second rectified signal RCT2d.
  • the second comparison signal rectifier 86 may be an RMS detector.
  • the RMS detector outputs an RMS value of an input signal.
  • the second comparison signal filter 88 outputs a second comparison filter signal SN2d where a driving frequency component of the RF power supply 10 and the arc-caused perturbation component are removed from the second rectified signal RCT2d.
  • the second comparison signal converter 90 receives the second comparison filter signal SN2d, and then converts at least one of an amplitude and polarity of the second comparison filter signal SN2d to generate the second calculation signal D_IN2d.
  • the second comparison signal converter 90 may be a log amplifier.
  • the log amplifier outputs a log value of an input signal.
  • the second calculation signal D_INld may contain information about the plasma characteristic variation.
  • the subtractor 92 receives the outputs signals of the first and second signal calculators 85 and 91 to output a difference therebetween as the first comparison signal INId.
  • a differentiating amplifier may be used for the subtractor 92.
  • Information about the DC level and the plasma characteristic variation may be removed from the first reference signal INId by means of the subtractor 92.
  • the reference signal generating unit 44d processes the current signal SI to generate the first reference signal REFId, as illustrated in FIGS. 2 through 5.
  • the reference signal generating unit 44d may generate the first reference signal REFId of a constant level without processing the current signal SI.
  • FIG. 11 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 11 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26d of FIG. 10. More specifically, FIG. 11 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which RMS detectors are used for the first comparison signal rectifier 80 and the second comparison signal rectifier 86, a low-pass filter is used for the first comparison signal rectifier 80 and the second comparison signal rectifier 86, and a log amplifier is used for the first comparison signal converter 84 and the second comparison signal converter 90.
  • the first comparison signal filter 82 has a cutoff frequency of 250 KHz
  • the second comparison signal filter 88 has a cutoff frequency of 10 KHz.
  • FIG. 1 l(a) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 1 l(b) illustrates a waveform of a first comparison filter signal SNId output from the first comparison signal filter 82 and a waveform of a second comparison filter signal SN2d output from the second comparison signal filter 88
  • FIG. 1 l(c) illustrates a waveform of a first calculation signal D_INld output from the first comparison signal converter 84, and a waveform of a first calculation signal D_IN2d output from the second comparison signal converter 90
  • FIG. 1 l(a) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 1 l(b) illustrates a waveform of a first comparison filter signal SNId output from the first comparison signal filter 82 and a waveform of a second comparison filter signal SN2d output from the second comparison signal filter 88
  • FIG. 1 l(c) illustrates a waveform of a first calculation
  • FIG. 1 l(d) illustrates a waveform of a first comparison signal INId output from the subtracter 92, and a waveform of the first reference signal REFId output from the reference signal generator 44;
  • FIG. 1 l(e) illustrates a waveform of the first arc detection signal OUTl output from the comparator 42;
  • FIG. 1 l(f) illustrates a waveform of an output signal DISPl of the first type arc counter that is output from the arc type determining unit 48.
  • the first comparison signal filter 82 generates the first comparison filter signal SNId where a driving frequency component of the RF power supply 10 is removed from the output signal RCTId of the first comparison signal rectifier 80 but the arc-caused perturbation component is contained.
  • the first comparison filter signal SNId contains information (duration t3 to t4) about the plasma characteristic variation and information about first type arcs A, B, C and D.
  • the first comparison filter signal SNId may contain information about the generation of the second type arc.
  • the second comparison signal rectifier 86 receives the current signal SI to output an RMS value of the second rectified signal RCT2d
  • the second comparison signal filter 88 receives the root mean square value of the second rectified signal RCT2d to output a signal where the driving frequency component of the RF power supply 10 and the arc-caused perturbation component are removed.
  • An output signal SN2d of the second comparison signal filter 88 may contain information about the plasma characteristic variation (duration t3 to t4).
  • the first comparison signal converter 84 converts the first comparison filter signal SNId into a log value to generate the first calculation signal D_Inld.
  • the second comparison signal converter 90 converts the second comparison filter signal SN2d into a log value to generate the second calculation signal D_IN2d.
  • the subtracter 92 subtracts the second calculation signal
  • the first comparison signal INId is a signal obtained by converting a ratio between the first and second reference filter signals SNId and SN2d into a log value. Therefore, the first comparison signal INId has neither DC level nor a variation in DC level due to the plasma characteristic variation. Also, since the first comparison signal INId depends on the ratio, the output signal of the reference signal generator 44d, i.e., the first reference signal REFId, may be set to a constant value. That is, the first reference signal REFId may be set to a constant value, not from the current signal SI.
  • FIG. 12 is a block diagram of a processor according to an embodiment of the present invention.
  • the processor 25 may include a first current processor 26, and a second current processor 28.
  • the processor 25 may further include a voltage processor.
  • the voltage processor may have the same configuration as the first and second current processors 25 and 26.
  • the first and second current processors 25 and 26 may have the configuration illustrated in FIG. 8.
  • the processor 25 includes a comparison signal generating unit 40, a reference signal generating unit 44, and a comparison unit 42.
  • the first current processor 26 includes a first comparison signal generating unit 4Oe, a first reference signal generating unit 44e, and a first comparison unit 42e.
  • the first comparison signal generating unit 4Oe may include at least one of a first comparison signal rectifier 10Oe, a first comparison signal filter 102e, and a first comparison signal converter 104e.
  • the first reference signal generating unit 44e may include at least one of a first reference signal rectifier 106e, a first reference signal filter 108e, a first reference signal converter 104e, a first combiner 112e, and a first offset signal generator 114e.
  • the first comparison unit 42e compares the first comparison signal INIe and the first reference signal REFIe to output a first arc detection signal OUTl.
  • the second current processor 28 includes a second comparison signal generating unit 4Of, a second reference signal generating unit 44f, and a second comparison unit 42f.
  • the second comparison signal generating unit 4Of may include at least one of a second comparison signal rectifier 10Of, a second comparison signal filter 102f, and a second comparison signal converter 104f.
  • the second reference signal generating unit 44f may include at least one of a second reference signal rectifier 106f, a second reference signal filter 108f, a second reference signal converter 104f, a second combiner 112f, and a second offset signal generator 114f.
  • the second comparison unit 42f compares the second comparison signal INIf and the second reference signal REFIf to output a second arc detection signal OUT2.
  • the post-processor 32 illustrated in FIG. 2 receives the first and second arc detection signals OUTl and OUT2 to measure their pulse widths. If the arc is determined as a first type arc, the arc type determining unit 48 outputs a first type arc count signal DISPl; and if the arc is determined as a second type arc, the arc type determining unit 48 outputs a second type arc signal DISP2. In the case where the processor 25 has only the first and second current processors 26 and 28, the arc type may be determined by signs of the first and second arc detection signals OUTl and OUT2 without comparison with a third arc detection signal of the voltage processor 30.
  • the processor 25 may include a first current processor 26, a second current process 28, and a voltage processor.
  • the voltage processor may have the same configuration as the first current processor.
  • the voltage processor receives the voltage signal SV to process it, and compares a voltage comparison signal and a voltage reference signal to output a third arc detection signal OUT3.
  • the first current processor 26 may have the same configuration as the second current processor 28 and the voltage processor. If the first or second arc detection signal OUTl or OUT2 of the current signal differs in the logic state or level from the third arc detection signal OUT3 of the voltage signal, it is determined that the second arc detection signal OUT2 is a second type arc. On the contrary, if the first or second arc detection signal OUTl or 0UT2 is equal in the logic state or level to the third arc detection signal 0UT3, it is determined that the first arc detection signal OUTl is a first type arc.
  • FIG. 13 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 13 illustrates waveforms of signals generated from the arc detecting apparatus including the first and second current processors 26 and 28 illustrated in FIG. 12. More specifically, FIG.
  • FIG. 13 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which RMS detectors are used for the first and second reference signal rectifiers 106e and 106f, and the first and second comparison signal rectifier lOOe and 106e, a low-pass filter is used for the first and second comparison signal filters 102e and 102f, and the first and second reference signal filters 108e and 108f, and a log amplifier is used for the first and second comparison signal converters 104e and 104f, and the first and second reference signal converters HOe and 11Of.
  • the first and second comparison signal filters 102e and 102f have cutoff frequencies of 250 KHz
  • the first and second reference signal filters 108e and 108f have cutoff frequencies of 10 KHz.
  • FIG. 13(a) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 13(b) illustrates waveforms of first and second preliminary comparison signals SNIe and SN2f output from the first and second comparison signal filters 102e and 102f, respectively, and waveforms of first and second preliminary reference signals REIe and RE2f output from the first and second reference signal filters 108e and 108f, respectively
  • FIG. 13(a) illustrates a waveform of a current signal SI output from the detector 22
  • FIG. 13(b) illustrates waveforms of first and second preliminary comparison signals SNIe and SN2f output from the first and second comparison signal filters 102e and 102f, respectively, and waveforms of first and second preliminary reference signals REIe and RE2f output from the first and second reference signal filters 108e and 108f, respectively
  • FIG. 13(c) illustrates waveforms of the first and second comparison signals INIe and IN2f output from the first and second comparison signal converters 104e and 104f, respectively, and waveforms of the first and second reference signals REFIe and REF2f output from the first and second combiners 112e and 112f, respectively;
  • FIG. 13(d) illustrates waveforms of the first and second arc detection signals OUTl and OUT2 output from the first and second comparison units 42e and 42f;
  • FIG. 13(e) illustrates waveforms of an output signal DISPl of the first type arc counter and a second arc signal DISP2, which are output from the arc type determining unit 48.
  • the detector 22 outputs the current signal SI obtained by measuring a current flowing through the transmission line.
  • the current signal SI may include information about plasma characteristic variation as well as information about the arc.
  • the amplitude of the current signal SI due to the first type arcs A, B, C and D is sharply decreased and then restored to the original state.
  • the amplitude of the current signal due to the second type arc F is increased and then decreased to reach a normal state.
  • a duration (t2-tl) of amplitude variation of the current signal SI due to the first type arc may be shorter than a duration (t6-t5) of amplitude variation of the current signal SI due to the second type arc.
  • the first and second comparison signal filters 102e and 102f generates the first and second preliminary comparison signals SNIe and SN2f where an arc-caused component and a component due to the plasma characteristic variation are contained but the driving frequency component is removed.
  • the first and second preliminary comparison signals SNIe and SN2f have information about the first type arc A, B, C and D, and information about the second type arc F.
  • the first and second reference signal filters 108e and 108f generate the first and second preliminary reference signals REIe and RE2f where both the arc-caused perturbation component and the driving frequency component are removed.
  • the first and second preliminary reference signals REIe and RE2f may differ from the first and second preliminary comparison signals SNIe and SN2f.
  • the first and second combiners 112e and 112f adds the first and second offset signals OSe and OSf of the first and second offset signal generators 114e and 114f and the output signals of the first and second reference signal converters HOe and 11Of, respectively, thereby generating the first and second reference signals REFIe and REF2f.
  • the offset signal OSe of the first current processor 26 may have a negative level.
  • the first offset signal OSe of the first current processor 26 may differ from the second offset signal OSf of the second current processor 28. That is, the second offset signal OSf of the second current processor 28 may have a positive level for detecting the current signal SI of the second type arc.
  • the first comparison unit 42e of the first current processor 26 compares the first comparison signal INIe and the first reference signal REFIe to output the first arc detection signal OUTl. In the case of first type arcs A, B, C and D, the first comparison unit 42e outputs the first arc detection signal OUTl. However, when the second type arc F is generated to increase the amplitude of the current signal, the first comparison unit 42e does not detect the second type arc F because the first reference signal REFIa and the first comparison signal INIe do not cross each other.
  • the second comparison unit 42f of the second current processor 28 compares the second comparison signal IN2f and the second reference signal REF2f to output the second arc detection signal OUT2.
  • the second comparison unit 42f does not output the first type arc detection signal OUTl because the second reference signal REF2f and the second comparison signal IN2f do not cross each other.
  • the second comparison unit 42f detects this to output the second arc detection signal OUT2.
  • the post-processor 32 illustrated in FIG. 2 receives the first and second arc detection signals OUTl and 0UT2 to measure their pulse widths. If the arc is determined as a first type arc, the arc type determining unit 48 outputs a first type arc count signal DISPl; and if the arc is determined as a second type arc, the arc type determining unit 48 outputs a second type arc signal DISP2.
  • FIG. 4 is a flowchart illustrating an arc monitoring method according to embodiments of the present invention.
  • the following arc monitoring method may be realized through the arc detecting apparatus illustrated in FIGS. 1 through 3.
  • the arc monitoring method includes: measuring an electrical signal of a current or voltage of a transmission line connected to a load in operation SlO; generating at least one arc detection signal corresponding to the arc generation at the load by processing the electrical signal in operation S20; determining the arc generation at the load through analysis of the arc detection signal in operation S32; and determining the arc type of the load through analysis of the arc detection signal in operation S34.
  • the operation S20 may include: generating a reference signal from the electrical signal in operation S22; generating a comparison signal from the electrical signal in operation S24; and comparing the reference signal and the comparison signal with each other to generate the arc detection signal in operation S26.
  • the reference signal, the comparison signal, and the arc detection signal may be generated through the method illustrated in FIGS. 1 through 3. Likewise, the determination on the arc generation and the arc type may be accomplished through the method illustrated in FIGS. 1 through 3.
  • the operation S22 may include removing an arc-caused perturbation component from the electrical signal.
  • the removing of the arc-caused perturbation component includes removing a component of a first frequency band from the electrical signal.
  • the first frequency band may include a frequency band due to the arc-caused perturbation component.
  • the frequency band due to the arc-caused perturbation component may be in the range of 10 KHz to 250 KHz.
  • the removing of the component of the first frequency band as illustrated in FIG. 4, may be performed using a low-pass filter or a band-pass filter.
  • the driving frequency component of the RF power supply may be removed.
  • the operation S22 may include at least one of rectifying the electrical signal, removing the arc-caused perturbation component from the electrical signal, and converting an amplitude or polarity of the electrical signal.
  • the operation S24 may include extracting the arc-caused perturbation from the electrical signal.
  • the extracting of the arc-caused perturbation component may include removing the component of a second frequency band from the electrical signal.
  • the second frequency band may not include a frequency band due to the arc-caused perturbation component.
  • the frequency band due to the arc-caused perturbation component may be in the range of 10 KHz to 250 KHz.
  • the driving frequency component of the RF power supply may be removed during the generation of the comparison signal.
  • the operation S24 may include at least one of rectifying the electrical signal, extracting the arc-caused perturbation component from the electrical signal, and converting an amplitude or polarity of the electrical signal. To compare the reference signal and the comparison signal with each other, it is possible to convert the amplitude or polarity of the signals or give an offset to the signals.
  • the operation S26 may include comparing a comparison signal excluding the arc- caused perturbation component, and a comparison signal including the arc-caused perturbation component. During the operation S26, a difference between the reference signal and the comparison signal may be detected. The difference between the comparison signal and the reference signal may be output as a positive or negative signal by the use of a comparator. The operation S26 may be performed by converting the comparison signal and the reference signal into digital signals and determining them through logic operators. In the operation S26, the arc detection signal may generate a pulse proportional to the duration of the arc.
  • the operation S32 may include analyzing a width of at least one arc detection signal to determine whether the arc is generated in the load.
  • the width of the signal may be calculated using a logic operator.
  • the operation S32 it is determined that the arc detection signal is an arc if the width of the arc detection signal is in the range of a first reference width to a second reference width.
  • the first reference width may be 4 microseconds.
  • the second reference width may be 100 microseconds. If the width is between the first reference width and the second reference width, it is determined that the arc is generated in the load. If the width exceeds the second reference width, it is caused by the plasma characteristic variation. If the width is smaller than the first reference width, it is caused by the noise.
  • the operation S34 is performed using at least one current arc detection signal obtained by measuring a current flowing through the transmission line, and at least one voltage detection signal obtained by measuring a voltage of the transmission line.
  • the operation S34 may include determining a type of an arc generated in the load by analyzing polarities of the current arc detection signal and the voltage arc detection signal. In the operation S34, it may be determined that the second type arc is generated in the load when the current arc detection signal differs in polarity from the voltage arc detection signal; and it may be determined that the first type arc is generated in the load when the current arc detection signal is equal in polarity to the voltage arc detection signal.
  • the operation S34 it may be determined that the arc is the first type arc if the logic state or level of the current arc detection signal is low; and it may be determined that the arc is the second type arc if the logic state or level of the current arc detection signal is high.

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Abstract

Provided are an arc detecting apparatus and an arc monitoring method using the same. The arc detecting apparatus includes a transmission line connected to a load, and transmitting an electrical signal of a current or voltage, a detector measuring the electrical signal of the current or voltage of the transmission line, and a processor processing the electrical signal to generate at least one arc detection signal. Herein, the arc detection signal is generated corresponding to an arc generated in the load.

Description

Description
ARC DETECTING APPARATUS AND ARC MONITORING METHOD USING THE SAME
Technical Field
[1] The present invention relates to a discharge apparatus for generating plasma, and more particularly, to an arc detecting apparatus of a plasma generating apparatus for discharging plasma by the use of a radio frequency (RF) power supply, and an arc monitoring method using the same. Background Art
[2] Plasma processing apparatuses are being widely used for semiconductor fabrication process, material surface processing, air pollutant processing, nuclear fusion, etc. In particular, plasma processing apparatuses used in semiconductor fabrication process utilize an RF power supply mainly so as to generate plasma.
[3] In plasma processing using an RF power supply, an arc causing the stability of plasma processing to be poor may be generated if there are structural defects or small particles in a discharge chamber. Especially, in the case where the plasma processing apparatus is used to fabricate semiconductor devices, the arc may lead other small particles to be generated, thus causing semiconductor devices to be failed.
[4] Accordingly, in order to monitor the stability of the plasma processing, there is required a technique for monitoring whether an arc is generated inside a chamber. According to typical monitoring methods, the generation of the arc is monitored through analysis of optical properties of the plasma. However, such an optical monitoring method has a technical limitation in that it is difficult to determine an arc type. More specifically, the arc generated in the chamber may be classified into two types, of which one is a micro-arc that is allowable up to a predetermined level, and the other is a macro-arc necessitating an immediate response. However, the optical monitoring method is difficult to provide information about the arc type. Moreover, a window for observing plasma emission should be formed on a sidewall of the chamber for optically monitoring the arc generation, however, contamination of the window, which deteriorates the stability of an optical signal, becomes serious as a processing time increases.
[5] Although another monitoring method may be used where a detecting apparatus for monitoring the arc generation is disposed in a chamber, this monitoring method requires modification of a chamber structure, and may deteriorate plasma quality as well. Disclosure of Invention Technical Problem
[6] The present invention provides an arc detecting apparatus capable of monitoring arc generation and plasma processing in real time.
[7] The present invention also provides an arc detecting apparatus capable of monitoring arc generation and plasma processing without modification of a chamber structure.
[8] The present invention also provides a method for monitoring arc generation and plasma processing in real time.
[9] The present invention also provides a method for monitoring arc generation and plasma processing without modification of a chamber structure. Technical Solution
[10] Embodiments of the present invention provide arc detecting apparatuses including: a transmission line connected to a load, and transmitting an electrical signal of a current or voltage; a detector measuring the electrical signal of the current or voltage of the transmission line; and a processor processing the electrical signal to generate at least one arc detection signal, wherein the arc detection signal is generated corresponding to an arc generated in the load.
[11] In other embodiments of the present invention, arc monitoring methods include: measuring an electrical signal of a current or voltage transmitted through a transmission signal connected to a load; generating at least one arc detection signal corresponding to an arc generated in the load by processing the electrical signal; determining an arc generation in the load through analysis of the arc detection signal; and determining an arc type through analysis of the arc detection signal.
Advantageous Effects
[12] According to the present invention, electrical signals of a current and a voltage of a transmission line are measured. As a result, it is possible to distinguish an arc, a plasma characteristic variation and a noise, to easily mount the arc detecting apparatus to a discharge system, to distinguish a first type arc and a second type arc from each other, and to monitor arc generation and plasma processing in real time. Consequently, the abnormality of the plasma processing can be detected at an early stage. Brief Description of the Drawings
[13] The accompanying figures are included to provide a further understanding of the present invention, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present invention and, together with the description, serve to explain principles of the present invention. In the figures:
[14] FIG. 1 is block diagram illustrating a schematic configuration of an arc detecting apparatus according to an embodiment of the present invention;
[15] FIG. 2 is a block diagram illustrating a schematic configuration of a processor and a post-processor in FIG. 1;
[16] FIG. 3 is a block diagram of a processor according to an embodiment of the present invention;
[17] FIG. 4 is a flowchart illustrating an arc monitoring method according to embodiments of the present invention;
[18] FIG. 5 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention;
[19] FIG. 6 is a block diagram of a reference signal converter according to an embodiment of the present invention;
[20] FIG. 7 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention;
[21] FIG. 8 is a block diagram of a processor according to an embodiment of the present invention;
[22] FIG. 9 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention;
[23] FIG. 10 is a block diagram of a processor according to an embodiment of the present invention;
[24] FIG. 11 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention;
[25] FIG. 12 is a block diagram of a processor according to an embodiment of the present invention; and
[26] FIG. 13 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Mode for the Invention
[27] Objects, other objects, features and advantages of the present invention will be easily appreciated through preferred embodiments with reference to the accompanying drawings. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art.
[28] An arc may be classified into a micro-arc and a macro-arc. When the macro-arc is generated, overall electrical properties of plasma of radio frequency (RF) discharge may significantly changed. This is because a high-density ionization may be produced between a ground and an electrode in a discharge chamber. Therefore, when the macro-arc is generated, the RF discharge may be unstable in whole, or the RF discharge may not be maintained. In the case where an input power is constantly applied to a load, a current of a transmission line may be rapidly increased but a voltage of the transmission line may be decreased when the macro-arc is generated. Otherwise, the current of the transmission line may be increased but the voltage of the transmission line may not be changed when the macro- arc is generated.
[29] A duration of the macro-arc in plasma may be several nanoseconds, however, a duration of a current or voltage of the transmission line may be increased to several microseconds. An electrical signal of the transmission line according to the generation of the macro-arc is perturbed from an electrical signal of a steady state. A perturbation component caused by the generation of the macro-arc may be 100 KHz in a frequency space. When the macro-arc is generated, an input impedance of an RF power supply terminal in a load direction may be changed instantly. However, in the case where the duration of the macro-arc is too short so that the input impedance is restored to the original state, a matching network may not be changed in spite of the generation of the macro-arc. If, however, the RF discharge is not maintained due to the generation of the macro-arc, the matching network may be changed. Accordingly, when the macro-arc is generated, the input impedance of the power supply terminal may depend on a change of a load if the RF discharge is maintained.
[30] When a micro-arc is generated, both a current and a voltage of the transmission line may be decreased, and the RF discharge may be maintained well. The generation of the micro-arc may be an early phenomenon occurring before the generation of the macro- arc. When the micro-arc is generated, durations of a current and a voltage of the transmission line may be several microseconds. An electrical signal of the transmission line according to the generation of the micro- arc may be perturbed from an electrical signal of a steady state. A perturbation component caused by the generation of the micro-arc may be 1 MHz in a frequency space. When the micro-arc is generated, an input impedance of the RF power supply terminal may be varied instantly. However, the input impedance is restored to the original state in several microseconds, a matching network may not be varied. Accordingly, when the micro-arc is generated, the input impedance of the power supply terminal in the load direction may depend on a change of a load.
[31] A duration of plasma characteristic variation which is not caused by the arc may be several milliseconds (msec) at the transmission line. Hence, the matching network may be varied for the maximum power transmission according to the plasma characteristic variation. When the plasma characteristics are varied, the input impedance of the power supply terminal in the load direction may depend on the load and a variation of the matching network.
[32] In practice, it may be difficult to distinctly classify the arc into the macro-arc and the micro-arc because the arc may be generated due to other factors besides the above- described factor. Therefore, the arc is classified into a first type arc and a second type arc in the present disclosure. The first type arc is defined as an arc generated in the case where a current of the transmission line is smaller than a current in a steady state. The first type arc may include the micro-arc. The second type arc is defined as an arc generated in the case where a current of the transmission line is larger than a current in the steady state. The second type arc may include the macro-arc.
[33] When an arc is generated, electrical properties of the transmission line is rapidly changed. Consequently, an investigation on the electrical properties of the transmission line may provide the most reliable means of detecting whether an arc is generated. Also, the electrical properties of the transmission line can be monitored in real time.
[34] The electrical properties of the transmission line may be affected by the arc generation and the plasma characteristic variation. Therefore, it is necessary to distinguish the plasma characteristic variation and the arc from each other. A duration of the plasma characteristics variation may be several hundreds of milliseconds, and a duration of the arc may be in the range of several microseconds to several hundreds of microseconds. Accordingly, to distinguish the plasma characteristic variation and the arc from each other, it is preferable to detect the arc generation by measuring a current and voltage of the transmission line, and a duration of variation thereof.
[35] Meanwhile, although the arc generation may be detected using an input impedance of the transmission line, reflection coefficient, consumed power, and the like, this method is difficult to detect an arc type, and also difficult to distinguish the plasma characteristic variation and the arc with each other.
[36] Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[37] FIG. 1 is block diagram illustrating a schematic configuration of an arc detecting apparatus according to an embodiment of the present invention.
[38] Referring to FIG. 1, the arc detecting apparatus according to the present invention includes a load 24, an RF power supply 10 supplying power to the load 24, a transmission line 36, and a matching network 38. Herein, the transmission line 36 and the matching network 38 may be disposed between the load 24 and the RF power supply 10. A detector 22, which measures an electrical signal of a current or voltage of the transmission line 36, is disposed around the transmission line 36, and electrically connected to a processor 25 processing the electrical signal. The arc detecting apparatus further includes a post-processor 32 that determines an arc generation and an arc type. A controller 34 may control the arc detecting apparatus.
[39] The RF power supply 10 supplies an input power to input terminals Nl and N2. Only a portion of the input power supplied through the transmission line 36 is consumed in the load 24, and the other portion is reflected toward the input terminals Nl and N2 from the load 24. Therefore, the matching network 38 is configured to transmit the maximum input power to the load 24, and may be disposed between the input terminals Nl and N2 and load terminals N3 and N4. A driving frequency of the RF power supply 10 is selected from a range of 200 KHz to 500 MHz. In the embodiment of the present invention, the driving frequency may be 13.56 MHz.
[40] According to a modified embodiment of the present invention, the RF power supply
10 may be configured with one or more power supplies. For example, if the RF power supply 10 is configured with a first power supply and a second power supply, the first power supply may differ in driving frequency from the second power supply. Further, the first power supply and the second power supply may be connected to the same load. In this case, a first matching network and a first detector may be disposed between the first power supply and the load, and a second matching network and a second detector may be disposed between the second power supply and the load. Alternatively, the first and second matching networks are combined into one, and then one detector may be disposed in front of the load.
[41] An internal impedance of the RF power supply 10 may be 50 Ohm, and a characteristic impedance of the transmission line 36 may be 50 Ohm. The transmission line 36 may include at least one of a coaxial cable, two wires, a strip line and a bus bar.
[42] The load 24 is connected to the load terminals N3 and N4. The load 24 may be an electrode or an antenna for generating plasma. An impedance of the load 24 may be varied with time due to plasma characteristic variation or arc generation. In this case, reactances of variable reactance elements 12 and 14 in the matching network 38 may be varied for the maximum input power transmission. The detector 22 is provided to measure an electrical signal of the transmission line 36 connecting the input terminals Nl and N2 and the load terminals N3 and N4. The detector 22 may be disposed between the load terminals N3 and N4 and the matching network 38, and disposed between the input terminals Nl and N2 and the matching network 38. Alternatively, the detector 22 may be disposed inside the matching network 38.
[43] The detector 22 includes at least one sensor disposed around the transmission line 36.
The sensor may include at least one of a current measuring unit that measures a current flowing through the transmission line 36 to output a current signal SI, and a voltage measuring unit that measures a voltage of the transmission line 36 to output a voltage signal SV. The current measuring unit may include a coil used to measure an induced electromotive force. For example, the current measuring unit may be a Rogowski coil used to measure an induced electromotive force. The voltage measuring unit may be a voltage divider using an electrode or a resistor.
[44] The processor 25 may include at least one of a current processor and a voltage processor. The current processor may be configured such that it is connected to the current measuring unit to generate arc detection signals (see OUTl and OUT2 in FIG. 2) from the current signal SI. The voltage processor may be configured such that it is connected to the voltage measuring unit to generate an arc detection signal OUT3 from the voltage signal SV. Each of the arc detection signals OUTl, 0UT2 and 0UT3 may have a width corresponding to a duration of an arc generated in the load 24.
[45] The post-processor 32 may be configured such that it receives the arc detection signals OUT, 0UT2 and 0UT3, and detects the arc generation and the arc type. More specifically, according to the present invention, the arc generation may be detected through analysis of pulse widths of the arc detection signals OUTl, 0UT2 and 0UT3, and the arc type may be detected through analysis of signs of the arc detection signals OUTl, 0UT2 and 0UT3. To this end, the post-processor 32 may include at least one of an arc generation determining unit 46 that determines the arc generation by analyzing the pulse width of the arc detection signal, and an arc type determining unit 48 that determines the arc type by analyzing the logic state or level of the arc detection signal.
[46] The controller 34 controls the arc detecting apparatus to communicate with the processor 25 and the post-processor 32. The controller 34 may display results of the processor 23 on an external display. The communication may be performed by the use of RS232, RS485 or Devicenet/CAN. The controller 34 may be a computer.
[47] FIG. 2 is a block diagram illustrating a schematic configuration of the processor 25 and the post-processor 32 illustrated in FIG. 1.
[48] According to the present invention, the processor 25 may include at least one of a first current processor, a second current processor, and a voltage processor. The first and second current processors are configured such that they are connected to the current measuring unit to generate the arc detection signals OUTl and 0UT2 from the current signal SI. The voltage processor is configured such that it is connected to the voltage measuring unit to generate the arc detection signal 0UT3 from the voltage signal SV. Except for a difference in a kind of an input signal (i.e., current and voltage) and a difference in a method of processing each signal, the first and second current processors and the voltage processor have a similar configuration substantially. Hence, to avoid complexity in description, following description will be made on a basic structure of the processor 25 configured to generate one arc detection signal.
[49] FIGS. 1 and 2, the processor 25 may include at least one reference signal generating unit 44 configured to generate a reference signal REF, at least one comparison signal generating unit 40 configured to generate a comparison signal IN, and at least one comparison unit 42 configured to compare the reference signal REF and the comparison signal IN with each other to generate the arc detection signal OUT. The reference signal REF and the comparison signal IN may be generated using the electrical signal. [50] More specifically, the comparison signal generating unit 40 receives the current signal SI or the voltage signal SV of the detector 22 to output the comparison signal IN having a perturbation component caused by the arc (hereinafter, referred to as arc- caused perturbation component or arc-caused perturbation frequency component). That is, the comparison signal IN contains the arc-caused perturbation frequency component. The comparison signal IN does not have a driving frequency component, however, may have a frequency component due to a DC component or plasma characteristic variation. The arc-caused perturbation component means a frequency component of the current signal SI or the voltage signal SV caused by the arc generated in the load 24.
[51] The reference signal generating unit 44 may be configured to output the reference signal REF from the current signal SI or the voltage signal SV of the detector 22. The arc-caused perturbation component in the comparison signal IN is not contained in the reference signal REF. According to the embodiment of the present invention, the reference signal generating unit 44 may be configured to output the reference signal REF by processing one of the current signal SI or the voltage signal SV using an offset signal of the controller 34. Similarly to the comparison signal IN, the reference signal REF does not contain the driving frequency component of the RF power supply 10, but may contain a low frequency component which is removed the arc caused perturbation component. That is, the reference signal REF may contain a frequency component caused by plasma characteristic variation.
[52] The comparison signal generating unit 40 may include at least one of a comparison signal rectifier configured to rectify the electrical signal, a comparison signal filter configured to extract the arc-caused perturbation component from the electrical signal, and a comparison signal converter configured to convert an amplitude or polarity of the electrical signal.
[53] Likewise, the reference signal generating unit 44 may include at least one of a reference signal rectifier configured to rectify the electrical signal, a reference signal filter configured to remove the arc-caused perturbation component from the electrical signal, and a reference signal converter configured to convert an amplitude or polarity of the electrical signal. The reference signal generating unit 44 may further include at least one of a combiner and an offset signal generator configured to generate an offset signal. The combiner may be an adder or a sub tractor. That is, the combiner may add or subtract two input signals to output the added or subtracted result. According to another embodiment of the present invention, the combiner may be configured with an operational amplifier (OP-amp).
[54] The reference signal rectifier and the comparison signal rectifier rectify a input signal, e.g., current signal SI or voltage signal SV, to output a reference rectified signal and a comparison rectified signal, respectively. According to the embodiment of the present invention, each of these rectifiers may be one of a rectifier using a diode, a rectifier using a multiplier and a low-pass filter, and a rectifier using an OP-amp and a filter. According to the rectifier using the multiplier and the low-pass filter, the multiplier may square the input signal, and the low-pass filter may extract a low- frequency component from a signal output from the multiplier. According to another embodiment of the present invention, in terms of their functionalities, each of the reference signal rectifier and the comparison signal rectifier may be one of a half- wave rectifier, a full- wave rectifier, an RMS detector, and a peak detector.
[55] The reference signal filter is configured to remove an arc-caused perturbation frequency component from the input signal. The reference signal filter may be an active filter or a passive filter. In terms of its functionality, the reference signal filter may be one of a low-pass filter and a band-pass filter.
[56] The reference signal converter may be configured to convert an amplitude or polarity of the input signal. The reference signal converter may be at least one of a log amplifier, an attenuator, and a negative gain amplifier.
[57] The comparison signal filter may be configured to extract an arc-caused perturbation frequency component from the input signal. Resultantly, a frequency band filtered by the comparison signal filter differs from a frequency band filtered by the reference signal filter. The comparison signal filter may be an active filter or a passive filter. In terms of its functionality, the comparison signal filter may be one of a low-pass filter or a band-pass filter.
[58] The comparison signal converter may be configured to convert an amplitude or polarity of the input signal. The comparison signal converter may be at least one of a log amplifier, an attenuator, and a negative gain amplifier. According to the present invention, an amplitude variation of a signal converted by the comparison signal converter may differ from that of a signal converted by the reference signal converter.
[59] According to the embodiment of the present invention, the reference signal generating unit 44 includes at least one of a reference signal rectifier configured to rectify the electrical signal, a reference signal filter configured to remove the arc- caused perturbation component from the electrical signal, and a reference signal converter configured to convert an amplitude or polarity of the electrical signal. The reference signal filter is configured to extract the arc-caused perturbation component from the electrical signal that is rectified by the reference signal rectifier, and the reference signal converter is configured to convert an amplitude or polarity of the electrical signal that is filtered by the reference signal filter.
[60] According to the embodiment of the present invention, the comparison signal generating unit 40 includes at least one of a comparison signal rectifier configured to rectify the electrical signal, a comparison signal filter configured to allow the arc- caused perturbation component of the electrical signal to be contained, and a comparison signal converter configured to convert an amplitude or polarity of the electrical signal. The comparison signal filter is configured to extract the arc-caused perturbation component from the electrical signal that is rectified by the comparison signal rectifier. The comparison signal converter may convert an amplitude or polarity of the electrical signal that is filtered by the comparison signal filter.
[61] The comparison unit 42 compares the comparison signal IN and the reference signal
REF with each other to output the arc detection signal OUT. According to a difference between the reference signal REF and the comparison signal IN, the arc detection signal OUT has a high or low level, and a duration of the arc detection signal OUT may be proportional to a duration of the arc generated in the load. According to the embodiment of the present invention, the comparison unit 42 may be at least one of a comparator, an operational amplifier without a negative feedback loop, and a differentiating amplifier. The comparator may be configured to output the arc detection signal with a high level if a voltage of a non-inverting terminal is greater than that of an inverting terminal, and to output the arc detection signal with a low level if a voltage of the inverting terminal is greater than that of the non-inverting terminal. The comparison signal IN may be input to the non-inverting terminal of the comparator, and the reference signal REF may be input to the inverting terminal. The operation of the comparison unit 42 is exemplarily illustrated to realize a technical idea of the present invention, and thus it may be variously modified.
[62] According to the present invention, as described already with reference to FIG. 1, the post-processor 32 may include at least one of the arc generation determining unit 46 that determines the arc generation by measuring pulse widths of the arc detection signals OUTl, OUT2 and OUT3, and the arc type determining unit 48 that determines the arc type by comparing signs of the arc detection signals OUTl, OUT2 and OUT3.
[63] The arc detection signal may include a noise component and a plasma characteristic variation component that are irrespective of the arc. Therefore, it is necessary to remove theses components to correctly determine the arc generation. A pulse width due to the noise component is mostly shorter than the minimum width of a pulse due to the arc, and a pulse width due to the plasma characteristic variation is longer than the maximum width of the pulse due to the arc. By using these characteristics, the arc generation determining unit 46 according to the present invention is configured to determine the arc generation without error caused by the noise component and the plasma characteristic variation component.
[64] According to the embodiment of the present invention, the arc generation determining unit 46 may include a programmable logic device (PLD) to measure a pulse width of the arc detection signal. For example, the PLD may include a pulse width measuring device, which operates if the levels of the arc detection signals OUTl, 0UT2 and 0UT3 are different from normal levels. In this case, widths of the signals may be determined by an operation time of the pulse width measuring device. To minimize error about the arc generation, the arc generation determining unit 46 may include a circuit configured to determine whether the pulse width of the arc detection signal exists between a first reference width and a second reference width.
[65] More specifically, the first reference width may be several microseconds, and the second reference width may be several hundreds of microseconds. As described above, if the pulse width of the arc detection signal is less than the first reference width, there is a great likelihood that this arc detection signal may be a noise component. On the contrary, if the pulse width of the arc detection signal is greater than the second reference width, this arc detection signal may be a component resulting from the plasma characteristic variation. Consequently, when the detection signal may be the noise component or the component resulting from the plasma characteristic variation, the arc generation determining unit 46 does not generate an arc generation signal. The first and second reference widths may be set through the controller 34, and may be variously selected according to circumstances.
[66] The arc type determining unit 48 may compare the first arc detection signal OUTl of the current signal, the second arc detection signal 0UT2 of the current signal , and the third arc detection signal 0UT3 of the voltage so as to distinguish the first type arc and the second type arc from each other. When the first type arc is generated, both a current and a voltage of the transmission line may be decreased. In contrast, when the second type arc is generated, the current of the transmission line is increased but the voltage is decreased. Alternatively, when the second type arc is generated, the current of the transmission line may be increased but the voltage may not be changed.
[67] The arc type determining unit 48 according to the present invention is configured to determine whether the arc is the first type arc or the second type arc, by using the above-described characteristics. The arc type determining unit 48 may detect the variation direction of the current signal and the voltage signal due to the arc.
[68] In more detail, when the first arc detection signal OUTl of the current signal or the second arc detection signal 0UT2 of the current signal is equal in logic state or level to the third arc detection signal 0UT3 of the voltage signal, the arc type determining unit 48 may determine that the generated arc is the first type arc. On the contrary, when the first arc detection signal OUTl of the current signal or the second arc detection signal 0UT2 of the current signal differs in logic state or level from the third arc detection signal 0UT3 of the voltage signal, the arc type determining unit 48 may determine that the generated arc is the second type arc. The signs or level of the first, second and third arc detection signals OUTl, 0UT2 and 0UT3 may be changed depending on the non- inverting terminal and the inverting terminal of the comparison unit 42.
[69] According to a modified embodiment of the present invention, the generated arc may be determined as the first type arc if the logic state or level of a current arc detection signal is low. In contrast, the generated arc may be determined as the second type arc if the logic state or level of the current arc detection signal is high. That is, the generated arc may be determined as the first type arc if the first arc detection signal OUTl of the current signal has a low state or level, and determined as the second type arc if the second arc detection signal OUT2 of the current signal has a high state or level. The signs or levels of the first, second and third arc detection signals OUTl, 0UT2 and 0UT3 may be changed depending on the non-inverting terminal and the inverting terminal of the comparison unit 42.
[70] According to the embodiment of the present invention, the arc type determining unit
48 may further include a first type arc counter configured to count number of generation times of the first type arc. The arc type determining unit 48 may output a first type arc count signal DISPl according to the number of generation times of the first type arc counted by the first type arc counter. More specifically, when the number of generation times of first type arc per an hour is greater than a reference number of times, the arc type determining unit 48 may output a warning signal. When the generated arc is determined as the second type arc, the arc type determining unit 48 may output a second type arc signal DISP2. The reference number of times used to generate the warning signal associated with the first type arc may be controlled through the controller 34.
[71] According to the embodiment of the present invention, a programmable logic device
(PLD) may be used for real-timing monitoring in the arc generation determining unit 46 and the arc type determining unit 48. The arc generation determining unit 46 and the arc type determining unit 48 having the above technical features may be integrated onto the PLD.
[72] The controller 34 may include a display unit configured to visually display at least one of data for signals generated from the processor 25 and the post-processor 32 to a user. For example, the display unit receives the second type arc signal DISP2 and the first type arc count signal DISPl to display number of generation times of the first arc per an hour. If the number of generation times of the first arc per an hour is greater than the reference number of times, the display unit may display a first arc warning signal and may display a second type arc warning signal.
[73] As described above, the processor 25 may include at least one of the first current processor, the second current processor and the voltage processor. Each of the first current processor, the second current processor and the voltage processor may include the reference signal generating unit 44, the comparison signal generating unit 40, and the comparison unit 42, which have been described already with reference to FIG. 2.
[74] According to one modified embodiment of the present invention, the processor 25 may include only the voltage processor configured to process the voltage signal SV without the current processors. According to another modified embodiment, however, the processor 25 may include at least one of the first and second current processors configured to process the current signal SI without the voltage processor.
[75] FIG. 3 is a block diagram of the first current processor 26 according to an embodiment of the present invention.
[76] Referring to FIGS. 1, 2 and 3, the first current processor 26 includes a comparison signal generating unit 40, a reference signal generating unit 44, and a comparison unit 42. The comparison unit 42 compares a first comparison signal INIa of the comparison signal generating unit 40 and a first reference signal REFIa of the reference signal generating unit 44 with each other to output the first arc detection signal OUTl.
[77] The comparison signal generating unit 40 may include at least one of a comparison signal rectifier 64 configured to rectify an electrical signal, and a comparison signal filter 62 configured to allow the arc-caused perturbation component of the electrical signal to be contained.
[78] The reference signal generating unit 44 may include at least one of a reference signal rectifier 64 configured to rectify an electrical signal, a reference signal filter 66 configured to remove the arc-caused perturbation component from the electrical signal, and a reference signal converter 68 configured to convert an amplitude or polarity of the electrical signal.
[79] Referring to FIG. 3, the comparison signal rectifier 60 receives the current signal SI to output a comparison rectified signal RCTIa. The comparison signal filter 62 receives the comparison rectified signal RCTIa to output a first comparison signal INIa containing the perturbation frequency component caused by the arc. According to the embodiment of the present invention, the comparison signal filter 62 is configured to remove a driving frequency component of the RF power supply 10 from the comparison rectified signal RCTIa. That is, the first comparison signal INIa does not contain the driving frequency component.
[80] The reference signal rectifier 64 receives the current signal SI of the detector 22 to output a reference rectified signal RCT2a. The comparison signal rectifier 60 may be identical to the reference signal rectifier 66. That is, according to the embodiment of the present invention, the comparison signal generating unit 40 and the reference signal generating unit 44 may share one rectifier 60 or 64.
[81] The reference signal filter 66 receives the reference rectified signal RCT2a to output a preliminary reference signal REIa where the driving frequency component of the RF power supply 10 and the perturbation frequency component caused by the arc are removed.
[82] When both the comparison signal filter 62 and the reference signal filter 66 are low- pass filters, a cutoff frequency of the comparison signal filter 62 may be higher than that of the reference signal filter 66. When both the comparison signal filter 62 and the reference signal filter 66 are low-pass filters, the cutoff frequency of the reference signal filter 66 may be set to a sufficiently low value (for example, about 10 KHz) such that information about the arc is not contained in the reference signal. In contrast, the cutoff frequency of the comparison signal filter 62 may be set to a value (for example, about 250 KHz) allowing the information about the arc to be contained in the comparison signal.
[83] The preliminary reference signal REIa is similar in DC level to the first comparison signal INIa, and thus a direct comparison therebetween is not suitable for achieving meaningful results. Here, the DC level means a difference in a reference level between the case where signal distortion does not occur, and the case where the signal distortion occurs due to the arc. The reference signal converter 68 converts an amplitude or polarity of the preliminary reference signal REIa to output the first reference signal REFIa.
[84] The comparison unit 42 compares the first comparison signal INIa of the comparison signal generating unit 40 and the first reference signal REFIa of the reference signal generating unit 44 to output the first arc detection signal OUTl. The comparison unit 42 may be an operational amplifier without a negative feedback loop, and a comparator.
[85] FIG. 4 is a flowchart illustrating an arc monitoring method according to embodiments of the present invention. The following arc monitoring method may be realized through the arc detecting apparatus illustrated in FIGS. 1 through 3. According to another embodiment of the present invention, the following arc monitoring method may include determining an arc generation and an arc type from an electrical signal measured using a predetermined software.
[86] Referring to FIG. 4, the arc monitoring method according to the present invention includes: measuring an electrical signal of a current or voltage of a transmission line connected to a load in operation SlO; generating at least one arc detection signal corresponding to the arc generation at the load by processing the electrical signal in operation S20; determining the arc generation at the load through analysis of the arc detection signal in operation S32; and determining the arc type at the load through analysis of the arc detection signal in operation S34.
[87] The operation S20 may include: generating a reference signal from the electrical signal in operation S22; generating a comparison signal from the electrical signal in operation S24; and comparing the reference signal and the comparison signal with each other to generate the arc detection signal in operation S26. The reference signal, the comparison signal, and the arc detection signal may be generated through the method illustrated in FIGS. 1 through 3. Likewise, the determination on the arc generation and the arc type may be accomplished through the method illustrated in FIGS. 1 through 3.
[88] FIG. 5 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 5 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26 of FIG. 3. In detail, FIG. 5 illustrate waveforms of signals generated from the arc detecting apparatus where a half- wave rectifier is used as the reference signal rectifier 64 and the comparison signal rectifier 60, and a low-pass filter is used as the comparison signal filter 62 and the reference signal filter 66. According the arc detecting apparatus of this embodiment, the reference signal filter 66 is a low-pass filter having a cutoff frequency lower than the comparison signal filter 62.
[89] FIG. 5(a) illustrates a waveform of the current signal SI output from the detector 22;
FIG. 5(b) illustrates a waveform of the comparison rectified signal RCTIa output from the comparison signal rectifier 60, and a waveform of the reference rectified signal RCT2a output from the reference signal rectifier 64; FIG. 5(c) illustrates a waveform of the first comparison signal INIa output from the comparison signal filter 62, a waveform of the preliminary reference signal REIa output from the reference signal filter 66, and a waveform of the first reference signal REFIa output from the reference signal generating unit 44; FIG. 5(d) illustrates a waveform of the first arc detection signal OUTl output from the comparison unit 42; and FIG. 5(e) illustrates a waveform of the output signal DISPl of the first type arc counter that is output from the arc type determining unit 48.
[90] Referring to FIG. 5 (a), the detector 22 outputs the current signal SI obtained by measuring a current flowing through the transmission line. The current signal SI includes information about the plasma characteristic variation as well as information about the arc. The current signal SI contains a variation of a measured current, but it may be output in a voltage form after it is converted into a voltage. The current signal SI due to first type arcs A, B, C and D is sharply reduced, and then restored to a normal level. If plasma characteristics are varied, the amplitude of the current signal SI may be increased/decreased from Vl to V2, as shown in a duration between t3 and t4. The duration (t4-t3) of the plasma characteristic variation is much longer than the duration (t2-tl) of a variation of the current signal SI caused by arc generation. The arc detecting apparatus according to the present invention utilizes a duration difference in order to distinguish the plasma characteristic variation and the arc from each other. The durations of the first type arcs A, B, C and D may be in the range of several mi- croseconds to several hundreds of microseconds.
[91] Referring to FIG. 5(b), the comparison signal rectifier 60 receives the current signal
SI to output the comparison rectified signal RCTIa that is half-wave rectified, and the reference signal rectifier 64 receives the current signal SI to output the reference rectified signal RCT2a that is half- wave rectified. That is, the comparison rectified signal RCTIa has only one of a positive or negative component of the current signal SI. The perturbation frequency component due to the first type arc and the frequency component of the plasma characteristic variation are not removed by the comparison signal rectifier 60 and the reference signal rectifier 64, but are contained in the comparison rectified signal RCTIa and the reference rectified signal RCT2a.
[92] Referring to FIG. 5(c), the comparison signal filter 62 outputs the first comparison signal INIa where the driving frequency component of the RF power supply 10 is removed from the comparison rectified signal RCTIa. The first comparison signal INIa still has the arc-caused perturbation component. To this end, the comparison signal filter 62 may be a low-pass filter. A cutoff frequency of the low-pass filter 62 is 250 KHz lower than the driving frequency (13.56 MHz) of the power supply. When the cutoff frequency of the comparison signal filter 62 is too low, information about the arc may be lost from the first comparison signal INIa. It is preferable that the low- pass filter 62 has a cutoff frequency (e.g., 250 KHz) lower than the driving frequency (13.56 MHz) of the power supply. That is, the first comparison signal INIa has the information about the plasma characteristic variation and the information about the first type arcs A, B, C and D. Also, when there is the second type arc, the first comparison signal INIa may include the information about the second type arc.
[93] Referring to FIG. 5(c), the reference signal filter 66 removes the arc-caused perturbation frequency component and the RF driving frequency component from the reference rectified signal RCT2a to output the preliminary reference signal REIa. The reference signal filter 66 is a low-pass filter having a cutoff frequency that can remove the arc-caused perturbation frequency component, and this cutoff frequency may be 10 KHz. Since the duration of the arc is in the range of several microseconds to several hundreds of microseconds, it is preferable that the cutoff frequency of the reference signal filter is 10 KHz. It is preferable that the reference signal filter 66 should be configured such that the information about the plasma characteristic information is not lost. As a result, the DC level is increased between t3 and t4 because the preliminary reference signal REIa has information about the plasma characteristic variation illustrated in a duration t3-t4. That is, as illustrated in FIG. 5(c), the preliminary reference signal REIa exhibits DC level characteristic that the preliminary reference signal REIa is increased in a duration between t3 and t4 like the current signal SI.
[94] Referring to FIG. 5(c), as shown in the DC bias, the preliminary reference signal REIa and the first comparison signal INIa have substantially the same level, which cannot be distinguished from each other. The reference signal converter 68 changes (e.g., reduces) an amplitude of the preliminary reference signal REIa at a predetermined ratio, thereby generating the first reference signal REFIa of which an amplitude differs from that of the first comparison signal INIa. A gain (g=REFla/REla) of the reference signal converter 68 may be controlled by the controller 34. The gain of the reference signal converter 68 may be in the range of 0.1 to 0.8. Since the first reference signal REFIa includes the information of the plasma characteristic variation (see the duration between t3 and t4), the DC level is increased between t3 and t4.
[95] Referring to FIG. 5(d), the comparison unit 42 receives the first comparison signal
INIa and the first reference signal REFIa to compare them with each other, and then outputs the first arc detection signal OUTl corresponding to the arc-caused perturbation. Since the first comparison signal INIa and the first reference signal REFIa contain the information about the plasma characteristic variation, the comparison unit 42 determines that the plasma characteristic variation is not an arc. Hence, the information about the plasma characteristic variation is not contained in the first arc detection signal OUTl. As described above, pulses a, b c and d corresponding to the arc generations are produced as shown in the waveform diagram of the first arc detection signal OUTl because the perturbation component caused by the first type arcs A, B, C and D of the current signal SI is contained in the first comparison signal INIa but not contained in the first reference signal REFIa. According to the embodiment of the present invention, in the case D where the arc is generated after the plasma characteristics are varied, a width of the pulse d of the first arc detection signal OUTl corresponding to the arc D may differ from widths of the pulses a, b and c of the first arc detection signal OUTl before the plasma characteristics are varied.
[96] Referring to FIGS. 2 and 5(e), the post-processor 32 receives the first arc detection signal OUTl to measure its pulse width, and determines whether the pulses a, b, c and d are resulted from the arc. According to the embodiment of the present invention, when the pulse is determined as the arc, the arc type determining unit 48 outputs the first arc count signal DISPl to cumulatively count the number of arc generation times.
[97] FIG. 6 is a block diagram of the reference signal converter 68 according to an embodiment of the present invention.
[98] Referring to FIGS. 3 and 6, the reference signal converter 68 includes an analog- to-digital converter (ADC) 70, a microcontroller 74, and a digital-to-analog converter (DAC) 72. The ADC 70 samples the preliminary reference signal REIa to convert it into a digital signal. The microcontroller 74 changes an amplitude of the digital signal. The DAC 72 receives the digital signal of which the amplitude is changed, to thereby output the first reference signal of an analog signal. The profile of the first reference signal REFIa may trace along the profile of the preliminary reference signal REIa by maintaining a sampling time of the ADC 70 to several microseconds or less. The controller 34 can control the microcontroller 74.
[99] FIG. 7 is a waveform diagram illustrating an arc monitoring method according to an embodiment of the present invention. Specifically, FIG. 7 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26 illustrated in FIG. 3. More specifically, FIG. 7 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which half- wave rectifiers are used for the reference signal rectifier 64 and the comparison signal rectifier 60, a band-pass filter is used for the comparison signal filter 62, and a low- pass filter is used as the reference signal filter 66. According to this embodiment, the comparison signal filter 62 has a low cutoff frequency in the range of 10 Hz to 100 Hz and a high cutoff frequency is 250 KHz, and the reference signal filter 66 has a cutoff frequency of 10 KHz.
[100] In detail, FIG. 7 (a) illustrates a waveform of a current signal SI output from the detector 22; FIG. 7(b) illustrates a waveform of a comparison rectified signal RCTIb output from the comparison signal rectifier 60 and a waveform of a reference rectified signal RCT2b output from the reference signal rectifier 64; FIG. 7(c) illustrates a waveform of a first comparison signal INIb, a waveform of a preliminary reference signal REIb output from the reference filter 66, and a waveform of a preliminary reference signal REIb output from the reference signal filter 66, and a waveform of a first reference signal REFIb output from the reference signal generating unit 44; FIG. 7(d) illustrates a waveform of a first arc detection signal OUTl output from the comparison unit 42; and FIG. 7(e) illustrates a waveform of an output signal DISPl of a first type arc counter that is output from the arc type determining unit 48. For brevity of description, duplicate descriptions, which have been made already with reference to FIGS. 3 through 5, will be minimally provided below.
[101] Referring to FIG. 7(c), as illustrated in FIG. 5(c), the comparison signal filter 62 receives the comparison rectified signal RCTIb to output the first comparison signal INIb where a DC component and a driving frequency component of the RF power supply 10 are removed but an arc-caused perturbation component is contained. The first comparison signal INIb does not contain information (duration t3 to t4) about plasma characteristic variations, but contains information about first type arcs (A, B, C and D). Also, if there is a second type arc, the first comparison signal INIb may include information about the second type arc generation.
[102] As illustrated in FIG. 5(c), the preliminary reference signal REIb contains information about the plasma characteristic variation, and thus the DC level is increased between t3 and t4. The reference signal converter 68 may convert at least one of an amplitude and sign of the preliminary reference signal REIb to generate the first reference signal REFIb. The reference signal converter 68 may be a negative gain amplifier, and the gain may be controlled by the controller 34. The gain (g=REFlb/RElb) of the negative gain amplifier may be in the range of -1.0 to -.1. Accordingly, the DC level between t3 and t4 is decreased because the first reference signal REFIb includes a duration of the plasma characteristic variation.
[103] Referring to FIGS. 3 and 7(d), the comparison unit 42 compares the comparison signal INIb and the first reference signal REFIb to output the first arc detection signal OUTl. As described above, the arc-caused perturbation component is contained in the first comparison signal INIb but not contained in the first reference signal REFIb. Therefore, the first arc detection signal OUTl has the pulses a, b, c and d corresponding to the arc generation, as illustrated in FIG. 7(d). According to the embodiment of the present invention, the pulse d corresponding to the arc generated after the plasma characteristics are varied may differ in width from the pulses a, b and c generated before the plasma characteristics are varied.
[104] FIG. 8 is a block diagram of a processor according to an embodiment of the present invention. For brevity of description, duplicate descriptions, which have been made already with reference to FIGS. 3 through 5, will be minimally provided below.
[105] Referring to FIGS. 1, 2 and 8, the processor 25 according to this embodiment may be used for one of a first current processor, a second current processor, and a voltage processor. The first current processor 26c includes a comparison signal generating unit 40c, a reference signal generating unit 44c, and a comparison unit 42c. The comparison unit 42c compares the first comparison signal INIc of the comparison signal generating unit 40c and the first reference signal REFIc of the reference signal generating unit 44c to thereby output the first arc detection signal OUTl.
[106] Since this embodiment of the present invention is similar to the embodiment in FIGS. 3 through 5, peculiar features of this embodiment will be described below.
[107] The comparison signal generating unit 40c may include at least one of a comparison signal rectifier 100 configured to rectify an electrical signal, a comparison signal filter 102 configured to allow the arc-caused perturbation component of the electrical signal to be contained, and a comparison signal converter 104 configured to convert at least one of an amplitude and polarity of the electrical signal.
[108] The reference signal generating unit 44c may include at least one of a reference signal rectifier 106 configured to rectify an electrical signal, a reference signal filter 108 configured to remove an arc-caused perturbation component from the electrical signal, and a comparison signal converter 110 configured to convert at least one of an amplitude and polarity of the electrical signal, an offset signal generator 114 configured to generate an offset signal OSc, and a combiner 112 configured to combine the offset signal and an output signal of the reference signal converter 110.
[109] The comparison signal rectifier 100 receives a current signal SI to output a comparison rectified signal RCTIc. The comparison signal filter 102 receives the comparison rectified signal RCTIc to output a preliminary comparison signal SNIc where a driving frequency component of the RF power supply is removed but the arc- caused perturbation component is contained. The comparison signal converter 104 converts at least one of an amplitude and polarity of the preliminary comparison signal SNIc to output the first comparison signal INIc. The comparison signal converter 104 may be a log amplifier. The log amplifier has an output proportional to a log value of an input signal.
[110] The reference signal rectifier 106 receives the current signal SI of the detector 22 to output a reference rectified signal RCT2c. The comparison signal rectifier 100 and the reference signal rectifier 106 may be identical to each other. Also, the comparison signal rectifier 100 and the reference signal rectifier 106 may share one of the comparison signal rectifier 100 and the reference signal rectifier 106. The reference signal filter 108 receives the reference rectified signal RCT2c to output the preliminary reference signal REIc where the driving frequency component of the RF power supply and the arc-caused perturbation component are removed. The reference signal filter 108 may be a low-pass filter. A cutoff frequency of the comparison signal filter 102 may be higher than that of the reference signal filter 108. The reference signal converter 110 converts at least one of an amplitude and polarity of the preliminary reference signal to output a converted reference signal PRIc. The reference signal converter 110 may be a log amplifier. The log amplifier has an output proportional to a log value of an input signal.
[I l l] The offset signal generator 114 may generate the offset signal OSc. The offset signal OSc of the offset signal generator 114 may be set by the controller 34.
[112] The combiner 112 combines the converted reference signal PRIc and the offset signal OSc generated from the offset signal generator 114 to output a first reference signal REFIc. An operational amplifier may be used for the combiner 112. The combiner 112 may be an adder or a sub tractor.
[113] The comparison unit 42c compares the first comparison signal INIc and the first reference signal REFIc to output the first arc detection signal OUTl.
[114] FIG. 9 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 9 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26c in FIG. 8. More specifically, FIG. 9 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which RMS detectors are used for the reference signal rectifier 106 and the comparison signal rectifier 100, a low-pass filter is used for the comparison signal filter 102 and the reference signal filter 108, and a log amplifier is used for the comparison signal converter 104 and the reference signal converter 110. According to this embodiment, the comparison signal filter 102 has a cutoff frequency of 250 KHz, and the reference signal filter 66 has a cutoff frequency of 10 KHz.
[115] In detail, FIG. 9(a) illustrates a waveform of a current signal SI output from the detector 22; FIG. 9(b) illustrates a waveform of a preliminary comparison signal SNIc output from the comparison signal filter 102 and a waveform of preliminary reference signal REIc output from the reference signal filter 108; FIG. 9(c) illustrates a waveform of a first comparison signal INIc output from the comparison signal converter 104, and a waveform of a first reference signal REFIc output from the combiner 112; FIG. 9(d) illustrates a waveform of a first arc detection signal OUTl output from the comparison unit 42c; and FIG. 9(e) illustrates a waveform of an output signal DISPl of a first type arc counter that is output from the arc type determining unit 48. For brevity of description, duplicate descriptions, which have been made already with reference to FIGS. 3 through 5, will be minimally provided below.
[116] Referring to FIG. 9(c), the comparison signal converter 104 converts the preliminary comparison signal SNIc into a log value to output the first comparison signal INIc.
[117] Referring to FIG. 9(c), the reference signal converter 110 converts the preliminary comparison signal REIc into a log value to output the converted reference signal PRIc. The combiner 112 combines the converted reference signal PRIc and the offset signal OSc generated from the offset signal generator 114 to output the first reference signal REFIc.
[118] DC level of the first comparison signal INIc and the converted reference signal PRIc have the substantially same levels, making it difficult to distinguish them from each other. The combiner 112 adds the offset signal OSc of the offset signal generator 114 and the converted reference signal PRIc of the reference signal converter 110 to generate the first reference signal REFIc that can be distinguished from the first comparison signal INIc. The offset signal OSc may have a negative level.
[119] Referring to FIG. 9(d), the comparison unit 42c compares the first comparison signal INIc and the first reference signal REFIc to output the first arc detection signal OUTl corresponding to the arc-caused perturbation. Since information about plasma characteristics is contained in both the first comparison signal INIc and the first reference signal REFIc, information about the plasma characteristic variation is not contained in the first arc detection signal OUTl. However, the arc-caused perturbation component is contained in the first comparison signal INIc but not contained in the first reference signal REFIc, the first arc detection signal OUTl has pulses a, b, c and d corre- sponding to the arc generation, as illustrated in FIG. 9(d). According to the embodiment of the present invention, the pulse d corresponding to the arc generated after the plasma characteristics are varied may differ in width from the pulses a, b and c generated before the plasma characteristics are varied.
[120] FIG. 10 is a block diagram of a processor according to an embodiment of the present invention.
[121] Referring to FIGS. 1, 2 and 10, the processor 25 according to this embodiment may be used for one of a first current processor, a second current processor, and a voltage processor. The first current processor 26d includes a comparison signal generating unit 4Od, a reference signal generating unit 44d, and a comparison unit 42d. The comparison unit 42d compares the first comparison signal INId of the comparison signal generating unit 4Od and the first reference signal REFId of the reference signal generating unit 44d to output the first arc detection signal OUTl.
[122] The comparison signal generating unit 4Od may include a sub tractor 92, a first signal calculator 85 configured to receive the current signal SI to generate a first calculation signal D_INld having an arc-caused perturbation component, and a second signal calculator D_IN2d configured to receive the current signal SI to generate a second calculation signal D_IN2d where the arc-caused perturbation component is removed. The subtracter 92 receives outputs signals of the first and second signal calculators 85 and 91 to output a difference therebetween as the first comparison signal INId.
[123] The first signal calculator 85 may include at least one of a first comparison signal rectifier 80, a first comparison signal filter 82, and a first reference signal converter 84. The second signal calculator 91 may include at least one of a second comparison signal rectifier 86, a second comparison signal filter 88, and a second reference signal converter 90.
[124] The first comparison signal rectifier 80 receives the current signal SI of the detector 22 to output a first rectified signal RCTId. The first comparison signal rectifier 80 may be an RMS detector. The RMS detector outputs a root mean square (RMS) value of an input signal. The first comparison signal filter 82 outputs a first comparison filter signal SNId where a driving frequency component of the RF power supply 10 is removed from the first rectified signal RCTId but the arc-caused perturbation component is contained.
[125] The first comparison signal converter 84 receives the first comparison filter signal SNId, and then converts at least one of an amplitude and polarity of the first comparison filter signal SNId to output the first calculation signal D_INld. The first comparison signal converter 84 may be a log amplifier. The log amplifier outputs a log value of an input signal. The first calculation signal D_INld may include information about the plasma characteristic variation and information about a first type arc. Also, if there is a second type arc, the first calculation signal D_INld may contain information about the generation of the second type arc.
[126] The second comparison signal rectifier 86 receives the current signal SI of the detector 22 to output a second rectified signal RCT2d. The second comparison signal rectifier 86 may be an RMS detector. The RMS detector outputs an RMS value of an input signal. The second comparison signal filter 88 outputs a second comparison filter signal SN2d where a driving frequency component of the RF power supply 10 and the arc-caused perturbation component are removed from the second rectified signal RCT2d.
[127] The second comparison signal converter 90 receives the second comparison filter signal SN2d, and then converts at least one of an amplitude and polarity of the second comparison filter signal SN2d to generate the second calculation signal D_IN2d. The second comparison signal converter 90 may be a log amplifier. The log amplifier outputs a log value of an input signal. The second calculation signal D_INld may contain information about the plasma characteristic variation.
[128] The subtractor 92 receives the outputs signals of the first and second signal calculators 85 and 91 to output a difference therebetween as the first comparison signal INId. A differentiating amplifier may be used for the subtractor 92. Information about the DC level and the plasma characteristic variation may be removed from the first reference signal INId by means of the subtractor 92.
[129] The reference signal generating unit 44d processes the current signal SI to generate the first reference signal REFId, as illustrated in FIGS. 2 through 5. Alternatively, the reference signal generating unit 44d may generate the first reference signal REFId of a constant level without processing the current signal SI.
[130] FIG. 11 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 11 illustrates waveforms of signals generated from the arc detecting apparatus including the first current processor 26d of FIG. 10. More specifically, FIG. 11 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which RMS detectors are used for the first comparison signal rectifier 80 and the second comparison signal rectifier 86, a low-pass filter is used for the first comparison signal rectifier 80 and the second comparison signal rectifier 86, and a log amplifier is used for the first comparison signal converter 84 and the second comparison signal converter 90. According to this embodiment, the first comparison signal filter 82 has a cutoff frequency of 250 KHz, and the second comparison signal filter 88 has a cutoff frequency of 10 KHz.
[131] In detail, FIG. 1 l(a) illustrates a waveform of a current signal SI output from the detector 22; FIG. 1 l(b) illustrates a waveform of a first comparison filter signal SNId output from the first comparison signal filter 82 and a waveform of a second comparison filter signal SN2d output from the second comparison signal filter 88; FIG. 1 l(c) illustrates a waveform of a first calculation signal D_INld output from the first comparison signal converter 84, and a waveform of a first calculation signal D_IN2d output from the second comparison signal converter 90; FIG. 1 l(d) illustrates a waveform of a first comparison signal INId output from the subtracter 92, and a waveform of the first reference signal REFId output from the reference signal generator 44; FIG. 1 l(e) illustrates a waveform of the first arc detection signal OUTl output from the comparator 42; and FIG. 1 l(f) illustrates a waveform of an output signal DISPl of the first type arc counter that is output from the arc type determining unit 48.
[132] Referring to FIG. 1 l(b), the first comparison signal filter 82 generates the first comparison filter signal SNId where a driving frequency component of the RF power supply 10 is removed from the output signal RCTId of the first comparison signal rectifier 80 but the arc-caused perturbation component is contained. However, the first comparison filter signal SNId contains information (duration t3 to t4) about the plasma characteristic variation and information about first type arcs A, B, C and D. Also, if there is a second type arc, the first comparison filter signal SNId may contain information about the generation of the second type arc.
[133] Referring to FIG. 1 l(b), the second comparison signal rectifier 86 receives the current signal SI to output an RMS value of the second rectified signal RCT2d, and the second comparison signal filter 88 receives the root mean square value of the second rectified signal RCT2d to output a signal where the driving frequency component of the RF power supply 10 and the arc-caused perturbation component are removed. An output signal SN2d of the second comparison signal filter 88 may contain information about the plasma characteristic variation (duration t3 to t4).
[134] Referring to FIG. 1 l(c), the first comparison signal converter 84 converts the first comparison filter signal SNId into a log value to generate the first calculation signal D_Inld. Referring to FIG. 1 l(c), the second comparison signal converter 90 converts the second comparison filter signal SN2d into a log value to generate the second calculation signal D_IN2d.
[135] Referring to FIG. 1 l(d), the subtracter 92 subtracts the second calculation signal
D_IN2d from the first calculation signal D_INld to output the first comparison signal INId. By the use of the log amplifier and the subtracter 92, the first comparison signal INId is a signal obtained by converting a ratio between the first and second reference filter signals SNId and SN2d into a log value. Therefore, the first comparison signal INId has neither DC level nor a variation in DC level due to the plasma characteristic variation. Also, since the first comparison signal INId depends on the ratio, the output signal of the reference signal generator 44d, i.e., the first reference signal REFId, may be set to a constant value. That is, the first reference signal REFId may be set to a constant value, not from the current signal SI.
[136] FIG. 12 is a block diagram of a processor according to an embodiment of the present invention.
[137] Referring to FIGS. 1, 2, 8 and 12, the processor 25 according to this embodiment may include a first current processor 26, and a second current processor 28. The processor 25 may further include a voltage processor. The voltage processor may have the same configuration as the first and second current processors 25 and 26. The first and second current processors 25 and 26 may have the configuration illustrated in FIG. 8. The processor 25 includes a comparison signal generating unit 40, a reference signal generating unit 44, and a comparison unit 42.
[138] The first current processor 26 includes a first comparison signal generating unit 4Oe, a first reference signal generating unit 44e, and a first comparison unit 42e. The first comparison signal generating unit 4Oe may include at least one of a first comparison signal rectifier 10Oe, a first comparison signal filter 102e, and a first comparison signal converter 104e. The first reference signal generating unit 44e may include at least one of a first reference signal rectifier 106e, a first reference signal filter 108e, a first reference signal converter 104e, a first combiner 112e, and a first offset signal generator 114e. The first comparison unit 42e compares the first comparison signal INIe and the first reference signal REFIe to output a first arc detection signal OUTl.
[139] The second current processor 28 includes a second comparison signal generating unit 4Of, a second reference signal generating unit 44f, and a second comparison unit 42f. The second comparison signal generating unit 4Of may include at least one of a second comparison signal rectifier 10Of, a second comparison signal filter 102f, and a second comparison signal converter 104f. The second reference signal generating unit 44f may include at least one of a second reference signal rectifier 106f, a second reference signal filter 108f, a second reference signal converter 104f, a second combiner 112f, and a second offset signal generator 114f. The second comparison unit 42f compares the second comparison signal INIf and the second reference signal REFIf to output a second arc detection signal OUT2.
[140] The post-processor 32 illustrated in FIG. 2 receives the first and second arc detection signals OUTl and OUT2 to measure their pulse widths. If the arc is determined as a first type arc, the arc type determining unit 48 outputs a first type arc count signal DISPl; and if the arc is determined as a second type arc, the arc type determining unit 48 outputs a second type arc signal DISP2. In the case where the processor 25 has only the first and second current processors 26 and 28, the arc type may be determined by signs of the first and second arc detection signals OUTl and OUT2 without comparison with a third arc detection signal of the voltage processor 30.
[141] Referring to FIGS. 1 and 12, the processor 25 may include a first current processor 26, a second current process 28, and a voltage processor. The voltage processor may have the same configuration as the first current processor. The voltage processor receives the voltage signal SV to process it, and compares a voltage comparison signal and a voltage reference signal to output a third arc detection signal OUT3. The first current processor 26 may have the same configuration as the second current processor 28 and the voltage processor. If the first or second arc detection signal OUTl or OUT2 of the current signal differs in the logic state or level from the third arc detection signal OUT3 of the voltage signal, it is determined that the second arc detection signal OUT2 is a second type arc. On the contrary, if the first or second arc detection signal OUTl or 0UT2 is equal in the logic state or level to the third arc detection signal 0UT3, it is determined that the first arc detection signal OUTl is a first type arc.
[142] FIG. 13 is a waveform diagram illustrating an arc detecting apparatus according to an embodiment of the present invention. Specifically, FIG. 13 illustrates waveforms of signals generated from the arc detecting apparatus including the first and second current processors 26 and 28 illustrated in FIG. 12. More specifically, FIG. 13 illustrates waveforms of signals generated in an arc detecting apparatus according to an embodiment, in which RMS detectors are used for the first and second reference signal rectifiers 106e and 106f, and the first and second comparison signal rectifier lOOe and 106e, a low-pass filter is used for the first and second comparison signal filters 102e and 102f, and the first and second reference signal filters 108e and 108f, and a log amplifier is used for the first and second comparison signal converters 104e and 104f, and the first and second reference signal converters HOe and 11Of. According to this embodiment, the first and second comparison signal filters 102e and 102f have cutoff frequencies of 250 KHz, and the first and second reference signal filters 108e and 108f have cutoff frequencies of 10 KHz.
[143] In detail, FIG. 13(a) illustrates a waveform of a current signal SI output from the detector 22; FIG. 13(b) illustrates waveforms of first and second preliminary comparison signals SNIe and SN2f output from the first and second comparison signal filters 102e and 102f, respectively, and waveforms of first and second preliminary reference signals REIe and RE2f output from the first and second reference signal filters 108e and 108f, respectively; FIG. 13(c) illustrates waveforms of the first and second comparison signals INIe and IN2f output from the first and second comparison signal converters 104e and 104f, respectively, and waveforms of the first and second reference signals REFIe and REF2f output from the first and second combiners 112e and 112f, respectively; FIG. 13(d) illustrates waveforms of the first and second arc detection signals OUTl and OUT2 output from the first and second comparison units 42e and 42f; and FIG. 13(e) illustrates waveforms of an output signal DISPl of the first type arc counter and a second arc signal DISP2, which are output from the arc type determining unit 48.
[144] Referring to FIG. 13 (a), the detector 22 outputs the current signal SI obtained by measuring a current flowing through the transmission line. The current signal SI may include information about plasma characteristic variation as well as information about the arc. The amplitude of the current signal SI due to the first type arcs A, B, C and D is sharply decreased and then restored to the original state. The amplitude of the current signal due to the second type arc F is increased and then decreased to reach a normal state. A duration (t2-tl) of amplitude variation of the current signal SI due to the first type arc may be shorter than a duration (t6-t5) of amplitude variation of the current signal SI due to the second type arc.
[145] Referring to FIG. 13(b), the first and second comparison signal filters 102e and 102f generates the first and second preliminary comparison signals SNIe and SN2f where an arc-caused component and a component due to the plasma characteristic variation are contained but the driving frequency component is removed. The first and second preliminary comparison signals SNIe and SN2f have information about the first type arc A, B, C and D, and information about the second type arc F. Likewise, the first and second reference signal filters 108e and 108f generate the first and second preliminary reference signals REIe and RE2f where both the arc-caused perturbation component and the driving frequency component are removed. When plasma characteristics are varied, the first and second preliminary reference signals REIe and RE2f may differ from the first and second preliminary comparison signals SNIe and SN2f.
[146] Referring to FIG. 13(c), the first and second combiners 112e and 112f adds the first and second offset signals OSe and OSf of the first and second offset signal generators 114e and 114f and the output signals of the first and second reference signal converters HOe and 11Of, respectively, thereby generating the first and second reference signals REFIe and REF2f. The offset signal OSe of the first current processor 26 may have a negative level. However, the first offset signal OSe of the first current processor 26 may differ from the second offset signal OSf of the second current processor 28. That is, the second offset signal OSf of the second current processor 28 may have a positive level for detecting the current signal SI of the second type arc.
[147] Referring to FIG. 13(d), the first comparison unit 42e of the first current processor 26 compares the first comparison signal INIe and the first reference signal REFIe to output the first arc detection signal OUTl. In the case of first type arcs A, B, C and D, the first comparison unit 42e outputs the first arc detection signal OUTl. However, when the second type arc F is generated to increase the amplitude of the current signal, the first comparison unit 42e does not detect the second type arc F because the first reference signal REFIa and the first comparison signal INIe do not cross each other.
[148] Referring to FIG. 13(d), the second comparison unit 42f of the second current processor 28 compares the second comparison signal IN2f and the second reference signal REF2f to output the second arc detection signal OUT2. In the case of first type arcs A, B, C and D, the second comparison unit 42f does not output the first type arc detection signal OUTl because the second reference signal REF2f and the second comparison signal IN2f do not cross each other. However, when the second type arc F is generated to increase the amplitude of the current signal SI, the second comparison unit 42f detects this to output the second arc detection signal OUT2.
[149] Referring to FIG. 13(e), the post-processor 32 illustrated in FIG. 2 receives the first and second arc detection signals OUTl and 0UT2 to measure their pulse widths. If the arc is determined as a first type arc, the arc type determining unit 48 outputs a first type arc count signal DISPl; and if the arc is determined as a second type arc, the arc type determining unit 48 outputs a second type arc signal DISP2.
[150] FIG. 4 is a flowchart illustrating an arc monitoring method according to embodiments of the present invention. The following arc monitoring method may be realized through the arc detecting apparatus illustrated in FIGS. 1 through 3.
[151] Referring again to FIG. 4, the arc monitoring method according to the present invention includes: measuring an electrical signal of a current or voltage of a transmission line connected to a load in operation SlO; generating at least one arc detection signal corresponding to the arc generation at the load by processing the electrical signal in operation S20; determining the arc generation at the load through analysis of the arc detection signal in operation S32; and determining the arc type of the load through analysis of the arc detection signal in operation S34.
[152] The operation S20 may include: generating a reference signal from the electrical signal in operation S22; generating a comparison signal from the electrical signal in operation S24; and comparing the reference signal and the comparison signal with each other to generate the arc detection signal in operation S26. The reference signal, the comparison signal, and the arc detection signal may be generated through the method illustrated in FIGS. 1 through 3. Likewise, the determination on the arc generation and the arc type may be accomplished through the method illustrated in FIGS. 1 through 3.
[153] The operation S22 may include removing an arc-caused perturbation component from the electrical signal. The removing of the arc-caused perturbation component includes removing a component of a first frequency band from the electrical signal. Here, the first frequency band may include a frequency band due to the arc-caused perturbation component. The frequency band due to the arc-caused perturbation component may be in the range of 10 KHz to 250 KHz. The removing of the component of the first frequency band, as illustrated in FIG. 4, may be performed using a low-pass filter or a band-pass filter. During the generation of the reference signal, the driving frequency component of the RF power supply may be removed.
[154] The operation S22 may include at least one of rectifying the electrical signal, removing the arc-caused perturbation component from the electrical signal, and converting an amplitude or polarity of the electrical signal.
[155] The operation S24 may include extracting the arc-caused perturbation from the electrical signal. The extracting of the arc-caused perturbation component may include removing the component of a second frequency band from the electrical signal. The second frequency band may not include a frequency band due to the arc-caused perturbation component. The frequency band due to the arc-caused perturbation component may be in the range of 10 KHz to 250 KHz. However, the driving frequency component of the RF power supply may be removed during the generation of the comparison signal.
[156] The operation S24 may include at least one of rectifying the electrical signal, extracting the arc-caused perturbation component from the electrical signal, and converting an amplitude or polarity of the electrical signal. To compare the reference signal and the comparison signal with each other, it is possible to convert the amplitude or polarity of the signals or give an offset to the signals.
[157] The operation S26 may include comparing a comparison signal excluding the arc- caused perturbation component, and a comparison signal including the arc-caused perturbation component. During the operation S26, a difference between the reference signal and the comparison signal may be detected. The difference between the comparison signal and the reference signal may be output as a positive or negative signal by the use of a comparator. The operation S26 may be performed by converting the comparison signal and the reference signal into digital signals and determining them through logic operators. In the operation S26, the arc detection signal may generate a pulse proportional to the duration of the arc.
[158] The operation S32 may include analyzing a width of at least one arc detection signal to determine whether the arc is generated in the load. The width of the signal may be calculated using a logic operator.
[159] In the operation S32, it is determined that the arc detection signal is an arc if the width of the arc detection signal is in the range of a first reference width to a second reference width. The first reference width may be 4 microseconds. The second reference width may be 100 microseconds. If the width is between the first reference width and the second reference width, it is determined that the arc is generated in the load. If the width exceeds the second reference width, it is caused by the plasma characteristic variation. If the width is smaller than the first reference width, it is caused by the noise. [160] The operation S34 is performed using at least one current arc detection signal obtained by measuring a current flowing through the transmission line, and at least one voltage detection signal obtained by measuring a voltage of the transmission line.
[161] The operation S34 may include determining a type of an arc generated in the load by analyzing polarities of the current arc detection signal and the voltage arc detection signal. In the operation S34, it may be determined that the second type arc is generated in the load when the current arc detection signal differs in polarity from the voltage arc detection signal; and it may be determined that the first type arc is generated in the load when the current arc detection signal is equal in polarity to the voltage arc detection signal.
[162] According to modified embodiments of the present invention, in the operation S34, it may be determined that the arc is the first type arc if the logic state or level of the current arc detection signal is low; and it may be determined that the arc is the second type arc if the logic state or level of the current arc detection signal is high.
[163] The above-disclosed subject matter is to be considered illustrative, and not restrictive, and the appended claims are intended to cover all such modifications, enhancements, and other embodiments, which fall within the true spirit and scope of the present invention. Thus, to the maximum extent allowed by law, the scope of the present invention is to be determined by the broadest permissible interpretation of the following claims and their equivalents, and shall not be restricted or limited by the foregoing detailed description.

Claims

Claims
[1] An arc detecting apparatus, comprising: a transmission line connected to a load, and transmitting an electrical signal of a current or voltage; a detector measuring the electrical signal of the current or voltage of the transmission line; and a processor processing the electrical signal to generate at least one arc detection signal, wherein the arc detection signal is generated corresponding to an arc generated in the load.
[2] The arc detecting apparatus of claim 1, wherein the detector includes at least one sensor disposed around the transmission line, the sensor comprising at least one of a current measuring unit measuring a current flowing through the transmission line, and a voltage measuring unit measuring a voltage of the transmission line.
[3] The arc detecting apparatus of claim 2, wherein the processor comprises at least one of a current processor and a voltage processor, the current processor being connected to the current measuring unit, and configured to generate the arc detection signal from a current signal of the transmission line, and the voltage processor being connected to the voltage measuring unit, and configured to generate the arc detection signal from a voltage signal of the transmission line.
[4] The arc detecting apparatus of claim 1, wherein the processor comprises: at least one reference signal generating unit generating a reference signal to generate the arc detection signal; at least one comparison signal generating unit converting the electrical signal to a comparison signal for comparison with the reference signal; and at least one comparison unit comparing the reference signal and the comparison signal with each other to generate the arc detection signal.
[5] The arc detecting apparatus of claim 4, wherein the reference signal generating unit includes at least one of a reference signal rectifier rectifying the electrical signal, a reference signal filter removing an arc-caused perturbation component from the electrical signal, and a reference signal converter converting an amplitude or polarity of the electrical signal.
[6] The arc detecting apparatus of claim 5, wherein the reference signal generating unit further comprises: an offset signal generator generating an offset signal; and a combiner combining the offset signal and the electrical signal output from the reference signal converter, the combiner comprising at least one of an adder and a subtractor.
[7] The arc detecting apparatus of claim 4, wherein the comparison signal generating unit comprises at least one of a comparison signal rectifier rectifying the electrical signal, a comparison signal filter allowing an arc-caused perturbation component of the electrical signal to be contained, and a comparison signal converter converting an amplitude or polarity of the electrical signal.
[8] The arc detecting apparatus of claim 7, wherein the comparison signal filter is configured to extract an arc-caused perturbation component from the electrical signal rectified by the comparison signal rectifier, and the comparison signal converter is configured to convert an amplitude of polarity of the electrical signal filtered by the comparison signal filter.
[9] The arc detecting apparatus of claim 4, wherein the comparison signal generating unit generating the comparison signal comprises a subtractor, a first signal calculator and a second signal calculator, the first signal calculator comprising at least one of a first comparison signal rectifier rectifying the electrical signal, a first comparison signal filter allowing an arc-caused perturbation component of the electrical signal to be contained, and a first comparison signal converter converting an amplitude or polarity of the electrical signal, the second signal calculator comprising at least one of a second comparison signal rectifier rectifying the electrical signal, a second comparison signal filter removing the arc-caused perturbation component from the electrical signal, and a second comparison signal converter converting an amplitude or polarity of the electrical signal, and the subtractor outputting a difference between output signals of the first and second signal calculators as a comparison signal.
[10] The arc detecting apparatus of claim 3, wherein the processor comprises at least one of a first current processor, a second current processor, and a voltage processor, the first current processor processing a current signal of the electrical signal to generate an arc detection signal, the second current processor processing a current signal of the electrical signal to generate an arc detection signal, and a voltage processor processing a voltage signal of the electrical signal to generate an arc detection signal.
[11] The arc detecting apparatus of claim 4, wherein the comparison unit is configured to compare the reference signal and the comparison signal with each other to generate at least one arc detection signal corresponding to an arc generated in the load, the arc detection signal having a width corresponding to a duration of the arc generated in the load.
[12] The arc detecting apparatus of claim 1, further comprising an arc generation determining unit analyzing a width of the arc detection signal to determine whether an arc is generated in the load.
[13] The arc detecting apparatus of claim 1, further comprising an arc type determining unit analyzing at least one of the arc detection signal, the electrical signal of the current or voltage to determine a type of the arc generated in the load, wherein the arc type determining unit detects a variation direction of the electrical signals of the current and voltage due to the arc.
[14] An arc monitoring method, comprising: measuring an electrical signal of a current or voltage transmitted through a transmission line connected to a load; generating at least one arc detection signal corresponding to an arc generated in the load by processing the electrical signal; determining an arc generation in the load through analysis of the arc detection signal; and determining an arc type.
[15] The arc monitoring method of claim 14, wherein the electrical signal is consecutively measured in real time, wherein the generating of the arc detection signal and the determining of the arc generation comprise processing the electrical signal of the transmission line in real time to supply information about the arc generation in the load.
[16] The arc monitoring method of claim 14, wherein the generating of the at least one arc detection signal comprises: generating at least one reference signal; generating at least one comparison signal using the measured electrical signal of the transmission line; and comparing the reference signal and the comparison signal with each other to generate the arc detection signal.
[17] The arc monitoring method of claim 16, wherein: the generating of the reference signal comprises removing an arc-caused perturbation component from the electrical signal; the generating of the comparison signal comprises extracting the arc-caused perturbation component from the electrical signal; and the generating of the arc detection signal comprises comparing a reference signal where the arc-caused perturbation component is removed, and a comparison signal containing the arc-caused perturbation component.
[18] The arc monitoring method of claim 17, wherein the generating of the reference signal comprises removing a component of a first frequency band from the electrical signal, the first frequency band including a frequency band of the arc-caused perturbation component.
[19] The arc monitoring method of claim 17, wherein the generating of the comparison signal comprises removing a component of a second frequency band from the electrical signal, the second frequency band excluding a frequency band of the arc-caused perturbation component.
[20] The arc monitoring method of claim 16, wherein: the generating of the reference signal comprises at least one of rectifying the electrical signal, removing the arc-caused perturbation component from the electrical signal, and converting an amplitude or polarity of the electrical signal; and the generating of the comparison signal comprises at least one of rectifying the electrical signal, extracting the arc-caused perturbation component from the electrical signal, and converting an amplitude or polarity of the electrical signal
[21] The arc monitoring method of claim 14, wherein the determining of the arc generation comprises analyzing a width of the at least one arc detection signal to determine the arc generation in the load.
[22] The arc monitoring method of claim 14, wherein the arc detection signal comprises: at least one current arc detection signal obtained by measuring a current flowing through the transmission line; and at least one voltage arc detection signal obtained by measuring a voltage of the transmission line, wherein the determining of the arc type comprises analyzing the current arc detection signal and the voltage arc detection signal to determine a type of the arc generated in the load.
[23] The arc monitoring method of claim 14, wherein the determining of the arc type comprises: determining that a corresponding arc detection signal is resulted from a first type arc when both the electric signal of the current and the electric signal of the voltage of the transmission line are decreased; and determining that a corresponding arc detection signal is resulted from a second type arc when the electric signal of the current of the transmission line is increased but electrical signal of the voltage is decreased.
[24] The arc monitoring method of claim 14, wherein the determining of the arc type comprises: determining that the arc is a first type arc when the electric signal of the current of the transmission line is decreased; and determining that the arc is a second type arc when the electric signal of the current of the transmission line is increased.
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