WO2008113767A3 - Method of manufacturing a printed circuit board - Google Patents

Method of manufacturing a printed circuit board Download PDF

Info

Publication number
WO2008113767A3
WO2008113767A3 PCT/EP2008/053121 EP2008053121W WO2008113767A3 WO 2008113767 A3 WO2008113767 A3 WO 2008113767A3 EP 2008053121 W EP2008053121 W EP 2008053121W WO 2008113767 A3 WO2008113767 A3 WO 2008113767A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
manufacturing
printed circuit
vias
forming
Prior art date
Application number
PCT/EP2008/053121
Other languages
French (fr)
Other versions
WO2008113767A2 (en
Inventor
Joseph A A M Tourne
Original Assignee
Tourne Technologies Bv
Joseph A A M Tourne
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tourne Technologies Bv, Joseph A A M Tourne filed Critical Tourne Technologies Bv
Publication of WO2008113767A2 publication Critical patent/WO2008113767A2/en
Publication of WO2008113767A3 publication Critical patent/WO2008113767A3/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09645—Patterning on via walls; Plural lands around one hole
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047—Drilling of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Abstract

A method of making a circuit board (1) comprising the steps of : first, forming two or more metallized vias (2) through at least a portion of a circuit board; and then forming an isolation opening (9) between the two or more metallized vias, whereby at least a portion of the metallization is removed from at least one of the two or more vias.
PCT/EP2008/053121 2007-03-16 2008-03-14 Method of manufacturing a printed circuit board WO2008113767A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
NL1033546A NL1033546C1 (en) 2007-03-16 2007-03-16 Method for manufacturing printed circuit boards.
NL1033546 2007-03-16
US91926307P 2007-03-21 2007-03-21
US60/919,263 2007-03-21

Publications (2)

Publication Number Publication Date
WO2008113767A2 WO2008113767A2 (en) 2008-09-25
WO2008113767A3 true WO2008113767A3 (en) 2008-11-27

Family

ID=39761108

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2008/053121 WO2008113767A2 (en) 2007-03-16 2008-03-14 Method of manufacturing a printed circuit board

Country Status (2)

Country Link
NL (1) NL1033546C1 (en)
WO (1) WO2008113767A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107360665B (en) * 2016-04-18 2021-05-11 赛米控电子股份有限公司 Printed circuit board comprising vertically arranged insulating layers

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8273994B2 (en) * 2009-12-28 2012-09-25 Juniper Networks, Inc. BGA footprint pattern for increasing number of routing channels per PCB layer
CN110730558B (en) * 2019-09-09 2021-02-12 华为机器有限公司 Printed circuit board and communication device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4543715A (en) * 1983-02-28 1985-10-01 Allied Corporation Method of forming vertical traces on printed circuit board
EP0149932B1 (en) * 1983-11-22 1987-08-19 Interconnexions Ceramiques S.A. Support for a fast acting component, especially a hyperfrequency component, incorporating decoupling elements
US5621193A (en) * 1995-05-23 1997-04-15 Northrop Grumman Corporation Ceramic edge connect process

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4543715A (en) * 1983-02-28 1985-10-01 Allied Corporation Method of forming vertical traces on printed circuit board
EP0149932B1 (en) * 1983-11-22 1987-08-19 Interconnexions Ceramiques S.A. Support for a fast acting component, especially a hyperfrequency component, incorporating decoupling elements
US5621193A (en) * 1995-05-23 1997-04-15 Northrop Grumman Corporation Ceramic edge connect process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107360665B (en) * 2016-04-18 2021-05-11 赛米控电子股份有限公司 Printed circuit board comprising vertically arranged insulating layers

Also Published As

Publication number Publication date
WO2008113767A2 (en) 2008-09-25
NL1033546C1 (en) 2008-09-17

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