NL1033546C1 - Method for manufacturing printed circuit boards. - Google Patents

Description

Brief indication: Method for manufacturing printed circuit boards.

DESCRIPTION

The invention relates generally to a method for manufacturing printed circuit boards, and more particularly to the mutual insulation of vias therein.

Circuit boards for electrical circuits and enclosures of semiconductors that can be placed on circuit boards use substrates to provide rigidity, these substrates generally being constructed from resin-reinforced woven or non-woven fiber structures, wherein the fibers may consist of glass fibers , but also fibers of organic substances can be used.

Such constructions are robust and cost-effective, but due to the influence of temperature, humidity and electrical voltage applied to the print tracks applied to the substrates, leakage currents can arise along the fibers, which in the long term can result in a high-ohmic connection between print tracks, contact islands, holes, and so on.

The leakage current is caused by an ion current that can occur along a fiber. This phenomenon is called "Conductive Anodic Filament" (CAF) 20, and limits the minimum distance between conductive elements on or in the printed circuit boards.

Improvements in this area have been realized in the past by means of glass fiber coatings, in which a coating is applied to the fibers before the fibers are processed in the printed circuit board substrate material, but this measure has not led to a significant improvement. The CAF effect mainly occurs between solder islands and through-metalized holes, also known as vias, in the printed circuit board, where the printed circuit board can consist of several layers and where the vias, tracks or layers can connect to each other at different levels in the printed circuit board. It is precisely with these vias that there is a need for placing them ever closer to each other, which is counteracted by the CAF effect above.

Due to the ongoing miniaturization, the drilling of smaller holes encounters problems, such as the drilling pattern, and reduced accuracy due to the increase in hole depth and hole diameter ratio.

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Also, the dimensions of semiconductor housings of semiconductor components are limited in that the difference in expansion coefficients between the semiconductor housing and the printed circuit board leads to mechanical stress between the semiconductor housing and the printed circuit board, whereby the stress in the soldered connection can become so large that it can break.

Alternative technologies, such as laser-drilled blind holes, have the limitation that not enough layers can be tapped to the total number of tracks needed to disentangle complex “Array Array Package”.

In a so-called sequential structure, multiple layers can be stacked, but this is extremely complex and has a cost-increasing effect due to the high number of process steps.

There is therefore a need to be able to place semiconductor components closer to each other on a printed circuit board, or to be able to lay more conductive tracks between the so-called vias. It is therefore an object of the invention to place vias closer to each other, thereby avoiding the CAF effect, so that more space becomes available on the printed circuit board.

The object is achieved according to a first aspect of the invention, in a method for manufacturing printed circuit boards, comprising the steps of applying a pattern of conductive tracks to a printed circuit board, arranging at least two vias in a printed circuit board, each of the two vias is connected to at least one conductive track, the provision of an isolation opening between the at least two metallized vias, with each of the at least two vias always being a part of the part of the vias facing the other via at least one metallization is removed.

By removing printed circuit board substrate material between two closely spaced and part of the part facing the other vias, metallization of each of the at least two vias, the distance between the conductive parts of the at least two vias is increased, whereby fibers along which the CAF effect could occur are removed, and creep distances are increased. As a result, vias can be placed closer to each other, closer than if no printed circuit board substrate material had been removed between the vias.

Errors, such as, for example, tapering towards each other in the printed circuit board substrate material as a result of drilling in the holes of the vias, are also eliminated or compensated for by removing the part of the metallization of each of the at least two vias facing the other vias .

The consequence of reducing the distances between vias is that 5 components can be placed closer to each other, and / or that more tracks can be laid between opposite rows of vias, or tracks can be widened, for example in the case of connecting strips in a feed layer.

With given component dimensions, whereby vias can be placed under the soldering islands and / or component connections, the distance between the components, being the distance between the solderable legs of the respective components, can be reduced and more space is created between the legs of opposite rows. legs of a single component.

As a result, the complexity of the printed circuit boards decreases, so that fewer layers are required, or more complex circuits can be realized on a comparable printing surface or number of layers.

In one embodiment, the diameter of the insulation opening is chosen to be larger than the diameter of a via.

An embodiment of the present invention further comprises the step of filling the insulation opening with a first non-conductive material. The isolation opening can even better isolate the vias by filling, especially when a material is chosen with better insulation properties as the resin of the printed circuit board substrate material as the filling material.

In a further embodiment according to the invention, the first non-conductive material has a dielectric constant that is higher than the dielectric constant of the printed circuit board substrate material.

In a further embodiment of the present invention, further comprises the step of filling the at least two through-metallized vias with a second material prior to the step of providing an insulation opening.

It is thus achieved that upon removal of the substrate material and part of the through-metallization of a via, the remaining part of the via is reinforced, so that less burr formation occurs.

A further embodiment of the present invention, the second material is conductive in the step of filling the at least two metallized vias.

The advantage of this is that any contact surface that could be added in a subsequent process step makes better contact with the via, and that the electrical conductivity in a via is improved.

A further embodiment of the present invention further comprises the step of flattening the printed circuit board surface after the step of filling the insulation opening, and / or step of flattening the printed circuit board surface after the step of filling the at least two -metallized vias.

This makes it possible to provide contact surfaces or other structures on the printed circuit board, which require a flat surface.

A further embodiment of the present invention further comprises the step of forming a solder island on the printed circuit board surface, electrically coupled to at least one of the vias.

In a further embodiment according to the invention, print tracks can be connected to the via's which together form a transmission line with a specific characteristic impedance and the dielectric constant of the first non-conductive material in the isolation opening can be chosen such that the characteristic impedance between the vias corresponds to the characteristic impedance of the print tracks connected to the vias. This achieves that 20 via pairs form a continuous transition for transmission lines, with which the high-frequency properties of the printed circuit board are improved.

The object is also achieved according to a second aspect of the invention in a printed circuit board manufactured according to the method according to the first aspect of the invention.

Figure 1 shows a cross-section of a printed circuit board with vias according to the prior art.

Figure 2 shows a top view of a part of a printed circuit board with two vias according to the prior art.

Figure 3 shows a top view of a part of a printed circuit board 30 with two vias placed diagonally relative to each other, according to the prior art.

Figure 4a shows a top view of a part of a printed circuit board with two vias with an insulation opening according to an embodiment of the invention.

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Figure 4b shows a top view of a part of a printed circuit board with three vias with an insulation opening according to an embodiment of the invention.

Figure 5 shows a construction of two vias with an insulation hole 5 according to an embodiment of the invention.

Figure 6 shows a cross-section of the construction of Figure 5.

Figure 7a shows a plurality of constructions of two vias with an insulation hole according to an embodiment of the invention.

Figure 7b shows a plurality of vias according to the state of the art.

Figure 8a shows a plurality of constructions of two vias with an insulation opening, in combination with a feed surface, according to an embodiment of the invention.

Figure 8b shows a plurality of vias, in combination with a feeding surface, according to the prior art.

Figure 9a shows a top view of a printed circuit board with a plurality of constructions of two vias with an insulation opening according to the invention at different processing stages.

Figure 9b shows a cross-section of a printed circuit board with 20 constructions of two vias with an insulation opening according to an embodiment of the invention, at different processing stages.

Figure 1 shows a cross-section of a printed circuit board 1 with vias 2 according to the prior art.

A printed circuit board 1 is generally constructed from one or more layers of printed circuit board substrate material 3, each layer being composed of fiber-reinforced resin 7, for example epoxy resin with glass fiber, the fibers 7 usually being in the form of a woven pattern horizontally, in an orthogonal pattern, extend into the printed circuit board substrate material 3 layers.

The vias 2 are formed by a hole which extends wholly or partially perpendicularly to the printed circuit board surface in the layers of printed circuit board substrate material 3, the inside of the holes being provided with a metal layer 4, the metal layer 4 contacting contact islands 5 which are located between the layers of printed circuit board substrate material 3 and ensure contact with print tracks 13 present in the printed circuit board (see Figs. 7a and 7b), and wherein 6 the vias 2 can be provided on the top and bottom of the printed circuit board 1 with a contact surface 6, which can also serve as a soldering island.

The most critical for the leakage currents are therefore the fibers or glass fibers 7, which are used as reinforcing material in the printed circuit board 1. The smaller the distances between the vias 2, the more critical this is for the CAF effect.

Vias 2, which are in an orthogonal relationship, as shown in Figure 2, are more sensitive to CAF, since an ion current 8, which underlies the CAF effect, follows the glass fiber 7. A possible solution could be to position the vias 2 diagonally with respect to the fiber structure 7, as shown in figure 3. In this way the distance between the vias 2 remains too large, because the vias may not be in contact with the same fiber 7. In addition, the design freedoms for the PCB designer are limited.

Figure 4a shows a top view of a part of a printed circuit board 1, with two vias with an insulation opening 9, according to the invention. A portion 15 (shaded) of the printed circuit board between the two vias 2 is removed. The two vias 2 are placed close to each other with spacing s1 between the metallisations 4. Removing the printed circuit board substrate material 3 and the resulting opening 9, whereby the shaded parts (see figure 4a) of the vias 2 are removed the effective distance between the metallizations 4 of the vias 2 increased to distance s2. The insulation opening 9 can be left open, in other words filled with air, but can also be filled with a new first material 15, which does not have the disadvantageous properties of fiber-reinforced materials. The cavities in the vias 2 are immediately filled.

Figure 4b shows that the invention can also be carried out with more than 2 vias. The insulation opening is preferably a hole with a diameter larger than the diameter of a via.

By reducing the effective distance of the vias 2, the vias can be placed extremely close to each other. This is especially the case when the resulting insulation opening 9 is filled with a new first material, which has better insulating properties than the fiberglass-reinforced epoxy material 3 of the printed circuit board. The materials 15 used to fill up the insulation opening 9 can typically be epoxy resins, whether or not modified to approximate the expansion coefficient of the printed circuit board. These materials are generally constructed from an (epoxy) resin with a ceramic filler, in order to reduce or influence an expansion coefficient. Examples of such materials are PHP900, PP2795, THP100DXI.

In a further embodiment, according to the present invention, before arranging the insulating opening 9, the vias 2 can be filled with a second filling material 10, in order to prevent the metallization 4 from bursting during the arranging of the insulating opening 9 and / or if a conductive material 10 is chosen, to provide a conductive surface for applying a contact surface 6 or solder island 6.

Examples of conductive filler materials for the vias 2 are epoxy resins filled with copper and epoxy resins filled with silver, such as CB100, for example.

The new structure now consists of two or more metallized holes 2 with an insulation opening 9 (not metallized) positioned in the middle of the metallized holes 2. The possible wage flow paths 8, formed by the glass fibers 7 between the vias 2, have now been removed through the so-called insulation opening 9. There is now no path that can lead to closure, or at least not a path that gives rise to leakage currents.

A typical heart-heart distance according to the prior art between vias is 1.0 mm. With this invention, the center-to-center distance of the vias 20 can be reduced to a fraction thereof (order of 0.25 mm). This value is mainly determined by the drilling pattern. If the drilling run is too large, the print material can break away and the drill can break. The result is then a deformed hole.

The insulation opening 9 will also remove part of the hole and metalization 25. The conductivity of the via is thus reduced. The resistance, inversely proportional to the conductivity, hereby becomes higher. The average resistance of a via is 3 mOhm (depending on the via diameter and thickness of the circuit board). If we now remove part of the via, the resistance will increase and will then be around 4 to 5 mOhm. This small increase has no influence on the functioning of the printed circuit board, since the resistance of print tracks is already in the order of a few hundred mOhm to a few Ohms.

Figure 5 shows a construction of two vias 2 with an insulation opening 9, according to an embodiment of the invention. This combination is referred to in this text as three-hole construction 11. The three-hole construction 11 is shown three-dimensionally, separate from the printed circuit board 1. Figure 5 shows two vias 2, which are covered with a contact surface 6, wherein in vertical metallization 4 can be seen, which is connected to 5 contact islands 5. The insulation opening 9 may or may not be filled with an insulating material.

Figure 6 shows a cross-section along the surface stretched by the lines I-II and III-IV, where it can be seen that the insulation opening 9 is filled with a first insulating material 15, and the vias 2 are also filled with a second filling material 10. This three-hole construction 11, 2 vias 2 and an insulation opening 9 can now be positioned in an Area Array Package, such as a BGA (Ball Grid Array).

Figure 7a shows an example of the three-hole construction 11 if it is positioned in a BGA with a 1.0 mm pitch. The effect that is now being created is that a wider channel 12 is formed between the vias 2, for providing print tracks 13. Significantly more tracks 13 can be placed therein than in a printed circuit board et vias according to the position of the technik. An increase in the number of tracks 13 according to the invention is dependent on the contact surface dimensions, track widths, insulations and the pitch 20 between the connecting pins of the component. For comparison, Figure 7b shows a prior art BGA with 2 tracks 13 per channel 12 (1.0 mm pitch).

Figure 8a shows a plurality of three-hole structures 11, with two vias 2 and an insulation opening 9, in combination with a feed surface 14, 25 according to the invention. The effect on the feeder layers 14 is favorable because in the wider channel 12 between the three-hole structures 11, a wider connecting strip 16 in the feeder layer 14 is possible, so there is more room for copper. Therefore, better connections, i.e. a better power supply, are possible.

Figure 8b shows a plurality of vias 2, in combination with a nutrient layer 14, according to the prior art for comparison.

With the component housings, according to the state of the art, the problem arises that the amount of copper in the connecting strips 16 between the vias 2 becomes too narrow, so that less current can be sent in the component and the traces 13 that are on the layer above or below the feed layer 14 there is a disturbance in the impedance at the level of the narrowings in the feed layer 14, which in turn results in a loss of energy.

According to the invention, these narrowings between the three-hole structures 11 are less pronounced than those between vias 2 according to the state of the art, whereby the said effects are reduced or eliminated. Figures 8a and 8b show the situations as created in the feed layer 14 by using three-hole structures 11 (8a) and standard via's 2 (8b).

By favorably choosing the dielectric constant of the filler material, the high-frequency properties of vias 2 can be influenced. Thus it can be achieved that, by a suitable choice of dielectric constant, the combination of two closely spaced vias 2 connected to one end of a transmission line formed by two print tracks 13 has the same characteristic impedance, compared to the characteristic impedance of the transmission line. This gives the characteristic impedance a continuous course and prevents unwanted reflections. The method according to the invention can therefore contribute to the improvement of high-frequency properties of a printed circuit board 1.

The process handling for the manufacture of the above-mentioned printed circuit boards is further described below and explained in Figures 9a and 9b.

Figure 9a shows a top view of a printed circuit board 1 with a plurality of constructions 11, of two vias 2 with an insulation opening 9, according to the invention, in different processing stages A to F. The corresponding process steps A to F are explained below. On board 1, 25 places 17 are provided for contact surfaces 6 (see step F).

This example shows that the contact surfaces 6 are maintained at a distance according to the state of the art, for example with a pitch of 1 mm, but in which the vias 2, in diagonal relation, are brought close together, whereby on the one hand there is no space between these vias more is for print tracks 13, but 30, so that more space is created on the printed circuit board outside the area in which the vias 2 are located in Fig. 9a for laying print tracks 13.

Figure 9b shows corresponding cross-sections of the printed circuit board 1 with structures 11, of two vias 2 with an insulation opening 9, according to the processing stages A to F, along cross-sections of the respective cross-sections V-VI, VII-VIII, IX-X, XI-XII, XIII-XIV and XV-XVI. The circuit board 1, as shown in Figure 9b, has one layer of circuit board substrate material 3 in this example, but the method can apply to more than one layer.

In figures 9a and 9b, additional copper layers 18 are provided on the top and bottom of the printed circuit board, which extend over the entire printed circuit board surface, not shown in Figure 1, which are usually present on the unprocessed printed circuit board before applying the vias 2.

Process steps A - F: 10 Step A. Drilling the via holes 2.

Step B. Metallize the vias 2.

This is typically done by applying a conductive seed layer, on which a conductive layer 4 can then be built up using an electrolytic process. The layer thickness must be sufficient to compensate for the differences in expansion coefficient between metal and dielectric so that the metal sleeve 4 does not tear.

Step C. Filling the vias 2 with a filling material.

This step is optional. Filling the vias with filler material 10 prevents bursting of the metallization. By filling with a conductive material, contact surfaces 6 can later be formed on top of the via holes 2 in the process. The distance from the component connections becomes so small that the surfaces of the vias 2 must be used to form contact surfaces 6.

Step D. Providing an insulation opening 9 between the metallized vias 2, so that the printing material 3 is replaced by air.

After the insulation opening 9 has been provided, it is cleaned to remove drilling residues. The provision of the insulation opening 9 can be carried out by any machining operation, such as preferably drilling, or milling.

Step E. Filling the insulation opening 9 with a non-conductive filling material.

This step is also optional. Whether it is necessary to fill insulation opening 9 is determined by the space available to form contact surfaces 6 on the outer layers of the printed circuit board. By using a resin with a high dielectric constant, in any case higher than the usual 11 printing material, as a filling material 15, the distance between the vias 2 can be further reduced.

Step F. The further processing of circuit board 1 in a standard PCB process.

This may include the provision of contact surfaces 6, as shown in figures 9a and 9b.

The exemplary embodiments given in this description are not limited to three-hole structures with two vias 2 and an insulation opening 9, but can be expanded with more than two vias 2 in combination with one insulation opening 9, the insulation opening 9 being located between the more than two vias. The shape of insulation opening 9 is not limited to a round shape, but can also take on an oval, ellipsoid, square, rectangular, triangular and other shape.

The remaining preceding and / or following steps in the process of manufacturing a printed circuit board, such as, among other things, applying printing tracks and the like, have been omitted here for clarity reasons, and are well known to those skilled in the art of printed circuit board manufacturing.

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Claims (10)

A method for manufacturing printed circuit boards, comprising the steps of: arranging at least two through-metallized vias in a printed circuit board; characterized by providing an isolation opening between the at least two through-metallized vias, wherein from each of the at least two via metal a part of the through-metallization is always removed from the other at least one via facing part. Method according to claim 1, wherein the insulation opening has a diameter larger than the diameter of the vias. The method of claim 1 or 2, further comprising filling the insulation opening with a first non-conductive material. 4. Method according to claim 3, wherein the first non-conductive material has a higher dielectric constant than the printed circuit board substrate material from which the printed circuit board is composed. 5. Method as claimed in any of the claims 1 to 4, further comprising the step of filling the at least two through-metallized vias with a second material, prior to the step of providing an insulation opening. The method of claim 5, wherein the second material is conductive in the step of filling the at least two through-metallized vias. 7. Method as claimed in any of the claims 1-6, further comprising the step of flattening the printed circuit board surface, after the step of filling the insulation opening, and / or after the step of filling the at least two through-metallized via's. The method of claim 7, further comprising the step of forming a solder island on the printed circuit board surface, electrically coupled to at least one of the vias. A method according to any one of claims 3 to 8, wherein print tracks are connected to the via's which form a transmission line with a certain one, and wherein the dielectric constant of the first non-conductive material characteristic impedance in the isolation aperture is chosen such that the characteristic impedance between the vias corresponds to the 1033540 characteristic impedance between print tracks connected to the vias. A printed circuit board manufactured according to the method of any one of claims 1 to 9. 1 0 3 3 5 4 0