WO2008111576A1 - Information processing system and core identification controller constituting the information processing system - Google Patents

Information processing system and core identification controller constituting the information processing system Download PDF

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Publication number
WO2008111576A1
WO2008111576A1 PCT/JP2008/054349 JP2008054349W WO2008111576A1 WO 2008111576 A1 WO2008111576 A1 WO 2008111576A1 JP 2008054349 W JP2008054349 W JP 2008054349W WO 2008111576 A1 WO2008111576 A1 WO 2008111576A1
Authority
WO
WIPO (PCT)
Prior art keywords
core
processing system
information processing
core identification
memory
Prior art date
Application number
PCT/JP2008/054349
Other languages
French (fr)
Japanese (ja)
Inventor
Takashi Inoue
Arisa Yamaoka
Original Assignee
Toyota Jidosha Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyota Jidosha Kabushiki Kaisha filed Critical Toyota Jidosha Kabushiki Kaisha
Publication of WO2008111576A1 publication Critical patent/WO2008111576A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663Access to shared memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Multi Processors (AREA)
  • Storage Device Security (AREA)
  • Memory System (AREA)

Abstract

An information processing system (S) having a memory (4A) shared among microcomputers including a multi-core processor includes a core identification information incorporating means for incorporating core identification information into an unused bit of a signal output from an own microcomputer (100A), a core identification means for identifying a core of an output source based on the signal having incorporated the core identification information output from another microcomputer (100B), an access authority information holding means (21A) for holding access authority information of each core for a predetermined region of the memory (4A), and a memory management means (20A) for managing the access to the memory (4A) by the core of the output source, based on the access authority information held by the core of the output source identified by the core identification means and the access authority information holding means (21A).
PCT/JP2008/054349 2007-03-13 2008-03-11 Information processing system and core identification controller constituting the information processing system WO2008111576A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007063896A JP2008225906A (en) 2007-03-13 2007-03-13 Information processing system, and core identification controller constituting the information processing system
JP2007-063896 2007-03-13

Publications (1)

Publication Number Publication Date
WO2008111576A1 true WO2008111576A1 (en) 2008-09-18

Family

ID=39759511

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/054349 WO2008111576A1 (en) 2007-03-13 2008-03-11 Information processing system and core identification controller constituting the information processing system

Country Status (2)

Country Link
JP (1) JP2008225906A (en)
WO (1) WO2008111576A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114741351A (en) * 2022-06-10 2022-07-12 深圳市航顺芯片技术研发有限公司 Multi-core chip and computer equipment

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101681345B (en) 2008-03-19 2013-09-11 松下电器产业株式会社 Processor, processing system, data sharing processing method, and integrated circuit for data sharing processing
WO2010116536A1 (en) * 2009-04-06 2010-10-14 Hitachi, Ltd. Storage subsystem and its control method
JP5832703B2 (en) 2013-05-20 2015-12-16 三菱電機株式会社 Supervisory control device
CN105095094B (en) 2014-05-06 2018-11-30 华为技术有限公司 EMS memory management process and equipment
JP2017215802A (en) * 2016-05-31 2017-12-07 株式会社リコー Control device and control method
KR20210034372A (en) 2019-09-20 2021-03-30 주식회사 엘지화학 Apparatus and method for managing battery

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0430245A (en) * 1990-05-25 1992-02-03 Oki Electric Ind Co Ltd Multiprocessor control system
JP2000235558A (en) * 1999-02-16 2000-08-29 Hitachi Ltd Main storage sharing multiprocessor system and the sharing area setting method
JP2002342299A (en) * 2001-05-18 2002-11-29 Nec Corp Cluster system, computer and program

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0430245A (en) * 1990-05-25 1992-02-03 Oki Electric Ind Co Ltd Multiprocessor control system
JP2000235558A (en) * 1999-02-16 2000-08-29 Hitachi Ltd Main storage sharing multiprocessor system and the sharing area setting method
JP2002342299A (en) * 2001-05-18 2002-11-29 Nec Corp Cluster system, computer and program

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114741351A (en) * 2022-06-10 2022-07-12 深圳市航顺芯片技术研发有限公司 Multi-core chip and computer equipment

Also Published As

Publication number Publication date
JP2008225906A (en) 2008-09-25

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