WO2008111124A1 - マルチｃｐｕ異常検出復旧システム、方法及びプログラム - Google Patents

マルチｃｐｕ異常検出復旧システム、方法及びプログラム Download PDF

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Publication number
WO2008111124A1
WO2008111124A1 PCT/JP2007/000211 JP2007000211W WO2008111124A1 WO 2008111124 A1 WO2008111124 A1 WO 2008111124A1 JP 2007000211 W JP2007000211 W JP 2007000211W WO 2008111124 A1 WO2008111124 A1 WO 2008111124A1
Authority
WO
WIPO (PCT)
Prior art keywords
program
abnormality detection
restoration system
abnormality
restoration
Prior art date
Application number
PCT/JP2007/000211
Other languages
English (en)
French (fr)
Inventor
Yoshiyuki Ohira
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to JP2009503756A priority Critical patent/JP5212357B2/ja
Priority to PCT/JP2007/000211 priority patent/WO2008111124A1/ja
Publication of WO2008111124A1 publication Critical patent/WO2008111124A1/ja
Priority to US12/544,618 priority patent/US8074123B2/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Hardware Redundancy (AREA)

Abstract

　複数のＣＰＵを備えるマルチＣＰＵシステムにおいて、稼動しているプログラムの異常を検出する異常状態検出部と、前記異常状態検出部により異常が検出されたとき、当該検出された異常の内容に基づいて異常となっているデータの復旧可能かどうかを判断し、復旧可能なとき前記データを復旧する復旧部と、を備えることを特徴とするマルチＣＰＵシステム。
PCT/JP2007/000211 2007-03-12 2007-03-12 マルチｃｐｕ異常検出復旧システム、方法及びプログラム WO2008111124A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009503756A JP5212357B2 (ja) 2007-03-12 2007-03-12 マルチｃｐｕ異常検出復旧システム、方法及びプログラム
PCT/JP2007/000211 WO2008111124A1 (ja) 2007-03-12 2007-03-12 マルチｃｐｕ異常検出復旧システム、方法及びプログラム
US12/544,618 US8074123B2 (en) 2007-03-12 2009-08-20 Multi-CPU failure detection/recovery system and method for the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/000211 WO2008111124A1 (ja) 2007-03-12 2007-03-12 マルチｃｐｕ異常検出復旧システム、方法及びプログラム

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/544,618 Continuation US8074123B2 (en) 2007-03-12 2009-08-20 Multi-CPU failure detection/recovery system and method for the same

Publications (1)

Publication Number Publication Date
WO2008111124A1 true WO2008111124A1 (ja) 2008-09-18

Family

ID=39759075

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/000211 WO2008111124A1 (ja) 2007-03-12 2007-03-12 マルチｃｐｕ異常検出復旧システム、方法及びプログラム

Country Status (3)

Country Link
US (1) US8074123B2 (ja)
JP (1) JP5212357B2 (ja)
WO (1) WO2008111124A1 (ja)

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JP2011134044A (ja) * 2009-12-24 2011-07-07 Nec Corp プロセス異常復旧装置及びプロセス異常復旧方法

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US8850262B2 (en) 2010-10-12 2014-09-30 International Business Machines Corporation Inter-processor failure detection and recovery
WO2012053110A1 (ja) * 2010-10-22 2012-04-26 富士通株式会社 障害監視装置、障害監視方法及びプログラム
CN103150224B (zh) * 2013-03-11 2015-11-11 杭州华三通信技术有限公司 用于提高启动可靠性的电子设备及方法
US10459782B2 (en) * 2017-08-31 2019-10-29 Nxp Usa, Inc. System and method of implementing heartbeats in a multicore system
JP2019179395A (ja) * 2018-03-30 2019-10-17 オムロン株式会社 異常検知システム、サポート装置および異常検知方法
US11693727B2 (en) * 2021-03-08 2023-07-04 Jpmorgan Chase Bank, N.A. Systems and methods to identify production incidents and provide automated preventive and corrective measures
CN114218075B (zh) * 2021-11-25 2024-04-19 中国航空综合技术研究所 机载设备测试性试验实施样本库生成方法

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JPH0926888A (ja) * 1995-07-13 1997-01-28 Hitachi Ltd 排他制御装置
JP2002007218A (ja) * 2000-06-21 2002-01-11 Hitachi Eng Co Ltd メモリ照合方式
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JPH04160642A (ja) * 1990-10-25 1992-06-03 Nec Corp コンピュータシステム
JPH04365145A (ja) * 1991-06-13 1992-12-17 Hitachi Ltd メモリ障害処理方法
JPH0667901A (ja) * 1992-08-21 1994-03-11 Fuji Facom Corp リンクリスト履歴保存装置
JPH06214889A (ja) * 1993-01-20 1994-08-05 Hitachi Ltd 主記憶領域破壊検出方法
JPH0926888A (ja) * 1995-07-13 1997-01-28 Hitachi Ltd 排他制御装置
JP2002007218A (ja) * 2000-06-21 2002-01-11 Hitachi Eng Co Ltd メモリ照合方式
JP2004259146A (ja) * 2003-02-27 2004-09-16 Nippon Telegr & Teleph Corp <Ntt> 閾値自動設定方法及びシステム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011134044A (ja) * 2009-12-24 2011-07-07 Nec Corp プロセス異常復旧装置及びプロセス異常復旧方法

Also Published As

Publication number Publication date
US20090307526A1 (en) 2009-12-10
US8074123B2 (en) 2011-12-06
JPWO2008111124A1 (ja) 2010-06-24
JP5212357B2 (ja) 2013-06-19

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