WO2008110533A3 - Elektrisches bauelement - Google Patents

Elektrisches bauelement Download PDF

Info

Publication number
WO2008110533A3
WO2008110533A3 PCT/EP2008/052822 EP2008052822W WO2008110533A3 WO 2008110533 A3 WO2008110533 A3 WO 2008110533A3 EP 2008052822 W EP2008052822 W EP 2008052822W WO 2008110533 A3 WO2008110533 A3 WO 2008110533A3
Authority
WO
WIPO (PCT)
Prior art keywords
carrier
shielding cover
electric component
chip
signal line
Prior art date
Application number
PCT/EP2008/052822
Other languages
English (en)
French (fr)
Other versions
WO2008110533A2 (de
Inventor
Thomas Feichtinger
Christian Hoffmann
Igor Kartashev
Roman Kravchenko
Original Assignee
Epcos Ag
Thomas Feichtinger
Christian Hoffmann
Igor Kartashev
Roman Kravchenko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Epcos Ag, Thomas Feichtinger, Christian Hoffmann, Igor Kartashev, Roman Kravchenko filed Critical Epcos Ag
Publication of WO2008110533A2 publication Critical patent/WO2008110533A2/de
Publication of WO2008110533A3 publication Critical patent/WO2008110533A3/de

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007Casings
    • H05K9/002Casings with localised screening
    • H05K9/0022Casings with localised screening of components mounted on printed circuit boards [PCB]
    • H05K9/0024Shield cases mounted on a PCB, e.g. cans or caps or conformal shields
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/0107Non-linear filters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007Casings
    • H05K9/002Casings with localised screening
    • H05K9/0039Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021Constructional details
    • H03H2001/0085Multilayer, e.g. LTCC, HTCC, green sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0243Printed circuits associated with mounted high frequency components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Filters And Equalizers (AREA)

Abstract

Es wird ein elektrisches Bauelement mit einem Träger (1) und einem auf dem Träger (1) befestigten und leitend mit dem Träger (1) verbundenen Chip (5) angegeben. Das Bauelement weist eine Abschirmkappe (2), deren Unterseite in einem umlaufenden Bereich mit einem Massekontakt (32) des Trägers (1) verbunden ist. Der Chip (5) ist in einem zwischen dem Träger (1) und der Abschirmkappe (2) gebildeten Hohlraum (21) angeordnet. Der Chip (5) weist elektrische Kontakte auf, die an jeweils eine im Träger (1) angeordnete Signalleitung (78, 79) angeschlossen sind. Die jeweilige Signalleitung (78, 79) bildet mit im Träger (1) angeordneten, mit Masse verbundenen leitenden Flächen (3) jeweils ein Durchführungsfilter (11). Das jeweilige Durchführungsfilter (11) geht in einer Projektionsebene in mindestens einer Richtung über die Grundfläche der Abschirmkappe (2) hinaus.
PCT/EP2008/052822 2007-03-13 2008-03-10 Elektrisches bauelement WO2008110533A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102007012049.6A DE102007012049B4 (de) 2007-03-13 2007-03-13 Elektrisches Bauelement
DE102007012049.6 2007-03-13

Publications (2)

Publication Number Publication Date
WO2008110533A2 WO2008110533A2 (de) 2008-09-18
WO2008110533A3 true WO2008110533A3 (de) 2008-12-11

Family

ID=39688049

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2008/052822 WO2008110533A2 (de) 2007-03-13 2008-03-10 Elektrisches bauelement

Country Status (2)

Country Link
DE (1) DE102007012049B4 (de)
WO (1) WO2008110533A2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102883550A (zh) * 2011-07-15 2013-01-16 上海艾特维通信科技有限公司 一种屏蔽盖与电子线路板的焊接方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102009007316A1 (de) * 2009-02-03 2010-08-05 Epcos Ag Elektrisches Vielschichtbauelement
US8659912B2 (en) * 2010-05-10 2014-02-25 Biotronik Se & Co. Kg Shielding device for shielding an electronic component
DE102013226066A1 (de) * 2013-12-16 2015-06-18 Siemens Aktiengesellschaft Planartransformator und elektrisches Bauteil
US20190295968A1 (en) * 2018-03-23 2019-09-26 Analog Devices Global Unlimited Company Semiconductor packages

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0637871A1 (de) * 1993-08-06 1995-02-08 Matsushita Electric Industrial Co., Ltd. Schaltungsbaustein mit akustischer Oberflächenwellenanordnung
US5639989A (en) * 1994-04-19 1997-06-17 Motorola Inc. Shielded electronic component assembly and method for making the same
US20040154815A1 (en) * 2003-02-07 2004-08-12 Nokia Corporation Shielding Arrangement
EP1729340A1 (de) * 2004-03-26 2006-12-06 Mitsubishi Denki Kabushiki Kaisha Hochfrequenzgehäuse, sende- und empfangsmodul und drahtloses gerät

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6496355B1 (en) 2001-10-04 2002-12-17 Avx Corporation Interdigitated capacitor with ball grid array (BGA) terminations
DE10224221A1 (de) * 2002-05-31 2003-12-11 Siemens Ag Elektrische Vorrichtung

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0637871A1 (de) * 1993-08-06 1995-02-08 Matsushita Electric Industrial Co., Ltd. Schaltungsbaustein mit akustischer Oberflächenwellenanordnung
US5639989A (en) * 1994-04-19 1997-06-17 Motorola Inc. Shielded electronic component assembly and method for making the same
US20040154815A1 (en) * 2003-02-07 2004-08-12 Nokia Corporation Shielding Arrangement
EP1729340A1 (de) * 2004-03-26 2006-12-06 Mitsubishi Denki Kabushiki Kaisha Hochfrequenzgehäuse, sende- und empfangsmodul und drahtloses gerät

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102883550A (zh) * 2011-07-15 2013-01-16 上海艾特维通信科技有限公司 一种屏蔽盖与电子线路板的焊接方法
CN102883550B (zh) * 2011-07-15 2017-02-08 上海闻泰电子科技有限公司 一种屏蔽盖与电子线路板的焊接方法

Also Published As

Publication number Publication date
WO2008110533A2 (de) 2008-09-18
DE102007012049B4 (de) 2017-10-12
DE102007012049A1 (de) 2008-09-18

Similar Documents

Publication Publication Date Title
WO2007037902A8 (en) Improved impedance mating interface for electrical connectors
WO2005091998A3 (en) Electrical connector in a flexible host
WO2013055567A3 (en) Cross talk reduction for high-speed electrical connectors
WO2007005598A3 (en) Electrical connector for interconnection assembly
EP2211295A3 (de) Auf eine SIM-Karte anwendbare Signalverarbeitungsvorrichtung
TW200717931A (en) Electric connector for circuit board
WO2007041529A3 (en) Fuse with cavity forming enclosure
IN2012DN00757A (de)
WO2007149362A3 (en) Solid state light sheet and bare die semiconductor circuits with series connected bare die circuit elements
EP2048744A3 (de) Leistungserweiternde Kontaktmodulanordnungen
WO2006023283A3 (en) Electrical connector with stepped housing
TW200631260A (en) Electric connector for connecting connection objects
WO2011127234A3 (en) Mitigation of crosstalk resonances in interconnects
WO2006094025A3 (en) Fabricated adhesive microstructures for making an electrical connection
WO2008030657A3 (en) Electrical connector
WO2012076627A3 (fr) Carte électronique ayant un connecteur externe
WO2008110533A3 (de) Elektrisches bauelement
WO2007042383A3 (de) Elektrische vorrichtung
WO2009154335A1 (en) Printed circuit board electrically connected to the ground of electronic device
WO2006055118A3 (en) Electrical connector with strain relief features
WO2009001170A3 (en) Filter having impedance matching circuits
WO2009151806A3 (en) Elastic-cushioned capacitively-coupled connector
EP1848072A3 (de) Elektrische Verbindung und elektrische Komponente
WO2008114870A1 (ja) 電界通信装置
WO2010039867A3 (en) Capacitively coupled connector for electronic device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08717569

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08717569

Country of ref document: EP

Kind code of ref document: A2