WO2008102286A2

WO2008102286A2 - Varactorless tunable oscillator

Info

Publication number: WO2008102286A2
Application number: PCT/IB2008/050548
Authority: WO
Inventors: Hugo Veenstra; Edwin Van Der Heijden
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2007-02-19
Filing date: 2008-02-15
Publication date: 2008-08-28
Also published as: WO2008102286A3

Abstract

The present invention relates to an oscillator circuit and a method for tuning an oscillation frequency, wherein transistors of a pair of emitter followers are coupled via at least one inductor, and a reverse tuning voltage is applied to a collector-base junction of at least one transistor of the pair of emitter followers in order to tune the oscillation frequency by controlling the collector-base capacitance of the at least one transistor. Thereby, varactorless tuning of an oscillation frequency can be achieved.

Description

Varactorless tunable oscillator

FIELD OF THE INVENTION

The present invention relates to the field of oscillator circuits and their tuning, and more particularly without limitation to the field of high frequency oscillator circuits having oscillation frequencies in the GHz range.

BACKGROUND OF THE INVENTION

A voltage controlled oscillator (VCO) receives an input voltage as a control signal for defining and modulating the frequency of its oscillating output signal. LC-VCO circuits which can be based on a cross-coupled differential transistor pair are limited to a maximum oscillation frequency f_cross. For frequencies below this maximum oscillation frequency, the cross-coupled differential transistor pair provides a negative shunt input resistance which is required to start and sustain oscillation. In practice, oscillation is limited to frequencies well below this maximum oscillation frequency, since some margin is needed to account for the finite quality factor of the on-chip LC-tank circuit. To implement an LC-VCO operating at frequencies above the maximum oscillation frequency, an alternative implementation for realization of a negative resistance has been proposed, where a negative resistance is based on a capacitively loaded emitter follower, which provides a negative resistance for frequencies up to a limiting value fjimit. Fig. 2 shows a schematic circuit diagram of a conventional LC-VCO with capacitively loaded emitter follower configuration, as disclosed for example in the WO2004/075394A1.

In the VCO of Fig. 2 a resonator comprises an inductor which is symmetrically coupled to a current source providing a current I_D. Furthermore, the inductor is symmetrically coupled to a supply voltage. Additionally, the resonator comprises a varactor C_v with a control terminal to apply a tuning voltage Vtune for frequency tuning. Capacitors C_c are coupled in series with the varactor C_v. The resonator is of the common cathode type such that the anodes of the resonator are coupled to emitter follower transistors Qi and Q3, respectively. The emitter follower transistors Qi and Q3 have a symmetric design and are both connected to a current source for generating a current Ii . The bases of the transistors Qi and Q3 are coupled to the anodes of the resonator. Capacitive loading of the emitter follower transistors Qi and Q3 is provided by additional emitter follower transistors Q₂ and Q₄. Again, the additional emitter follower transistors Q₂ and Q₄ are designed symmetrically and are each connected to a current source for generating a current I₂. The base of transistor Q₂ is coupled to the emitter of transistor Q₁, and the base of transistor Q₄ is coupled to the emitter of the transistor Q3. The capacitive loading of the transistors Qi and Q3 provided by the transistors Q₂ and Q₄ result in a negative real part of the input impedance seen from the resonator side. This negative real part of the input impedance is used to un-damp the resonator. Resistors R_s are used to realize single ended output impedances to provide the output terminals OUT+ and OUT-. For example each one of the resistors R_s may have an impedance of 50 ohm. The outputs OUT+ and OUT- are coupled by means of capacitors C_ac to output loads R₀ which preferably are also 50 ohm.

The value of the above mentioned limiting value fjimit depends on the load capacitance, but can be well above the maximum frequency f_cross in a practical design. For example, in the so-called QUBiC4G technology which is a SiGe BiCMOS (Silicon- Germanium Bipolar Complementary Metal Oxide Semiconductor) process specified to offer transistor transition frequencies of 75GHz, the maximum oscillation frequency is about 35 GHz and the limiting value fjimit is about 55 GHz.

For emerging applications such as 60 GHz WPAN (Wireless Personal Area Network) and 77 GHz automotive radar, tunable oscillators are needed that operate at 60 and 77 GHz, respectively. In the above conventional LC-VCO, varactors C_v are used for frequency tuning. The loss-indicating quality Q-factor of the varactor C_v dominates the Q- factor of the LC-tank in both oscillators. Moreover, the Q-factor of the varactor C_v decreases with rising frequency. In the topology shown in Fig. 2, the varactor C_v is ac-coupled to the inductor. An advantage of this construction is that the two varactors C_v can be merged to one three-terminal differential varactor, of which the layout is optimized for the differential Q- factor. However, a drawback is that the varactor Cv needs to be ac-coupled to the tank via capacitors C_c, and resistors R_g needed for dc-biasing. The resistors R_g add noise, while the coupling capacitors C_c reduce the tuning range and Q-factor of the tank. It is thus of interest to try to eliminate the varactors C_v and introduce an alternative method for frequency tuning.

SUMMARY OF THE INVENTION

An object of the present invention is to provide an improved tuning method and oscillator topology, by means of which varactor problems can be eliminated. This object is achieved by an oscillator circuit as claimed in claim 1 and by a tuning method as claimed in claim 12.

Accordingly, a new tunable oscillator topology is proposed that does not need a varactor for frequency tuning. Tuning is implemented via the collector-base capacitance of at least one emitter follower. The symmetrical arrangement as pair of emitter followers allows simple implementation.

The tuning circuit may comprise a diode circuit and a controllable voltage generator circuit, the diode circuit being configured to set the reverse tuning voltage to a predetermined value when the voltage generator circuit generates a zero voltage. The predetermined value may for example substantially correspond to 2Vb_e, wherein Vb_e designates the forward bias voltage of the base-emitter junction of the at least one transistor. Thereby, it can be ensured that the collector-base junction is always reversely biased.

In a specific implementation example, one end of the diode circuit may be connected to a voltage supply of the pair of emitter followers and the other end of the diode circuit may connected via the at least one inductor to a base terminal of the at least one transistor. As additional option, a current source may be provided for supplying a bias current to the diode circuit. The diode circuit ensures that a minimum portion of the reverse tuning voltage is kept substantially constant, while the optional current source serves to provide some bias to the diode(s) of the diode circuit. The controllable voltage generator circuit may be any kind of circuit which can be controlled to generate a desired output voltage.

In a first embodiment, the controllable voltage generator circuit may comprises a controllable voltage source connected between the voltage supply and a circuit node connecting both collector terminals of the pair of emitter followers. In a second embodiment, the controllable voltage generator circuit may comprise a controllable current source connected between said voltage supply and a circuit node connecting both collector terminals of the pair of emitter followers, wherein the voltage of the controllable voltage generator circuit may be generated at a respective resistance provided between the voltage supply and each of both collector terminals. In both embodiments, the connection to the common node simplifies symmetrical implementation for the differential transistor pair.

In the above second embodiment, the controllable current source may be a programmable current source with a digital tuning mechanism. As an additional option, the controllable current source may comprise an inverse non-linearity for compensating a non- linearity of the collector base junction capacitance.

Each transistor of the pair of emitter followers may be connected in a double emitter follower configuration. As an additional option, each transistor of the pair of emitter followers may be arranged in a capacitively loaded emitter follower configuration. A single or double emitter follower pair can thus be used as negative resistance output buffer and for frequency tuning, resulting in a very simple topology.

Further advantageous embodiments are defined in the dependent claims.

BRIEF DESCRIPTION OF THE DRAWINGS

In the following, the present invention will be described in greater detail based on an embodiments with reference to the accompanying drawings in which:

Fig. 1 shows a schematic circuit diagram of a varactorless oscillator circuit according to the embodiments; Fig. 2 shows a circuit diagram of a conventional oscillator with varactors and capacitively loaded emitter followers;

Fig. 3 shows a circuit diagram of a varactorless tunable oscillator with capacitively loaded emitter followers;

Fig. 4 shows a circuit diagram of a varactorless tunable oscillator according to a first embodiment;

Fig. 5 shows frequency and time diagrams indicating transient output results for different tuning voltages of the first embodiment;

Fig. 6 shows a circuit diagram of a varactorless tunable oscillator according to a second embodiment; and Fig. 7 shows frequency and time diagrams indicating transient output results for different tuning voltages of the second embodiment.

DESCRIPTION OF THE EMBODIMENT

The embodiments of the present invention will now be described in greater detail based on a VCO circuit with pair of emitter followers of emitter followers.

Fig. 1 shows a general schematic circuit diagram or topology of a tunable oscillator that does not need a varactor. In this topology, frequency tuning is implemented via the respective collector-base capacitances C_cbi and C_cb2 of the emitter follower transistors Q₁, Q3. The collector-base capacitors C_cbi and C_cb2 are internal junction capacitors which depend on the junction voltage, and are thus only indicated as dotted elements in Fig. 1. The junction voltage is proposed to be controlled by a voltage generator or voltage generating circuit which is configured to generate a reverse tuning voltage Vtune to be applied via inductors or inductor portions Ll, L3 to the collector base junctions of the emitter follower transistors Q₁, Q3 which are loaded by respective impedances Zl, Z3.

Fig. 3 shows a more detailed circuit diagram of varactorless, tunable LC-VCO according to the embodiments which are based on the conventional topology of Fig. 2. As regards the function of those circuit elements of Fig. 3, which are not described below, it is referred to the initial description in connection with Fig. 2. In the LC-VCO of Fig. 3 tuning is achieved via the collector-base capacitances of the first emitter follower transistors Qi and Q₃. According to the exemplary implementation of the present embodiments, two diodes Di and D₂ are serially connected between a midpoint node Vi of an inductor (or a midpoint node between two inductors) and a voltage supply VCC of the circuit. The two diodes Di and D₂ provide a reverse voltage of about 2Vbe (where Vt,_e denotes the typical forward bias voltage of the base-emitter junction) across the base-collector junctions of Qi and Q3 for the case that the an additional tuning voltage Vtune generated by a voltage source connected between the voltage supply VCC and a common connection point or node, to which both collectors of the emitter follower transistors Qi and Q3 are connected, is set to a value Vtune = 0. A parallel capacitor Ci makes the impedance between the midpoint node Vi and the voltage supply VCC low-ohmic for high frequencies, so that the diodes Di and D₂ are shortcut via the capacitor C₁. A current source I_D provides some bias to diodes Di and D₂, while the value of I_D is not critical and can be set individually. With increasing value of the tuning voltage Vtune, the reverse voltage across the base-collector junctions of the transistors Qi and Q3 decreases, thereby increasing their junction capacitance and thus lowering the oscillation frequency.

Fig. 4 shows a circuit diagram of an implementation example according to a first embodiment in QUBiC4X technology. This oscillator circuit is designed for 77 GHz applications, wherein the collectors of the first emitter follower transistors Q3, Qn are connected to an ideal voltage source V2 that is used for frequency tuning, but is connected to ground in this embodiment. Therefore, an increase of the tuning voltage leads to an increased reverse voltage at the collector-base junction and a reduced junction capacitance, and thus a higher oscillation frequency. Here, realistic current sources are implemented with transistors Q₄, Qi6, Q₂o, and Q₂₂. The diodes Dl and D2 of Fig. 3 are implemented by a transistor Q₂5, wherein a control circuit in the upper left portion is provided to set the bias currents for the oscillator circuit. Undamping of the resonator (which consists of the inductor and the collector-base capacitances of the transistors Q3, Qn) is achieved via a capacitively-loaded output buffer circuit in the right portion of Fig. 4. Fig. 5 shows transient results of the varactorless, tuneable LC-VCO of Fig. 4 with undamping output buffer at V_tune=3.0V and 4.5 V. The frequency range of this oscillator has been simulated from 74.8 GHz (at Vtune = 3.0V; VCC = 4.0V) to 80.8 GHz (at Vtune = 4.5V; VCC = 4.0 V). The left-hand diagrams show the waveforms of the oscillator output signal over the time axis, while the right-hand diagrams show the corresponding frequency spectra over the frequency axis. In the frequency spectra, the small peak indicates good selectivity and stability, which is somewhat better for the lower frequency obtained by the higher tuning voltage Vtune = 4.5V to which the lower diagrams are related.

Fig. 6 shows a circuit diagram of an implementation example according to a second embodiment in QUBiC4X technology, wherein tuning is now implemented via a current source II.

As can be gathered from a comparison of Figs. 4 and 6, the voltage source V2 of the first embodiment has been replaced by a current source II, connected between the voltage supply VCC and the common node of the collectors of the emitter follower transistors Q3 and Qn, and by two resistors R25 and R27 connected between these collectors and the voltage supply VCC. Thereby a corresponding reverse tuning voltage is indirectly generated via the resistors R25 and R27. Here the indirect tuning voltage generated by the tuning current is applied between the collectors of the emitter follower transistors Q3 and Qn and the voltage supply VCC. Consequently, an increase of the tuning current leads to an increased reverse voltage at the collector-base junction and a reduced junction capacitance, and thus also to a higher oscillation frequency. Additionally, a second diode-connected transistor Q32 has been inserted between the transistor Q25 and the voltage supply VCC to reduced the base potentials of the emitter follower transistors Q3 and Qn and the collector potentials of the respective subsequent emitter follower transistors Q₂1 and Qi 8.

It is noted that the current required for tuning does not lead to an increased power dissipation (e.g., the tuning mechanism does not cost extra power). A further advantage from tuning via the current source Il is that a digital frequency tuning mechanism can be implemented via a programmable current source. It is also possible to linearize the tuning characteristic by compensating a non-linearity of the collector-base junction capacitance via an inverse non-linearity implemented in the current source II. Fig. 7 shows transient results of the varactorless, tuneable LC-VCO of Fig. 6 with undamping output buffer, at I_tune ⁼lrnA and 1OmA. Here, a tuning range from 74.4 GHz (at Ii = ImA) to 81.2 GHz (at Ii = 1OmA) has been obtained by simulation. Again, the left- hand diagrams show the waveforms of the oscillator output signal over the time axis, while the right-hand diagrams show the corresponding frequency spectra over the frequency axis. In the frequency spectra, the small peak indicates good selectivity and stability, which is here somewhat better for the higher frequency obtained by the lower tuning current Itune = ImA to which the upper diagrams are related.

In summary, an oscillator circuit and a method for tuning an oscillation frequency have been described, wherein transistors of a differential transistor pair are coupled via at least one inductor, and a reverse tuning voltage is applied to a collector-base junction of at least one transistor of the pair of emitter followers in order to tune the oscillation frequency by controlling the collector-base capacitance of the at least one transistor. Thereby, varactorless tuning of an oscillation frequency can be achieved. The proposed oscillator circuits can be applied to any kind of high-frequency applications, such as for instance satellite television receivers, automotive collision avoidance radars at 24 and 77 GHz or 60 GHz WLAN (Wireless Local Area Network) or WPAN. They are also suitable for latest bipolar integrated circuit processes (e.g. QUBiC4X) for applications at operating frequencies beyond 10 GHz, e.g., microwave or radar applications (> 10 GHz). However, in general, the present invention is not restricted to the above embodiments or application examples and can be implemented in any discrete circuit arrangement or integrated architecture. It applies for all general purpose and special commercial products (like integrated circuits used in consumer electronics, computers, mobile phones, set-top-boxes, etc.). The above embodiments may thus vary within the scope of the attached claims.

Finally, it is noted that the term "comprises" or "comprising" when used in the specification including the claims is intended to specify the presence of stated features, means, steps or components, but does not exclude the presence or addition of one or more other features, means, steps, components or group thereof. Further, the word "a" or "an" preceding an element in a claim does not exclude the presence of a plurality of such elements. Moreover, any reference sign does not limit the scope of the claims.

Claims

CLAIMS:

1. An oscillator circuit comprising: a pair of emitter followers (Q₁, Q₃) coupled via at least one inductor (Ll, L3); and a tuning circuit (D₁, D₂, Vtune) for applying a reverse tuning voltage to a collector-base junction of at least one transistor of said pair of emitter followers in order to tune the oscillation frequency of said oscillator by controlling the collector-base capacitance of said at least one transistor.

2. The oscillator circuit according to claim 1, wherein said tuning circuit comprises a diode circuit (D₁, D₂) and a controllable voltage generator circuit, said diode circuit being configured to set said reverse tuning voltage to a predetermined value when said voltage generator circuit generates a zero voltage.

3. The oscillator circuit according to claim 2, wherein said predetermined value substantially corresponds to 2Vb_e, and wherein Vb_e designates the forward bias voltage of the base-emitter junction of said at least one transistor.

4. The oscillator circuit according to claim 2, wherein one end of said diode circuit is connected to a voltage supply of said pair of emitter followers and the other end of said diode circuit is connected via said at least one inductor to a base terminal of said at least one transistor.

5. The oscillator circuit according to claim 4, further comprising a current source for supplying a bias current to said diode circuit.

6. The oscillator circuit according to claim 4 or 5, wherein said controllable voltage generator circuit comprises a controllable voltage source connected between said voltage supply and a circuit node connecting both collector terminals of said pair of emitter followers.

7. The oscillator circuit according to claim 4 or 5, wherein said controllable voltage generator circuit comprises a controllable current source connected between said voltage supply and a circuit node connecting both collector terminals of said pair of emitter followers, and wherein the voltage of said controllable voltage generator circuit is generated at a respective resistance provided between said voltage supply and each of said both collector terminals.

8. The oscillator circuit according to claim 7, wherein said controllable current source is a programmable current source with a digital tuning mechanism.

9. The oscillator circuit according to claim 7 or 8, wherein said controllable current source comprises an inverse non-linearity for compensating a non-linearity of said collector base junction capacitance.

10. The oscillator circuit according to any one of the preceding claims, wherein each transistor of said pair of emitter followers is connected in a double emitter follower configuration.

11. The oscillator circuit according to any one of the preceding claims, wherein each of said transistors is arranged in a capacitively loaded emitter follower configuration.

12. A method of tuning an oscillation frequency of an oscillator circuit, said method comprising: - coupling transistors of a pair of emitter followers via at least one inductor; and applying a reverse tuning voltage to a collector-base junction of at least one transistor of said pair of emitter followers in order to tune the oscillation frequency of said oscillator by controlling the collector-base capacitance of said at least one transistor.

13. An apparatus comprising an oscillator circuit as claimed in claims 1 to 11.