WO2008100055A2 - Microphone amplifier - Google Patents

Microphone amplifier Download PDF

Info

Publication number
WO2008100055A2
WO2008100055A2 PCT/KR2008/000817 KR2008000817W WO2008100055A2 WO 2008100055 A2 WO2008100055 A2 WO 2008100055A2 KR 2008000817 W KR2008000817 W KR 2008000817W WO 2008100055 A2 WO2008100055 A2 WO 2008100055A2
Authority
WO
WIPO (PCT)
Prior art keywords
current
microphone amplifier
voltage
set forth
jfet
Prior art date
Application number
PCT/KR2008/000817
Other languages
French (fr)
Other versions
WO2008100055A3 (en
Inventor
Jin Hyo Lee
Kyu Hong Lee
Hee Cheon Shin
Hun Ill Youn
Original Assignee
Rfsemi Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rfsemi Technologies, Inc. filed Critical Rfsemi Technologies, Inc.
Priority to CN200880005324.7A priority Critical patent/CN101675669B/en
Publication of WO2008100055A2 publication Critical patent/WO2008100055A2/en
Publication of WO2008100055A3 publication Critical patent/WO2008100055A3/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00Circuits for transducers, loudspeakers or microphones
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R19/00Electrostatic transducers
    • H04R19/04Microphones
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2410/00Microphones

Definitions

  • the present invention relates to microphones, and, more particularly, to a microphone amplifier that has high input impedance, high amplification gain and low current consumption using a Junction Field Effect Transistor (JFET) device and a bipolar transistor device.
  • a microphone amplifier is an amplifier that is used for a microphone for converting voice signals into electrical signals .
  • Fig. 1 is a circuit diagram of a prior art capacitor microphone amplifier, in which the microphone amplifier 10 includes a single JFET 15 and a bias unit 13 for providing an operation reference potential to the JFET 15.
  • the drain electrode of the JFET 15 branches into two lines at a node no, one line is connected to external power VDD through a load resistor RL, and the other line is connected to an output terminal Vout, which is provided to enable the extraction and use of output signals.
  • bias unit 13 for providing a reference potential to the gate electrode of the JFET 15 one end thereof is connected to the node ni, at which the electrostatic charge capacitor Cmic and the JFET 15 are interconnected, and the other end thereof is connected to the ground terminal GND.
  • the bias unit 13 is constructed by connecting a resistor R and a diode D in parallel.
  • the electrostatic charge capacitor Cmic is constructed by placing a conductive thin film and a fixed electrode plate opposite each other at a constant interval. Chargeable material is applied to one of the thin film and the fixed electrode plate, and the chargeable material is charged with electrostatic charge as high as tens of volts .
  • a voice signal is transmitted to the thin film, the thin film vibrates. The vibration of the thin film varies the capacity of the electrostatic charge capacitor Cmic, thereby generating a small electrical signal.
  • the electrical signal is input to the microphone amplifier 10, variation in current occurs at the output terminal Vout. After the variation in current is amplified by the JFET 15, it is divided into voltages by the load resistor RL and is then output.
  • the output impedance of the electrostatic charge capacitor Cmic is equal to or higher than hundreds of mega ohms, input loss must be minimized by setting the input impedance of the amplifier 10 to a value equal to or higher than hundreds of mega ohms.
  • the amplification gain must be high, and the Signal to Noise Ratio (SNR) must be increased by setting noise to a value equal to or lower than -100 dB.
  • SNR Signal to Noise Ratio
  • the electrostatic charge capacitor is a part that is chiefly used for portable devices, low power consumption is required such that current consumption is equal to or lower than 500 ⁇ A and power supply voltage is equal to or lower than 3 volts . Accordingly, the use of a JFET device is suitable for meeting the above-described requirements .
  • an amplification circuit using a single JFET must minimize the parasitic capacitance of a signal input terminal and must have the resistor R of the bias unit 13 formed to have hundreds of mega ohms or more in order to improve input impedance in the audio frequency band of 100 Hz-10 kHz.
  • the parasitic capacitance is increased, and thus the input impedance is decreased, with the result that the voltage amplification gain is not considerably increased.
  • the voltage amplification gain is increased by increasing the operating current in a JFET having a certain size
  • a problem arises in that current consumption and operating voltage are increased.
  • the amplification gain is improved by increasing only input impedance, there is a problem in that noise is increased instead.
  • the prior art capacitor microphone amplification circuit using a single JFET device is excellent from the viewpoint of low noise, but has limitations on the realization of high amplification gain, low current and high input impedance characteristics.
  • the prior art amplifier must also be used in a Micro-ElectroMechanical System (MEMS) microphone.
  • MEMS Micro-ElectroMechanical System
  • the MEMS microphone is configured such that, in Fig. 1, one end of the electrostatic charge capacitor Cmic is connected to an external constant voltage source, instead of the ground terminal GND, and the other end thereof is connected to the input node ni of the amplification circuit. Since, in the prior art capacitor microphone amplifier, the interior of the electrostatic charge capacitor Cmic is charged with electrostatic charge, one end of the electrostatic charge capacitor Cmic is connected to the ground terminal GND and the other end thereof is connected to the input node ni of the amplifier.
  • one end of the electrostatic charge capacitor Cmic is connected to an external constant voltage source, rather than the ground terminal GND, and the electrostatic charge capacitor Cmic is charged with applied charge, so that an electrical signal is generated through the vibration of a diaphragm, caused by a voice signal.
  • constant voltage which can be applied from the outside
  • the output signal of the electrostatic charge capacitor Cmic is very weak, and thus an amplifier having a high amplification gain is required.
  • the capacity of the electrostatic charge capacitor Cmic of the diaphragm is low, and thus the output impedance of the diaphragm is high, with the result that the amplifier requires high input impedance.
  • CMOS device has higher noise than a JFET device. Furthermore, this method has a defect in that the resistance to external electrical impact is poor because an oxide film is as thin as hundreds of angstroms .
  • an object of the present invention is to provide a microphone amplifier in which a signal amplification circuit, designed to minimize input impedance in order to minimize voltage and current consumption and achieve high amplification gain, is formed on a semiconductor substrate or a chip.
  • the present invention provides a microphone amplifier having a signal input terminal for providing an input signal, an output terminal for outputting an amplified signal and a ground terminal for providing reference to a circuit, including a bias unit for providing an input signal reference potential between the signal input terminal and the ground terminal; a voltage-to-current conversion unit for amplifying the input signal; a constant current source for supplying constant current to the voltage-to-current conversion unit; and a current amplification unit for amplifying variation in current between the constant current source and the voltage-to-current conversion unit.
  • the microphone amplifier of the present invention further includes a third resistor for adjusting amplification gain of an input signal between the ground terminal, the current amplification unit and the voltage- to-current conversion unit; and a second resistor for adjusting an amount of bias current between the current amplification unit and the third resistor.
  • the third resistor or the fourth resistor is connected through a conductor.
  • the constant current source is formed of a Junction Field Effect Transistor (JFET), or is formed such that the gate and source electrodes of a first JFET are connected to each other.
  • the bias unit is formed of a first resistor, is formed by connecting a first diode to the first resistor in parallel, and clamps an input signal, or is formed by connecting a second diode to a first diode, connected to the first resistor in parallel, in parallel in opposite directions.
  • the voltage-to-current conversion unit is formed of a second JFET, is formed by connecting a third JFET to the second JFET in parallel, or is formed by connecting a fourth JFET to the second JFET in series .
  • the current amplification unit is formed of a PNP-type first bipolar transistor
  • the current amplification unit is a Darlington transistor that includes the PNP-type first bipolar transistor and a PNP-type second bipolar transistor, or is a PNP/NPN Darlington transistor that includes the PNP-type first bipolar transistor and an NPN- type third bipolar transistor.
  • one or more JFET devices are used in the voltage-to-current conversion unit connected to the signal input terminal of the amplification circuit. Since the sizes of the JFET devices can be freely adjusted regardless of circuit characteristics, adjustment can be easily performed such that high input impedance can be realized based on low noise characteristics. Furthermore, since the amplification circuit has a separate resistor, current gain and power consumption can be adjusted.
  • the present invention is configured such that low-noise characteristic JFET and bipolar transistors are combined together and are constructed in a minimal space, and thus the present invention has an advantage of being able to more easily adjust the amplification gain, current consumption and input capacitance of a microphone amplification circuit, and an advantage of being able to be manufactured using a small-sized semiconductor chip.
  • Fig. 1 is a circuit diagram of a prior art capacitor microphone amplifier
  • Fig. 2 is a circuit diagram of a capacitor microphone amplifier according to the present invention.
  • Fig. 3 is a circuit diagram showing the results of application of respective embodiments in the bias unit, voltage-to-current conversion unit and current amplification unit of Fig. 2;
  • Figs. 4 and 5 are circuit diagrams showing bias units according to embodiments of the microphone amplifier of Fig. 2;
  • Figs. 6 and 7 are circuit diagrams showing voltage- to-current conversion units according to embodiments of the microphone amplifier of Fig. 2; and
  • Figs . 8 and 9 are circuit diagrams showing current amplification units according to embodiments of the microphone amplifier of Fig. 2. ⁇ Description of reference numerals of principal elements in the drawings>
  • Fig. 2 is a circuit diagram of a capacitor microphone amplifier according to the present invention.
  • the signal input terminal of a microphone amplifier 20 is a node ni at which a voice signal, detected and converted by an electrostatic charge capacitor Cmic, is provided as an electrical signal. Since the intensity of the electrical signal entering the signal input terminal is weak, the current is converted and amplified by a voltage- to-current conversion unit 25.
  • a bias unit 23 for stabilizing the bias of the electrical signal, entering from the electrostatic charge capacitor Cmic, by adjusting it to a constant value is connected to the node ni, and the other end b thereof is connected to a ground terminal GND.
  • the output side of the amplifier 20 branches into two lines at a node no, one line is connected to external power VDD through a load resistor RL, and the other line is connected to an output terminal Vout, which is provided to enable the extraction and use of an output signal.
  • the node no which coincides with or is short-circuited to the output terminal Vout through a conductor, supplies current to the amplifier 20. Furthermore, with regard to the output terminal Vout, voltage division is performed on the electrical signal, which is input to the signal input terminal, converted into current, amplified and output as current, using the load resistor RL, thus causing voltage to be output through the output terminal Vout.
  • the voltage-to-current conversion unit 25 for amplifying and converting the input signal into a current signal is formed of an N channel JFET having characteristics superior to those of other semiconductor devices .
  • a constant current source 21 for supplying constant current to the voltage-to-current conversion unit 25 is formed of a first JFET Tl .
  • the gate and source electrodes of the first JFET Tl are short-circuited, and the drain electrode thereof is short-circuited to the node no on the output side of the amplifier 20.
  • the voltage-to-current conversion unit 25 is formed of one or more N channel JFETs, and has three terminals c, d and e.
  • One terminal c is short-circuited to the source and gate of the constant current source 21 and the node nl.
  • Another terminal d is connected to the node ni, which is short-circuited to the terminal a of a bias unit 23 as described above, and is supplied with an electrical signal.
  • the remaining terminal e is connected to one end of a second resistor R2.
  • the other end of the second resistor R2 branches into two lines at a node n2, one line is short- circuited to the ground terminal GND through a third resistor R3, and the other line is short-circuited to one terminal h of the current amplification unit 27.
  • the current amplification unit 27 is formed of one or more bipolar transistors, and has three terminals f, g and h.
  • One terminal f is connected to the node no, which is short-circuited to the output terminal Vout.
  • Another terminal g is connected to the source and gate of the constant current source 21 at the node nl.
  • the remaining terminal h is connected to the node n2, at which the second and third resistors R2 and R3 are short- circuited to each other, as described above.
  • the second resistor R2 adjusts the reference voltage of the terminal e in response to variation in current and variation in input potential based on the device characteristics of the voltage-to-current conversion unit 25, thereby adjusting the power consumption of the amplifier 20.
  • a conductor rather than the second resistor R2, performs connection depending on the characteristics of the JFET device of the voltage-to- current conversion unit 25.
  • the third resistor R3 adjusts current gain by varying the potential difference between the terminals e and d of the voltage-to-current conversion unit 25 depending on the intensity of current flowing through the third resistor R3.
  • the case in which the third resistor R3 is replaced with the conductor has an advantage in that the amplification gain of the current amplification unit 27 is maximized.
  • Fig. 3 is a circuit diagram showing the results of application of respective embodiments in the bias unit, voltage-to-current conversion unit and current amplification unit of Fig. 2.
  • a bias unit 23a is formed of a first resistor Rl
  • a voltage-to-current conversion unit 25a is formed of a second JFET T2.
  • the gate, drain and source electrodes of the second JFET T2 are short-circuited to one terminal d, another terminal c and the remaining terminal e of the voltage-to-current conversion unit 25a, respectively.
  • the structure of the voltage-to-current conversion unit 25a enables the characteristics of high input impedance and low input capacitance, required at the signal input terminal of the amplifier 20, to be maximally utilized.
  • the current amplification unit 27a is formed of a PNP-type first bipolar transistor Ql according to an embodiment of the present invention.
  • the base, emitter and collector electrodes of the first bipolar transistor Ql are short-circuited to one terminal g, another terminal f and the remaining terminal h of the current amplification unit 27a, respectively.
  • Fig. 4 is a circuit diagram showing the construction of a bias unit according to another embodiment in the amplifier of Fig. 2
  • Fig. 5 is a circuit diagram showing the construction of a bias unit according to still another embodiment in the amplifier of Fig. 2.
  • the bias terminal 23b of the amplifier 20 has a function of clamping the input signal by connecting a first diode Dl in parallel with the first resistor Rl of the bias terminal 23a.
  • the bias terminal 23c of the amplifier 20 is configured to connect the first and second diodes Dl and D2 in parallel with each other in opposite directions when the bias terminal 23c is constructed using a first resistor Rl and the first and second diodes Dl and D2. This further increases the symmetry of the input signal compared to the structure of the bias terminal 23b of Fig. 4a.
  • Fig. 6 is a circuit diagram showing the construction of a voltage-to-current conversion unit according to another embodiment in the amplifier of Fig. 2
  • Fig. 7 is a circuit diagram showing the construction of a voltage- to-current conversion unit according to still another embodiment in the amplifier of Fig. 2.
  • a second JFET T2 and a third JFET T3 are connected in parallel with each other on the basis of the drain and source electrodes thereof.
  • the gate electrode of the third JFET T3 is short-circuited to the third JFET T3's own source electrode .
  • the structure of the voltage-to-current conversion unit 25b decreases input capacitance by dividing the gate electrode of the second JFET T2, through which the signal is input, into two parts.
  • the voltage-to-current conversion unit 25c of the amplifier 20 may be formed of second and fourth JFETs T2 and T4.
  • the second and fourth JFETs are connected in parallel with each other on the basis of the drain and source electrodes thereof.
  • the drain electrode of the second JFET T2 is connected to the source electrode of a fourth JFET T4.
  • the gate electrode of the second JFET T2 is short-circuited to one terminal d of the voltage-to-current conversion unit 25c.
  • the drain electrode of the fourth JFET T4 is short- circuited to another terminal c of the voltage-to-current conversion unit 25c.
  • the source electrode of the second JFET T2 and the gate electrode of the fourth JFET T4 are short-circuited to the remaining terminal e of the voltage-to-current conversion unit 25c.
  • the structure of the voltage-to-current conversion unit 25c has an advantage in that the second and fourth JFETs T2 and T4 have divided voltages, and thus the voltage between the source and drain of the second JFET T2 is reduced, thereby minimizing the size of the second JFET T2.
  • the geometrical size of the second JFET T2 can be reduced, thereby being advantageous in the reduction in input capacitance and the size of the device.
  • Fig. 8 is a circuit diagram showing the construction of a current amplification unit according to another embodiment in the amplifier of Fig. 2
  • Fig. 9 is a circuit diagram showing the construction of a current amplification unit according to still another embodiment in the amplifier of Fig. 2.
  • the current amplification unit 27b of the amplifier 20 may be formed of PNP-type first and second bipolar transistors Ql and Q2.
  • the base electrode of the first bipolar transistor Ql is short-circuited to one terminal g of the current amplification unit 27b, and the base electrode of the second bipolar transistor Q2 is short-circuited to the emitter electrode of the first bipolar transistor Ql .
  • the collector electrodes of the first and second bipolar transistors Ql and Q2 are connected to each other, and are short-circuited to another terminal h of the current amplification unit 27b. Furthermore, the emitter electrode of the second bipolar transistor Q2 is short-circuited to the remaining terminal f of the current amplification unit 27b.
  • the structure of the current amplification unit 27b adopts a PNP Darlington bipolar transistor having the above-described construction, thereby being able to improve the current gain of the current amplification unit 27.
  • the current amplification unit 27c of the amplifier 20 may be formed of first and third bipolar transistors Ql and Q3.
  • the third bipolar transistor is an NPN type.
  • the base electrode of the first bipolar transistor Ql is short-circuited to one terminal g of the current amplification unit 27c, and the base electrode of the third bipolar transistor Q3 is short- circuited to the collector electrode of the first bipolar transistor Ql.
  • the emitter electrode of the first bipolar transistor Ql and the collector electrode of the third bipolar transistor Q3 are connected to each other, and are short-circuited to another terminal f of the current amplification unit 27c. Furthermore, the emitter electrode of the third bipolar transistor Q3 of the current amplification unit 27c is short-circuited to the remaining terminal h.
  • the structure of the current amplification unit 27c adopts a PNP/NPN Darlington bipolar transistor, in which the first bipolar transistor Ql and the third bipolar transistor Q3 are constructed in two stages, thereby improving the current gain of the current amplification unit 27.
  • all of the JFETs used in the constant current source 21 and the voltage-to-current conversion unit 25 may be replaced with Metal Oxide Semiconductor Field Effect Transistors (MOSFETs).
  • MOSFETs Metal Oxide Semiconductor Field Effect Transistors
  • the microphone amplifier of the present invention is implemented on a semiconductor substrate or a chip.
  • the present invention relates to a microphone amplifier implemented on a semiconductor substrate or a chip.
  • the microphone amplifier is designed to minimize voltage and current consumption and to minimize input capacitance in order to realize high amplification gain, thus being able to be universally and widely used in digital electronic devices, which are decreasing in size.

Abstract

The present invention relates to a microphone amplifier, including a bias unit for providing an input signal reference potential between a signal input terminal and a ground terminal, a voltage-to-current conversion unit for amplifying the input signal, a constant current source for supplying constant current to the voltage-to-current conversion unit, and a current amplification unit for amplifying variation in current between the constant current source and the voltage-to-current conversion unit. The above-described present invention provides a highly trustworthy microphone amplifier, in which a low-noise characteristic junction field effect transistor and a low- noise characteristic bipolar transistor are combined together, thereby realizing high input impedance, high amplification gain and low current consumption.

Description

[DESCRIPTION]
[invention Title]
MICROPHONE AMPLIFIER
[Technical Field] The present invention relates to microphones, and, more particularly, to a microphone amplifier that has high input impedance, high amplification gain and low current consumption using a Junction Field Effect Transistor (JFET) device and a bipolar transistor device. A microphone amplifier is an amplifier that is used for a microphone for converting voice signals into electrical signals .
[Background Art]
Fig. 1 is a circuit diagram of a prior art capacitor microphone amplifier, in which the microphone amplifier 10 includes a single JFET 15 and a bias unit 13 for providing an operation reference potential to the JFET 15.
The gate electrode of the JFET 15 of the amplifier 10, together with one end of an electrostatic charge capacitor Cmic for generating electrical signals through the vibration of voice signals, is connected to a node ni. The other end of the electrostatic charge capacitor Cmic, together with the source electrode of the JFET 15, is connected to a ground terminal GND. Accordingly, the node ni functions to transmit electrical signals, generated by the electrostatic charge capacitor Cmic, to the JFET 15, and thus it may be called the signal input terminal of the amplifier 10.
The drain electrode of the JFET 15 branches into two lines at a node no, one line is connected to external power VDD through a load resistor RL, and the other line is connected to an output terminal Vout, which is provided to enable the extraction and use of output signals.
Meanwhile, with regard to the bias unit 13 for providing a reference potential to the gate electrode of the JFET 15, one end thereof is connected to the node ni, at which the electrostatic charge capacitor Cmic and the JFET 15 are interconnected, and the other end thereof is connected to the ground terminal GND. The bias unit 13 is constructed by connecting a resistor R and a diode D in parallel.
The electrostatic charge capacitor Cmic is constructed by placing a conductive thin film and a fixed electrode plate opposite each other at a constant interval. Chargeable material is applied to one of the thin film and the fixed electrode plate, and the chargeable material is charged with electrostatic charge as high as tens of volts . When a voice signal is transmitted to the thin film, the thin film vibrates. The vibration of the thin film varies the capacity of the electrostatic charge capacitor Cmic, thereby generating a small electrical signal. When the electrical signal is input to the microphone amplifier 10, variation in current occurs at the output terminal Vout. After the variation in current is amplified by the JFET 15, it is divided into voltages by the load resistor RL and is then output.
The requirements for the amplifier 10 are described below. First, since the output impedance of the electrostatic charge capacitor Cmic is equal to or higher than hundreds of mega ohms, input loss must be minimized by setting the input impedance of the amplifier 10 to a value equal to or higher than hundreds of mega ohms. Second, since a small signal must be amplified, the amplification gain must be high, and the Signal to Noise Ratio (SNR) must be increased by setting noise to a value equal to or lower than -100 dB. Third, since the electrostatic charge capacitor is a part that is chiefly used for portable devices, low power consumption is required such that current consumption is equal to or lower than 500 μA and power supply voltage is equal to or lower than 3 volts . Accordingly, the use of a JFET device is suitable for meeting the above-described requirements .
However, of amplifiers using the same JFETs, an amplification circuit using a single JFET must minimize the parasitic capacitance of a signal input terminal and must have the resistor R of the bias unit 13 formed to have hundreds of mega ohms or more in order to improve input impedance in the audio frequency band of 100 Hz-10 kHz. However, in the case in which the size of the JFET 15 is increased in order to improve the voltage amplification gain of the amplifier 10, the parasitic capacitance is increased, and thus the input impedance is decreased, with the result that the voltage amplification gain is not considerably increased. Furthermore, in the case in which the voltage amplification gain is increased by increasing the operating current in a JFET having a certain size, a problem arises in that current consumption and operating voltage are increased. Even in the case in which the amplification gain is improved by increasing only input impedance, there is a problem in that noise is increased instead. The prior art capacitor microphone amplification circuit using a single JFET device is excellent from the viewpoint of low noise, but has limitations on the realization of high amplification gain, low current and high input impedance characteristics.
In another application, the prior art amplifier must also be used in a Micro-ElectroMechanical System (MEMS) microphone. Unlike the capacitor microphone, the MEMS microphone is configured such that, in Fig. 1, one end of the electrostatic charge capacitor Cmic is connected to an external constant voltage source, instead of the ground terminal GND, and the other end thereof is connected to the input node ni of the amplification circuit. Since, in the prior art capacitor microphone amplifier, the interior of the electrostatic charge capacitor Cmic is charged with electrostatic charge, one end of the electrostatic charge capacitor Cmic is connected to the ground terminal GND and the other end thereof is connected to the input node ni of the amplifier. However, in the case in which there is no electrostatic charge, as in the MEMS microphone, one end of the electrostatic charge capacitor Cmic is connected to an external constant voltage source, rather than the ground terminal GND, and the electrostatic charge capacitor Cmic is charged with applied charge, so that an electrical signal is generated through the vibration of a diaphragm, caused by a voice signal. In this case, since constant voltage, which can be applied from the outside, is as high as tens of volts, the output signal of the electrostatic charge capacitor Cmic is very weak, and thus an amplifier having a high amplification gain is required. Furthermore, in the MEMS microphone, the capacity of the electrostatic charge capacitor Cmic of the diaphragm is low, and thus the output impedance of the diaphragm is high, with the result that the amplifier requires high input impedance.
Although a differential amplifier method using a CMOS device (Korean Unexamined Patent Publication No. 10-2006- 0113925) is disclosed as another method, the CMOS device has higher noise than a JFET device. Furthermore, this method has a defect in that the resistance to external electrical impact is poor because an oxide film is as thin as hundreds of angstroms .
[Disclosure]
[Technical Problem]
Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a microphone amplifier in which a signal amplification circuit, designed to minimize input impedance in order to minimize voltage and current consumption and achieve high amplification gain, is formed on a semiconductor substrate or a chip.
[Technical Solution]
In order to accomplish the above object s, the present invention provides a microphone amplifier having a signal input terminal for providing an input signal, an output terminal for outputting an amplified signal and a ground terminal for providing reference to a circuit, including a bias unit for providing an input signal reference potential between the signal input terminal and the ground terminal; a voltage-to-current conversion unit for amplifying the input signal; a constant current source for supplying constant current to the voltage-to-current conversion unit; and a current amplification unit for amplifying variation in current between the constant current source and the voltage-to-current conversion unit. The microphone amplifier of the present invention further includes a third resistor for adjusting amplification gain of an input signal between the ground terminal, the current amplification unit and the voltage- to-current conversion unit; and a second resistor for adjusting an amount of bias current between the current amplification unit and the third resistor.
In the microphone amplifier of the present invention, the third resistor or the fourth resistor is connected through a conductor. In the microphone amplifier of the present invention, the constant current source is formed of a Junction Field Effect Transistor (JFET), or is formed such that the gate and source electrodes of a first JFET are connected to each other. In the microphone amplifier of the present invention, the bias unit is formed of a first resistor, is formed by connecting a first diode to the first resistor in parallel, and clamps an input signal, or is formed by connecting a second diode to a first diode, connected to the first resistor in parallel, in parallel in opposite directions.
In the microphone amplifier of the present invention, the voltage-to-current conversion unit is formed of a second JFET, is formed by connecting a third JFET to the second JFET in parallel, or is formed by connecting a fourth JFET to the second JFET in series . In the microphone amplifier of the present invention, the current amplification unit is formed of a PNP-type first bipolar transistor, the current amplification unit is a Darlington transistor that includes the PNP-type first bipolar transistor and a PNP-type second bipolar transistor, or is a PNP/NPN Darlington transistor that includes the PNP-type first bipolar transistor and an NPN- type third bipolar transistor.
In the microphone amplifier of the present invention, one or more JFET devices are used in the voltage-to-current conversion unit connected to the signal input terminal of the amplification circuit. Since the sizes of the JFET devices can be freely adjusted regardless of circuit characteristics, adjustment can be easily performed such that high input impedance can be realized based on low noise characteristics. Furthermore, since the amplification circuit has a separate resistor, current gain and power consumption can be adjusted.
[Advantageous Effects]
As described above, the present invention is configured such that low-noise characteristic JFET and bipolar transistors are combined together and are constructed in a minimal space, and thus the present invention has an advantage of being able to more easily adjust the amplification gain, current consumption and input capacitance of a microphone amplification circuit, and an advantage of being able to be manufactured using a small-sized semiconductor chip.
[Description of Drawings]
Fig. 1 is a circuit diagram of a prior art capacitor microphone amplifier;
Fig. 2 is a circuit diagram of a capacitor microphone amplifier according to the present invention;
Fig. 3 is a circuit diagram showing the results of application of respective embodiments in the bias unit, voltage-to-current conversion unit and current amplification unit of Fig. 2;
Figs. 4 and 5 are circuit diagrams showing bias units according to embodiments of the microphone amplifier of Fig. 2; Figs. 6 and 7 are circuit diagrams showing voltage- to-current conversion units according to embodiments of the microphone amplifier of Fig. 2; and
Figs . 8 and 9 are circuit diagrams showing current amplification units according to embodiments of the microphone amplifier of Fig. 2. <Description of reference numerals of principal elements in the drawings>
20: microphone amplifier 21: constant current source 23, 23a, 23b: bias unit 25, 25a, 25b: voltage-to- current conversion unit
27, 27a, 27b: current amplification unit
[Best Mode]
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings .
Fig. 2 is a circuit diagram of a capacitor microphone amplifier according to the present invention.
Referring to Fig. 2, the signal input terminal of a microphone amplifier 20 according to the present invention is a node ni at which a voice signal, detected and converted by an electrostatic charge capacitor Cmic, is provided as an electrical signal. Since the intensity of the electrical signal entering the signal input terminal is weak, the current is converted and amplified by a voltage- to-current conversion unit 25.
One end a of a bias unit 23 for stabilizing the bias of the electrical signal, entering from the electrostatic charge capacitor Cmic, by adjusting it to a constant value is connected to the node ni, and the other end b thereof is connected to a ground terminal GND. The output side of the amplifier 20 branches into two lines at a node no, one line is connected to external power VDD through a load resistor RL, and the other line is connected to an output terminal Vout, which is provided to enable the extraction and use of an output signal. The node no, which coincides with or is short-circuited to the output terminal Vout through a conductor, supplies current to the amplifier 20. Furthermore, with regard to the output terminal Vout, voltage division is performed on the electrical signal, which is input to the signal input terminal, converted into current, amplified and output as current, using the load resistor RL, thus causing voltage to be output through the output terminal Vout.
Here, all of the input signals are based on the ground terminal GND. The voltage-to-current conversion unit 25 for amplifying and converting the input signal into a current signal is formed of an N channel JFET having characteristics superior to those of other semiconductor devices . A constant current source 21 for supplying constant current to the voltage-to-current conversion unit 25 is formed of a first JFET Tl . The gate and source electrodes of the first JFET Tl are short-circuited, and the drain electrode thereof is short-circuited to the node no on the output side of the amplifier 20.
Since the constant current source 21 causes constant current to flow, varied current flows through a terminal g of the current amplification unit 27 when the current flowing through the voltage-to-current conversion unit 25 varies in response to variation in the input signal. The voltage-to-current conversion unit 25 is formed of one or more N channel JFETs, and has three terminals c, d and e. One terminal c is short-circuited to the source and gate of the constant current source 21 and the node nl. Another terminal d is connected to the node ni, which is short-circuited to the terminal a of a bias unit 23 as described above, and is supplied with an electrical signal. The remaining terminal e is connected to one end of a second resistor R2. The other end of the second resistor R2 branches into two lines at a node n2, one line is short- circuited to the ground terminal GND through a third resistor R3, and the other line is short-circuited to one terminal h of the current amplification unit 27.
The current amplification unit 27 is formed of one or more bipolar transistors, and has three terminals f, g and h. One terminal f is connected to the node no, which is short-circuited to the output terminal Vout. Another terminal g is connected to the source and gate of the constant current source 21 at the node nl. Furthermore, the remaining terminal h is connected to the node n2, at which the second and third resistors R2 and R3 are short- circuited to each other, as described above. The second resistor R2 adjusts the reference voltage of the terminal e in response to variation in current and variation in input potential based on the device characteristics of the voltage-to-current conversion unit 25, thereby adjusting the power consumption of the amplifier 20. Furthermore, a conductor, rather than the second resistor R2, performs connection depending on the characteristics of the JFET device of the voltage-to- current conversion unit 25. Furthermore, the third resistor R3 adjusts current gain by varying the potential difference between the terminals e and d of the voltage-to-current conversion unit 25 depending on the intensity of current flowing through the third resistor R3. Furthermore, the case in which the third resistor R3 is replaced with the conductor has an advantage in that the amplification gain of the current amplification unit 27 is maximized.
Fig. 3 is a circuit diagram showing the results of application of respective embodiments in the bias unit, voltage-to-current conversion unit and current amplification unit of Fig. 2.
Referring to Fig. 3, a bias unit 23a is formed of a first resistor Rl, and a voltage-to-current conversion unit 25a is formed of a second JFET T2. The gate, drain and source electrodes of the second JFET T2 are short-circuited to one terminal d, another terminal c and the remaining terminal e of the voltage-to-current conversion unit 25a, respectively. The structure of the voltage-to-current conversion unit 25a enables the characteristics of high input impedance and low input capacitance, required at the signal input terminal of the amplifier 20, to be maximally utilized. Furthermore, the current amplification unit 27a is formed of a PNP-type first bipolar transistor Ql according to an embodiment of the present invention. The base, emitter and collector electrodes of the first bipolar transistor Ql are short-circuited to one terminal g, another terminal f and the remaining terminal h of the current amplification unit 27a, respectively.
Fig. 4 is a circuit diagram showing the construction of a bias unit according to another embodiment in the amplifier of Fig. 2, and Fig. 5 is a circuit diagram showing the construction of a bias unit according to still another embodiment in the amplifier of Fig. 2.
Referring to Fig. 4, the bias terminal 23b of the amplifier 20 has a function of clamping the input signal by connecting a first diode Dl in parallel with the first resistor Rl of the bias terminal 23a.
Referring to Fig. 5, the bias terminal 23c of the amplifier 20 is configured to connect the first and second diodes Dl and D2 in parallel with each other in opposite directions when the bias terminal 23c is constructed using a first resistor Rl and the first and second diodes Dl and D2. This further increases the symmetry of the input signal compared to the structure of the bias terminal 23b of Fig. 4a.
Fig. 6 is a circuit diagram showing the construction of a voltage-to-current conversion unit according to another embodiment in the amplifier of Fig. 2, and Fig. 7 is a circuit diagram showing the construction of a voltage- to-current conversion unit according to still another embodiment in the amplifier of Fig. 2. Referring to Fig. 6, in the voltage-to-current conversion unit 25b of the amplifier 20, a second JFET T2 and a third JFET T3 are connected in parallel with each other on the basis of the drain and source electrodes thereof. In this case, the gate electrode of the third JFET T3 is short-circuited to the third JFET T3's own source electrode .
The structure of the voltage-to-current conversion unit 25b decreases input capacitance by dividing the gate electrode of the second JFET T2, through which the signal is input, into two parts.
Referring to Fig. 7, the voltage-to-current conversion unit 25c of the amplifier 20 may be formed of second and fourth JFETs T2 and T4. Here, the second and fourth JFETs are connected in parallel with each other on the basis of the drain and source electrodes thereof.
The drain electrode of the second JFET T2 is connected to the source electrode of a fourth JFET T4. The gate electrode of the second JFET T2 is short-circuited to one terminal d of the voltage-to-current conversion unit 25c. The drain electrode of the fourth JFET T4 is short- circuited to another terminal c of the voltage-to-current conversion unit 25c. Furthermore, the source electrode of the second JFET T2 and the gate electrode of the fourth JFET T4 are short-circuited to the remaining terminal e of the voltage-to-current conversion unit 25c. The structure of the voltage-to-current conversion unit 25c has an advantage in that the second and fourth JFETs T2 and T4 have divided voltages, and thus the voltage between the source and drain of the second JFET T2 is reduced, thereby minimizing the size of the second JFET T2. In the structures of Figs. 6 and 7, the geometrical size of the second JFET T2 can be reduced, thereby being advantageous in the reduction in input capacitance and the size of the device.
Fig. 8 is a circuit diagram showing the construction of a current amplification unit according to another embodiment in the amplifier of Fig. 2, and Fig. 9 is a circuit diagram showing the construction of a current amplification unit according to still another embodiment in the amplifier of Fig. 2. Referring to Fig. 8, the current amplification unit 27b of the amplifier 20 may be formed of PNP-type first and second bipolar transistors Ql and Q2. The base electrode of the first bipolar transistor Ql is short-circuited to one terminal g of the current amplification unit 27b, and the base electrode of the second bipolar transistor Q2 is short-circuited to the emitter electrode of the first bipolar transistor Ql . The collector electrodes of the first and second bipolar transistors Ql and Q2 are connected to each other, and are short-circuited to another terminal h of the current amplification unit 27b. Furthermore, the emitter electrode of the second bipolar transistor Q2 is short-circuited to the remaining terminal f of the current amplification unit 27b.
The structure of the current amplification unit 27b adopts a PNP Darlington bipolar transistor having the above-described construction, thereby being able to improve the current gain of the current amplification unit 27.
Referring to Fig. 9, the current amplification unit 27c of the amplifier 20 may be formed of first and third bipolar transistors Ql and Q3. In this case, the third bipolar transistor is an NPN type. The base electrode of the first bipolar transistor Ql is short-circuited to one terminal g of the current amplification unit 27c, and the base electrode of the third bipolar transistor Q3 is short- circuited to the collector electrode of the first bipolar transistor Ql. The emitter electrode of the first bipolar transistor Ql and the collector electrode of the third bipolar transistor Q3 are connected to each other, and are short-circuited to another terminal f of the current amplification unit 27c. Furthermore, the emitter electrode of the third bipolar transistor Q3 of the current amplification unit 27c is short-circuited to the remaining terminal h.
The structure of the current amplification unit 27c adopts a PNP/NPN Darlington bipolar transistor, in which the first bipolar transistor Ql and the third bipolar transistor Q3 are constructed in two stages, thereby improving the current gain of the current amplification unit 27.
In still another embodiment, all of the JFETs used in the constant current source 21 and the voltage-to-current conversion unit 25 may be replaced with Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). Such a microphone amplifier can realize the above-described circuit characteristics .
The microphone amplifier of the present invention is implemented on a semiconductor substrate or a chip.
The rights of the present invention are not limited to the above-described embodiments, but are defined by the description of the claims. It will be apparent that those having ordinary skill in the field of the present invention can make various modifications and variations within the scope of rights set forth in the claims. [industrial Applicability]
The present invention relates to a microphone amplifier implemented on a semiconductor substrate or a chip. The microphone amplifier is designed to minimize voltage and current consumption and to minimize input capacitance in order to realize high amplification gain, thus being able to be universally and widely used in digital electronic devices, which are decreasing in size.

Claims

[CLAIMS]
[Claim l]
A microphone amplifier having a signal input terminal for providing an input signal, an output terminal for outputting an amplified signal and a ground terminal for providing reference to a circuit, comprising: a bias unit for providing an input signal reference potential between the signal input terminal and the ground terminal; a voltage-to-current conversion unit for amplifying the input signal; a constant current source for supplying constant current to the voltage-to-current conversion unit; and a current amplification unit for amplifying variation in current between the constant current source and the voltage-to-current conversion unit.
[Claim 2]
The microphone amplifier as set forth in claim 1, further comprising: a third resistor for adjusting amplification gain of an input signal between the ground terminal, the current amplification unit and the voltage-to-current conversion unit; and a second resistor for adjusting an amount of bias current between the current amplification unit and the third resistor .
[Claim 3]
The microphone amplifier as set forth in claim 2, wherein the third resistor is connected through a conductor.
[Claim 4]
The microphone amplifier as set forth in claim 2, wherein the second resistor is connected through a conductor.
[Claim 5]
The microphone amplifier as set forth in claim 1, wherein the constant current source is formed of a Junction Field Effect Transistor (JFET) .
[Claim 6] The microphone amplifier as set forth in claim 1, wherein the constant current source is formed such that gate and source electrodes of a first JFET are connected to each other.
[Claim 7] The microphone amplifier as set forth in claim 1, wherein the bias unit is formed of a first resistor. [Claim 8]
The microphone amplifier as set forth in claim 7, wherein the bias unit is formed by connecting a first diode to the first resistor in parallel, and clamps an input signal.
[Claim 9]
The microphone amplifier as set forth in claim 7, wherein the bias unit is formed by connecting a second diode to a first diode, connected to the first resistor in parallel, in parallel in opposite directions.
[Claim lθ]
The microphone amplifier as set forth in claim 1, wherein the voltage-to-current conversion unit is formed of a second JFET.
[Claim ll]
The microphone amplifier as set forth in claim 10, wherein the voltage-to-current conversion unit is formed by connecting a third JFET to the second JFET in parallel.
[Claim 12] The microphone amplifier as set forth in claim 10, wherein the voltage-to-current conversion unit is formed by connecting a fourth JFET to the second JFET in series .
[Claim 13]
The microphone amplifier as set forth in claim 1, wherein the current amplification unit is formed of a PNP- type first bipolar transistor.
[Claim 14]
The microphone amplifier as set forth in claim 13, wherein the current amplification unit is a Darlington transistor that comprises the PNP-type first bipolar transistor and a PNP-type second bipolar transistor.
[Claim 15]
The microphone amplifier as set forth in claim 13, wherein the current amplification unit is a PNP/NPN
Darlington transistor that comprises the PNP-type first bipolar transistor and an NPN-type third bipolar transistor.
[Claim 16]
The microphone amplifier as set forth in claim 1, wherein a signal entering the signal input terminal is an electrical signal into which a voice signal recognized by the electrostatic charge capacitor is converted.
PCT/KR2008/000817 2007-02-16 2008-02-12 Microphone amplifier WO2008100055A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200880005324.7A CN101675669B (en) 2007-02-16 2008-02-12 Microphone amplifier

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2007-0016271 2007-02-16
KR1020070016271A KR100733288B1 (en) 2007-02-16 2007-02-16 Microphone amplifier

Publications (2)

Publication Number Publication Date
WO2008100055A2 true WO2008100055A2 (en) 2008-08-21
WO2008100055A3 WO2008100055A3 (en) 2008-10-16

Family

ID=38373699

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2008/000817 WO2008100055A2 (en) 2007-02-16 2008-02-12 Microphone amplifier

Country Status (3)

Country Link
KR (1) KR100733288B1 (en)
CN (1) CN101675669B (en)
WO (1) WO2008100055A2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011096868A1 (en) * 2010-02-05 2011-08-11 Research Electronics Leksand Ab Method and arrangement for driving a microphone
WO2012080059A1 (en) * 2010-12-17 2012-06-21 Austriamicrosystems Ag Amplifier circuit for a two-wire interface

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101183986B1 (en) 2008-12-19 2012-09-19 한국전자통신연구원 A read-out circuit with high impedance
KR101109392B1 (en) 2010-07-20 2012-01-30 주식회사 케이이씨 Amplifier for microphone
CN103067819B (en) * 2011-10-18 2015-09-30 歌尔声学股份有限公司 microphone amplifying circuit
GB2525674B (en) * 2014-05-02 2017-11-29 Cirrus Logic Int Semiconductor Ltd Low noise amplifier for MEMS capacitive transducers
KR101601229B1 (en) * 2014-11-17 2016-03-08 현대자동차주식회사 Micro phone sensor
CN111917385A (en) * 2019-05-08 2020-11-10 立积电子股份有限公司 Amplifier device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4214215A (en) * 1978-08-02 1980-07-22 Contact Communication Corporation Low noise-high gain JFET amplifier for a piezoelectric transducer
US6160450A (en) * 1999-04-09 2000-12-12 National Semiconductor Corporation Self-biased, phantom-powered and feedback-stabilized amplifier for electret microphone
US6504937B1 (en) * 1998-01-06 2003-01-07 Vxi Corporation Amplifier circuit for electret microphone with enhanced performance
US6888408B2 (en) * 2002-08-27 2005-05-03 Sonion Tech A/S Preamplifier for two terminal electret condenser microphones
KR20060113925A (en) * 2003-10-14 2006-11-03 아우디오아시스 에이/에스 Microphone preamplifier

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005209842A (en) * 2004-01-22 2005-08-04 Fuji Electric Holdings Co Ltd Shaping method and device of electromagnetic coil
KR20050102180A (en) * 2004-04-21 2005-10-26 박용석 A changeable gain and low noise amplifier for an audio storage system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4214215A (en) * 1978-08-02 1980-07-22 Contact Communication Corporation Low noise-high gain JFET amplifier for a piezoelectric transducer
US6504937B1 (en) * 1998-01-06 2003-01-07 Vxi Corporation Amplifier circuit for electret microphone with enhanced performance
US6160450A (en) * 1999-04-09 2000-12-12 National Semiconductor Corporation Self-biased, phantom-powered and feedback-stabilized amplifier for electret microphone
US6888408B2 (en) * 2002-08-27 2005-05-03 Sonion Tech A/S Preamplifier for two terminal electret condenser microphones
KR20060113925A (en) * 2003-10-14 2006-11-03 아우디오아시스 에이/에스 Microphone preamplifier

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011096868A1 (en) * 2010-02-05 2011-08-11 Research Electronics Leksand Ab Method and arrangement for driving a microphone
WO2012080059A1 (en) * 2010-12-17 2012-06-21 Austriamicrosystems Ag Amplifier circuit for a two-wire interface
US9571046B2 (en) 2010-12-17 2017-02-14 Ams Ag Amplifier circuit for a two-wire interface

Also Published As

Publication number Publication date
WO2008100055A3 (en) 2008-10-16
KR100733288B1 (en) 2007-06-28
CN101675669B (en) 2013-11-06
CN101675669A (en) 2010-03-17

Similar Documents

Publication Publication Date Title
US7800443B2 (en) Circuit arrangement for providing an analog signal, and electronic apparatus
US7110560B2 (en) Electret condensor microphone preamplifier that is insensitive to leakage currents at the input
WO2008100055A2 (en) Microphone amplifier
US8958576B2 (en) Dynamically biased amplifier
US9693135B2 (en) Differential microphone and method for driving a differential microphone
US5097224A (en) Self-biasing, low noise amplifier of extended dynamic range
US20070076904A1 (en) Microphone preamplifier
KR20140036790A (en) Mems microphone using noise filter
US9590571B2 (en) Single stage buffer with filter
CN103796134B (en) System and method for capacitive signal source amplifier
US7224226B2 (en) Amplifying device
KR101670477B1 (en) Method and apparatus for class ab audio amplifier output stage voltage protection
US20070217628A1 (en) Two-wire microphone circuit
US7259627B1 (en) True differential microphone amplifier
KR101119807B1 (en) Amplifier element
KR101601449B1 (en) System and method for a microphone amplifier
JP2013009372A (en) Voltage controlling circuit
US8766725B2 (en) Apparatus and methods for frequency compensation of an amplifier
CN110324770B (en) Microphone, integrated circuit thereof and electronic equipment
KR102361021B1 (en) Pre-amplifier
CN209914063U (en) Microphone, integrated circuit thereof and electronic equipment
JP2005109842A (en) Amplifier circuit for condenser microphone
US9893691B2 (en) Impedance converter and condenser microphone
CN101401451A (en) Two-wire microphone circuit

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880005324.7

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08712464

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase in:

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08712464

Country of ref document: EP

Kind code of ref document: A2