WO2008099348A3 - Semiconductor device identifier generation - Google Patents

Semiconductor device identifier generation Download PDF

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Publication number
WO2008099348A3
WO2008099348A3 PCT/IB2008/050515 IB2008050515W WO2008099348A3 WO 2008099348 A3 WO2008099348 A3 WO 2008099348A3 IB 2008050515 W IB2008050515 W IB 2008050515W WO 2008099348 A3 WO2008099348 A3 WO 2008099348A3
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor device
identifier
layer
key
stray capacitances
Prior art date
Application number
PCT/IB2008/050515
Other languages
French (fr)
Other versions
WO2008099348A2 (en
Inventor
Victor Zieren
Geloven Johannes A J Van
Robertus A M Wolters
Original Assignee
Nxp Bv
Victor Zieren
Geloven Johannes A J Van
Robertus A M Wolters
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv, Victor Zieren, Geloven Johannes A J Van, Robertus A M Wolters filed Critical Nxp Bv
Publication of WO2008099348A2 publication Critical patent/WO2008099348A2/en
Publication of WO2008099348A3 publication Critical patent/WO2008099348A3/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072Circuits for initialization, powering up or down, clearing memory or presetting
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • H01L23/576Protection from inspection, reverse engineering or tampering using active circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Abstract

The present invention relates to a semiconductor device (11) for generating an identifier comprising a volatile memory (13) having a plurality of memory cells (21), to a method of generating an identifier using such a semiconductor device (11) and to a method of detecting a tampering on said semiconductor device (11). Providing a layer (27) comprising conductive and non conductive materials (28, 29) with said semiconductor device allows for a cooperation between elements or properties of a memory cell (21) which are responsible for the assuming of a random state by the memory cell (21) during initialization and the layer (27) acting as stray capacitances (26, 26 ). From the random states of the memory cells (21) a key or identifier can be generated. Due to said cooperation, i.e. the influence of the stray capacitances (26, 26 ) formed by the layer, the key or identifier can be generated more reliably over a wider range of operation parameters. Further, a tampering on said layer (27) leads to a change to the stray capacitances (26, 26 ) and thus changes the identifier or key.
PCT/IB2008/050515 2007-02-16 2008-02-13 Semiconductor device identifier generation WO2008099348A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP07102549 2007-02-16
EP07102549.8 2007-02-16

Publications (2)

Publication Number Publication Date
WO2008099348A2 WO2008099348A2 (en) 2008-08-21
WO2008099348A3 true WO2008099348A3 (en) 2008-10-30

Family

ID=39591179

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2008/050515 WO2008099348A2 (en) 2007-02-16 2008-02-13 Semiconductor device identifier generation

Country Status (1)

Country Link
WO (1) WO2008099348A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2968454A1 (en) * 2010-12-06 2012-06-08 St Microelectronics Rousset Method for identifying integrated circuit that is utilized in personal digital assistant, involves determining impression of granular structure of metallic zone from digital image obtained by backscattered electron diffraction
DE102014016644A1 (en) * 2014-11-11 2016-05-12 Giesecke & Devrient Gmbh Method for protection against unauthorized access

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010033012A1 (en) * 1999-12-30 2001-10-25 Koemmerling Oliver Anti tamper encapsulation for an integrated circuit
WO2003046802A2 (en) * 2001-11-28 2003-06-05 Koninklijke Philips Electronics N.V. Semiconductor device, card, methods of initializing, checking the authenticity and the identity thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010033012A1 (en) * 1999-12-30 2001-10-25 Koemmerling Oliver Anti tamper encapsulation for an integrated circuit
WO2003046802A2 (en) * 2001-11-28 2003-06-05 Koninklijke Philips Electronics N.V. Semiconductor device, card, methods of initializing, checking the authenticity and the identity thereof

Also Published As

Publication number Publication date
WO2008099348A2 (en) 2008-08-21

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