WO2008081419A3 - Systems and methods for test time outlier detection and correction in integrated circuit testing - Google Patents

Systems and methods for test time outlier detection and correction in integrated circuit testing Download PDF

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Publication number
WO2008081419A3
WO2008081419A3 PCT/IL2006/001501 IL2006001501W WO2008081419A3 WO 2008081419 A3 WO2008081419 A3 WO 2008081419A3 IL 2006001501 W IL2006001501 W IL 2006001501W WO 2008081419 A3 WO2008081419 A3 WO 2008081419A3
Authority
WO
WIPO (PCT)
Prior art keywords
systems
methods
correction
integrated circuit
test time
Prior art date
Application number
PCT/IL2006/001501
Other languages
French (fr)
Other versions
WO2008081419A2 (en
Inventor
Gil Balog
Reed Linde
Avi Golan
Original Assignee
Optimaltest Ltd
Gil Balog
Reed Linde
Avi Golan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optimaltest Ltd, Gil Balog, Reed Linde, Avi Golan filed Critical Optimaltest Ltd
Priority to PCT/IL2006/001501 priority Critical patent/WO2008081419A2/en
Priority to TW095149986A priority patent/TW200827739A/en
Publication of WO2008081419A2 publication Critical patent/WO2008081419A2/en
Publication of WO2008081419A3 publication Critical patent/WO2008081419A3/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31707—Test strategies

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.
PCT/IL2006/001501 2006-12-28 2006-12-28 Systems and methods for test time outlier detection and correction in integrated circuit testing WO2008081419A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/IL2006/001501 WO2008081419A2 (en) 2006-12-28 2006-12-28 Systems and methods for test time outlier detection and correction in integrated circuit testing
TW095149986A TW200827739A (en) 2006-12-28 2006-12-29 Systems and methods for test time outlier detection and correction in integrated circuit testing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IL2006/001501 WO2008081419A2 (en) 2006-12-28 2006-12-28 Systems and methods for test time outlier detection and correction in integrated circuit testing

Publications (2)

Publication Number Publication Date
WO2008081419A2 WO2008081419A2 (en) 2008-07-10
WO2008081419A3 true WO2008081419A3 (en) 2009-04-16

Family

ID=39589070

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2006/001501 WO2008081419A2 (en) 2006-12-28 2006-12-28 Systems and methods for test time outlier detection and correction in integrated circuit testing

Country Status (2)

Country Link
TW (1) TW200827739A (en)
WO (1) WO2008081419A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6165658B2 (en) * 2014-03-20 2017-07-19 株式会社東芝 Manufacturing apparatus management system and manufacturing apparatus management method
TWI749416B (en) * 2019-11-29 2021-12-11 中國鋼鐵股份有限公司 Method for diagnosing abnormality of equipment having variable rotation speeds
US11467207B2 (en) 2020-12-23 2022-10-11 Industrial Technology Research Institute Massive testing of micro integrated circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726920A (en) * 1995-09-29 1998-03-10 Advanced Micro Devices, Inc. Watchdog system having data differentiating means for use in monitoring of semiconductor wafer testing line
US6055463A (en) * 1997-05-20 2000-04-25 Samsung Electronics Co. Ltd. Control system and method for semiconductor integrated circuit test process
US6366109B1 (en) * 1998-07-07 2002-04-02 Advantest Corporation Semiconductor device testing system and method
US6948149B2 (en) * 2004-02-19 2005-09-20 Infineon Technologies, Ag Method of determining the overlay accuracy of multiple patterns formed on a semiconductor wafer

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726920A (en) * 1995-09-29 1998-03-10 Advanced Micro Devices, Inc. Watchdog system having data differentiating means for use in monitoring of semiconductor wafer testing line
US6055463A (en) * 1997-05-20 2000-04-25 Samsung Electronics Co. Ltd. Control system and method for semiconductor integrated circuit test process
US6366109B1 (en) * 1998-07-07 2002-04-02 Advantest Corporation Semiconductor device testing system and method
US6948149B2 (en) * 2004-02-19 2005-09-20 Infineon Technologies, Ag Method of determining the overlay accuracy of multiple patterns formed on a semiconductor wafer

Also Published As

Publication number Publication date
TW200827739A (en) 2008-07-01
WO2008081419A2 (en) 2008-07-10

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