WO2008069478A1 - Limiting amplifier having improved gain and bandwidth characteristics - Google Patents

Limiting amplifier having improved gain and bandwidth characteristics Download PDF

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Publication number
WO2008069478A1
WO2008069478A1 PCT/KR2007/005948 KR2007005948W WO2008069478A1 WO 2008069478 A1 WO2008069478 A1 WO 2008069478A1 KR 2007005948 W KR2007005948 W KR 2007005948W WO 2008069478 A1 WO2008069478 A1 WO 2008069478A1
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Prior art keywords
amplifier
transistors
unit
limiting amplifier
limiting
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PCT/KR2007/005948
Other languages
French (fr)
Inventor
Seon Eui Hong
Ho Young Kim
Young Jun Chong
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Electronics And Telecommunications Research Institute
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Priority claimed from KR1020070053847A external-priority patent/KR100886178B1/en
Application filed by Electronics And Telecommunications Research Institute filed Critical Electronics And Telecommunications Research Institute
Priority to CN2007800492502A priority Critical patent/CN101573867B/en
Publication of WO2008069478A1 publication Critical patent/WO2008069478A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G7/00Volume compression or expansion in amplifiers
    • H03G7/001Volume compression or expansion in amplifiers without controlling loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42Modifications of amplifiers to extend the bandwidth
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42Modifications of amplifiers to extend the bandwidth
    • H03F1/48Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
    • H03F1/486Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with IC amplifier blocks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/087Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with IC amplifier blocks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183Long tailed pairs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/151A source follower being used in a feedback circuit of an amplifier stage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/36Indexing scheme relating to amplifiers the amplifier comprising means for increasing the bandwidth
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45114Indexing scheme relating to differential amplifiers the differential amplifier contains another differential amplifier in its feedback circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45352Indexing scheme relating to differential amplifiers the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45366Indexing scheme relating to differential amplifiers the AAC comprising multiple transistors parallel coupled at their gates only, e.g. in a cascode dif amp, only those forming the composite common source transistor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45528Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC

Definitions

  • the present invention relates to a limiting amplifier having improved gain and bandwidth characteristics, and more particularly, to a limiting amplifier for an optical receiver in which a feedback resistor and a transistor having a source follower structure are connected to an amplifier stage, and thus a gain characteristic and a bandwidth characteristic can both be improved.
  • FIG. IA schematically illustrates a constitution of an optical receiver of an optical communication system.
  • a conventional optical receiver 100 roughly comprises an amplifier module 110 and a clock and data recovery (CDR) module 120, each of which comprises sub-devices.
  • CDR clock and data recovery
  • the modules are generally integrated into one module.
  • the amplifier module 110 comprises: a photodiode (PD) 111 for converting an optical signal into an electrical signal; a trans -impedance amplifier (TIA) 112 for slightly amplifying the signal while converting the current converted by the PD 111 into voltage; and a limiting amplifier 113 for receiving the amplified signal from the TIA 112 and amplifying it to satisfy the input condition of the CDR module 120 in the next stage.
  • the limiting amplifier 113 generally has a limiting amplification function of outputting a signal having a uniform level regardless of the level of an input signal.
  • the limiting amplifier 113 serves to amplify an electrical signal photo-electrically converted by the PD to be an output signal having a uniform level even when optical power received from the PD changes, e.g., from -30 dBm to -10 dBm, thereby preventing an error from occurring at the CDR module 120. Therefore, it is preferable that the limiting amplifier 113 is implemented to have the maximum gain and a wide bandwidth.
  • FIG. IB is a circuit diagram of the limiting amplifier 113 shown in FIG. IA.
  • the limiting amplifier 113 comprises a current source Is, a first amplifier unit Al, a second amplifier unit A2 and a buffer unit B, amplifying an input signal Vin and outputting a signal Vout having a uniform level.
  • the first amplifier unit Al may be represented as an equivalent circuit comprising load resistors R connected to a supply voltage Vdd, transistors M and M for input signal amplification, and a source resistor R connected to a common source node of the transistors M and M .
  • a voltage gain IAvI of an output signal Vout to an input signal Vin may be expressed by following Formula 1.
  • IAvI denotes voltage gain
  • g denotes transconductance of the transistors M and M
  • R denotes load resistance
  • R denotes source resistance
  • FIG. 1C The voltage gain IAvI of Formula 1 depending on a frequency band oo is illustrated in FIG. 1C. As illustrated in FIG. 1C, poles of the circuit as shown in FIG. IB are shown at 1/R C and (1 + g R 12)1 R C , and the bandwidth is
  • the present invention is directed to a limiting amplifier having an excellent gain characteristic and a wide bandwidth.
  • One aspect of the present invention provides a limiting amplifier having improved gain and bandwidth characteristics, comprising: a distributor for distributing an input voltage signal; an amplifier module for receiving and amplifying the distributed voltage signal; and a current source for supplying current to the distributor and the amplifier module.
  • the amplifier module comprises: a first amplifier unit for amplifying the voltage signal input from the distributor; a second amplifier unit for amplifying an output of the first amplifier unit again; and a feedback unit connected to an output end of the second amplifier unit, feeding back an output of the second amplifier unit to an input end of the first amplifier unit, and comprising a feedback resistor and a transistor having a source follower structure.
  • FIG. IA schematically illustrates a constitution of an optical receiver of an optical communication system
  • FIG. IB is a circuit diagram of a limiting amplifier shown in FIG. IA;
  • FIG. 1C shows voltage gain of the limiting amplifier of FIG. IB depending on frequency band
  • FIG. 2 is a circuit diagram of a limiting amplifier according to an exemplary embodiment of the present invention
  • FIGS. 3A and 3B illustrate voltage gain characteristics of a limiting amplifier according to an exemplary embodiment of the present invention from the viewpoint of frequency and time
  • FIG. 4 shows a comparison between voltage gain and bandwidth characteristics of a limiting amplifier according to an exemplary embodiment of the present invention and a conventional limiting amplifier
  • FIG. 5 is a circuit diagram of a limiting amplifier according to another exemplary embodiment of the present invention.
  • FIG. 2 is a circuit diagram of a limiting amplifier according to an exemplary embodiment of the present invention.
  • a limiting amplifier 200 roughly comprises: a distributor SD 210 for distributing an input voltage signal; an amplifier module L_AMP 230 for receiving and amplifying the distributed voltage signal; and a current source Is for supplying current to the distributor SD 210 and the amplifier module L_AMP 230.
  • the distributor SD 210 serves to distribute a single input voltage signal into two voltage signals and output them, and comprises a 1-1 transistor MaI, a 1-2 transistor MbI, and first to third load resistors R Ll , R L2 and R L3.
  • the respective gate electrodes of the 1-1 and 1-2 transistors MaI and MbI are connected to an input voltage terminal V , the drain electrodes are respectively connected to a supply voltage Vdd through the first and second load resistors R and R L2 , and the source electrodes are connected in common to a 3-4 transistor Mc4 of the current source Is. And, the third load resistor R is connected between the supply
  • the MaI, MbI and Mc5 are supplied by the first to third load resistors R , R and R .
  • R , R and R are used to remove a capacitance element generated from the PMOS
  • the IN signal is distributed by the 1-1 and 1-2 transistors MaI and MbI of the distributor SD 210 and output to the amplifier module L_AMP 230.
  • the two voltage signals output to the amplifier module L_AMP 230 have the same level and a phase difference of ⁇ .
  • the amplifier module L_AMP 230 serves to amplify the voltage signals input from the distributor SD 210.
  • the amplifier module L_AMP 230 comprises: a first amplifier unit 231 for amplifying the input voltage signals; a second amplifier unit 233 for amplifying outputs of the first amplifier unit 231 again; and a feedback unit 235 connected to output ends of the second amplifier unit 233 in order to feed back outputs of the second amplifier unit 233 to input ends of the first amplifier unit 231.
  • the first amplifier unit 231 comprises 2-1 and 2-2 transistors Ma3 and Mb3.
  • the gate electrodes of the 2-1 and 2-2 transistors Ma3 and Mb3 are respectively connected to output ends of the distributor SD 210, the drain electrodes of them are respectively connected to the gates of 2-3 and 2-4 transistors Ma2 and Mb2, and the source electrodes of them are connected in common to a 3-9 transistor Mc9 of the current source Is.
  • the second amplifier unit 233 comprises the 2-3 and 2-4 transistors Ma2 and Mb2.
  • the drain electrodes of the 2-3 and 2-4 transistors Ma2 and Mb2 are respectively connected to the gates of 2-5 and 2-6 transistors MSl and MS2, and the source electrodes of them are connected in common to a 3-10 transistor McIO of the current source Is.
  • the feedback unit 235 comprises first and second feedback resistors R and R , and fl f2 the 2-5 and 2-6 transistors MSl and MS2 having a source follower structure in which source voltage and phase are the same as gate voltage and phase. Between the drain electrodes of the 2-5 and 2-6 transistors MSl and MS2 and the gate electrodes of the 2-3 and 2-4 transistors Ma3 and Mb3, the feedback resistors R fl and R f2 are connected, respectively.
  • the amplifier module L_AMP 230 further comprises fourth and fifth load resistors R and R for adjusting gain of the first and second amplifier units 231 and 233.
  • the fourth and fifth load resistors R L4 and R L5 are connected between the gate electrodes of the 2-5 and 2-6 transistors MSl and MS2 and the supply voltage Vdd, respectively.
  • the present invention has a most remarkable characteristic in that the limiting amplifier is constituted to improve both a voltage gain characteristic and a bandwidth characteristic by connecting the feedback resistors R and R to one side of an fl f2 amplifier stage in the amplifier module L_AMP 230 and connecting the 2-5 and 2-6 transistors MS 1 and MS2 having a source follower structure to the other side. From this viewpoint, operation of the limiting amplifier according to an exemplary embodiment of the present invention will now be described in detail.
  • respective voltage signals amplified by the first and second amplifier units 231 and 233 are input to the 2-5 and 2-6 transistors MSl and MS2 of the feedback unit 235, and thus the 2-5 and 2-6 transistors MSl and MS2 having a source follower structure output the input voltage signals as they are to the feedback resistors R and R .
  • voltage gain IAvI may be expressed by following Formula 2.
  • IAvI denotes voltage gain
  • g denotes transconductance of the 2-3
  • R denotes source resistance
  • R denotes feedback resistance
  • voltage gain of the amplifier module L_AMP 230 is in proportion to the transconductance g of the 2- 1 and 2-2 transistors Ma3 and Mb3 m3 and the feedback resistance R , and thus the maximum gain can be increased using a feedback resistor having a large resistance value.
  • the present invention reduces the Miller effect due to the feedback resistors R and R using the 2-5 and 2-6 transistors MSl and MS2 fl f2 having a source follower structure, thereby enlarging the bandwidth. Consequently, it is possible to implement a limiting amplifier having an improved bandwidth characteristic together with an improved voltage gain characteristic.
  • FIGS. 3 A and 3B illustrate voltage gain characteristics of a limiting amplifier according to an exemplary embodiment of the present invention from the viewpoint of frequency and time.
  • poles are positioned at 1/R (C + C ) and (1 + g
  • the limiting amplifier according to an exemplary embodiment of the present invention has a larger bandwidth than a conventional limiting amplifier.
  • the limiting amplifier according to an exemplary embodiment of the present invention always outputs a voltage signal having a uniform level regardless of an input voltage signal.
  • FIG. 4 shows a comparison between voltage gain and bandwidth characteristics of a limiting amplifier according to an exemplary embodiment of the present invention and a conventional limiting amplifier.
  • the limiting amplifier according to an exemplary embodiment of the present invention can have a larger bandwidth as well as a higher voltage gain than the conventional limiting amplifier.
  • FIG. 5 is a circuit diagram of a limiting amplifier according to another exemplary embodiment of the present invention, which further comprises: an input buffer D_IN for adjusting the level of an input signal input to an amplifier module L_AMP 530; and an output buffer D_OUT for adjusting the level of an output signal output from the amplifier module L_AMP 530 and improving a return loss characteristic.
  • the limiting amplifier according to another exemplary embodiment of the present invention operates in the same way as the limiting amplifier shown in FIG. 2, and thus a detailed description thereof will not be reiterated.
  • a limiting amplifier according to an exemplary embodiment of the present invention can have an excellent gain characteristic and a wide bandwidth using a feedback resistor and a transistor of a source follower structure connected to an amplifier stage.

Abstract

Provided is a limiting amplifier having improved gain and bandwidth characteristics. According to the limiting amplifier, the maximum gain is increased by connecting a feedback resistor to an amplifier stage, and a bandwidth characteristic is improved by connecting a transistor having a source follower structure to the amplifier stage and reducing a Miller effect. Therefore, it is possible to obtain uniform gain that is a unique characteristic of a limiting amplifier. In addition, it is possible to obtain a wide bandwidth as well as an improved gain characteristic.

Description

Description
LIMITING AMPLIFIER HAVING IMPROVED GAIN AND BANDWIDTH CHARACTERISTICS
Technical Field
[1] The present invention relates to a limiting amplifier having improved gain and bandwidth characteristics, and more particularly, to a limiting amplifier for an optical receiver in which a feedback resistor and a transistor having a source follower structure are connected to an amplifier stage, and thus a gain characteristic and a bandwidth characteristic can both be improved.
[2] This work was supported by the IT R&D program of Ministry of Information and
Communication / Institute for Information Technology Advancement [2005-S-l 10-02, InGaAs photo-receiver using 3-dim range/image signal processing IC] Background Art
[3] The Internet and mobile communication services have enabled people to receive various multimedia services anytime and anywhere, and thus data traffic of wired/ wireless communication networks is constantly and rapidly increasing.
[4] With the constant increase in data traffic, communication service providers are constructing communication networks using high-capacity transmission systems. In particular, it is predicted that among such high-capacity transmission systems demand on optical communication systems will further increase, and thus demand on optical communication components such as optical transmitters/receivers will also increase.
[5] FIG. IA schematically illustrates a constitution of an optical receiver of an optical communication system.
[6] As illustrated in FIG. IA, a conventional optical receiver 100 roughly comprises an amplifier module 110 and a clock and data recovery (CDR) module 120, each of which comprises sub-devices. In a conventional optical receiver for 10 Gb/s or below, the modules are generally integrated into one module.
[7] The amplifier module 110 comprises: a photodiode (PD) 111 for converting an optical signal into an electrical signal; a trans -impedance amplifier (TIA) 112 for slightly amplifying the signal while converting the current converted by the PD 111 into voltage; and a limiting amplifier 113 for receiving the amplified signal from the TIA 112 and amplifying it to satisfy the input condition of the CDR module 120 in the next stage. Here, the limiting amplifier 113 generally has a limiting amplification function of outputting a signal having a uniform level regardless of the level of an input signal.
[8] In other words, in the amplifier module 110, the limiting amplifier 113 serves to amplify an electrical signal photo-electrically converted by the PD to be an output signal having a uniform level even when optical power received from the PD changes, e.g., from -30 dBm to -10 dBm, thereby preventing an error from occurring at the CDR module 120. Therefore, it is preferable that the limiting amplifier 113 is implemented to have the maximum gain and a wide bandwidth.
[9] FIG. IB is a circuit diagram of the limiting amplifier 113 shown in FIG. IA. The limiting amplifier 113 comprises a current source Is, a first amplifier unit Al, a second amplifier unit A2 and a buffer unit B, amplifying an input signal Vin and outputting a signal Vout having a uniform level.
[10] As illustrated in FIG. IB, the first amplifier unit Al may be represented as an equivalent circuit comprising load resistors R connected to a supply voltage Vdd, transistors M and M for input signal amplification, and a source resistor R connected to a common source node of the transistors M and M . Using the small-signal equivalent circuit of FIG. IB, a voltage gain IAvI of an output signal Vout to an input signal Vin may be expressed by following Formula 1.
[11] [Formula 1]
1121 \ Av \ = gmRD / ( 1 + gm Rs / 2) = gmRD
[13] In Formula 1, IAvI denotes voltage gain, g denotes transconductance of the transistors M and M , R denotes load resistance, and R denotes source resistance.
1 2 D S
[14] The voltage gain IAvI of Formula 1 depending on a frequency band oo is illustrated in FIG. 1C. As illustrated in FIG. 1C, poles of the circuit as shown in FIG. IB are shown at 1/R C and (1 + g R 12)1 R C , and the bandwidth is
S S m S S S
\/2τιRD CL
(C denotes a load capacitance from the viewpoint of an output side.) [15] In other words, conventional limiting amplifiers cannot have both of the maximum gain and a wide bandwidth, and thus are mostly implemented to improve voltage gain rather than bandwidth. Therefore, in order to receive mass information, optical receivers require a limiting amplifier having an excellent gain characteristic and a wide bandwidth.
Disclosure of Invention
Technical Problem [16] The present invention is directed to a limiting amplifier having an excellent gain characteristic and a wide bandwidth.
Technical Solution [17] One aspect of the present invention provides a limiting amplifier having improved gain and bandwidth characteristics, comprising: a distributor for distributing an input voltage signal; an amplifier module for receiving and amplifying the distributed voltage signal; and a current source for supplying current to the distributor and the amplifier module. Here, the amplifier module comprises: a first amplifier unit for amplifying the voltage signal input from the distributor; a second amplifier unit for amplifying an output of the first amplifier unit again; and a feedback unit connected to an output end of the second amplifier unit, feeding back an output of the second amplifier unit to an input end of the first amplifier unit, and comprising a feedback resistor and a transistor having a source follower structure.
Advantageous Effects
[18] According to the present invention, it is possible to obtain uniform gain that is a unique characteristic of a limiting amplifier. In addition, it is possible to implement a limiting amplifier having a wide bandwidth as well as an improved gain characteristic.
Brief Description of the Drawings [19] FIG. IA schematically illustrates a constitution of an optical receiver of an optical communication system;
[20] FIG. IB is a circuit diagram of a limiting amplifier shown in FIG. IA;
[21] FIG. 1C shows voltage gain of the limiting amplifier of FIG. IB depending on frequency band; [22] FIG. 2 is a circuit diagram of a limiting amplifier according to an exemplary embodiment of the present invention; [23] FIGS. 3A and 3B illustrate voltage gain characteristics of a limiting amplifier according to an exemplary embodiment of the present invention from the viewpoint of frequency and time; [24] FIG. 4 shows a comparison between voltage gain and bandwidth characteristics of a limiting amplifier according to an exemplary embodiment of the present invention and a conventional limiting amplifier; and [25] FIG. 5 is a circuit diagram of a limiting amplifier according to another exemplary embodiment of the present invention.
[26] * Description of Major Symbols in the above Figures
[27] 210 and 510: Distributor
[28] 230 and 530: Amplifier module
[29] Is: Current source
[30] 520: Input buffer
[31] 540: Output buffer
Mode for the Invention [32] Hereinafter, exemplary embodiments of the present invention will be described in detail. However, the present invention is not limited to the exemplary embodiments disclosed below, but can be implemented in various types. Therefore, the present exemplary embodiments are provided for complete disclosure of the present invention and to fully inform the scope of the present invention to those ordinarily skilled in the art.
[33] FIG. 2 is a circuit diagram of a limiting amplifier according to an exemplary embodiment of the present invention.
[34] As illustrated in FIG. 2, a limiting amplifier 200 according to an exemplary embodiment of the present invention roughly comprises: a distributor SD 210 for distributing an input voltage signal; an amplifier module L_AMP 230 for receiving and amplifying the distributed voltage signal; and a current source Is for supplying current to the distributor SD 210 and the amplifier module L_AMP 230.
[35] The distributor SD 210 serves to distribute a single input voltage signal into two voltage signals and output them, and comprises a 1-1 transistor MaI, a 1-2 transistor MbI, and first to third load resistors R Ll , R L2 and R L3.
[36] The respective gate electrodes of the 1-1 and 1-2 transistors MaI and MbI are connected to an input voltage terminal V , the drain electrodes are respectively connected to a supply voltage Vdd through the first and second load resistors R and R L2 , and the source electrodes are connected in common to a 3-4 transistor Mc4 of the current source Is. And, the third load resistor R is connected between the supply
L3 voltage Vdd and the gate electrode of the 1-2 transistors MbI. The MaI, MbI and Mc5 are supplied by the first to third load resistors R , R and R . The three load resistors rr J Ll L2 L3
R , R and R are used to remove a capacitance element generated from the PMOS
Ll L2 L3 transistors. [37] When a voltage signal is input from the input voltage terminal V , the input voltage
IN signal is distributed by the 1-1 and 1-2 transistors MaI and MbI of the distributor SD 210 and output to the amplifier module L_AMP 230. Here, the two voltage signals output to the amplifier module L_AMP 230 have the same level and a phase difference of π.
[38] Meanwhile, the amplifier module L_AMP 230 serves to amplify the voltage signals input from the distributor SD 210. The amplifier module L_AMP 230 comprises: a first amplifier unit 231 for amplifying the input voltage signals; a second amplifier unit 233 for amplifying outputs of the first amplifier unit 231 again; and a feedback unit 235 connected to output ends of the second amplifier unit 233 in order to feed back outputs of the second amplifier unit 233 to input ends of the first amplifier unit 231. The constitution and connection of the components will now be briefly described.
[39] First, the first amplifier unit 231 comprises 2-1 and 2-2 transistors Ma3 and Mb3. The gate electrodes of the 2-1 and 2-2 transistors Ma3 and Mb3 are respectively connected to output ends of the distributor SD 210, the drain electrodes of them are respectively connected to the gates of 2-3 and 2-4 transistors Ma2 and Mb2, and the source electrodes of them are connected in common to a 3-9 transistor Mc9 of the current source Is.
[40] The second amplifier unit 233 comprises the 2-3 and 2-4 transistors Ma2 and Mb2.
The drain electrodes of the 2-3 and 2-4 transistors Ma2 and Mb2 are respectively connected to the gates of 2-5 and 2-6 transistors MSl and MS2, and the source electrodes of them are connected in common to a 3-10 transistor McIO of the current source Is.
[41] The feedback unit 235 comprises first and second feedback resistors R and R , and fl f2 the 2-5 and 2-6 transistors MSl and MS2 having a source follower structure in which source voltage and phase are the same as gate voltage and phase. Between the drain electrodes of the 2-5 and 2-6 transistors MSl and MS2 and the gate electrodes of the 2-3 and 2-4 transistors Ma3 and Mb3, the feedback resistors R fl and R f2 are connected, respectively.
[42] Meanwhile, the amplifier module L_AMP 230 further comprises fourth and fifth load resistors R and R for adjusting gain of the first and second amplifier units 231 and 233. The fourth and fifth load resistors R L4 and R L5 are connected between the gate electrodes of the 2-5 and 2-6 transistors MSl and MS2 and the supply voltage Vdd, respectively. [43] The present invention has a most remarkable characteristic in that the limiting amplifier is constituted to improve both a voltage gain characteristic and a bandwidth characteristic by connecting the feedback resistors R and R to one side of an fl f2 amplifier stage in the amplifier module L_AMP 230 and connecting the 2-5 and 2-6 transistors MS 1 and MS2 having a source follower structure to the other side. From this viewpoint, operation of the limiting amplifier according to an exemplary embodiment of the present invention will now be described in detail.
[44] First, respective voltage signals amplified by the first and second amplifier units 231 and 233 are input to the 2-5 and 2-6 transistors MSl and MS2 of the feedback unit 235, and thus the 2-5 and 2-6 transistors MSl and MS2 having a source follower structure output the input voltage signals as they are to the feedback resistors R and R .
[45] Here, voltage gain IAvI may be expressed by following Formula 2.
[46] [Formula 2]
Figure imgf000006_0001
[48] In Formula 2, IAvI denotes voltage gain, g denotes transconductance of the 2-3 and
2-4 transistors Ma2 and Mb2, g denotes transconductance of the 2-1 and 2-2 m3 transistors Ma3 and Mb3, g denotes transconductance of the 2-5 and 2-6 transistors ms
MSl and MS2, R denotes source resistance, and R denotes feedback resistance.
L f
[49] As can be seen from Formula 2, voltage gain of the amplifier module L_AMP 230 is in proportion to the transconductance g of the 2- 1 and 2-2 transistors Ma3 and Mb3 m3 and the feedback resistance R , and thus the maximum gain can be increased using a feedback resistor having a large resistance value.
[50] However, when the maximum gain is improved using a feedback resistor in this way, the gain characteristic is improved by a Miller effect due to the feedback resistors R and R , but a bandwidth is reduced. f2
[51] In order to solve this problem, the present invention reduces the Miller effect due to the feedback resistors R and R using the 2-5 and 2-6 transistors MSl and MS2 fl f2 having a source follower structure, thereby enlarging the bandwidth. Consequently, it is possible to implement a limiting amplifier having an improved bandwidth characteristic together with an improved voltage gain characteristic.
[52] FIGS. 3 A and 3B illustrate voltage gain characteristics of a limiting amplifier according to an exemplary embodiment of the present invention from the viewpoint of frequency and time.
[53] As illustrated in FIG. 3A, in the limiting amplifier according to an exemplary embodiment of the present invention, poles are positioned at 1/R (C + C ) and (1 + g
S S ms3
R /2)/R (C + C ), so that values of the poles increase in the frequency domain. m S S aS ms3
Thus, the limiting amplifier according to an exemplary embodiment of the present invention has a larger bandwidth than a conventional limiting amplifier. In addition, it can be seen from FIG. 3B that the limiting amplifier according to an exemplary embodiment of the present invention always outputs a voltage signal having a uniform level regardless of an input voltage signal.
[54] FIG. 4 shows a comparison between voltage gain and bandwidth characteristics of a limiting amplifier according to an exemplary embodiment of the present invention and a conventional limiting amplifier. As illustrated in FIG. 4, the limiting amplifier according to an exemplary embodiment of the present invention can have a larger bandwidth as well as a higher voltage gain than the conventional limiting amplifier.
[55] FIG. 5 is a circuit diagram of a limiting amplifier according to another exemplary embodiment of the present invention, which further comprises: an input buffer D_IN for adjusting the level of an input signal input to an amplifier module L_AMP 530; and an output buffer D_OUT for adjusting the level of an output signal output from the amplifier module L_AMP 530 and improving a return loss characteristic. The limiting amplifier according to another exemplary embodiment of the present invention operates in the same way as the limiting amplifier shown in FIG. 2, and thus a detailed description thereof will not be reiterated.
[56] As described above, a limiting amplifier according to an exemplary embodiment of the present invention can have an excellent gain characteristic and a wide bandwidth using a feedback resistor and a transistor of a source follower structure connected to an amplifier stage.
[57] While the invention has been shown and described with reference to certain exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

Claims
[1] A limiting amplifier having improved gain and bandwidth characteristics, comprising: a distributor for distributing an input voltage signal; an amplifier module for receiving and amplifying the distributed voltage signal; and a current source for supplying current to the distributor and the amplifier module, wherein the amplifier module comprises: a first amplifier unit for amplifying the voltage signal input from the distributor; a second amplifier unit for amplifying an output of the first amplifier unit again; and a feedback unit connected to an output end of the second amplifier unit, feeding back an output of the second amplifier unit to an input end of the first amplifier unit, and comprising a feedback resistor and a transistor having a source follower structure.
[2] The limiting amplifier of claim 1, wherein the distributor comprises 1-1 and 1-2 transistors, respective gate electrodes of the 1-1 and 1-2 transistors are connected to an input voltage terminal, respective drain electrodes of the same are connected to a supply voltage, and source electrodes of the same are connected in common to the current source.
[3] The limiting amplifier of claim 2, wherein the distributor further comprises first to third load resistors for removing a capacitance element generated from the 1-1 and 1-2 transistors, the first load resistor is connected between the supply voltage and the drain electrode of the 1-1 transistor, the second load resistor is connected between the supply voltage and the drain electrode of the 1-2 transistor, and the third load resistor is connected between the supply voltage and the gate electrode of the 1-2 transistor.
[4] The limiting amplifier of claim 1, wherein the first amplifier unit comprises 2-1 and 2-2 transistors, and the second amplifier unit comprises 2-3 and 2-4 transistors.
[5] The limiting amplifier of claim 1, wherein the feedback unit comprises first and second feedback resistors and 2-5 and 2-6 transistors having a source follower structure.
[6] The limiting amplifier of claim 4, wherein gate electrodes of the 2- 1 and 2-2 transistors in the first amplifier unit are respectively connected to output ends of the distributor, drain electrodes of the same are respectively connected to gates of the 2-3 and 2-4 transistors in the second amplifier unit, and source electrodes of the same are connected in common to the current source. [7] The limiting amplifier of claim 4, wherein drain electrodes of the 2-3 and 2-4 transistors in the second amplifier unit are respectively connected to gates of the
2-5 and 2-6 transistors, and source electrodes of the same are connected in common to the current source. [8] The limiting amplifier of claim 5, wherein drain electrodes of the 2-3 and 2-4 transistors in the second amplifier unit are respectively connected to gates of the
2-5 and 2-6 transistors, and source electrodes of the same are connected in common to the current source. [9] The limiting amplifier of claim 1, wherein the amplifier module further comprises fourth and fifth load resistors for adjusting gain of the first and second amplifier units, and the fourth and fifth load resistors are respectively connected between gate electrodes of the 2-5 and 2-6 transistors in the feedback unit and a supply voltage. [10] The limiting amplifier of claim 5, wherein the amplifier module further comprises fourth and fifth load resistors for adjusting gain of the first and second amplifier units, and the fourth and fifth load resistors are respectively connected between gate electrodes of the 2-5 and 2-6 transistors in the feedback unit and a supply voltage. [11] The limiting amplifier of claim 1, wherein a maximum voltage gain of the amplifier module increases with an increase in resistance value of the feedback resistor. [12] The limiting amplifier of claim 1, wherein a Miller effect due to the feedback resistor is reduced by the 2-5 and 2-6 transistors in the feedback unit. [13] The limiting amplifier of claim 5, wherein a Miller effect due to the feedback resistor is reduced by the 2-5 and 2-6 transistors in the feedback unit.
PCT/KR2007/005948 2006-12-05 2007-11-23 Limiting amplifier having improved gain and bandwidth characteristics WO2008069478A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2006-0122223 2006-12-05
KR20060122223 2006-12-05
KR10-2007-0053847 2007-06-01
KR1020070053847A KR100886178B1 (en) 2006-12-05 2007-06-01 Limiting amplifier improved gain and bandwidth character

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WO2008069478A1 true WO2008069478A1 (en) 2008-06-12

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4931746A (en) * 1988-05-11 1990-06-05 Licentia Patent-Verwaltungs-Gmbh Controllable broadband amplifier and mixer which includes the amplifier
EP0998040A2 (en) * 1998-10-23 2000-05-03 Hitachi, Ltd. Optical receiver module, phase-locked loop circuit, voltage-controlled oscillator and frequency response controllable amplifier
US6919767B2 (en) * 2000-12-22 2005-07-19 Infineon Technologies Ag Circuit arrangement for low-noise fully differential amplification

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4931746A (en) * 1988-05-11 1990-06-05 Licentia Patent-Verwaltungs-Gmbh Controllable broadband amplifier and mixer which includes the amplifier
EP0998040A2 (en) * 1998-10-23 2000-05-03 Hitachi, Ltd. Optical receiver module, phase-locked loop circuit, voltage-controlled oscillator and frequency response controllable amplifier
JP2000134066A (en) * 1998-10-23 2000-05-12 Hitachi Ltd Optical receiver, phase-locked loop circuit, voltage controlled oscillator and frequency response variable amplifier
US6919767B2 (en) * 2000-12-22 2005-07-19 Infineon Technologies Ag Circuit arrangement for low-noise fully differential amplification

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