KR100886178B1 - Limiting amplifier improved gain and bandwidth character - Google Patents

Abstract

The present invention relates to a limiting amplifier having improved gain and bandwidth characteristics. The present invention relates to a feedback amplifier connected to the amplifier stage of the limiting amplifier to improve the maximum gain characteristic, and a transistor having a source follower structure connected to the amplifier stage to reduce the Miller effect. By improving the bandwidth characteristic, not only a constant gain characteristic, which is a characteristic of the limiting amplifier, can be obtained, but also a wide bandwidth characteristic can be obtained along with the gain characteristic improvement.

Limiting amplifier, optical receiver, optical communication system

Description

Limiting amplifier with improved gain and bandwidth characteristics {LIMITING AMPLIFIER IMPROVED GAIN AND BANDWIDTH CHARACTER}

1A is a configuration diagram schematically illustrating an optical receiver of an optical communication system.

FIG. 1B is a circuit diagram of the limiting amplifier of FIG. 1A.

FIG. 1C is a diagram illustrating the voltage gain of the limiting amplifier of FIG. 1B in the frequency band.

2 is a circuit diagram of a limiting amplifier according to an embodiment of the present invention.

3A and 3B are diagrams illustrating voltage gain characteristics of a limiting amplifier according to an embodiment of the present invention in terms of frequency and time.

4 is a view comparing voltage gain and bandwidth characteristics of a limiting amplifier according to the present invention and a conventional limiting amplifier.

5 is a circuit diagram of a limiting amplifier according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

210, 510: Splitter

230, 530: amplification module

Is: current source

520: input buffer

540: output buffer

The present invention relates to a limiting amplifier having improved gain and bandwidth characteristics, and more particularly, to a limiting amplifier for an optical receiver configured to improve both gain and bandwidth characteristics by connecting a transistor having a feedback resistor and a source follower structure to an amplifier stage. will be.

The Internet and mobile communication services enable the general public to receive various multimedia services anytime, anywhere, and accordingly, data traffic of wired / wireless communication networks is continuously increasing.

As data traffic continues to increase, operators are building communication networks with large-capacity transmission systems to expand their capacity. Among such large-capacity communication networks, demand for optical communication systems is expected to increase further. Accordingly, demand for optical communication components such as optical transmitters and receivers will increase.

1A is a configuration diagram schematically illustrating an optical receiver of an optical communication system.

As shown in FIG. 1A, the conventional optical receiver 100 is largely comprised of an optical receiving module 110 and a clock and data recovery (CDR) module 120, and each module is a detailed device. Consists of In conventional 10Gb / s or less optical receivers, each module is generally integrated into one.

The optical receiving module 110 performs a slight amplification while converting a current converted through a photodiode (PD) 111 and a photodiode (PD) 111 into a voltage to convert an optical signal into an electrical signal. Transimpedance Amplifier (TIA) 112, and a limiting amplifier that receives the amplified signal from the Transimpedance Amplifier (TIA) 112 and amplifies to meet the input conditions of the CDR module 120 of the next stage ( Limiting Amplifier (113). In this case, the limiting amplifier 113 generally has a limiting amplification function that outputs a constant magnitude regardless of the magnitude of the input signal.

That is, the role of the limiting amplifier 113 in the optical receiving module 110 is the photodiode PD even if the optical power received from the photodiode PD changes (for example, from -30 dBm to -10 dBm). By amplifying the pre-electrically converted electrical signal into a constant size output signal, the error is prevented from occurring in the clock and data reproducing (CDR) module 120. Therefore, the limiting amplifier 113 has a maximum gain and optical It is desirable to be implemented to have bandwidth characteristics.

FIG. 1B is a circuit diagram of the limiting amplifier 113 of FIG. 1A, which is composed of a current source Is, a first amplifier A1, a second amplifier A2, and a buffer B, and includes an input signal Vin. ) Is amplified and output as a fixed size signal (Vout).

As shown in FIG. 1B, when the first amplifier A1 is represented as an equivalent circuit, a load resistor R _D connected to a power supply voltage Vdd, transistors M ₁ and M ₂ for amplifying an input signal, and It can be represented by a source resistor (R _s ) connected to the common source node of the transistors M ₁ , M ₂ , and the voltage gain of the output signal Vout relative to the input signal Vin using the small signal equivalent circuit of FIG. 1B. (| Av |) may be expressed as Equation 1 below.

| Av | = g _m R _D / (1 + g _m R _s / 2) ≒ g _m R _D

In Equation 1, | Av | represents a voltage gain, g _m represents a transconductance of transistors M ₁ and M ₂ , R _D represents a load resistance, and R _s represents a source resistance.

When the voltage gain (| Av |) of Equation 1 is expressed in the frequency band (ω), it is as shown in FIG. 1C, and as shown in FIG. 1C, the pole in the circuit as shown in FIG. 1B is 1 / R _s C. _It appears at _s and (1 + g _m R _s / 2) / R _s C _s and its bandwidth is 1 / 2pR _D C _L (where C _L is the load capacitance seen from the output side).

That is, since the conventional limiting amplifier is difficult to satisfy both the maximum gain and the wide bandwidth characteristics, this is mostly implemented by focusing on the improvement of the voltage gain, and therefore, the gain in order to receive a large amount of information in the optical receiver is obtained. There is a need for a limited amplifier with good characteristics and a wide bandwidth.

Accordingly, an object of the present invention is to implement a limiting amplifier having a wide bandwidth characteristic while having excellent gain characteristics.

In order to achieve the above object, a limiting amplifier having improved gain and bandwidth characteristics according to the present invention includes a divider for distributing an input voltage signal; An amplification module for receiving and amplifying the divided voltage signals; And a current source for supplying current to the divider and the amplifying module, wherein the amplifying module includes: a first amplifying unit for amplifying a voltage signal input from the divider, and amplifying the output of the first amplifying unit again; And a feedback part connected to an output terminal of the second amplifier part and having a feedback resistor and a transistor having a source follower structure for feeding back the output of the second amplifier part to an input terminal of the first amplifier part. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram of a limiting amplifier according to an embodiment of the present invention.

As shown in FIG. 2, the limiting amplifier 200 according to the present invention includes a divider SD 210 for largely distributing an input voltage signal, and an amplifying module L_AMP for receiving and amplifying the divided voltage signal. 230 and a current source Is for supplying current to the divider SD 210 and the amplification module L_AMP 230.

The divider (SD) 210 divides and outputs a single input voltage signal into two voltage signals, and includes first to first and second transistors Ma1 and Mb1 and first to third load resistors R. FIG. _L1 , R _L2 , R _L3 ).

Gate electrodes of the first and second transistors Ma1 and Mb1 are connected to input voltage terminals V _IN , respectively, and drain electrodes are connected to the first and second load resistors R _L1 and R _L2 . The source electrode is connected to the power supply voltage Vdd, respectively, and the source electrode is commonly connected to the third and fourth transistors Mc4 of the current source Is. The third load resistor R _L3 is connected between the power supply voltage Vdd and the gate electrode of the 1-2 transistor Mb1. Here, the first to third load resistors R _L1 , R _L2 , and R _L3 are capacitance components generated in the PMOS transistor when the first to first and second transistors Ma1 and Mb1 are PMOS transistors. It was used to remove it.

When a voltage signal is input from the input voltage terminal V _IN , the input voltage signal is distributed through the first-first and second-transistors Ma1 and Mb1 of the divider SD 210 to amplify the amplifier module L_AMP. The two voltage signals output to the amplifier 230 are the same in magnitude and have a phase difference of π.

On the other hand, the amplification module (L_AMP) 230 is for amplifying the voltage signal input from the divider (SD) 210, a first amplifier 231 for amplifying the input voltage signal, and the first The second amplifier 233 for amplifying the output of the amplifier 231 again, and the output terminal of the second amplifier 233 connected to the output terminal of the second amplifier 233, the first amplifier It consists of a feedback unit 235 for feeding back to the input terminal of 231, the configuration and connection relationship briefly described as follows.

First, the first amplifier 231 is composed of 2-1 and 2-2 transistors Ma3 and Mb3, and the gate electrodes of the 2-1 and 2-2 transistors Ma3 and Mb3 are the dividers. (SD) 210 are respectively connected to the output terminal, the drain electrode is connected to the gate of the 2-3, 2-4 transistors Ma2, Mb2, respectively, the source electrode is the third source of the current source (Is) Commonly connected to transistor Mc9.

The second amplifier 233 is composed of the 2-3, 2-4 transistors Ma2, Mb2, and the drain electrodes of the 2-3, 2-4 transistors Ma2, Mb2 are the second. 5 and 2-6 are respectively connected to gates of the transistors MS1 and MS2, and the source electrode is commonly connected to the 3-10 transistor Mc10 of the current source Is.

The feedback unit 235 includes the first and second feedback resistors R _f1 and R _f2 , and the second and fifth transistors 2-5 and 2-6 having a source follower structure having the same source voltage as the gate voltage and the same phase. MS1 and MS2, and a feedback resistor (B) between the drain electrodes of the second to fifth and second transistors MS1 and MS2 and the gate electrodes of the second and second transistors 2-3 and 2-4, Ma3 and Mb3. R _f1 , R _f2 ) are respectively connected.

The amplifier module L_AMP 230 further includes fourth and fifth load resistors R _L4 and R _L5 for controlling gains of the first and second amplifiers 231 and 233. , 5 load resistors (R _L4 , R _L5 ) are respectively connected between the gate electrode and the power supply voltage (Vdd) of the 2-5, 2-6 transistors MS1, MS2.

The present invention connects the feedback resistors (R _f1 , R _f2 ) to one side of the amplification stage of the amplification module (L_AMP) 230, and the second to second transistors 5-5, 2-6 (MS1, MS2) of the source follower structure. Each connection has the greatest feature in that both the voltage gain characteristic and the bandwidth characteristic can be improved. In this respect, the operation of the limiting amplifier according to the present invention will be described in detail as follows.

First, each of the voltage signals amplified by the first and second amplifiers 231 and 233 is input to the second to fifth and second transistors MS1 and MS2 of the feedback unit 235, and thus the source follower. The 2-5 and 2-6 transistors MS1 and MS2 of the structure output the input voltage signals to the feedback resistors R _f1 and R _f2 as they are.

Here, the voltage gain | Av | may be expressed by Equation 2 below.

In Equation 2, | Av | is a voltage gain, g _m2 Is the transconductance of the 2-3, 2-4 transistors Ma2, Mb2, g _m3 is the transconductance of the 2-1, 2-2 transistors Ma3, Mb3, and g _ms is the 2-5, 2- The transconductance, R _L , of the six transistors MS1, MS2 represents a load resistance, and R _f represents a feedback resistance, respectively.

As can be seen in Equation 2, the voltage gain of the amplifying module (L_AMP) 230 is the transconductance (g _m3 ) and feedback resistor (R) of the 2-1, 2-2 transistors Ma3, Mb3. It can be seen that the maximum gain can be improved by using a feedback resistor with a large resistance value in proportion to _f ).

However, when the maximum gain is improved by using the feedback resistor in this manner, the gain characteristic is improved by the Miller effect caused by the feedback resistors R _f1 and R _f2 , but the bandwidth characteristic is reduced. Is generated.

To this end, the present invention reduces the Miller effect caused by the feedback resistors R _f1 and R _f2 through the 2-5 and 2-6 transistors MS1 and MS2 of the source follower structure so that the bandwidth characteristics can be extended. As a result, limiting amplifiers with improved voltage gain and bandwidth characteristics can be realized.

3A and 3B are diagrams illustrating voltage gain characteristics of a limiting amplifier according to an embodiment of the present invention in terms of frequency and time.

As shown in FIG. 3A, the limiting amplifier of the present invention has a pole of 1 / R _S (C _aS + C _{ms 3} ) and (1 + g _m R) due to a transistor having a feedback resistor and a source follower structure connected to the amplifier stage. _s / 2) / R _s (C _aS + C _ms3 ), and its value is increased in the frequency domain, and thus, it has a wider frequency characteristic than the conventional limiting amplifier. Also, as shown in FIG. 3B, it can be seen that a voltage signal having a constant magnitude is always output regardless of the input voltage signal.

4 is a view comparing voltage gain and bandwidth characteristics of a limiting amplifier according to the present invention and a conventional limiting amplifier. As shown in FIG. 4, a limiting amplifier according to the present invention has a higher voltage gain than a conventional limiting amplifier. It can be seen that not only the characteristics can be obtained but also the wider bandwidth characteristics.

FIG. 5 is a circuit diagram of a limiting amplifier according to another embodiment of the present invention. An input buffer D_IN and an amplifying module L_AMP 530 for adjusting the level of an input signal input to an amplifying module L_AMP 530 are shown in FIG. The apparatus further includes an output buffer D_OUT for adjusting the level of the output signal output from the output signal and improving the return loss characteristic. Since the operation of the limiting amplifier of FIG. 2 is the same, a detailed description thereof will be omitted.

As described above, the limiting amplifier according to the present invention has an advantage that a wide bandwidth can be obtained with excellent gain characteristics by a transistor having a feedback resistor and a source follower structure connected to the amplifier stage.

So far, the present invention has been described with reference to the preferred embodiments, and those skilled in the art to which the present invention belongs may be embodied in a modified form without departing from the essential characteristics of the present invention. You will understand. Therefore, the disclosed embodiments should be considered in descriptive sense only and not for purposes of limitation. The scope of the present invention is shown in the claims rather than the foregoing description, and all differences within the scope will be construed as being included in the present invention.

As described above, according to the present invention, it is possible not only to obtain a constant gain characteristic which is a unique characteristic of the limiting amplifier, but also to implement a limiting amplifier capable of obtaining a wide bandwidth characteristic as well as improving the gain characteristic.

Claims (10)

A divider for distributing an input voltage signal; An amplification module for receiving and amplifying the divided voltage signals; And A current source for supplying current to the distributor and amplification module, The amplification module, A first amplifier for amplifying the voltage signal input from the divider; A second amplifier for amplifying the output of the first amplifier again; A feedback part connected to an output terminal of the second amplifier part and including a feedback resistor and a transistor having a source follower structure for feeding back the output of the second amplifier part to an input terminal of the first amplifier part, As the feedback resistance of the feedback unit increases, the maximum voltage gain of the amplification module is increased, and the Miller effect caused by the feedback resistor is reduced by the transistor of the source follower structure of the feedback unit. Enhanced limiting amplifier. The method of claim 1, wherein the divider comprises first to first and second transistors, An input voltage terminal is connected to a gate electrode of each of the transistors 1-1 and 1-2, a power supply voltage is connected to a drain electrode, and a current source is commonly connected to a source electrode. This improved limiting amplifier. The method of claim 2, wherein the distributor, Further comprising first to third load resistors for removing capacitance components generated in the first and second transistors, The first load resistor is connected between the power supply voltage and the drain electrode of the 1-1 transistor, and the second load resistor is connected between the power supply voltage and the drain electrode of the 1-2 transistor. 3. The amplifier of claim 2, wherein the load resistance is connected between the power supply voltage and the gate electrode of the first and second transistors. The method of claim 1, The first amplifier includes the 2-1, 2-2 transistors, and the second amplifier includes a 2-3, 2-4 transistors, the gain and bandwidth characteristics improved limited amplifier. The method of claim 4, wherein the feedback unit, A limited amplifier having improved gain and bandwidth characteristics, comprising first and second feedback resistors and second and second transistors 2-5 and 2-6 having a source follower structure. The method of claim 4, wherein Gate electrodes of the 2-1 and 2-2 transistors of the first amplifier part are respectively connected to the output terminals of the divider, and drain electrodes are respectively connected to the gates of the 2-3 and 2-4 transistors of the second amplifier part. And a source electrode connected to the current source in common, wherein the limited amplifier has improved gain and bandwidth characteristics. The method of claim 5, Gain characteristics, characterized in that the drain electrodes of the 2-3, 2-4 transistors of the second amplification unit are connected to the gates of the 2-5, 2-6 transistors, respectively, and the source electrode is commonly connected to the current source. Limiting amplifier with improved bandwidth and bandwidth characteristics. The method of claim 5, wherein the amplification module, Further comprising fourth and fifth load resistors for gain control of the first and second amplifiers, And the load resistors 4 and 5 are connected between the gate electrodes and the power supply voltages of the second and second transistors 2-5 and 2-6, respectively. delete delete

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